add rng

efm32/src/InitDevice.c

@@ -19,6 +19,7 @@
 #include "em_device.h"
 #include "em_chip.h"
 #include "em_assert.h"
+#include "em_adc.h"
 #include "em_cryotimer.h"
 #include "em_crypto.h"
 #include "em_gpio.h"
@@ -35,6 +36,7 @@ extern void enter_DefaultMode_from_RESET(void) {
 
 	EMU_enter_DefaultMode_from_RESET();
 	CMU_enter_DefaultMode_from_RESET();
+	ADC0_enter_DefaultMode_from_RESET();
 	USART0_enter_DefaultMode_from_RESET();
 	USART1_enter_DefaultMode_from_RESET();
 	LDMA_enter_DefaultMode_from_RESET();
@@ -127,6 +129,9 @@ extern void CMU_enter_DefaultMode_from_RESET(void) {
 	/* Enable clock for HF peripherals */
 	CMU_ClockEnable(cmuClock_HFPER, true);
 
+	/* Enable clock for ADC0 */
+	CMU_ClockEnable(cmuClock_ADC0, true);
+
 	/* Enable clock for CRYOTIMER */
 	CMU_ClockEnable(cmuClock_CRYOTIMER, true);
 
@@ -171,6 +176,16 @@ extern void CMU_enter_DefaultMode_from_RESET(void) {
 extern void ADC0_enter_DefaultMode_from_RESET(void) {
 
 	// $[ADC0_Init]
+	ADC_Init_TypeDef ADC0_init = ADC_INIT_DEFAULT;
+
+	ADC0_init.ovsRateSel = adcOvsRateSel2;
+	ADC0_init.warmUpMode = adcWarmupNormal;
+	ADC0_init.timebase = ADC_TimebaseCalc(0);
+	ADC0_init.prescale = ADC_PrescaleCalc(7000000, 0);
+	ADC0_init.tailgate = 0;
+	ADC0_init.em2ClockConfig = adcEm2Disabled;
+
+	ADC_Init(ADC0, &ADC0_init);
 	// [ADC0_Init]$
 
 	// $[ADC0_InputConfiguration]

efm32/src/crypto.c

@@ -8,12 +8,14 @@
 
 #include "util.h"
 #include "crypto.h"
+#include "em_adc.h"
 
 
 #include "sha256.h"
 #include "uECC.h"
 #include "aes.h"
 #include "ctap.h"
+#include "log.h"
 
 #include MBEDTLS_CONFIG_FILE
 #include "sha256_alt.h"
@@ -26,8 +28,8 @@ const uint8_t attestation_key[];
 const uint16_t attestation_key_size;
 
 
-static SHA256_CTX sha256_ctx;
-mbedtls_sha256_context embed_sha256_ctx;
+static mbedtls_sha256_context embed_sha256_ctx;
+static mbedtls_ctr_drbg_context ctr_drbg;
 
 static const struct uECC_Curve_t * _es256_curve = NULL;
 static const uint8_t * _signing_key = NULL;
@@ -132,13 +134,51 @@ void crypto_sha256_hmac_final(uint8_t * key, uint32_t klen, uint8_t * hmac)
     crypto_sha256_final(hmac);
 }
 
-mbedtls_ctr_drbg_context ctr_drbg;
+
+
+
+uint8_t adc_rng(void)
+{
+	int i;
+	uint8_t random = 0;
+
+   /* Random number generation */
+   for (i=0; i<3; i++)
+   {
+      ADC_Start(ADC0, adcStartSingle);
+      while ((ADC0->IF & ADC_IF_SINGLE) == 0);
+      random |= ((ADC_DataSingleGet(ADC0) & 0x07) << (i * 3));
+   }
+
+   return random;
+}
+
+// Generate @num bytes of random numbers to @dest
+// return 1 if success, error otherwise
+int ctap_generate_rng(uint8_t * dst, size_t num)
+{
+	return mbedtls_ctr_drbg_random(&ctr_drbg,dst,num) == 0;
+}
+
+int adc_entropy_func( void *data, unsigned char *output, size_t len )
+{
+	while(len--)
+		*output++ = adc_rng();
+	return 0;
+}
 
 void crypto_ecc256_init()
 {
     uECC_set_rng((uECC_RNG_Function)ctap_generate_rng);
     _es256_curve = uECC_secp256r1();
     mbedtls_ctr_drbg_init(&ctr_drbg);
+
+    if ( mbedtls_ctr_drbg_seed(&ctr_drbg, adc_entropy_func, NULL,
+    		master_secret,32 ) != 0 ) {
+      printf2(TAG_ERR, "mbedtls_ctr_drbg_seed failed\n");
+      exit(1);
+    }
+
 }
 
 
@@ -507,6 +547,7 @@ void crypto_aes256_encrypt(uint8_t * buf, int length)
 }
 
 
+
 const uint8_t attestation_cert_der[] =
 "\x30\x82\x01\xfb\x30\x82\x01\xa1\xa0\x03\x02\x01\x02\x02\x01\x00\x30\x0a\x06\x08"
 "\x2a\x86\x48\xce\x3d\x04\x03\x02\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13"

efm32/src/device.c

@@ -11,6 +11,8 @@
 #include "em_chip.h"
 #include "em_gpio.h"
 #include "em_usart.h"
+#include "em_adc.h"
+#include "em_cmu.h"
 
 #include "cbor.h"
 #include "log.h"
@@ -21,17 +23,6 @@
 #define RDY_PIN			gpioPortC,10
 #define RW_PIN			gpioPortD,11
 
-// Generate @num bytes of random numbers to @dest
-// return 1 if success, error otherwise
-int ctap_generate_rng(uint8_t * dst, size_t num)
-{
-    int i;
-    for (i = 0; i < num; i++)
-    {
-        *dst++ = rand();
-    }
-    return 1;
-}
 
 uint32_t _c1 = 0, _c2 = 0;
 uint32_t ctap_atomic_count(int sel)
@@ -185,6 +176,29 @@ void GPIO_ODD_IRQHandler()
 
 }
 
+void init_adc()
+{
+   /* Enable ADC Clock */
+   CMU_ClockEnable(cmuClock_ADC0, true);
+   ADC_Init_TypeDef init = ADC_INIT_DEFAULT;
+   ADC_InitSingle_TypeDef singleInit = ADC_INITSINGLE_DEFAULT;
+
+   /* Initialize the ADC with the required values */
+   init.timebase = ADC_TimebaseCalc(0);
+   init.prescale = ADC_PrescaleCalc(7000000, 0);
+   ADC_Init(ADC0, &init);
+
+   /* Initialize for single conversion specific to RNG */
+   singleInit.reference = adcRefVEntropy;
+   singleInit.diff = true;
+   singleInit.posSel = adcPosSelVSS;
+   singleInit.negSel = adcNegSelVSS;
+   ADC_InitSingle(ADC0, &singleInit);
+
+   /* Set VINATT to maximum value and clear FIFO */
+   ADC0->SINGLECTRLX |= _ADC_SINGLECTRLX_VINATT_MASK;
+   ADC0->SINGLEFIFOCLEAR = ADC_SINGLEFIFOCLEAR_SINGLEFIFOCLEAR;
+}
 void device_init(void)
 {
     /* Chip errata */
@@ -218,12 +232,18 @@ void device_init(void)
 
     printing_init();
 
+    init_adc();
+
     CborEncoder test;
-    uint8_t buf[20];
+    uint8_t buf[64];
     cbor_encoder_init(&test, buf, 20, 0);
 
     printf("Device init\r\n");
     int i=0;
 
-
+    for (i = 0; i < sizeof(buf); i++)
+    {
+    	buf[i] = adc_rng();
+    }
+    dump_hex(buf,sizeof(buf));
 }