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Merge branch 'nfc' into nfc2

Browse Source
This commit is contained in:
Oleg Moiseenko
2019-02-07 14:49:47 +02:00
committed by GitHub
parent ca05385513 587c9aad14
commit 32400c8d09
43 changed files with 945 additions and 528 deletions
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6
targets/stm32l432/Makefile
View File

@@ -8,7 +8,7 @@ all:
$(MAKE) -f application.mk -j8 solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DFLASH_ROP=1'
all-hacker:
$(MAKE) -f application.mk solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DSOLO_HACKER -DFLASH_ROP=0'
$(MAKE) -f application.mk -j8 solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DSOLO_HACKER -DFLASH_ROP=0'
all-locked:
$(MAKE) -f application.mk -j8 solo.hex PREFIX=$(PREFIX) EXTRA_DEFINES='-DFLASH_ROP=2'
@@ -45,7 +45,6 @@ clean2:
$(MAKE) -f application.mk clean
$(MAKE) -f bootloader.mk clean
flash: solo.hex bootloader.hex
$(merge_hex) solo.hex bootloader.hex all.hex
STM32_Programmer_CLI -c port=SWD -halt -e all --readunprotect
@@ -56,8 +55,7 @@ flash_dfu: solo.hex bootloader.hex
# STM32_Programmer_CLI -c port=usb1 -halt -e all --readunprotect
STM32_Programmer_CLI -c port=usb1 -halt -rdu -d all.hex
flashboot: solo.hex bootloader.hex
$(merge_hex) solo.hex bootloader.hex all.hex
flashboot:
STM32_Programmer_CLI -c port=SWD -halt -e all --readunprotect
STM32_Programmer_CLI -c port=SWD -halt -d bootloader.hex -rst

4
targets/stm32l432/README.md
View File

@@ -1,4 +1,4 @@
# STM32L4xx Solo
# STM32L432 Solo
Check out our [official documentation](https://solo.solokeys.io/building/)
Check out our [official documentation](https://docs.solokeys.io/solo/building/)
for instructions on building and programming!

12
targets/stm32l432/bootloader/bootloader.h
View File

@@ -1,21 +1,21 @@
/*
* Copyright (C) 2018 SoloKeys, Inc. <https://solokeys.com/>
*
*
* This file is part of Solo.
*
*
* Solo is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
*
* Solo is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with Solo. If not, see <https://www.gnu.org/licenses/>
*
*
* This code is available under licenses for commercial use.
* Please contact SoloKeys for more information.
*/
@@ -66,7 +66,7 @@
#define SKIP_BUTTON_CHECK_FAST 1
void printing_init();
void hw_init(void);
void hw_init(int lf);
// Trigger software reset
void device_reboot();

25
targets/stm32l432/bootloader/main.c
View File

@@ -23,6 +23,10 @@
#include <stdlib.h>
#include <stdint.h>
#include "stm32l4xx_ll_rcc.h"
#include "stm32l4xx_ll_gpio.h"
#include "stm32l4xx.h"
#include "cbor.h"
#include "device.h"
#include "ctaphid.h"
@@ -32,9 +36,8 @@
#include "ctap.h"
#include "app.h"
#include "memory_layout.h"
#include "stm32l4xx_ll_rcc.h"
#include "init.h"
#include "stm32l4xx.h"
uint8_t REBOOT_FLAG = 0;
@@ -82,7 +85,16 @@ int main(int argc, char * argv[])
TAG_ERR
);
device_init();
// device_init();
init_gpio();
init_millisecond_timer(1);
#if DEBUG_LEVEL > 0
init_debug_uart();
#endif
printf1(TAG_GEN,"init device\n");
t1 = millis();
@@ -118,7 +130,14 @@ int main(int argc, char * argv[])
printf1(TAG_RED,"Not authorized to boot (%08x == %08lx)\r\n", AUTH_WORD_ADDR, *(uint32_t*)AUTH_WORD_ADDR);
}
start_bootloader:
SystemClock_Config();
init_gpio();
init_millisecond_timer(0);
init_pwm();
init_rng();
usbhid_init();
printf1(TAG_GEN,"init usb\n");
ctaphid_init();

6
targets/stm32l432/lib/usbd/usbd_desc.c
View File

@@ -56,12 +56,14 @@
#ifndef SOLO_HACKER
#define USBD_MANUFACTURER_STRING "Solo Keys"
#define USBD_PRODUCT_FS_STRING "Solo"
#define USBD_SERIAL_NUM "solocafebabe"
#ifndef USBD_SERIAL_NUM
#define USBD_SERIAL_NUM "0123456789ABCDEF"
#endif
#else
#define USBD_MANUFACTURER_STRING "Solo Keys"
#define USBD_PRODUCT_FS_STRING "Solo HACKER (Unlocked)"
#ifndef USBD_SERIAL_NUM
#define USBD_SERIAL_NUM "Solo-Keys-Solo"
#define USBD_SERIAL_NUM "0123456789ABCDEF"
#endif
#endif

13
targets/stm32l432/lib/usbd/usbd_hid.c
View File

@@ -114,15 +114,10 @@ USBD_ClassTypeDef USBD_HID =
NULL,
NULL,
NULL,
NULL,
NULL,
// USBD_HID_GetFSCfgDesc,
// USBD_HID_GetFSCfgDesc,
// USBD_HID_GetFSCfgDesc,
// USBD_HID_GetDeviceQualifierDesc,
USBD_HID_GetFSCfgDesc,
USBD_HID_GetFSCfgDesc,
USBD_HID_GetFSCfgDesc,
USBD_HID_GetDeviceQualifierDesc,
};
#define USBD_HID_CfgHSDesc USBD_HID_OtherSpeedCfgDesc

142
targets/stm32l432/src/ams.c
View File

@@ -79,27 +79,16 @@ uint8_t ams_read_reg(uint8_t addr)
return data;
}
// data must be 14 bytes long
void read_reg_block2(AMS_DEVICE * dev)
{
int i;
for (i = 0; i < 0x20; i++)
{
dev->buf[i] = ams_read_reg(i);
}
}
// data must be 14 bytes long
void read_reg_block(AMS_DEVICE * dev)
{
int i;
uint8_t mode = 0x20 | (0 );
uint8_t mode = 0x20 | (4 );
flush_rx();
send_recv(mode);
for (i = 0; i < 0x20; i++)
for (i = 0x04; i < 0x0d; i++)
{
dev->buf[i] = send_recv(0);
}
@@ -204,6 +193,30 @@ const char * ams_get_state_string(uint8_t regval)
return "STATE_WRONG";
}
int ams_state_is_valid(uint8_t regval)
{
if (regval & AMS_STATE_INVALID)
{
return 0;
}
switch (regval & AMS_STATE_MASK)
{
case AMS_STATE_OFF:
case AMS_STATE_SENSE:
case AMS_STATE_RESOLUTION:
case AMS_STATE_RESOLUTION_L2:
case AMS_STATE_SELECTED:
case AMS_STATE_SECTOR2:
case AMS_STATE_SECTORX_2:
case AMS_STATE_SELECTEDX:
case AMS_STATE_SENSEX_L2:
case AMS_STATE_SENSEX:
case AMS_STATE_SLEEP:
return 1;
}
return 0;
}
void ams_print_int0(uint8_t int0)
{
uint32_t tag = (TAG_NFC)|(TAG_NO_TAG);
@@ -252,6 +265,7 @@ void ams_print_int1(uint8_t int0)
printf1(tag,"\r\n");
}
bool ams_init()
{
@@ -265,10 +279,9 @@ bool ams_init()
LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER);
LL_SPI_Enable(SPI1);
delay(10);
// delay(10);
SELECT();
delay(10);
// delay(10);
ams_write_command(AMS_CMD_DEFAULT);
ams_write_command(AMS_CMD_CLEAR_BUFFER);
@@ -285,63 +298,68 @@ bool ams_init()
// enable tunneling mode and RF configuration
ams_write_reg(AMS_REG_IC_CONF2, AMS_RFCFG_EN | AMS_TUN_MOD);
ams_read_eeprom_block(AMS_CONFIG_UID_ADDR, block);
printf1(TAG_NFC,"UID: "); dump_hex1(TAG_NFC,block,4);
// enable tunneling mode and RF configuration
ams_write_reg(AMS_REG_IC_CONF2, AMS_RFCFG_EN | AMS_TUN_MOD);
ams_read_eeprom_block(AMS_CONFIG_BLOCK0_ADDR, block);
printf1(TAG_NFC,"conf0: "); dump_hex1(TAG_NFC,block,4);
uint8_t sense1 = 0x44;
uint8_t sense2 = 0x00;
uint8_t selr = 0x20; // SAK
if(block[0] != sense1 || block[1] != sense2 || block[2] != selr)
{
printf1(TAG_NFC,"Writing config block 0\r\n");
block[0] = sense1;
block[1] = sense2;
block[2] = selr;
block[3] = 0x00;
ams_write_eeprom_block(AMS_CONFIG_BLOCK0_ADDR, block);
UNSELECT();
delay(10);
SELECT();
delay(10);
ams_read_eeprom_block(AMS_CONFIG_UID_ADDR, block);
printf1(TAG_NFC,"UID: "); dump_hex1(TAG_NFC,block,4);
ams_read_eeprom_block(AMS_CONFIG_BLOCK0_ADDR, block);
printf1(TAG_NFC,"conf0: "); dump_hex1(TAG_NFC,block,4);
}
ams_read_eeprom_block(AMS_CONFIG_BLOCK1_ADDR, block);
printf1(TAG_NFC,"conf1: "); dump_hex1(TAG_NFC,block,4);
uint8_t sense1 = 0x44;
uint8_t sense2 = 0x00;
uint8_t selr = 0x20; // SAK
uint8_t ic_cfg1 = AMS_CFG1_OUTPUT_RESISTANCE_100 | AMS_CFG1_VOLTAGE_LEVEL_2V0;
uint8_t ic_cfg2 = AMS_CFG2_TUN_MOD;
if(block[0] != sense1 || block[1] != sense2 || block[2] != selr)
{
printf1(TAG_NFC,"Writing config block 0\r\n");
block[0] = sense1;
block[1] = sense2;
block[2] = selr;
block[3] = 0x00;
if (block[0] != ic_cfg1 || block[1] != ic_cfg2)
{
printf1(TAG_NFC,"Writing config block 1\r\n");
// set IC_CFG1
block[0] = ic_cfg1;
ams_write_eeprom_block(AMS_CONFIG_BLOCK0_ADDR, block);
UNSELECT();
delay(10);
SELECT();
delay(10);
// set IC_CFG2
block[1] = ic_cfg2;
ams_read_eeprom_block(AMS_CONFIG_BLOCK0_ADDR, block);
printf1(TAG_NFC,"conf0: "); dump_hex1(TAG_NFC,block,4);
}
// mask interrupt bits
block[2] = 0x80;
block[3] = 0;
ams_write_eeprom_block(AMS_CONFIG_BLOCK1_ADDR, block);
UNSELECT();
delay(10);
SELECT();
delay(10);
ams_read_eeprom_block(0x7F, block);
ams_read_eeprom_block(AMS_CONFIG_BLOCK1_ADDR, block);
printf1(TAG_NFC,"conf1: "); dump_hex1(TAG_NFC,block,4);
uint8_t ic_cfg1 = AMS_CFG1_OUTPUT_RESISTANCE_100 | AMS_CFG1_VOLTAGE_LEVEL_2V1;
uint8_t ic_cfg2 = AMS_CFG2_TUN_MOD;
if (block[0] != ic_cfg1 || block[1] != ic_cfg2)
{
printf1(TAG_NFC,"Writing config block 1\r\n");
// set IC_CFG1
block[0] = ic_cfg1;
// set IC_CFG2
block[1] = ic_cfg2;
// mask interrupt bits
block[2] = 0x80;
block[3] = 0;
ams_write_eeprom_block(AMS_CONFIG_BLOCK1_ADDR, block);
UNSELECT();
delay(10);
SELECT();
delay(10);
ams_read_eeprom_block(0x7F, block);
printf1(TAG_NFC,"conf1: "); dump_hex1(TAG_NFC,block,4);
}
}
return true;
}

20
targets/stm32l432/src/ams.h
View File

@@ -52,6 +52,9 @@ uint8_t ams_read_reg(uint8_t addr);
void ams_write_reg(uint8_t addr, uint8_t tx);
const char * ams_get_state_string(uint8_t regval);
int ams_state_is_valid(uint8_t regval);
#define AMS_REG_IO_CONF 0x00
#define AMS_REG_IC_CONF0 0x01
@@ -70,11 +73,21 @@ void ams_write_reg(uint8_t addr, uint8_t tx);
#define AMS_STATE_SELECTED (6 << 3)
#define AMS_STATE_SECTOR2 (7 << 3)
#define AMS_STATE_SECTORX_2 (0xf << 3)
#define AMS_STATE_SELECTEDX (0xd << 3)
#define AMS_STATE_SELECTEDX (0xe << 3)
#define AMS_STATE_SENSEX_L2 (0xa << 3)
#define AMS_STATE_SENSEX (0xb << 3)
#define AMS_STATE_SLEEP (0x9 << 3)
// ... //
#define AMS_REG_MASK_INT0 0x08
#define AMS_MASK0_PU (1<<7) // power up
#define AMS_MASK0_WU_A (1<<6) // selected INT
#define AMS_MASK0_SLP (1<<5)
#define AMS_MASK0_EEW_RF (1<<4)
#define AMS_MASK0_EER_RF (1<<3)
#define AMS_MASK0_RXE (1<<2)
#define AMS_MASK0_TXE (1<<1)
#define AMS_MASK0_XRF (1<<0)
#define AMS_REG_MASK_INT1 0x09
#define AMS_REG_INT0 0x0a
#define AMS_INT_XRF (1<<0)
#define AMS_INT_TXE (1<<1)
@@ -109,6 +122,11 @@ void ams_write_reg(uint8_t addr, uint8_t tx);
#define AMS_CFG1_VOLTAGE_LEVEL_1V9 (0x00<<2)
#define AMS_CFG1_VOLTAGE_LEVEL_2V0 (0x01<<2)
#define AMS_CFG1_VOLTAGE_LEVEL_2V1 (0x02<<2)
#define AMS_CFG1_VOLTAGE_LEVEL_2V2 (0x03<<2)
#define AMS_CFG1_VOLTAGE_LEVEL_2V3 (0x04<<2)
#define AMS_CFG1_VOLTAGE_LEVEL_2V4 (0x05<<2)
#define AMS_CFG1_VOLTAGE_LEVEL_2V5 (0x06<<2)
#define AMS_CFG1_OUTPUT_RESISTANCE_ZZ 0x00
#define AMS_CFG1_OUTPUT_RESISTANCE_100 0x01

5
targets/stm32l432/src/app.h
View File

@@ -45,7 +45,7 @@
#define DISABLE_CTAPHID_CBOR
void printing_init();
void hw_init(void);
void hw_init(int lf);
//#define TEST
//#define TEST_POWER
@@ -73,6 +73,9 @@ void hw_init(void);
#define SOLO_AMS_CS_PORT GPIOB
#define SOLO_AMS_CS_PIN LL_GPIO_PIN_0
#define SOLO_AMS_IRQ_PORT GPIOC
#define SOLO_AMS_IRQ_PIN LL_GPIO_PIN_15
#define SKIP_BUTTON_CHECK_WITH_DELAY 0
#define SKIP_BUTTON_CHECK_FAST 0

62
targets/stm32l432/src/device.c
View File

@@ -43,12 +43,17 @@
#include "stm32l4xx_ll_iwdg.h"
#include "usbd_cdc_if.h"
#include "nfc.h"
#include "init.h"
#define LOW_FREQUENCY 1
#define HIGH_FREQUENCY 0
uint32_t __90_ms = 0;
uint32_t __device_status = 0;
uint32_t __last_update = 0;
extern PCD_HandleTypeDef hpcd;
bool haveNFC = false;
bool isLowFreq = 0;
#define IS_BUTTON_PRESSED() (0 == (LL_GPIO_ReadInputPort(SOLO_BUTTON_PORT) & SOLO_BUTTON_PIN))
@@ -112,12 +117,15 @@ void device_reboot()
{
NVIC_SystemReset();
}
void device_init()
{
hw_init();
LL_GPIO_SetPinMode(SOLO_BUTTON_PORT,SOLO_BUTTON_PIN,LL_GPIO_MODE_INPUT);
LL_GPIO_SetPinPull(SOLO_BUTTON_PORT,SOLO_BUTTON_PIN,LL_GPIO_PULL_UP);
// hw_init(LOW_FREQUENCY);
// isLowFreq = 1;
hw_init(HIGH_FREQUENCY);
isLowFreq = 0;
#ifndef IS_BOOTLOADER
#if BOOT_TO_DFU
@@ -127,38 +135,46 @@ void device_init()
#endif
printf1(TAG_GEN,"init nfc\n");
haveNFC = nfc_init();
if (haveNFC)
printf1(TAG_GEN,"NFC OK.\n");
else
printf1(TAG_GEN,"NFC not found.\n");
// if (haveNFC)
// printf1(TAG_GEN,"NFC OK.\n");
// else
// printf1(TAG_GEN,"NFC not found.\n");
#endif
printf1(TAG_GEN,"hello solo\r\n");
// printf1(TAG_GEN,"hello solo\r\n");
}
void usb_init(void);
void usbhid_init()
{
usb_init();
#if DEBUG_LEVEL>1
wait_for_usb_tether();
#endif
}
void wait_for_usb_tether()
{
while (USBD_OK != CDC_Transmit_FS("tethered\r\n", 10) )
while (USBD_OK != CDC_Transmit_FS((uint8_t*)"tethered\r\n", 10) )
;
while (USBD_OK != CDC_Transmit_FS("tethered\r\n", 10) )
while (USBD_OK != CDC_Transmit_FS((uint8_t*)"tethered\r\n", 10) )
;
delay(10);
while (USBD_OK != CDC_Transmit_FS("tethered\r\n", 10) )
while (USBD_OK != CDC_Transmit_FS((uint8_t*)"tethered\r\n", 10) )
;
}
void usbhid_init()
{
if (!isLowFreq)
{
init_usb();
#if DEBUG_LEVEL>1
wait_for_usb_tether();
#endif
}
else
{
}
}
int usbhid_recv(uint8_t * msg)
{
if (fifo_hidmsg_size())

663
targets/stm32l432/src/init.c
View File

@@ -45,57 +45,53 @@
#include "usbd_composite.h"
#include "usbd_cdc_if.h"
#include "device.h"
#include "init.h"
#include APP_CONFIG
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private variables ---------------------------------------------------------*/
USBD_HandleTypeDef Solo_USBD_Device;
/* Private function prototypes -----------------------------------------------*/
static void LL_Init(void);
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_TIM2_Init(void);
static void MX_TIM6_Init(void);
static void MX_RNG_Init(void);
static void MX_SPI1_Init(void);
#define Error_Handler() _Error_Handler(__FILE__,__LINE__)
void _Error_Handler(char *file, int line);
void hw_init(void)
void hw_init(int lowfreq)
{
#ifdef IS_BOOTLOADER
SCB->VTOR = FLASH_BASE;
#else
#endif
LL_Init();
init_gpio();
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
if (lowfreq)
{
SystemClock_Config_LF();
}
else
{
SystemClock_Config();
}
SystemClock_Config(); // TODO bootloader should not change clk freq.
MX_GPIO_Init();
MX_TIM2_Init(); // PWM for LEDs
MX_TIM6_Init(); // ~1 ms timer
if (!lowfreq)
{
init_pwm();
}
init_millisecond_timer(lowfreq);
#if DEBUG_LEVEL > 0
MX_USART1_UART_Init();// debug uart
init_debug_uart();
#endif
MX_RNG_Init();
MX_SPI1_Init();
TIM6->SR = 0;
__enable_irq();
NVIC_EnableIRQ(TIM6_IRQn);
init_rng();
init_spi();
}
static void LL_Init(void)
@@ -122,259 +118,381 @@ static void LL_Init(void)
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
static int NFC = 0;
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
if (!NFC)
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
{
Error_Handler();
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_HSI48_Enable();
/* Wait till HSI48 is ready */
while(LL_RCC_HSI48_IsReady() != 1)
{
}
LL_RCC_LSI_Enable();
/* Wait till LSI is ready */
while(LL_RCC_LSI_IsReady() != 1)
{
}
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_11);
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_16);
LL_Init1msTick(48000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(48000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_HSI48);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CRS);
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS);
LL_CRS_SetSyncDivider(LL_CRS_SYNC_DIV_1);
LL_CRS_SetSyncPolarity(LL_CRS_SYNC_POLARITY_RISING);
LL_CRS_SetSyncSignalSource(LL_CRS_SYNC_SOURCE_USB);
LL_CRS_SetReloadCounter(__LL_CRS_CALC_CALCULATE_RELOADVALUE(48000000,1000));
LL_CRS_SetFreqErrorLimit(34);
LL_CRS_SetHSI48SmoothTrimming(32);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
void SystemClock_Config_LF4(void)
{
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)
{
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
{
Error_Handler();
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_HSI48_Enable();
/* Wait till HSI48 is ready */
while(LL_RCC_HSI48_IsReady() != 1)
{
}
LL_RCC_LSI_Enable();
/* Wait till LSI is ready */
while(LL_RCC_LSI_IsReady() != 1)
{
}
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_11);
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_16);
LL_Init1msTick(48000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(48000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_HSI48);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CRS);
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS);
LL_CRS_SetSyncDivider(LL_CRS_SYNC_DIV_1);
LL_CRS_SetSyncPolarity(LL_CRS_SYNC_POLARITY_RISING);
LL_CRS_SetSyncSignalSource(LL_CRS_SYNC_SOURCE_USB);
LL_CRS_SetReloadCounter(__LL_CRS_CALC_CALCULATE_RELOADVALUE(48000000,1000));
LL_CRS_SetFreqErrorLimit(34);
LL_CRS_SetHSI48SmoothTrimming(32);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
Error_Handler();
}
else
{
LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)
{
LL_RCC_LSI_Enable();
/* Wait till LSI is ready */
while(LL_RCC_LSI_IsReady() != 1)
{
}
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
LL_Init1msTick(4000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(4000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_MSI);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
// 8MHz
void SystemClock_Config_LF(void)
{
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)
{
Error_Handler();
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_LSI_Enable();
/* Wait till LSI is ready */
while(LL_RCC_LSI_IsReady() != 1)
{
}
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
LL_Init1msTick(4000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(4000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_MSI);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_LSI_Enable();
/* Wait till LSI is ready */
// while(LL_RCC_LSI_IsReady() != 1)
// {
//
// }
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
// while(LL_RCC_MSI_IsReady() != 1)
// {
//
// }
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_7);
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
/* Wait till System clock is ready */
// while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
// {
//
// }
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
LL_Init1msTick(8000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(8000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_MSI);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
void usb_init()
// 16MHz
void SystemClock_Config_LF16(void)
{
if (!NFC)
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)
{
// enable USB power
SET_BIT(PWR->CR2, PWR_CR2_USV);
// Enable USB Clock
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN);
USBD_Composite_Set_Classes(&USBD_HID, &USBD_CDC);
in_endpoint_to_class[HID_EPIN_ADDR & 0x7F] = 0;
out_endpoint_to_class[HID_EPOUT_ADDR & 0x7F] = 0;
in_endpoint_to_class[CDC_IN_EP & 0x7F] = 1;
out_endpoint_to_class[CDC_OUT_EP & 0x7F] = 1;
USBD_Init(&Solo_USBD_Device, &Solo_Desc, 0);
USBD_RegisterClass(&Solo_USBD_Device, &USBD_Composite);
// USBD_RegisterClass(&Solo_USBD_Device, &USBD_HID);
//
// USBD_RegisterClass(&Solo_USBD_Device, &USBD_CDC);
USBD_CDC_RegisterInterface(&Solo_USBD_Device, &USBD_Interface_fops_FS);
USBD_Start(&Solo_USBD_Device);
Error_Handler();
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_LSI_Enable();
/* Wait till LSI is ready */
while(LL_RCC_LSI_IsReady() != 1)
{
}
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_8);
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
LL_Init1msTick(16000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(16000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_MSI);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
/* TIM2 init function */
static void MX_TIM2_Init(void)
void init_usb()
{
// if(!NFC)
{
LL_TIM_InitTypeDef TIM_InitStruct;
LL_TIM_OC_InitTypeDef TIM_OC_InitStruct;
// enable USB power
SET_BIT(PWR->CR2, PWR_CR2_USV);
LL_GPIO_InitTypeDef GPIO_InitStruct;
// Enable USB Clock
SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN);
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
#if DEBUG_LEVEL > 0
USBD_Composite_Set_Classes(&USBD_HID, &USBD_CDC);
in_endpoint_to_class[HID_EPIN_ADDR & 0x7F] = 0;
out_endpoint_to_class[HID_EPOUT_ADDR & 0x7F] = 0;
TIM2->SR = 0 ;
in_endpoint_to_class[CDC_IN_EP & 0x7F] = 1;
out_endpoint_to_class[CDC_OUT_EP & 0x7F] = 1;
TIM_InitStruct.Prescaler = 0;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 1000;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM2, &TIM_InitStruct);
USBD_Init(&Solo_USBD_Device, &Solo_Desc, 0);
USBD_RegisterClass(&Solo_USBD_Device, &USBD_Composite);
// USBD_RegisterClass(&Solo_USBD_Device, &USBD_HID);
//
// USBD_RegisterClass(&Solo_USBD_Device, &USBD_CDC);
USBD_CDC_RegisterInterface(&Solo_USBD_Device, &USBD_Interface_fops_FS);
#else
USBD_Init(&Solo_USBD_Device, &Solo_Desc, 0);
USBD_RegisterClass(&Solo_USBD_Device, &USBD_HID);
#endif
LL_TIM_EnableARRPreload(TIM2);
USBD_Start(&Solo_USBD_Device);
}
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
void init_pwm(void)
{
TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_PWM1;
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.CompareValue = 1000;
TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH2, &TIM_OC_InitStruct);
LL_TIM_InitTypeDef TIM_InitStruct;
LL_TIM_OC_InitTypeDef TIM_OC_InitStruct;
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH2);
LL_GPIO_InitTypeDef GPIO_InitStruct;
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_ENABLE;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH3, &TIM_OC_InitStruct);
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH3);
TIM2->SR = 0 ;
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_ENABLE;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH4, &TIM_OC_InitStruct);
TIM_InitStruct.Prescaler = 0;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 1000;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM2, &TIM_InitStruct);
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH4);
LL_TIM_EnableARRPreload(TIM2);
LL_TIM_SetOCRefClearInputSource(TIM2, LL_TIM_OCREF_CLR_INT_NC);
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_DisableExternalClock(TIM2);
TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_PWM1;
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.CompareValue = 1000;
TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH2, &TIM_OC_InitStruct);
LL_TIM_ConfigETR(TIM2, LL_TIM_ETR_POLARITY_NONINVERTED, LL_TIM_ETR_PRESCALER_DIV1, LL_TIM_ETR_FILTER_FDIV1);
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH2);
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_ENABLE;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH3, &TIM_OC_InitStruct);
LL_TIM_DisableMasterSlaveMode(TIM2);
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH3);
/**TIM2 GPIO Configuration
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_3;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_ENABLE;
TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_ENABLE;
LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH4, &TIM_OC_InitStruct);
LL_TIM_EnableCounter(TIM2);
}
LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH4);
LL_TIM_SetOCRefClearInputSource(TIM2, LL_TIM_OCREF_CLR_INT_NC);
LL_TIM_DisableExternalClock(TIM2);
LL_TIM_ConfigETR(TIM2, LL_TIM_ETR_POLARITY_NONINVERTED, LL_TIM_ETR_PRESCALER_DIV1, LL_TIM_ETR_FILTER_FDIV1);
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
LL_TIM_DisableMasterSlaveMode(TIM2);
/**TIM2 GPIO Configuration
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_1|LL_GPIO_PIN_2|LL_GPIO_PIN_3;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
LL_TIM_EnableCounter(TIM2);
}
/* USART1 init function */
static void MX_USART1_UART_Init(void)
void init_debug_uart(void)
{
LL_USART_InitTypeDef USART_InitStruct;
@@ -411,20 +529,35 @@ static void MX_USART1_UART_Init(void)
}
/** Pinout Configuration
*/
static void MX_GPIO_Init(void)
void init_gpio(void)
{
/* GPIO Ports Clock Enable */
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
LL_GPIO_SetPinMode(SOLO_BUTTON_PORT,SOLO_BUTTON_PIN,LL_GPIO_MODE_INPUT);
LL_GPIO_SetPinPull(SOLO_BUTTON_PORT,SOLO_BUTTON_PIN,LL_GPIO_PULL_UP);
#ifdef SOLO_AMS_IRQ_PORT
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
/**/
LL_GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = SOLO_AMS_IRQ_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
LL_GPIO_Init(SOLO_AMS_IRQ_PORT, &GPIO_InitStruct);
LL_GPIO_SetPinMode(SOLO_AMS_IRQ_PORT,SOLO_AMS_IRQ_PIN,LL_GPIO_MODE_INPUT);
LL_GPIO_SetPinPull(SOLO_AMS_IRQ_PORT,SOLO_AMS_IRQ_PIN,LL_GPIO_PULL_UP);
#endif
}
/* TIM6 init function */
static void MX_TIM6_Init(void)
void init_millisecond_timer(int lf)
{
LL_TIM_InitTypeDef TIM_InitStruct;
@@ -434,10 +567,10 @@ static void MX_TIM6_Init(void)
// 48 MHz sys clock --> 6 MHz timer clock
// 48 MHz / 48000 == 1000 Hz
if (!NFC)
if (!lf)
TIM_InitStruct.Prescaler = 48000;
else
TIM_InitStruct.Prescaler = 4000;
TIM_InitStruct.Prescaler = 8000;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 90;
@@ -454,39 +587,14 @@ static void MX_TIM6_Init(void)
// Start immediately
LL_TIM_EnableCounter(TIM6);
TIM6->SR = 0;
__enable_irq();
NVIC_EnableIRQ(TIM6_IRQn);
}
/* TIM7 init function */
// static void MX_TIM7_Init(void)
// {
//
// LL_TIM_InitTypeDef TIM_InitStruct;
//
// /* Peripheral clock enable */
// LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7);
//
// // 48 MHz sys clock --> 6 MHz timer clock
// // 6 MHz / 6000 == 1000 Hz
// TIM_InitStruct.Prescaler = 48000;
// TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
// TIM_InitStruct.Autoreload = 0xffff;
// LL_TIM_Init(TIM6, &TIM_InitStruct);
//
// LL_TIM_DisableARRPreload(TIM7);
//
// LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_RESET);
//
// LL_TIM_DisableMasterSlaveMode(TIM7);
//
// // enable interrupt
// TIM7->DIER |= 1;
//
// // Start immediately
// LL_TIM_EnableCounter(TIM7);
// }
/* RNG init function */
static void MX_RNG_Init(void)
void init_rng(void)
{
/* Peripheral clock enable */
@@ -497,7 +605,7 @@ static void MX_RNG_Init(void)
}
/* SPI1 init function */
static void MX_SPI1_Init(void)
void init_spi(void)
{
LL_SPI_InitTypeDef SPI_InitStruct;
@@ -527,10 +635,7 @@ static void MX_SPI1_Init(void)
SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
// if (!NFC)
// SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64;
// else
SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
SPI_InitStruct.CRCPoly = 7;
@@ -538,7 +643,5 @@ static void MX_SPI1_Init(void)
LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
// LL_SPI_EnableNSSPulseMgt(SPI1);
}

37
targets/stm32l432/src/init.h Normal file
View File

@@ -0,0 +1,37 @@
/*
* Copyright (C) 2018 SoloKeys, Inc. <https://solokeys.com/>
*
* This file is part of Solo.
*
* Solo is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* Solo is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with Solo. If not, see <https://www.gnu.org/licenses/>
*
* This code is available under licenses for commercial use.
* Please contact SoloKeys for more information.
*/
#ifndef _INIT_H_
#define _INIT_H_
void SystemClock_Config(void);
void SystemClock_Config_LF(void);
void init_usb();
void init_gpio(void);
void init_debug_uart(void);
void init_pwm(void);
void init_millisecond_timer(int lf);
void init_rng(void);
void init_spi(void);
#endif

88
targets/stm32l432/src/nfc.c
View File

@@ -11,10 +11,9 @@
#include "ctap_errors.h"
#define IS_IRQ_ACTIVE() (1 == (LL_GPIO_ReadInputPort(SOLO_AMS_IRQ_PORT) & SOLO_AMS_IRQ_PIN))
// Capability container
const CAPABILITY_CONTAINER NFC_CC = {
.cclen_hi = 0x00, .cclen_lo = 0x0f,
.version = 0x20,
@@ -26,8 +25,20 @@ const CAPABILITY_CONTAINER NFC_CC = {
0x00,0x00 }
};
// 13 chars
uint8_t NDEF_SAMPLE[] = "\x00\x14\xd1\x01\x0eU\x04solokeys.com/";
// Poor way to get some info while in passive operation
#include <stdarg.h>
void nprintf(const char *format, ...)
{
memmove((char*)NDEF_SAMPLE + sizeof(NDEF_SAMPLE) - 1 - 13," ", 13);
va_list args;
va_start (args, format);
vsnprintf ((char*)NDEF_SAMPLE + sizeof(NDEF_SAMPLE) - 1 - 13, 13, format, args);
va_end (args);
}
static struct
{
uint8_t max_frame_size;
@@ -231,7 +242,6 @@ void WTX_clear()
bool WTX_on(int WTX_time)
{
WTX_clear();
WTX_timer = millis();
return true;
@@ -278,7 +288,7 @@ bool WTX_process(int read_timeout)
uint8_t wtx[] = {0xf2, 0x01};
if (WTX_fail)
return false;
if (!WTX_sent)
{
nfc_write_frame(wtx, sizeof(wtx));
@@ -294,16 +304,16 @@ bool WTX_process(int read_timeout)
WTX_fail = true;
return false;
}
if (len != 2 || data[0] != 0xf2 || data[1] != 0x01)
{
WTX_fail = true;
return false;
}
WTX_sent = false;
return true;
}
}
}
int answer_rats(uint8_t parameter)
@@ -336,8 +346,11 @@ int answer_rats(uint8_t parameter)
// historical bytes
memcpy(&res[3], (uint8_t *)"SoloKey tap", 11);
nfc_write_frame(res, sizeof(res));
ams_wait_for_tx(10);
return 0;
}
@@ -442,7 +455,7 @@ void nfc_process_iblock(uint8_t * buf, int len)
nfc_write_response(buf[0], SW_INS_INVALID);
break;
}
printf1(TAG_NFC, "U2F GetVersion command.\r\n");
nfc_write_response_ex(buf[0], (uint8_t *)"U2F_V2", 6, SW_SUCCESS);
@@ -518,7 +531,7 @@ void nfc_process_iblock(uint8_t * buf, int len)
if (!WTX_off())
return;
printf1(TAG_NFC, "CTAP resp: 0x%02<30> len: %d\r\n", status, ctap_resp.length);
printf1(TAG_NFC, "CTAP resp: 0x%02<30> len: %d\r\n", status, ctap_resp.length);
if (status == CTAP1_ERR_SUCCESS)
{
@@ -680,49 +693,51 @@ void nfc_process_block(uint8_t * buf, int len)
void nfc_loop()
{
static uint32_t t1 = 0;
static uint32_t t2 = 0;
uint8_t buf[32];
AMS_DEVICE ams;
int len = 0;
// uint8_t def[] = "\x00\x00\x05\x40\x00\x00\x00\x00\x80\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x14\x02\x01\x00";
// if (millis() - t1 > interval)
if (1)
{
t1 = millis();
read_reg_block(&ams);
uint8_t state = AMS_STATE_MASK & ams.regs.rfid_status;
process_int0(ams.regs.int0);
if (state != AMS_STATE_SELECTED && state != AMS_STATE_SELECTEDX)
{
// delay(1); // sleep ?
return;
}
// if (memcmp(def,ams.buf,sizeof(AMS_DEVICE)) != 0)
// {
// printf1(TAG_NFC,"regs: "); dump_hex1(TAG_NFC,ams.buf,sizeof(AMS_DEVICE));
// }
if (ams.regs.rfid_status)
{
// uint8_t state = AMS_STATE_MASK & ams.regs.rfid_status;
// if (state != AMS_STATE_SENSE)
// printf1(TAG_NFC," %s %d\r\n", ams_get_state_string(ams.regs.rfid_status), millis());
// printf1(TAG_NFC," %s x%02x\r\n", ams_get_state_string(ams.regs.rfid_status), state);
}
if (ams.regs.int0 & AMS_INT_INIT)
{
// Initialize chip!
nfc_state_init();
t1 = millis();
}
if (ams.regs.int1)
{
// ams_print_int1(ams.regs.int1);
}
if (ams.regs.buffer_status2 && (ams.regs.int0 & AMS_INT_RXE))
if ((ams.regs.int0 & AMS_INT_RXE))
{
if (ams.regs.buffer_status2 & AMS_BUF_INVALID)
if (ams.regs.buffer_status2)
{
printf1(TAG_NFC,"Buffer being updated!\r\n");
}
else
{
len = ams.regs.buffer_status2 & AMS_BUF_LEN_MASK;
ams_read_buffer(buf, len);
if (ams.regs.buffer_status2 & AMS_BUF_INVALID)
{
printf1(TAG_NFC,"Buffer being updated!\r\n");
}
else
{
len = ams.regs.buffer_status2 & AMS_BUF_LEN_MASK;
ams_read_buffer(buf, len);
}
}
}
@@ -742,12 +757,17 @@ void nfc_loop()
printf1(TAG_NFC, "HLTA/Halt\r\n");
break;
case NFC_CMD_RATS:
printf1(TAG_NFC,"RATS\r\n");
t1 = millis();
t2 = millis();
answer_rats(buf[1]);
nprintf("R:%d",t2-t1);
///
LL_GPIO_SetOutputPin(GPIOA,LL_GPIO_PIN_12);
///
NFC_STATE.block_num = 1;
clear_ibuf();
WTX_clear();
clear_ibuf();
WTX_clear();
printf1(TAG_NFC,"RATS answered %d (took %d)\r\n",millis(), millis() - t1);
break;
default:
@@ -759,10 +779,8 @@ void nfc_loop()
break;
}
}
}
}

12
targets/stm32l432/src/redirect.c
View File

@@ -37,7 +37,6 @@ void _putchar(char c)
LL_USART_TransmitData8(DEBUG_UART,c);
#endif
}
static int NFC = 0;
int _write (int fd, const void *buf, long int len)
@@ -53,13 +52,10 @@ int _write (int fd, const void *buf, long int len)
memcpy(&logbuf[logbuflen], data, len);
logbuflen += len;
if (!NFC)
{
// Send out USB serial
uint8_t res = CDC_Transmit_FS(logbuf, logbuflen);
if (res == USBD_OK)
logbuflen = 0;
}
// Send out USB serial
uint8_t res = CDC_Transmit_FS(logbuf, logbuflen);
if (res == USBD_OK)
logbuflen = 0;
// Send out UART serial
while(len--)

55
targets/stm32l432/src/startup_stm32l432xx.s
View File

@@ -7,7 +7,7 @@
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address,
* - Configure the clock system
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
@@ -79,6 +79,8 @@ Reset_Handler:
ldr sp, =_estack /* Atollic update: set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
/* Call the clock system intitialization function.*/
bl SystemInit
movs r1, #0
b LoopCopyDataInit
@@ -106,8 +108,7 @@ LoopFillZerobss:
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -115,7 +116,7 @@ LoopFillZerobss:
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
@@ -414,49 +415,49 @@ g_pfnVectors:
.weak COMP_IRQHandler
.thumb_set COMP_IRQHandler,Default_Handler
.weak LPTIM1_IRQHandler
.thumb_set LPTIM1_IRQHandler,Default_Handler
.weak LPTIM2_IRQHandler
.thumb_set LPTIM2_IRQHandler,Default_Handler
.thumb_set LPTIM2_IRQHandler,Default_Handler
.weak USB_IRQHandler
.thumb_set USB_IRQHandler,Default_Handler
.thumb_set USB_IRQHandler,Default_Handler
.weak DMA2_Channel6_IRQHandler
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
.weak DMA2_Channel7_IRQHandler
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
.weak LPUART1_IRQHandler
.thumb_set LPUART1_IRQHandler,Default_Handler
.thumb_set LPUART1_IRQHandler,Default_Handler
.weak QUADSPI_IRQHandler
.thumb_set QUADSPI_IRQHandler,Default_Handler
.thumb_set QUADSPI_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak SAI1_IRQHandler
.thumb_set SAI1_IRQHandler,Default_Handler
.weak SWPMI1_IRQHandler
.thumb_set SWPMI1_IRQHandler,Default_Handler
.weak TSC_IRQHandler
.thumb_set TSC_IRQHandler,Default_Handler
.weak RNG_IRQHandler
.thumb_set RNG_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak CRS_IRQHandler
.thumb_set CRS_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

3
targets/stm32l432/src/system_stm32l4xx.c
View File

@@ -106,6 +106,7 @@
*/
#include "stm32l4xx.h"
#include "init.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
@@ -219,6 +220,8 @@ void SystemInit(void)
/* Disable all interrupts */
RCC->CIER = 0x00000000U;
SystemClock_Config_LF();
}
/**