efm8 usb bridge working
This commit is contained in:
@@ -29,8 +29,8 @@ extern void enter_DefaultMode_from_RESET(void) {
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WDT_0_enter_DefaultMode_from_RESET();
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PORTS_0_enter_DefaultMode_from_RESET();
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PORTS_1_enter_DefaultMode_from_RESET();
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PORTS_2_enter_DefaultMode_from_RESET();
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PBCFG_0_enter_DefaultMode_from_RESET();
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LFOSC_0_enter_DefaultMode_from_RESET();
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CIP51_0_enter_DefaultMode_from_RESET();
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CLOCK_0_enter_DefaultMode_from_RESET();
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TIMER01_0_enter_DefaultMode_from_RESET();
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@@ -184,14 +184,14 @@ extern void TIMER_SETUP_0_enter_DefaultMode_from_RESET(void) {
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- System clock divided by 4
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- Counter/Timer 0 uses the clock defined by the prescale field, SCA
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- Timer 2 high byte uses the clock defined by T2XCLK in TMR2CN0
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- Timer 2 low byte uses the system clock
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- Timer 2 low byte uses the clock defined by T2XCLK in TMR2CN0
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- Timer 3 high byte uses the clock defined by T3XCLK in TMR3CN0
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- Timer 3 low byte uses the system clock
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- Timer 3 low byte uses the clock defined by T3XCLK in TMR3CN0
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- Timer 1 uses the system clock
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***********************************************************************/
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CKCON0 = CKCON0_SCA__SYSCLK_DIV_4 | CKCON0_T0M__PRESCALE
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| CKCON0_T2MH__EXTERNAL_CLOCK | CKCON0_T2ML__SYSCLK
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| CKCON0_T3MH__EXTERNAL_CLOCK | CKCON0_T3ML__SYSCLK
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| CKCON0_T2MH__EXTERNAL_CLOCK | CKCON0_T2ML__EXTERNAL_CLOCK
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| CKCON0_T3MH__EXTERNAL_CLOCK | CKCON0_T3ML__EXTERNAL_CLOCK
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| CKCON0_T1M__SYSCLK;
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// [CKCON0 - Clock Control 0]$
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@@ -288,23 +288,19 @@ extern void TIMER16_2_enter_DefaultMode_from_RESET(void) {
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// $[TMR2RLH - Timer 2 Reload High Byte]
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/***********************************************************************
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- Timer 2 Reload High Byte = 0x44
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- Timer 2 Reload High Byte = 0x63
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***********************************************************************/
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TMR2RLH = (0x44 << TMR2RLH_TMR2RLH__SHIFT);
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TMR2RLH = (0x63 << TMR2RLH_TMR2RLH__SHIFT);
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// [TMR2RLH - Timer 2 Reload High Byte]$
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// $[TMR2RLL - Timer 2 Reload Low Byte]
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/***********************************************************************
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- Timer 2 Reload Low Byte = 0x80
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- Timer 2 Reload Low Byte = 0xC0
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***********************************************************************/
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TMR2RLL = (0x80 << TMR2RLL_TMR2RLL__SHIFT);
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TMR2RLL = (0xC0 << TMR2RLL_TMR2RLL__SHIFT);
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// [TMR2RLL - Timer 2 Reload Low Byte]$
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// $[TMR2CN0]
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/***********************************************************************
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- Start Timer 2 running
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***********************************************************************/
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TMR2CN0 |= TMR2CN0_TR2__RUN;
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// [TMR2CN0]$
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// $[Timer Restoration]
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@@ -327,6 +323,10 @@ extern void TIMER16_3_enter_DefaultMode_from_RESET(void) {
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// [TMR3CN1 - Timer 3 Control 1]$
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// $[TMR3CN0 - Timer 3 Control]
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/***********************************************************************
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- Timer 3 clock is the low-frequency oscillator divided by 8
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***********************************************************************/
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TMR3CN0 |= TMR3CN0_T3XCLK__LFOSC_DIV_8;
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// [TMR3CN0 - Timer 3 Control]$
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// $[TMR3H - Timer 3 High Byte]
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@@ -342,6 +342,10 @@ extern void TIMER16_3_enter_DefaultMode_from_RESET(void) {
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// [TMR3RLL - Timer 3 Reload Low Byte]$
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// $[TMR3CN0]
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/***********************************************************************
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- Start Timer 3 running
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***********************************************************************/
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TMR3CN0 |= TMR3CN0_TR3__RUN;
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// [TMR3CN0]$
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// $[Timer Restoration]
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@@ -408,7 +412,7 @@ extern void PORTS_1_enter_DefaultMode_from_RESET(void) {
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// $[P1MDOUT - Port 1 Output Mode]
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/***********************************************************************
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- P1.0 output is open-drain
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- P1.1 output is open-drain
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- P1.1 output is push-pull
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- P1.2 output is open-drain
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- P1.3 output is open-drain
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- P1.4 output is push-pull
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@@ -416,7 +420,7 @@ extern void PORTS_1_enter_DefaultMode_from_RESET(void) {
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- P1.6 output is push-pull
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- P1.7 output is open-drain
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***********************************************************************/
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P1MDOUT = P1MDOUT_B0__OPEN_DRAIN | P1MDOUT_B1__OPEN_DRAIN
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P1MDOUT = P1MDOUT_B0__OPEN_DRAIN | P1MDOUT_B1__PUSH_PULL
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| P1MDOUT_B2__OPEN_DRAIN | P1MDOUT_B3__OPEN_DRAIN
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| P1MDOUT_B4__PUSH_PULL | P1MDOUT_B5__PUSH_PULL
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| P1MDOUT_B6__PUSH_PULL | P1MDOUT_B7__OPEN_DRAIN;
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@@ -520,9 +524,9 @@ extern void UART_0_enter_DefaultMode_from_RESET(void) {
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extern void SPI_0_enter_DefaultMode_from_RESET(void) {
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// $[SPI0CKR - SPI0 Clock Rate]
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/***********************************************************************
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- SPI0 Clock Rate = 0x17
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- SPI0 Clock Rate = 0x0B
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***********************************************************************/
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SPI0CKR = (0x17 << SPI0CKR_SPI0CKR__SHIFT);
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SPI0CKR = (0x0B << SPI0CKR_SPI0CKR__SHIFT);
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// [SPI0CKR - SPI0 Clock Rate]$
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// $[SPI0FCN0 - SPI0 FIFO Control 0]
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@@ -545,3 +549,20 @@ extern void SPI_0_enter_DefaultMode_from_RESET(void) {
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}
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extern void LFOSC_0_enter_DefaultMode_from_RESET(void) {
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// $[LFO0CN - Low Frequency Oscillator Control]
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/***********************************************************************
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- Internal L-F Oscillator Enabled
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- Divide by 8 selected
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***********************************************************************/
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LFO0CN &= ~LFO0CN_OSCLD__FMASK;
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LFO0CN |= LFO0CN_OSCLEN__ENABLED;
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// [LFO0CN - Low Frequency Oscillator Control]$
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// $[Wait for LFOSC Ready]
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while ((LFO0CN & LFO0CN_OSCLRDY__BMASK) != LFO0CN_OSCLRDY__SET)
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;
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// [Wait for LFOSC Ready]$
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}
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@@ -38,6 +38,7 @@ uint8_t tmpBuffer;
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void USBD_ResetCb(void) {
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// cprints("USBD_ResetCb\r\n");
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// u2f_print_ev("USBD_ResetCb\r\n");
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}
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@@ -45,6 +46,7 @@ void USBD_ResetCb(void) {
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void USBD_DeviceStateChangeCb(USBD_State_TypeDef oldState,
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USBD_State_TypeDef newState) {
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// cprints("USBD_DeviceStateChangeCb\r\n");
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UNUSED(oldState);
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UNUSED(newState);
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@@ -52,6 +54,7 @@ void USBD_DeviceStateChangeCb(USBD_State_TypeDef oldState,
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}
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bool USBD_IsSelfPoweredCb(void) {
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// cprints("USBD_IsSelfPoweredCb\r\n");
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return false;
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}
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@@ -60,19 +63,22 @@ USB_Status_TypeDef USBD_SetupCmdCb(
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SI_VARIABLE_SEGMENT_POINTER(setup, USB_Setup_TypeDef, MEM_MODEL_SEG)) {
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USB_Status_TypeDef retVal = USB_STATUS_REQ_UNHANDLED;
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// USB_Status_TypeDef retVal = USB_STATUS_OK;
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// cprints("USBD_SetupCmdCb\r\n");
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if ((setup->bmRequestType.Type == USB_SETUP_TYPE_STANDARD)
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&& (setup->bmRequestType.Direction == USB_SETUP_DIR_IN)
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&& (setup->bmRequestType.Recipient == USB_SETUP_RECIPIENT_INTERFACE)) {
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// A HID device must extend the standard GET_DESCRIPTOR command
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// with support for HID descriptors.
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// cprints("USB_SETUP_TYPE_STANDARD\r\n");
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switch (setup->bRequest) {
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case GET_DESCRIPTOR:
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// cprints("GET_DESCRIPTOR\r\n");
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if (setup->wIndex == 0)
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{
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if ((setup->wValue >> 8) == USB_HID_REPORT_DESCRIPTOR) {
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// cprints("1\r\n");
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USBD_Write(EP0, ReportDescriptor0,
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EFM8_MIN(sizeof(ReportDescriptor0), setup->wLength),
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@@ -80,7 +86,7 @@ USB_Status_TypeDef USBD_SetupCmdCb(
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retVal = USB_STATUS_OK;
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} else if ((setup->wValue >> 8) == USB_HID_DESCRIPTOR) {
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// cprints("2\r\n");
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USBD_Write(EP0, (&configDesc[18]),
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EFM8_MIN(USB_HID_DESCSIZE, setup->wLength), false);
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retVal = USB_STATUS_OK;
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@@ -94,10 +100,12 @@ USB_Status_TypeDef USBD_SetupCmdCb(
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&& (setup->bmRequestType.Recipient == USB_SETUP_RECIPIENT_INTERFACE)
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&& (setup->wIndex == HID_INTERFACE_INDEX))
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{
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// cprints("USB_SETUP_TYPE_CLASS\r\n");
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// Implement the necessary HID class specific commands.
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switch (setup->bRequest)
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{
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case USB_HID_SET_IDLE:
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// cprints("USB_HID_SET_IDLE\r\n");
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if (((setup->wValue & 0xFF) == 0) // Report ID
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&& (setup->wLength == 0)
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&& (setup->bmRequestType.Direction != USB_SETUP_DIR_IN))
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@@ -107,6 +115,7 @@ USB_Status_TypeDef USBD_SetupCmdCb(
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break;
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case USB_HID_GET_IDLE:
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// cprints("USB_HID_GET_IDLE\r\n");
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if ((setup->wValue == 0) // Report ID
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&& (setup->wLength == 1)
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&& (setup->bmRequestType.Direction == USB_SETUP_DIR_IN))
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@@ -120,6 +129,10 @@ USB_Status_TypeDef USBD_SetupCmdCb(
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break;
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}
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}
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else
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{
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// cprints("nothing\r\n");
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}
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return retVal;
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}
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79
efm8/src/eeprom.c
Normal file
79
efm8/src/eeprom.c
Normal file
@@ -0,0 +1,79 @@
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#include <SI_EFM8UB1_Register_Enums.h>
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#include <stdint.h>
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#include "eeprom.h"
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#include "printing.h"
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char __erase_mem[3];
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static void erase_ram()
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{
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data uint16_t i;
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data uint8_t xdata * clear = 0;
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for (i=0; i<0x400;i++)
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{
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*(clear++) = 0x0;
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}
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}
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void eeprom_init()
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{
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uint8_t secbyte;
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eeprom_read(0xFBFF,&secbyte,1);
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if (secbyte == 0xff)
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{
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eeprom_erase(0xFBC0);
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secbyte = -32;
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eeprom_write(0xFBFF, &secbyte, 1);
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erase_ram();
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// Reboot
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cprints("rebooting\r\n");
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RSTSRC = (1<<4);
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}
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else
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{
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// cprints("no reboot\r\n");
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}
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}
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void eeprom_read(uint16_t addr, uint8_t * buf, uint8_t len)
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{
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uint8_t code * eepaddr = (uint8_t code *) addr;
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bit old_int;
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while(len--)
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{
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old_int = IE_EA;
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IE_EA = 0;
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*buf++ = *eepaddr++;
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IE_EA = old_int;
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}
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}
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void _eeprom_write(uint16_t addr, uint8_t * buf, uint8_t len, uint8_t flags)
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{
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uint8_t xdata * data eepaddr = (uint8_t xdata *) addr;
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bit old_int;
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while(len--)
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{
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old_int = IE_EA;
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IE_EA = 0;
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// Enable VDD monitor
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VDM0CN = 0x80;
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RSTSRC = 0x02;
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// unlock key
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FLKEY = 0xA5;
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FLKEY = 0xF1;
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PSCTL |= flags;
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*eepaddr = *buf;
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PSCTL &= ~flags;
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IE_EA = old_int;
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eepaddr++;
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buf++;
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}
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}
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154
efm8/src/main.c
154
efm8/src/main.c
@@ -4,13 +4,16 @@
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#include "uart_1.h"
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#include "printing.h"
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#define BUFFER_SIZE 10
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#define BUFFER_SIZE 13
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uint8_t write_ptr = 0;
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uint8_t read_ptr = 0;
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uint8_t count = 0;
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data uint8_t write_ptr = 0;
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data uint8_t read_ptr = 0;
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data uint8_t i_ptr = 0;
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data uint8_t count = 0;
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data uint8_t writebackbuf_count = 0;
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uint8_t hidmsgbuf[64][BUFFER_SIZE];
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data uint8_t writebackbuf[64];
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void usb_transfer_complete()
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{
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@@ -20,81 +23,129 @@ void usb_transfer_complete()
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{
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write_ptr = 0;
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}
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cprints("read hid msg\r\n");
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if (count == 1 && i_ptr == 0)
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{
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SPI0DAT = hidmsgbuf[read_ptr][i_ptr++];
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}
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// MSG_RDY_INT_PIN = 0;
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// MSG_RDY_INT_PIN = 1;
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}
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void spi_transfer_complete()
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{
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count--;
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i_ptr = 0;
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SPI0FCN0 |= (1<<2); // Flush rx fifo buffer
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if (count)
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{
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SPI0DAT = hidmsgbuf[read_ptr][i_ptr++];
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}
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read_ptr++;
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if (read_ptr == BUFFER_SIZE)
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{
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read_ptr = 0;
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}
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cprints("sent hid msg\r\n");
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// cprints("sent hid msg\r\n");
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}
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SI_INTERRUPT (SPI0_ISR, SPI0_IRQn)
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{
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static unsigned char command;
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static unsigned char array_index = 0;
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static unsigned char state = 0;
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char arr[2];
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if (SPI0CN0_WCOL == 1)
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{
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// Write collision occurred
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SPI0CN0_WCOL = 0; // Clear the Write collision flag
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// Write collision occurred
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SPI0CN0_WCOL = 0;
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// cprints("SPI0CN0_WCOL\r\n");
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}
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else if(SPI0CN0_RXOVRN == 1)
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{
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// Receive overrun occurred
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SPI0CN0_RXOVRN = 0; // Clear the Receive Overrun flag
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// Receive overrun occurred
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SPI0CN0_RXOVRN = 0;
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// cprints("SPI0CN0_RXOVRN\r\n");
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}
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else
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{
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// SPI0CN0_SPIF caused the interrupt
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if (EFM32_RW_PIN)
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{
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if (writebackbuf_count < 64) writebackbuf[writebackbuf_count++] = SPI0DAT;
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else cprints("overflow\r\n");
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}
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else
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{
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if (count)
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{
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if (i_ptr < 64)
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{
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SPI0DAT = hidmsgbuf[read_ptr][i_ptr++];
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arr[0] = SPI0DAT; // Read the command
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arr[1] = 0;
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cprints("got data: ");
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cprints(arr);
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cprints("\n\r");
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SPI0CN0_SPIF = 0; // Clear the SPIF0 flag
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}
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else
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{
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spi_transfer_complete();
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}
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}
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}
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SPI0CN0_SPIF = 0;
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}
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}
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void usb_write()
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{
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data uint8_t errors = 0;
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while (USB_STATUS_OK != (USBD_Write(EP1IN, writebackbuf, 64, false)))
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{
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delay(2);
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if (errors++ > 30)
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{
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cprints("ERROR USB WRITE\r\n");
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break;
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}
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}
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}
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int main(void) {
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volatile int xdata i,j,k;
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uint8_t k;
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uint16_t t1 = 0;
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uint8_t lastcount = count;
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int reset;
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data int lastwritecount = writebackbuf_count;
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enter_DefaultMode_from_RESET();
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IE_EA = 1;
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eeprom_init();
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SCON0_TI = 1;
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P2_B0 = 1;
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MSG_RDY_INT_PIN = 1;
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// enable SPI interrupts
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SPI0FCN1 = SPI0FCN1 | (1<<4);
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IE_EA = 1;
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IE_ESPI0 = 1;
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cprints("hello,world\r\n");
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reset = RSTSRC;
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cprintx("reset source: ", 1, reset);
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while (1) {
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k++;
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for (i = 0; i < 1000; i++)
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// delay(1500);
|
||||
if (millis() - t1 > 1500)
|
||||
{
|
||||
for (j = 0; j < 100; j++)
|
||||
{
|
||||
|
||||
}
|
||||
P1_B4 = i&1;
|
||||
P1_B5 = k++&1;
|
||||
t1 = millis();
|
||||
}
|
||||
P1_B5 = k&1;
|
||||
if (!USBD_EpIsBusy(EP1OUT) && !USBD_EpIsBusy(EP1IN))
|
||||
{
|
||||
// cprintd("sched read to ",1,reset);
|
||||
if (count == BUFFER_SIZE)
|
||||
{
|
||||
cprints("Warning, USB buffer full\r\n");
|
||||
@@ -104,9 +155,32 @@ int main(void) {
|
||||
USBD_Read(EP1OUT, hidmsgbuf[write_ptr], 64, true);
|
||||
}
|
||||
}
|
||||
if (count != lastcount)
|
||||
|
||||
if (writebackbuf_count == 64)
|
||||
{
|
||||
cprints("+1 to count \r\n");
|
||||
// cprints("<< ");
|
||||
// dump_hex(writebackbuf,64);
|
||||
writebackbuf_count = 0;
|
||||
// while (USBD_EpIsBusy(EP1IN))
|
||||
// ;
|
||||
usb_write();
|
||||
}
|
||||
|
||||
if (lastcount != count)
|
||||
{
|
||||
if (count > lastcount)
|
||||
{
|
||||
// cprints(">> ");
|
||||
// dump_hex(writebackbuf,64);
|
||||
|
||||
MSG_RDY_INT_PIN = 0;
|
||||
MSG_RDY_INT_PIN = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// cprints("efm32 read hid msg\r\n>> ");
|
||||
// dump_hex(debug,64);
|
||||
}
|
||||
lastcount = count;
|
||||
}
|
||||
|
||||
|
@@ -11,6 +11,13 @@
|
||||
#include <stdio.h>
|
||||
#include "printing.h"
|
||||
|
||||
void delay(uint16_t ms)
|
||||
{
|
||||
uint16_t m1 = millis();
|
||||
while (millis() - m1 < ms)
|
||||
;
|
||||
}
|
||||
#ifdef USE_PRINTING
|
||||
void putf(char c)
|
||||
{
|
||||
uint8_t i;
|
||||
@@ -19,20 +26,23 @@ void putf(char c)
|
||||
for (i=0; i<200; i++){}
|
||||
for (i=0; i<200; i++){}
|
||||
for (i=0; i<190; i++){}
|
||||
// watchdog();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void dump_hex(uint8_t* hex, uint8_t len)
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t b;
|
||||
const char lut[] = "0123456789abcdef";
|
||||
for (i=0 ; i < len ; i++)
|
||||
{
|
||||
if (hex[i]<0x10)
|
||||
{
|
||||
putf('0');
|
||||
}
|
||||
cputb(hex[i]);
|
||||
b = ((*hex) & 0xf0)>>4;
|
||||
putf(lut[b]);
|
||||
b = ((*hex) & 0x0f);
|
||||
putf(lut[b]);
|
||||
hex++;
|
||||
}
|
||||
cprints("\r\n");
|
||||
}
|
||||
@@ -169,3 +179,4 @@ void cprintlx(const char * tag, uint8_t c, ...)
|
||||
put_line();
|
||||
va_end(args);
|
||||
}
|
||||
#endif
|
||||
|
Reference in New Issue
Block a user