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367
targets/efm32/emlib/em_gpio.c
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367
targets/efm32/emlib/em_gpio.c
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/***************************************************************************//**
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* @file em_gpio.c
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* @brief General Purpose IO (GPIO) peripheral API
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* devices.
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* @version 5.2.2
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*******************************************************************************
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* # License
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* <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
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*******************************************************************************
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
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* obligation to support this Software. Silicon Labs is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Silicon Labs will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#include "em_gpio.h"
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#if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
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/***************************************************************************//**
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* @addtogroup emlib
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup GPIO
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* @brief General Purpose Input/Output (GPIO) API
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* @details
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* This module contains functions to control the GPIO peripheral of Silicon
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* Labs 32-bit MCUs and SoCs. The GPIO peripheral is used for pin configuration
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* and direct pin manipulation and sensing as well as routing for peripheral
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* pin connections.
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* @{
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******************************************************************************/
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/*******************************************************************************
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******************************* DEFINES ***********************************
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******************************************************************************/
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/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
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/** Validation of pin typically usable in assert statements. */
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#define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3)
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#define GPIO_STRENGHT_VALID(strenght) (!((strenght) \
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& ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \
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| _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK)))
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/** @endcond */
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/*******************************************************************************
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************************** GLOBAL FUNCTIONS *******************************
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******************************************************************************/
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/***************************************************************************//**
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* @brief
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* Sets the pin location of the debug pins (Serial Wire interface).
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*
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* @note
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* Changing the pins used for debugging uncontrolled, may result in a lockout.
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*
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* @param[in] location
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* The debug pin location to use (0-3).
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******************************************************************************/
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void GPIO_DbgLocationSet(unsigned int location)
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{
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#if defined (_GPIO_ROUTE_SWLOCATION_MASK)
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EFM_ASSERT(location < AFCHANLOC_MAX);
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GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK)
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| (location << _GPIO_ROUTE_SWLOCATION_SHIFT);
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#else
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(void)location;
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#endif
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}
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#if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
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/***************************************************************************//**
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* @brief
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* Sets the drive mode for a GPIO port.
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*
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* @param[in] port
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* The GPIO port to access.
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*
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* @param[in] mode
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* Drive mode to use for port.
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******************************************************************************/
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void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode)
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{
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EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode));
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GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK))
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| (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT);
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}
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#endif
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#if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK)
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/***************************************************************************//**
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* @brief
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* Sets the drive strength for a GPIO port.
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*
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* @param[in] port
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* The GPIO port to access.
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*
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* @param[in] strength
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* Drive strength to use for port.
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******************************************************************************/
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void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port,
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GPIO_DriveStrength_TypeDef strength)
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{
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EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength));
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BUS_RegMaskedWrite(&GPIO->P[port].CTRL,
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_GPIO_P_CTRL_DRIVESTRENGTH_MASK | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK,
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strength);
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}
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#endif
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/***************************************************************************//**
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* @brief
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* Configure GPIO external pin interrupt.
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*
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* @details
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* If reconfiguring a GPIO interrupt that is already enabled, it is generally
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* recommended to disable it first, see GPIO_Disable().
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*
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* The actual GPIO interrupt handler must be in place before enabling the
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* interrupt.
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*
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* Notice that any pending interrupt for the selected interrupt is cleared
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* by this function.
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*
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* @note
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* On series 0 devices the pin number parameter is not used. The
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* pin number used on these devices is hardwired to the interrupt with the
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* same number. @n
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* On series 1 devices, pin number can be selected freely within a group.
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* Interrupt numbers are divided into 4 groups (intNo / 4) and valid pin
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* number within the interrupt groups are:
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* 0: pins 0-3
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* 1: pins 4-7
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* 2: pins 8-11
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* 3: pins 12-15
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*
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* @param[in] port
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* The port to associate with @p pin.
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*
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* @param[in] pin
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* The pin number on the port.
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*
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* @param[in] intNo
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* The interrupt number to trigger.
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*
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* @param[in] risingEdge
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* Set to true if interrupts shall be enabled on rising edge, otherwise false.
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*
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* @param[in] fallingEdge
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* Set to true if interrupts shall be enabled on falling edge, otherwise false.
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*
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* @param[in] enable
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* Set to true if interrupt shall be enabled after configuration completed,
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* false to leave disabled. See GPIO_IntDisable() and GPIO_IntEnable().
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******************************************************************************/
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void GPIO_ExtIntConfig(GPIO_Port_TypeDef port,
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unsigned int pin,
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unsigned int intNo,
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bool risingEdge,
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bool fallingEdge,
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bool enable)
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{
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uint32_t tmp = 0;
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#if !defined(_GPIO_EXTIPINSELL_MASK)
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(void)pin;
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#endif
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EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
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#if defined(_GPIO_EXTIPINSELL_MASK)
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EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin));
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#endif
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/* There are two registers controlling the interrupt configuration:
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* The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls
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* pins 8-15. */
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if (intNo < 8) {
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BUS_RegMaskedWrite(&GPIO->EXTIPSELL,
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_GPIO_EXTIPSELL_EXTIPSEL0_MASK
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<< (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo),
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port << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo));
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} else {
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tmp = intNo - 8;
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BUS_RegMaskedWrite(&GPIO->EXTIPSELH,
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_GPIO_EXTIPSELH_EXTIPSEL8_MASK
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<< (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp),
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port << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp));
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}
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#if defined(_GPIO_EXTIPINSELL_MASK)
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/* There are two registers controlling the interrupt/pin number mapping:
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* The EXTIPINSELL register controls interrupt 0-7 and EXTIPINSELH controls
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* interrupt 8-15. */
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if (intNo < 8) {
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BUS_RegMaskedWrite(&GPIO->EXTIPINSELL,
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_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK
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<< (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo),
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((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK)
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<< (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo));
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} else {
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BUS_RegMaskedWrite(&GPIO->EXTIPINSELH,
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_GPIO_EXTIPINSELH_EXTIPINSEL8_MASK
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<< (_GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT * tmp),
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((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK)
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<< (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp));
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}
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#endif
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/* Enable/disable rising edge */
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BUS_RegBitWrite(&(GPIO->EXTIRISE), intNo, risingEdge);
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/* Enable/disable falling edge */
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BUS_RegBitWrite(&(GPIO->EXTIFALL), intNo, fallingEdge);
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/* Clear any pending interrupt */
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GPIO->IFC = 1 << intNo;
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/* Finally enable/disable interrupt */
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BUS_RegBitWrite(&(GPIO->IEN), intNo, enable);
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}
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/***************************************************************************//**
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* @brief
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* Set the mode for a GPIO pin.
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*
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* @param[in] port
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* The GPIO port to access.
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*
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* @param[in] pin
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* The pin number in the port.
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*
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* @param[in] mode
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* The desired pin mode.
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*
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* @param[in] out
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* Value to set for pin in DOUT register. The DOUT setting is important for
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* even some input mode configurations, determining pull-up/down direction.
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******************************************************************************/
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void GPIO_PinModeSet(GPIO_Port_TypeDef port,
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unsigned int pin,
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GPIO_Mode_TypeDef mode,
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unsigned int out)
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{
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EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
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/* If disabling pin, do not modify DOUT in order to reduce chance for */
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/* glitch/spike (may not be sufficient precaution in all use cases) */
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if (mode != gpioModeDisabled) {
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if (out) {
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GPIO_PinOutSet(port, pin);
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} else {
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GPIO_PinOutClear(port, pin);
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}
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}
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/* There are two registers controlling the pins for each port. The MODEL
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* register controls pins 0-7 and MODEH controls pins 8-15. */
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if (pin < 8) {
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GPIO->P[port].MODEL = (GPIO->P[port].MODEL & ~(0xFu << (pin * 4)))
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| (mode << (pin * 4));
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} else {
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GPIO->P[port].MODEH = (GPIO->P[port].MODEH & ~(0xFu << ((pin - 8) * 4)))
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| (mode << ((pin - 8) * 4));
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}
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if (mode == gpioModeDisabled) {
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if (out) {
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GPIO_PinOutSet(port, pin);
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} else {
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GPIO_PinOutClear(port, pin);
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}
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}
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}
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/***************************************************************************//**
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* @brief
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* Get the mode for a GPIO pin.
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*
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* @param[in] port
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* The GPIO port to access.
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*
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* @param[in] pin
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* The pin number in the port.
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*
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* @return
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* The pin mode.
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******************************************************************************/
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GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port,
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unsigned int pin)
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{
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EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
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if (pin < 8) {
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return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEL >> (pin * 4)) & 0xF);
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} else {
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return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEH >> ((pin - 8) * 4)) & 0xF);
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}
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}
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#if defined(_GPIO_EM4WUEN_MASK)
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/**************************************************************************//**
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* @brief
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* Enable GPIO pin wake-up from EM4. When the function exits,
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* EM4 mode can be safely entered.
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*
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* @note
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* It is assumed that the GPIO pin modes are set correctly.
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* Valid modes are @ref gpioModeInput and @ref gpioModeInputPull.
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*
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* @param[in] pinmask
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* Bitmask containing the bitwise logic OR of which GPIO pin(s) to enable.
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* Refer to Reference Manuals for pinmask to GPIO port/pin mapping.
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* @param[in] polaritymask
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* Bitmask containing the bitwise logic OR of GPIO pin(s) wake-up polarity.
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* Refer to Reference Manuals for pinmask to GPIO port/pin mapping.
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*****************************************************************************/
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void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask)
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{
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EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0);
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#if defined(_GPIO_EM4WUPOL_MASK)
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EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0);
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GPIO->EM4WUPOL &= ~pinmask; /* Set wakeup polarity */
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GPIO->EM4WUPOL |= pinmask & polaritymask;
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#elif defined(_GPIO_EXTILEVEL_MASK)
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EFM_ASSERT((polaritymask & ~_GPIO_EXTILEVEL_MASK) == 0);
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GPIO->EXTILEVEL &= ~pinmask;
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GPIO->EXTILEVEL |= pinmask & polaritymask;
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#endif
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GPIO->EM4WUEN |= pinmask; /* Enable wakeup */
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GPIO_EM4SetPinRetention(true); /* Enable pin retention */
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#if defined(_GPIO_CMD_EM4WUCLR_MASK)
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GPIO->CMD = GPIO_CMD_EM4WUCLR; /* Clear wake-up logic */
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#elif defined(_GPIO_IFC_EM4WU_MASK)
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GPIO_IntClear(pinmask);
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#endif
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}
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#endif
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/** @} (end addtogroup GPIO) */
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/** @} (end addtogroup emlib) */
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#endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */
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