From 6ffba7d472e96351c13cd83db79f7b03a4e3be9c Mon Sep 17 00:00:00 2001 From: Conor Patrick Date: Mon, 7 Jan 2019 18:50:01 -0500 Subject: [PATCH] move to new file --- targets/stm32l432/application.mk | 2 +- targets/stm32l432/src/device.c | 185 +----------------------------- targets/stm32l432/src/nfc.c | 188 +++++++++++++++++++++++++++++++ targets/stm32l432/src/nfc.h | 7 ++ 4 files changed, 200 insertions(+), 182 deletions(-) create mode 100644 targets/stm32l432/src/nfc.c create mode 100644 targets/stm32l432/src/nfc.h diff --git a/targets/stm32l432/application.mk b/targets/stm32l432/application.mk index 89ece0d..70bbc3f 100644 --- a/targets/stm32l432/application.mk +++ b/targets/stm32l432/application.mk @@ -5,7 +5,7 @@ AR=$(PREFIX)arm-none-eabi-ar # ST related SRC = src/main.c src/init.c src/redirect.c src/flash.c src/rng.c src/led.c src/device.c -SRC += src/fifo.c src/crypto.c src/attestation.c +SRC += src/fifo.c src/crypto.c src/attestation.c src/nfc.c SRC += src/startup_stm32l432xx.s src/system_stm32l4xx.c SRC += $(wildcard lib/*.c) $(wildcard lib/usbd/*.c) diff --git a/targets/stm32l432/src/device.c b/targets/stm32l432/src/device.c index 60e0b76..bff18b7 100644 --- a/targets/stm32l432/src/device.c +++ b/targets/stm32l432/src/device.c @@ -25,7 +25,7 @@ #include "stm32l4xx_ll_gpio.h" #include "stm32l4xx_ll_tim.h" #include "stm32l4xx_ll_usart.h" -#include "stm32l4xx_ll_spi.h" + #include "usbd_hid.h" #include APP_CONFIG @@ -42,6 +42,7 @@ #include "memory_layout.h" #include "stm32l4xx_ll_iwdg.h" #include "usbd_cdc_if.h" +#include "nfc.h" uint32_t __90_ms = 0; uint32_t __device_status = 0; @@ -107,6 +108,7 @@ void device_reboot() void device_init() { hw_init(); + nfc_init(); LL_GPIO_SetPinMode(SOLO_BUTTON_PORT,SOLO_BUTTON_PIN,LL_GPIO_MODE_INPUT); LL_GPIO_SetPinPull(SOLO_BUTTON_PORT,SOLO_BUTTON_PIN,LL_GPIO_PULL_UP); @@ -370,140 +372,6 @@ uint32_t ctap_atomic_count(int sel) return lastc; } -static void flush_rx() -{ - while(LL_SPI_IsActiveFlag_RXNE(SPI1) != 0) - { - LL_SPI_ReceiveData8(SPI1); - } -} -static void wait_for_tx() -{ - // while (LL_SPI_IsActiveFlag_BSY(SPI1) == 1) - // ; - while(LL_SPI_GetTxFIFOLevel(SPI1) != LL_SPI_TX_FIFO_EMPTY) - ; -} -static void wait_for_rx() -{ - while(LL_SPI_IsActiveFlag_RXNE(SPI1) == 0) - ; -} - -void ams_write_reg(uint8_t addr, uint8_t tx) -{ - LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - delay(1); - LL_SPI_TransmitData8(SPI1,0x00| addr); - LL_SPI_ReceiveData8(SPI1); - while (LL_SPI_IsActiveFlag_BSY(SPI1) == 1) - ; - LL_SPI_TransmitData8(SPI1,tx); - while (LL_SPI_IsActiveFlag_BSY(SPI1) == 1) - ; - LL_SPI_ReceiveData8(SPI1); - - LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - // delay(1); - LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - -} - -uint8_t send_recv(uint8_t b) -{ - wait_for_tx(); - LL_SPI_TransmitData8(SPI1, b); - wait_for_rx(); - b = LL_SPI_ReceiveData8(SPI1); - return b; -} - -uint8_t send_recv2(uint8_t b1,uint8_t b2) -{ - wait_for_tx(); - LL_SPI_TransmitData8(SPI1, b1); - LL_SPI_TransmitData8(SPI1, b2); - wait_for_tx(); - LL_SPI_ReceiveData8(SPI1); - uint8_t b = LL_SPI_ReceiveData8(SPI1); - return b; -} -#define SELECT() LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN) -#define UNSELECT() LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN) -uint8_t ams_read_reg(uint8_t addr) -{ - delay(2); - flush_rx(); - LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - delay(2); - - uint8_t data = send_recv2(0x20| (addr & 0x1f), 0); - // send_recv(0x20| addr); - // - // uint8_t data = send_recv(0); - - delay(2); - LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - delay(2); - return data; -} - -// data must be 14 bytes long -void read_reg_block2(uint8_t * data) -{ - int i; - - for (i = 0; i < 0x20; i++) - { - if (i < 6 || (i >=8 && i < 0x0f) || (i >= 0x1e)) - { - *data = ams_read_reg(i); - data++; - } - } - -} - - -// data must be 14 bytes long -void read_reg_block(uint8_t * data, int count) -{ - int i; - uint8_t mode = 0x20 | (0 ); - flush_rx(); - SELECT(); - delay(2); - send_recv(mode); - for (i = 0; i < count; i++) - { - mode = send_recv(0); - // if (i < 6 || (i >=8 && i < 0x0f) || (i >= 0x1e)) - // { - *data = mode; - data++; - // } - } - - delay(2); - UNSELECT(); - // delay(2); - // SELECT(); -} - -void ams_write_command(uint8_t cmd) -{ - - uint8_t mode = cmd; - // delay(10); - - // delay(10); - SELECT(); - delay(1); - send_recv(mode); - UNSELECT(); - SELECT(); - -} @@ -527,52 +395,7 @@ void device_manage() } } #endif - - static int run = 0; - - if (!run) - { - uint8_t regs[0x20]; - run = 1; - - LL_GPIO_SetPinMode(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN,LL_GPIO_MODE_OUTPUT); - LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - - LL_SPI_SetClockPolarity(SPI1,LL_SPI_POLARITY_LOW); - LL_SPI_SetClockPhase(SPI1,LL_SPI_PHASE_2EDGE); - LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER); - LL_SPI_Enable(SPI1); - - delay(10); - LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - delay(10); - // LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - delay(10); - // ams_write_command(0xC2); // Set to default state - // ams_write_command(0xC4); // Clear buffer - - int x; - for (x = 0 ; x < 10; x++) - { - flush_rx(); - - - memset(regs,0,sizeof(regs)); - read_reg_block(regs,sizeof(regs)); - printf1(TAG_NFC,"regs: "); dump_hex1(TAG_NFC,regs,sizeof(regs)); - - } - - // - // LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); - // - // memset(regs,0,sizeof(regs)); - // for (x = 0 ; x < sizeof(regs); x++) - // { - // regs[x] = ams_read_reg(x); - // } - // printf1(TAG_NFC,"regs2: "); dump_hex1(TAG_NFC,regs,sizeof(regs)); - } + nfc_loop(); } static int handle_packets() diff --git a/targets/stm32l432/src/nfc.c b/targets/stm32l432/src/nfc.c new file mode 100644 index 0000000..da3fe87 --- /dev/null +++ b/targets/stm32l432/src/nfc.c @@ -0,0 +1,188 @@ +#include + +#include "stm32l4xx.h" +#include "stm32l4xx_ll_gpio.h" +#include "stm32l4xx_ll_spi.h" +#include "nfc.h" +#include "log.h" +#include "util.h" + + +static void flush_rx() +{ + while(LL_SPI_IsActiveFlag_RXNE(SPI1) != 0) + { + LL_SPI_ReceiveData8(SPI1); + } +} +static void wait_for_tx() +{ + // while (LL_SPI_IsActiveFlag_BSY(SPI1) == 1) + // ; + while(LL_SPI_GetTxFIFOLevel(SPI1) != LL_SPI_TX_FIFO_EMPTY) + ; +} +static void wait_for_rx() +{ + while(LL_SPI_IsActiveFlag_RXNE(SPI1) == 0) + ; +} + + +#define SELECT() LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN) +#define UNSELECT() LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN) + +uint8_t send_recv(uint8_t b) +{ + wait_for_tx(); + LL_SPI_TransmitData8(SPI1, b); + wait_for_rx(); + b = LL_SPI_ReceiveData8(SPI1); + return b; +} + +uint8_t send_recv2(uint8_t b1,uint8_t b2) +{ + send_recv(b1); + return send_recv(b2); +} + +void ams_write_reg(uint8_t addr, uint8_t tx) +{ + SELECT(); + delay(2); + send_recv(0x00| addr); + send_recv(tx); + UNSELECT(); +} + + +uint8_t ams_read_reg(uint8_t addr) +{ + SELECT(); + delay(2); + + uint8_t data = send_recv2(0x20| (addr & 0x1f), 0); + // send_recv(0x20| addr); + // + // uint8_t data = send_recv(0); + + // delay(2); + UNSELECT(); + return data; +} + +// data must be 14 bytes long +void read_reg_block2(uint8_t * data) +{ + int i; + + for (i = 0; i < 0x20; i++) + { + if (i < 6 || (i >=8 && i < 0x0f) || (i >= 0x1e)) + { + *data = ams_read_reg(i); + data++; + } + } + +} + + +// data must be 14 bytes long +void read_reg_block(uint8_t * data) +{ + int i; + uint8_t mode = 0x20 | (0 ); + flush_rx(); + SELECT(); + + send_recv(mode); + for (i = 0; i < 0x20; i++) + { + mode = send_recv(0); + // if (i < 6 || (i >=8 && i < 0x0f) || (i >= 0x1e)) + // { + *data = mode; + data++; + // } + } + + + UNSELECT(); + // delay(2); + // SELECT(); +} + +void ams_write_command(uint8_t cmd) +{ + + uint8_t mode = cmd; + // delay(10); + + // delay(10); + SELECT(); + delay(1); + send_recv(mode); + UNSELECT(); + SELECT(); + +} + +void nfc_init() +{ + LL_GPIO_SetPinMode(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN,LL_GPIO_MODE_OUTPUT); + LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); + + LL_SPI_SetClockPolarity(SPI1,LL_SPI_POLARITY_LOW); + LL_SPI_SetClockPhase(SPI1,LL_SPI_PHASE_2EDGE); + LL_SPI_SetRxFIFOThreshold(SPI1,LL_SPI_RX_FIFO_TH_QUARTER); + LL_SPI_Enable(SPI1); +} + +void nfc_loop() +{ + + static int run = 0; + + if (!run) + { + uint8_t regs[0x20]; + run = 1; + + delay(10); + LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); + delay(10); + // LL_GPIO_ResetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); + delay(10); + // ams_write_command(0xC2); // Set to default state + // ams_write_command(0xC4); // Clear buffer + ams_write_reg(1,7); + int x; + for (x = 0 ; x < 10; x++) + { + memset(regs,0,sizeof(regs)); + ams_write_reg(1,7); + read_reg_block(regs); + printf1(TAG_NFC,"regs: "); dump_hex1(TAG_NFC,regs,sizeof(regs)); + + + } + printf1(TAG_NFC,"---\r\n"); + for (x = 0 ; x < 10; x++) + { + memset(regs,0,sizeof(regs)); + read_reg_block2(regs); + printf1(TAG_NFC,"regs: "); dump_hex1(TAG_NFC,regs,sizeof(regs)); + } + // + // LL_GPIO_SetOutputPin(SOLO_AMS_CS_PORT,SOLO_AMS_CS_PIN); + // + // memset(regs,0,sizeof(regs)); + // for (x = 0 ; x < sizeof(regs); x++) + // { + // regs[x] = ams_read_reg(x); + // } + // printf1(TAG_NFC,"regs2: "); dump_hex1(TAG_NFC,regs,sizeof(regs)); + } +} diff --git a/targets/stm32l432/src/nfc.h b/targets/stm32l432/src/nfc.h new file mode 100644 index 0000000..b686f81 --- /dev/null +++ b/targets/stm32l432/src/nfc.h @@ -0,0 +1,7 @@ +#ifndef _NFC_H_ +#define _NFC_H_ + +void nfc_loop(); +void nfc_init(); + +#endif