diff --git a/.clabot b/.clabot new file mode 100644 index 0000000..76e90a2 --- /dev/null +++ b/.clabot @@ -0,0 +1,4 @@ +{ + "contributors": "https://raw.githubusercontent.com/solokeys/contributors/master/contributors.json", + "message": "We require contributors to sign our Copyright License Agreement, and we don't have {{usersWithoutCLA}} on file. In order for us to review and merge your code, please visit https://solokeys.com/legal/contributors, or contact @nickray, @conorpp or @0x0ece for further information or help." +} diff --git a/.envrc b/.envrc new file mode 100644 index 0000000..2ec7e88 --- /dev/null +++ b/.envrc @@ -0,0 +1 @@ +source env3/bin/activate diff --git a/.gitignore b/.gitignore index 4e3c5c5..66184fa 100644 --- a/.gitignore +++ b/.gitignore @@ -80,3 +80,13 @@ env3/ .tags* targets/*/docs/ main +targets/efm32/.project +targets/efm32/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs +targets/efm32/.settings/org.eclipse.cdt.codan.core.prefs +targets/efm32/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s +targets/efm32/CMSIS/EFM32PG1B/system_efm32pg1b.c +targets/efm32/EFM32.hwconf +targets/efm32/EFM32_EFM32JG1B200F128GM32.hwconf +targets/efm32/emlib/em_adc.c +targets/efm32/emlib/em_assert.c +targets/efm32/emlib/em_cmu.c diff --git a/.travis.yml b/.travis.yml index 8d8a18f..4eb33ca 100644 --- a/.travis.yml +++ b/.travis.yml @@ -1,4 +1,4 @@ -dist: trusty +dist: xenial language: c compiler: gcc addons: @@ -7,6 +7,13 @@ addons: - ubuntu-toolchain-r-test packages: - gcc-7 + - cppcheck +before_install: + - sudo add-apt-repository -y ppa:team-gcc-arm-embedded/ppa + - sudo apt-get update -q + - sudo apt-get install -y gcc-arm-embedded + - sudo apt-get install -y python3-venv script: - export CC=gcc-7 - - make test + - pyenv shell 3.6.7 + - make travis diff --git a/99-solo.rules b/99-solo.rules index e2f9a47..0c6450a 100644 --- a/99-solo.rules +++ b/99-solo.rules @@ -1,6 +1,17 @@ +# Notify ModemManager this device should be ignored +ACTION!="add|change|move", GOTO="mm_usb_device_blacklist_end" +SUBSYSTEM!="usb", GOTO="mm_usb_device_blacklist_end" +ENV{DEVTYPE}!="usb_device", GOTO="mm_usb_device_blacklist_end" + +ATTRS{idVendor}=="0483", ATTRS{idProduct}=="a2ca", ENV{ID_MM_DEVICE_IGNORE}="1" + +LABEL="mm_usb_device_blacklist_end" + # Solo ATTRS{idVendor}=="0483", ATTRS{idProduct}=="a2ca", ATTRS{product}=="Solo", TAG+="uaccess", GROUP="plugdev", SYMLINK+="solokey" ATTRS{idVendor}=="0483", ATTRS{idProduct}=="a2ca", ATTRS{product}=="Solo HACKER (Unlocked)", TAG+="uaccess", GROUP="plugdev", SYMLINK+="solohacker" +SUBSYSTEM=="tty", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="a2ca", TAG+="uaccess", GROUP="plugdev", SYMLINK+="solokey-serial" + # U2F Zero KERNEL=="hidraw*", SUBSYSTEM=="hidraw", ATTRS{idVendor}=="10c4", ATTRS{idProduct}=="8acf", TAG+="uaccess", GROUP="plugdev", SYMLINK+="u2fzero" diff --git a/LICENSE b/LICENSE deleted file mode 100644 index 281d399..0000000 --- a/LICENSE +++ /dev/null @@ -1,619 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 3, 29 June 2007 - - Copyright (C) 2007 Free Software Foundation, Inc. - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The GNU General Public License is a free, copyleft license for -software and other kinds of works. - - The licenses for most software and other practical works are designed -to take away your freedom to share and change the works. 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We also recommend that a +file or class name and description of purpose be included on the +same "printed page" as the copyright notice for easier +identification within third-party archives. + +Copyright [yyyy] [name of copyright owner] + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + +http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. diff --git a/LICENSE-MIT b/LICENSE-MIT new file mode 100644 index 0000000..31aa793 --- /dev/null +++ b/LICENSE-MIT @@ -0,0 +1,23 @@ +Permission is hereby granted, free of charge, to any +person obtaining a copy of this software and associated +documentation files (the "Software"), to deal in the +Software without restriction, including without +limitation the rights to use, copy, modify, merge, +publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software +is furnished to do so, subject to the following +conditions: + +The above copyright notice and this permission notice +shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF +ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED +TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A +PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT +SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR +IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. diff --git a/Makefile b/Makefile index d72d90f..e9caa44 100644 --- a/Makefile +++ b/Makefile @@ -13,7 +13,7 @@ EFM32_DEBUGGER= -s 440083537 --device EFM32JG1B200F128GM32 #EFM32_DEBUGGER= -s 440121060 #dev board src = $(wildcard pc/*.c) $(wildcard fido2/*.c) $(wildcard crypto/sha256/*.c) crypto/tiny-AES-c/aes.c -obj = $(src:.c=.o) uECC.o +obj = $(src:.c=.o) crypto/micro-ecc/uECC.o LIBCBOR = tinycbor/lib/libtinycbor.a @@ -33,7 +33,7 @@ CFLAGS += -DAES256=1 -DAPP_CONFIG=\"app.h\" name = main -.PHONY: all +.PHONY: all $(LIBCBOR) env2 env3 black wink2 wink3 fido2-test clean full-clean travis all: main tinycbor/Makefile crypto/tiny-AES-c/aes.c: @@ -42,11 +42,16 @@ tinycbor/Makefile crypto/tiny-AES-c/aes.c: .PHONY: cbor cbor: $(LIBCBOR) -$(LIBCBOR): tinycbor/Makefile +$(LIBCBOR): cd tinycbor/ && $(MAKE) clean && $(MAKE) -j8 -test: +test: env3 + $(MAKE) clean $(MAKE) -C . main + $(MAKE) clean + $(MAKE) -C ./targets/stm32l432 test PREFIX=$(PREFIX) "VENV=$(VENV)" + $(MAKE) clean + $(MAKE) cppcheck .PHONY: efm8prog efm8prog: @@ -67,36 +72,49 @@ efm32bootprog: efm32com $(name): $(obj) $(LIBCBOR) $(CC) $(LDFLAGS) -o $@ $(obj) $(LDFLAGS) -uECC.o: ./crypto/micro-ecc/uECC.c +crypto/micro-ecc/uECC.o: ./crypto/micro-ecc/uECC.c $(CC) -c -o $@ $^ -O2 -fdata-sections -ffunction-sections -DuECC_PLATFORM=$(ecc_platform) -I./crypto/micro-ecc/ env2: virtualenv --python=python2.7 env2 - env2/bin/pip install --upgrade -r tools/requirements.txt + env3/bin/pip --version + env2/bin/pip install -r tools/requirements.txt env3: python3 -m venv env3 - env3/bin/pip install --upgrade -r tools/requirements.txt - env3/bin/pip install --upgrade black + env3/bin/pip -q install --upgrade -r tools/requirements.txt + env3/bin/pip -q install --upgrade black +.PHONY: black blackcheck wink2 wink3 fido2-test cppcheck test clean # selectively reformat our own code black: env3 - env3/bin/black --skip-string-normalization tools/ + env3/bin/black --skip-string-normalization --check tools/ -wink2: env2 - env2/bin/python tools/solotool.py solo --wink - -wink3: env3 - env3/bin/python tools/solotool.py solo --wink +wink2 wink3: wink% : env% + $ ``` +#### Linux Users: + +[See issue 62](https://github.com/solokeys/solo/issues/62). + ### Building a Solo release If you want to build a release of Solo, we recommend trying a Hacker build first diff --git a/docs/solo/contributing.md b/docs/solo/contributing.md index 1728356..3c82137 100644 --- a/docs/solo/contributing.md +++ b/docs/solo/contributing.md @@ -2,14 +2,14 @@ We are very open to contributions! [Currently](https://github.com/solokeys/solo/issues), most work will go towards -* implementing STM32L432 +* ~~implementing STM32L432~~ * implementing NFC * adding documentation and improving accessability of the code In the future, we would love to see creative plugins/extensions, putting the TRNG and other features of the STM32L432 to good use! -Feel free to send a [pull request](https://github.com/solokeys/solo/pulls) at any time, we don't currently have a formal contribution process. +Feel free to send a [pull request](https://github.com/solokeys/solo/pulls) at any time, please note that we do require a lightweight copyright license agreement in order to accept contributions. Reason and procedure: . If you want to discuss your plans in quasi-realtime beforehand, you can also join our [solokeys.public](https://keybase.io/team/solokeys.public) Keybase team. -But first: [join our mailing list!](https://solokeys.us19.list-manage.com/subscribe/post?u=cc0c298fb99cd136bdec8294b&id=b9cb3de62d) +But first: [join our mailing list!](https://solokeys.us19.list-manage.com/subscribe/post?u=cc0c298fb99cd136bdec8294b&id=6550fc947a) diff --git a/docs/solo/fido2-impl.md b/docs/solo/fido2-impl.md index d0d5890..a5c8ba4 100644 --- a/docs/solo/fido2-impl.md +++ b/docs/solo/fido2-impl.md @@ -15,13 +15,15 @@ A master secret, `M`, is generated at initialization. This is only used for all key generation and derivation in FIDO2. Solo uses a key wrapping method for FIDO2 operation. +** NOTE: The masked implementation of AES is planned, but not yet implemented. Currently it is normal AES. ** + ## Key wrapping When you register a service with a FIDO2 or U2F authenticator, the authenticator must generate a new keypair unique to that service. This keypair could be stored on the authenticator to be used in subsequent authentications, but now a certain amount of memory needs to be allocated for this. On embedded -devices, there isn't much memory to spare and users will always frustratingly +devices, there isn't much memory to spare and users will allows frustratingly hit the limit of this memory. The answer to this problem is to do key wrapping. The authenticator just @@ -55,6 +57,8 @@ keys which are then used for FIDO2/U2F. --> ## Key derivation +** Planned, but not yet implemented. ** + Master secret `M` consists of 64 bytes, split into equal parts `M1` and `M2`. In theory, we should only need 32 bytes to achieve 256 security, but we also plan to have side channel security hence the added bytes. diff --git a/docs/solo/metadata-statements.md b/docs/solo/metadata-statements.md new file mode 100644 index 0000000..9491ac2 --- /dev/null +++ b/docs/solo/metadata-statements.md @@ -0,0 +1,12 @@ +For information on what this is, see the [spec](https://fidoalliance.org/specs/fido-v2.0-rd-20180702/fido-metadata-statement-v2.0-rd-20180702.html#fido2-example). +## CTAP2 + +``` +{!metadata/Solo-FIDO2-CTAP2-Authenticator.json!} +``` + +## U2F + +``` +{!metadata/Solo-FIDO2-U2F-Authenticator.json!} +``` diff --git a/docs/solo/signed-updates.md b/docs/solo/signed-updates.md index 86dba1d..39eae90 100644 --- a/docs/solo/signed-updates.md +++ b/docs/solo/signed-updates.md @@ -22,5 +22,5 @@ In order to boot the application, a valid signature must be provided to the boot signature using a public key stored in the bootloader section, and the data in the application section. If the signature is valid, the boot flag in the data section will be changed to allow boot. -Signature checks and checks to the data section boot flag are made redundantly to make glitching attacks more difficult. Random delays -between redundant checks are also made. +We are working to make the signature checking process redundantly to make glitching attacks more difficult. Also random delays +between redundant checks. diff --git a/docs/solo/udev.md b/docs/solo/udev.md index 4959b13..6bac736 100644 --- a/docs/solo/udev.md +++ b/docs/solo/udev.md @@ -1,6 +1,6 @@ # tl;dr -Create [`/etc/udev/99-solo.rules`](https://github.com/solokeys/solo/blob/master/99-solo.rules) and add the following (which assumes your user is in group `plugdev`): +Create [`/etc/udev/rules.d/99-solo.rules`](https://github.com/solokeys/solo/blob/master/99-solo.rules) and add the following (which assumes your user is in group `plugdev`): ``` # Solo @@ -13,7 +13,7 @@ KERNEL=="hidraw*", SUBSYSTEM=="hidraw", ATTRS{idVendor}=="10c4", ATTRS{idProduct Then run ``` -udevadm trigger +sudo udevadm control --reload-rules && sudo udevadm trigger ``` # How do udev rules work and why are they needed @@ -65,8 +65,8 @@ udevadm trigger ## What about vendor and product ID for Solo? | Key | Vendor ID | Product ID | | --- | --- | --- | -| Solo | 10c4 | 8acf | -| U2F Zero | 0483 | a2ca | +| Solo | 0483 | a2ca | +| U2F Zero | 10c4 | 8acf | ## You got this all wrong, I can't believe it! Are you suffering from [us being wrong](https://xkcd.com/386/)? Please, send us a [pull request](https://github.com/solokeys/solo/pulls) and prove us wrong :D diff --git a/fido2/cose_key.h b/fido2/cose_key.h index 0e46497..4750c31 100644 --- a/fido2/cose_key.h +++ b/fido2/cose_key.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _COSE_KEY_H #define _COSE_KEY_H diff --git a/fido2/crypto.c b/fido2/crypto.c index ef83c9d..f0e898a 100644 --- a/fido2/crypto.c +++ b/fido2/crypto.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. /* * Wrapper for crypto implementation on device * diff --git a/fido2/crypto.h b/fido2/crypto.h index e4c9c6d..844e7f3 100644 --- a/fido2/crypto.h +++ b/fido2/crypto.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _CRYPTO_H #define _CRYPTO_H diff --git a/fido2/ctap.c b/fido2/ctap.c index 6b644f3..3f323d9 100644 --- a/fido2/ctap.c +++ b/fido2/ctap.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include @@ -324,7 +309,7 @@ static int is_matching_rk(CTAP_residentKey * rk, CTAP_residentKey * rk2) } -static int ctap_make_auth_data(struct rpId * rp, CborEncoder * map, uint8_t * auth_data_buf, int len, CTAP_userEntity * user, uint8_t credtype, int32_t algtype, int32_t * sz, int store) +static int ctap_make_auth_data(struct rpId * rp, CborEncoder * map, uint8_t * auth_data_buf, unsigned int len, CTAP_userEntity * user, uint8_t credtype, int32_t algtype, int32_t * sz, int store) { CborEncoder cose_key; int auth_data_sz, ret; @@ -395,8 +380,8 @@ static int ctap_make_auth_data(struct rpId * rp, CborEncoder * map, uint8_t * au memmove(&rk.id, &authData->attest.id, sizeof(CredentialId)); memmove(&rk.user, user, sizeof(CTAP_userEntity)); - int index = STATE.rk_stored; - int i; + unsigned int index = STATE.rk_stored; + unsigned int i; for (i = 0; i < index; i++) { ctap_load_rk(i, &rk2); @@ -444,36 +429,46 @@ done_rk: } -int ctap_encode_der_sig(uint8_t * sigbuf, uint8_t * sigder) +/** + * + * @param in_sigbuf IN location to deposit signature (must be 64 bytes) + * @param out_sigder OUT location to deposit der signature (must be 72 bytes) + * @return length of der signature + * // FIXME add tests for maximum and minimum length of the input and output + */ +int ctap_encode_der_sig(const uint8_t * const in_sigbuf, uint8_t * const out_sigder) { // Need to caress into dumb der format .. - int i; - int8_t lead_s = 0; // leading zeros - int8_t lead_r = 0; + uint8_t i; + uint8_t lead_s = 0; // leading zeros + uint8_t lead_r = 0; for (i=0; i < 32; i++) - if (sigbuf[i] == 0) lead_r++; + if (in_sigbuf[i] == 0) lead_r++; else break; for (i=0; i < 32; i++) - if (sigbuf[i+32] == 0) lead_s++; + if (in_sigbuf[i+32] == 0) lead_s++; else break; - int8_t pad_s = ((sigbuf[32 + lead_s] & 0x80) == 0x80); - int8_t pad_r = ((sigbuf[0 + lead_r] & 0x80) == 0x80); + int8_t pad_s = ((in_sigbuf[32 + lead_s] & 0x80) == 0x80); + int8_t pad_r = ((in_sigbuf[0 + lead_r] & 0x80) == 0x80); - sigder[0] = 0x30; - sigder[1] = 0x44 + pad_s + pad_r - lead_s - lead_r; + memset(out_sigder, 0, 72); + out_sigder[0] = 0x30; + out_sigder[1] = 0x44 + pad_s + pad_r - lead_s - lead_r; - sigder[2] = 0x02; - sigder[3 + pad_r] = 0; - sigder[3] = 0x20 + pad_r - lead_r; - memmove(sigder + 4 + pad_r, sigbuf + lead_r, 32); + // R ingredient + out_sigder[2] = 0x02; + out_sigder[3 + pad_r] = 0; + out_sigder[3] = 0x20 + pad_r - lead_r; + memmove(out_sigder + 4 + pad_r, in_sigbuf + lead_r, 32u - lead_r); + + // S ingredient + out_sigder[4 + 32 + pad_r - lead_r] = 0x02; + out_sigder[5 + 32 + pad_r + pad_s - lead_r] = 0; + out_sigder[5 + 32 + pad_r - lead_r] = 0x20 + pad_s - lead_s; + memmove(out_sigder + 6 + 32 + pad_r + pad_s - lead_r, in_sigbuf + 32u + lead_s, 32u - lead_s); - sigder[4 + 32 + pad_r - lead_r] = 0x02; - sigder[5 + 32 + pad_r + pad_s - lead_r] = 0; - sigder[5 + 32 + pad_r - lead_r] = 0x20 + pad_s - lead_s; - memmove(sigder + 6 + 32 + pad_r + pad_s - lead_r, sigbuf + 32 + lead_s, 32); - // return 0x46 + pad_s + pad_r - lead_r - lead_s; } @@ -481,8 +476,8 @@ int ctap_encode_der_sig(uint8_t * sigbuf, uint8_t * sigder) // @data data to hash before signature // @clientDataHash for signature // @tmp buffer for hash. (can be same as data if data >= 32 bytes) -// @sigbuf location to deposit signature (must be 64 bytes) -// @sigder location to deposit der signature (must be 72 bytes) +// @sigbuf OUT location to deposit signature (must be 64 bytes) +// @sigder OUT location to deposit der signature (must be 72 bytes) // @return length of der signature int ctap_calculate_signature(uint8_t * data, int datalen, uint8_t * clientDataHash, uint8_t * hashbuf, uint8_t * sigbuf, uint8_t * sigder) { @@ -554,7 +549,8 @@ int ctap_authenticate_credential(struct rpId * rp, CTAP_credentialDescriptor * d uint8_t ctap_make_credential(CborEncoder * encoder, uint8_t * request, int length) { CTAP_makeCredential MC; - int ret, i; + int ret; + unsigned int i; uint8_t auth_data_buf[300]; CTAP_credentialDescriptor * excl_cred = (CTAP_credentialDescriptor *) auth_data_buf; uint8_t * sigbuf = auth_data_buf + 32; @@ -1363,8 +1359,6 @@ uint8_t ctap_request(uint8_t * pkt_raw, int length, CTAP_RESPONSE * resp) CborEncoder encoder; uint8_t status = 0; uint8_t cmd = *pkt_raw; - uint64_t t1; - uint64_t t2; pkt_raw++; length--; @@ -1397,10 +1391,9 @@ uint8_t ctap_request(uint8_t * pkt_raw, int length, CTAP_RESPONSE * resp) case CTAP_MAKE_CREDENTIAL: device_set_status(CTAPHID_STATUS_PROCESSING); printf1(TAG_CTAP,"CTAP_MAKE_CREDENTIAL\n"); - t1 = millis(); + timestamp(); status = ctap_make_credential(&encoder, pkt_raw, length); - t2 = millis(); - printf1(TAG_TIME,"make_credential time: %d ms\n", t2-t1); + printf1(TAG_TIME,"make_credential time: %d ms\n", timestamp()); resp->length = cbor_encoder_get_buffer_size(&encoder, buf); dump_hex1(TAG_DUMP, buf, resp->length); @@ -1409,10 +1402,9 @@ uint8_t ctap_request(uint8_t * pkt_raw, int length, CTAP_RESPONSE * resp) case CTAP_GET_ASSERTION: device_set_status(CTAPHID_STATUS_PROCESSING); printf1(TAG_CTAP,"CTAP_GET_ASSERTION\n"); - t1 = millis(); + timestamp(); status = ctap_get_assertion(&encoder, pkt_raw, length); - t2 = millis(); - printf1(TAG_TIME,"get_assertion time: %d ms\n", t2-t1); + printf1(TAG_TIME,"get_assertion time: %d ms\n", timestamp()); resp->length = cbor_encoder_get_buffer_size(&encoder, buf); diff --git a/fido2/ctap.h b/fido2/ctap.h index 7448b44..a3a8783 100644 --- a/fido2/ctap.h +++ b/fido2/ctap.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _CTAP_H #define _CTAP_H @@ -279,7 +264,7 @@ uint8_t ctap_request(uint8_t * pkt_raw, int length, CTAP_RESPONSE * resp); // Encodes R,S signature to 2 der sequence of two integers. Sigder must be at least 72 bytes. // @return length of der signature -int ctap_encode_der_sig(uint8_t * sigbuf, uint8_t * sigder); +int ctap_encode_der_sig(uint8_t const * const in_sigbuf, uint8_t * const out_sigder); // Run ctap related power-up procedures (init pinToken, generate shared secret) void ctap_init(); diff --git a/fido2/ctap_errors.h b/fido2/ctap_errors.h index 14ce2cf..a749651 100644 --- a/fido2/ctap_errors.h +++ b/fido2/ctap_errors.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #define CTAP1_ERR_SUCCESS 0x00 #define CTAP1_ERR_INVALID_COMMAND 0x01 #define CTAP1_ERR_INVALID_PARAMETER 0x02 diff --git a/fido2/ctap_parse.c b/fido2/ctap_parse.c index 80f96fa..f76dde7 100644 --- a/fido2/ctap_parse.c +++ b/fido2/ctap_parse.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include "cbor.h" @@ -94,7 +79,7 @@ uint8_t parse_user(CTAP_makeCredential * MC, CborValue * val) size_t sz, map_length; uint8_t key[24]; int ret; - int i; + unsigned int i; CborValue map; @@ -285,7 +270,7 @@ uint8_t parse_pub_key_cred_params(CTAP_makeCredential * MC, CborValue * val) uint8_t cred_type; int32_t alg_type; int ret; - int i; + unsigned int i; CborValue arr; @@ -334,7 +319,7 @@ uint8_t parse_pub_key_cred_params(CTAP_makeCredential * MC, CborValue * val) return CTAP2_ERR_UNSUPPORTED_ALGORITHM; } -uint8_t parse_fixed_byte_string(CborValue * map, uint8_t * dst, int len) +uint8_t parse_fixed_byte_string(CborValue * map, uint8_t * dst, unsigned int len) { size_t sz; int ret; @@ -359,7 +344,7 @@ uint8_t parse_fixed_byte_string(CborValue * map, uint8_t * dst, int len) uint8_t parse_verify_exclude_list(CborValue * val) { - int i; + unsigned int i; int ret; CborValue arr; size_t size; @@ -408,7 +393,7 @@ uint8_t parse_rp(struct rpId * rp, CborValue * val) size_t sz, map_length; char key[8]; int ret; - int i; + unsigned int i; CborValue map; @@ -496,7 +481,7 @@ uint8_t parse_options(CborValue * val, uint8_t * rk, uint8_t * uv, uint8_t * up) size_t sz, map_length; char key[8]; int ret; - int i; + unsigned int i; _Bool b; CborValue map; @@ -574,7 +559,7 @@ uint8_t parse_options(CborValue * val, uint8_t * rk, uint8_t * uv, uint8_t * up) uint8_t ctap_parse_make_credential(CTAP_makeCredential * MC, CborEncoder * encoder, uint8_t * request, int length) { int ret; - int i; + unsigned int i; int key; size_t map_length; CborParser parser; @@ -790,7 +775,8 @@ uint8_t parse_allow_list(CTAP_getAssertion * GA, CborValue * it) { CborValue arr; size_t len; - int i,ret; + int ret; + unsigned int i; CTAP_credentialDescriptor * cred; if (cbor_value_get_type(it) != CborArrayType) @@ -832,7 +818,7 @@ uint8_t parse_allow_list(CTAP_getAssertion * GA, CborValue * it) uint8_t ctap_parse_get_assertion(CTAP_getAssertion * GA, uint8_t * request, int length) { int ret; - int i; + unsigned int i; int key; size_t map_length; CborParser parser; @@ -958,7 +944,8 @@ uint8_t parse_cose_key(CborValue * it, uint8_t * x, uint8_t * y, int * kty, int { CborValue map; size_t map_length; - int i,ret,key; + int ret,key; + unsigned int i; int xkey = 0,ykey = 0; *kty = 0; *crv = 0; @@ -1053,7 +1040,7 @@ uint8_t parse_cose_key(CborValue * it, uint8_t * x, uint8_t * y, int * kty, int uint8_t ctap_parse_client_pin(CTAP_clientPin * CP, uint8_t * request, int length) { int ret; - int i; + unsigned int i; int key; size_t map_length; size_t sz; diff --git a/fido2/ctap_parse.h b/fido2/ctap_parse.h index 128c1ef..3a177af 100644 --- a/fido2/ctap_parse.h +++ b/fido2/ctap_parse.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _CTAP_PARSE_H #define _CTAP_PARSE_H @@ -39,7 +24,7 @@ const char * cbor_value_get_type_string(const CborValue *value); uint8_t parse_user(CTAP_makeCredential * MC, CborValue * val); uint8_t parse_pub_key_cred_param(CborValue * val, uint8_t * cred_type, int32_t * alg_type); uint8_t parse_pub_key_cred_params(CTAP_makeCredential * MC, CborValue * val); -uint8_t parse_fixed_byte_string(CborValue * map, uint8_t * dst, int len); +uint8_t parse_fixed_byte_string(CborValue * map, uint8_t * dst, unsigned int len); uint8_t parse_rp_id(struct rpId * rp, CborValue * val); uint8_t parse_rp(struct rpId * rp, CborValue * val); uint8_t parse_options(CborValue * val, uint8_t * rk, uint8_t * uv, uint8_t * up); diff --git a/fido2/ctaphid.c b/fido2/ctaphid.c index 3e6d5f1..5ddc260 100644 --- a/fido2/ctaphid.c +++ b/fido2/ctaphid.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include @@ -113,7 +98,7 @@ static uint32_t get_new_cid() static int8_t add_cid(uint32_t cid) { - int i; + uint32_t i; for(i = 0; i < CID_MAX-1; i++) { if (!CIDS[i].busy) @@ -129,7 +114,7 @@ static int8_t add_cid(uint32_t cid) static int8_t cid_exists(uint32_t cid) { - int i; + uint32_t i; for(i = 0; i < CID_MAX-1; i++) { if (CIDS[i].cid == cid) @@ -142,7 +127,7 @@ static int8_t cid_exists(uint32_t cid) static int8_t cid_refresh(uint32_t cid) { - int i; + uint32_t i; for(i = 0; i < CID_MAX-1; i++) { if (CIDS[i].cid == cid) @@ -157,7 +142,7 @@ static int8_t cid_refresh(uint32_t cid) static int8_t cid_del(uint32_t cid) { - int i; + uint32_t i; for(i = 0; i < CID_MAX-1; i++) { if (CIDS[i].cid == cid) @@ -395,7 +380,7 @@ static int ctaphid_buffer_packet(uint8_t * pkt_raw, uint8_t * cmd, uint32_t * ci printf1(TAG_HID, "Recv packet\n"); printf1(TAG_HID, " CID: %08x \n", pkt->cid); printf1(TAG_HID, " cmd: %02x\n", pkt->pkt.init.cmd); - if (!is_cont_pkt(pkt)) printf1(TAG_HID, " length: %d\n", ctaphid_packet_len(pkt)); + if (!is_cont_pkt(pkt)) {printf1(TAG_HID, " length: %d\n", ctaphid_packet_len(pkt));} int ret; uint32_t oldcid; @@ -548,14 +533,14 @@ uint8_t ctaphid_handle_packet(uint8_t * pkt_raw) uint8_t cmd; uint32_t cid; int len; +#ifndef DISABLE_CTAPHID_CBOR int status; +#endif static uint8_t is_busy = 0; static CTAPHID_WRITE_BUFFER wb; CTAP_RESPONSE ctap_resp; - uint32_t t1,t2; - int bufstatus = ctaphid_buffer_packet(pkt_raw, &cmd, &cid, &len); if (bufstatus == HID_IGNORE) @@ -596,11 +581,11 @@ uint8_t ctaphid_handle_packet(uint8_t * pkt_raw) wb.cid = cid; wb.cmd = CTAPHID_PING; wb.bcnt = len; - t1 = millis(); + timestamp(); ctaphid_write(&wb, ctap_buffer, len); ctaphid_write(&wb, NULL,0); - t2 = millis(); - printf1(TAG_TIME,"PING writeback: %d ms\n",(uint32_t)(t2-t1)); + printf1(TAG_TIME,"PING writeback: %d ms\n",timestamp()); + break; #endif #ifndef DISABLE_CTAPHID_WINK @@ -644,12 +629,11 @@ uint8_t ctaphid_handle_packet(uint8_t * pkt_raw) wb.bcnt = (ctap_resp.length+1); - t1 = millis(); + timestamp(); ctaphid_write(&wb, &status, 1); ctaphid_write(&wb, ctap_resp.data, ctap_resp.length); ctaphid_write(&wb, NULL, 0); - t2 = millis(); - printf1(TAG_TIME,"CBOR writeback: %d ms\n",(uint32_t)(t2-t1)); + printf1(TAG_TIME,"CBOR writeback: %d ms\n",timestamp()); is_busy = 0; break; #endif diff --git a/fido2/ctaphid.h b/fido2/ctaphid.h index c73ab43..d5ea35b 100644 --- a/fido2/ctaphid.h +++ b/fido2/ctaphid.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _CTAPHID_H_H #define _CTAPHID_H_H diff --git a/fido2/device.h b/fido2/device.h index 2aad34d..e75f250 100644 --- a/fido2/device.h +++ b/fido2/device.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _DEVICE_H #define _DEVICE_H @@ -61,7 +46,7 @@ void device_manage(); // sets status that's uses for sending status updates ~100ms. // A timer should be set up to call `ctaphid_update_status` -void device_set_status(int status); +void device_set_status(uint32_t status); // Returns if button is currently pressed int device_is_button_pressed(); diff --git a/fido2/extensions/extensions.c b/fido2/extensions/extensions.c index ad8e660..cc56d51 100644 --- a/fido2/extensions/extensions.c +++ b/fido2/extensions/extensions.c @@ -1,28 +1,15 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. + #include #include "extensions.h" #include "u2f.h" #include "wallet.h" +#include "solo.h" #include "device.h" #include "log.h" @@ -69,6 +56,8 @@ int16_t bridge_u2f_to_extensions(uint8_t * _chal, uint8_t * _appid, uint8_t klen ret = bootloader_bridge(klen, keyh); #elif defined(WALLET_EXTENSION) ret = bridge_u2f_to_wallet(_chal, _appid, klen, keyh); +#else + ret = bridge_u2f_to_solo(_chal, _appid, klen, keyh); #endif if (ret != 0) diff --git a/fido2/extensions/extensions.h b/fido2/extensions/extensions.h index 885b753..86a0f54 100644 --- a/fido2/extensions/extensions.h +++ b/fido2/extensions/extensions.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef EXTENSIONS_H_ #define EXTENSIONS_H_ #include "u2f.h" diff --git a/fido2/extensions/solo.c b/fido2/extensions/solo.c new file mode 100644 index 0000000..f539138 --- /dev/null +++ b/fido2/extensions/solo.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2018 SoloKeys, Inc. + * + * This file is part of Solo. + * + * Solo is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * Solo is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Solo. If not, see + * + * This code is available under licenses for commercial use. + * Please contact SoloKeys for more information. + */ + +#include +#include "extensions.h" +#include "u2f.h" +#include "wallet.h" +#include "device.h" +#include "ctap.h" +#include "ctap_errors.h" + +#include "log.h" +#include APP_CONFIG + +int16_t bridge_u2f_to_solo(uint8_t * _chal, uint8_t * _appid, uint8_t klen, uint8_t * keyh) +{ + static uint8_t msg_buf[72]; + int8_t ret = 0; + + wallet_request * req = (wallet_request *) keyh; + + printf1(TAG_WALLET, "u2f-solo [%d]: ", reqlen); dump_hex1(TAG_WALLET, keyh, klen); + + switch(req->operation) + { + case WalletVersion: + msg_buf[0] = SOLO_VERSION_MAJ; + msg_buf[1] = SOLO_VERSION_MIN; + msg_buf[2] = SOLO_VERSION_PATCH; + u2f_response_writeback(msg_buf, 3); + break; + case WalletRng: + printf1(TAG_WALLET,"SoloRng\n"); + + ret = ctap_generate_rng(msg_buf, 72); + if (ret != 1) + { + printf1(TAG_WALLET,"Rng failed\n"); + ret = CTAP2_ERR_PROCESSING; + goto cleanup; + } + ret = 0; + + u2f_response_writeback((uint8_t *)msg_buf,72); + break; + + default: + printf2(TAG_ERR,"Invalid wallet command: %x\n",req->operation); + ret = CTAP1_ERR_INVALID_COMMAND; + break; + } + +cleanup: + + return ret; +} diff --git a/targets/nrf52840/usb.h b/fido2/extensions/solo.h similarity index 85% rename from targets/nrf52840/usb.h rename to fido2/extensions/solo.h index 0a3bdac..04e9d8d 100644 --- a/targets/nrf52840/usb.h +++ b/fido2/extensions/solo.h @@ -1,31 +1,27 @@ /* * Copyright (C) 2018 SoloKeys, Inc. - * + * * This file is part of Solo. - * + * * Solo is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. - * + * * Solo is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with Solo. If not, see - * + * * This code is available under licenses for commercial use. * Please contact SoloKeys for more information. */ -#ifndef _USB_H -#define _USB_H +#ifndef SOLO_H_ +#define SOLO_H_ -#include "app_fifo.h" - -void usb_init(void); - -extern app_fifo_t USBHID_RECV_FIFO; +int16_t bridge_u2f_to_solo(uint8_t * _chal, uint8_t * _appid, uint8_t klen, uint8_t * keyh); #endif diff --git a/fido2/extensions/wallet.c b/fido2/extensions/wallet.c index c3a9707..551e23b 100644 --- a/fido2/extensions/wallet.c +++ b/fido2/extensions/wallet.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include "wallet.h" #include APP_CONFIG #include "ctap.h" diff --git a/fido2/extensions/wallet.h b/fido2/extensions/wallet.h index 306020e..b4f0dd3 100644 --- a/fido2/extensions/wallet.h +++ b/fido2/extensions/wallet.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef WALLET_H_ #define WALLET_H_ diff --git a/fido2/log.c b/fido2/log.c index be7a7af..209bf54 100644 --- a/fido2/log.c +++ b/fido2/log.c @@ -1,29 +1,15 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include #include "log.h" #include "util.h" +#include "device.h" #if DEBUG_LEVEL > 0 @@ -72,7 +58,7 @@ __attribute__((weak)) void set_logging_tag(uint32_t tag) void LOG(uint32_t tag, const char * filename, int num, const char * fmt, ...) { - int i; + unsigned int i; if (((tag & 0x7fffffff) & LOGMASK) == 0) { @@ -114,4 +100,14 @@ void LOG_HEX(uint32_t tag, uint8_t * data, int length) set_logging_tag(tag); dump_hex(data,length); } + +uint32_t timestamp() +{ + static uint32_t t1 = 0; + uint32_t t2 = millis(); + uint32_t diff = t2 - t1; + t1 = t2; + return t2; +} + #endif diff --git a/fido2/log.h b/fido2/log.h index 8eba24d..21403e7 100644 --- a/fido2/log.h +++ b/fido2/log.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _LOG_H #define _LOG_H @@ -70,13 +55,16 @@ void set_logging_mask(uint32_t mask); #define dump_hex1(tag,data,len) LOG_HEX(tag,data,len) +uint32_t timestamp(); + #else #define set_logging_mask(mask) -#define printf1(fmt, ...) -#define printf2(fmt, ...) -#define printf3(fmt, ...) +#define printf1(tag,fmt, ...) +#define printf2(tag,fmt, ...) +#define printf3(tag,fmt, ...) #define dump_hex1(tag,data,len) +#define timestamp() #endif diff --git a/fido2/main.c b/fido2/main.c index 3f90009..dbe6301 100644 --- a/fido2/main.c +++ b/fido2/main.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include @@ -34,7 +19,7 @@ #if !defined(TEST) -int main(int argc, char * argv[]) +int main() { uint8_t hidmsg[64]; uint32_t t1 = 0; @@ -44,7 +29,7 @@ int main(int argc, char * argv[]) // TAG_GEN| // TAG_MC | // TAG_GA | - // TAG_WALLET | + TAG_WALLET | TAG_STOR | // TAG_CP | // TAG_CTAP| diff --git a/fido2/storage.h b/fido2/storage.h index e184d40..6d49d21 100644 --- a/fido2/storage.h +++ b/fido2/storage.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _STORAGE_H #define _STORAGE_H diff --git a/fido2/stubs.c b/fido2/stubs.c index 62f070f..a33d003 100644 --- a/fido2/stubs.c +++ b/fido2/stubs.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include "device.h" #include "util.h" diff --git a/fido2/test_power.c b/fido2/test_power.c index 394154b..fdeb211 100644 --- a/fido2/test_power.c +++ b/fido2/test_power.c @@ -1,25 +1,10 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include APP_CONFIG +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. +#include APP_CONFIG #ifdef TEST_POWER /* diff --git a/fido2/u2f.c b/fido2/u2f.c index 2d79228..d7caf5e 100644 --- a/fido2/u2f.c +++ b/fido2/u2f.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include "u2f.h" #include "ctap.h" @@ -26,11 +11,16 @@ #include "log.h" #include "device.h" #include "wallet.h" +#ifdef ENABLE_U2F_EXTENSIONS +#include "extensions.h" +#endif #include APP_CONFIG // void u2f_response_writeback(uint8_t * buf, uint8_t len); +#ifdef ENABLE_U2F static int16_t u2f_register(struct u2f_register_request * req); static int16_t u2f_authenticate(struct u2f_authenticate_request * req, uint8_t control); +#endif int8_t u2f_response_writeback(const uint8_t * buf, uint16_t len); void u2f_reset_response(); @@ -40,7 +30,6 @@ static CTAP_RESPONSE * _u2f_resp = NULL; void u2f_request(struct u2f_request_apdu* req, CTAP_RESPONSE * resp) { uint16_t rcode = 0; - uint64_t t1,t2; uint32_t len = ((req->LC3) | ((uint32_t)req->LC2 << 8) | ((uint32_t)req->LC1 << 16)); uint8_t byte; @@ -68,18 +57,18 @@ void u2f_request(struct u2f_request_apdu* req, CTAP_RESPONSE * resp) } else { - t1 = millis(); + + timestamp(); rcode = u2f_register((struct u2f_register_request*)req->payload); - t2 = millis(); - printf1(TAG_TIME,"u2f_register time: %d ms\n", t2-t1); + printf1(TAG_TIME,"u2f_register time: %d ms\n", timestamp()); + } break; case U2F_AUTHENTICATE: printf1(TAG_U2F, "U2F_AUTHENTICATE\n"); - t1 = millis(); + timestamp(); rcode = u2f_authenticate((struct u2f_authenticate_request*)req->payload, req->p1); - t2 = millis(); - printf1(TAG_TIME,"u2f_authenticate time: %d ms\n", t2-t1); + printf1(TAG_TIME,"u2f_authenticate time: %d ms\n", timestamp()); break; case U2F_VERSION: printf1(TAG_U2F, "U2F_VERSION\n"); @@ -143,6 +132,7 @@ void u2f_set_writeback_buffer(CTAP_RESPONSE * resp) _u2f_resp = resp; } +#ifdef ENABLE_U2F static void dump_signature_der(uint8_t * sig) { uint8_t sigder[72]; @@ -234,12 +224,15 @@ static int16_t u2f_authenticate(struct u2f_authenticate_request * req, uint8_t c } count = ctap_atomic_count(0); - + hash[0] = (count >> 24) & 0xff; + hash[1] = (count >> 16) & 0xff; + hash[2] = (count >> 8) & 0xff; + hash[3] = (count >> 0) & 0xff; crypto_sha256_init(); crypto_sha256_update(req->app,32); crypto_sha256_update(&up,1); - crypto_sha256_update((uint8_t *)&count,4); + crypto_sha256_update(hash,4); crypto_sha256_update(req->chal,32); crypto_sha256_final(hash); @@ -248,7 +241,11 @@ static int16_t u2f_authenticate(struct u2f_authenticate_request * req, uint8_t c crypto_ecc256_sign(hash, 32, sig); u2f_response_writeback(&up,1); - u2f_response_writeback((uint8_t *)&count,4); + hash[0] = (count >> 24) & 0xff; + hash[1] = (count >> 16) & 0xff; + hash[2] = (count >> 8) & 0xff; + hash[3] = (count >> 0) & 0xff; + u2f_response_writeback(hash,4); dump_signature_der(sig); return U2F_SW_NO_ERROR; @@ -308,6 +305,7 @@ static int16_t u2f_register(struct u2f_register_request * req) return U2F_SW_NO_ERROR; } +#endif int16_t u2f_version() { diff --git a/fido2/u2f.h b/fido2/u2f.h index 94dbbb8..193588f 100644 --- a/fido2/u2f.h +++ b/fido2/u2f.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _U2F_H_ #define _U2F_H_ diff --git a/fido2/util.c b/fido2/util.c index a714eb1..6092f77 100644 --- a/fido2/util.c +++ b/fido2/util.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include diff --git a/fido2/util.h b/fido2/util.h index 9e9e7fe..b5bb9b6 100644 --- a/fido2/util.h +++ b/fido2/util.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _UTIL_H #define _UTIL_H diff --git a/metadata/Solo-FIDO2-CTAP2-Authenticator.json b/metadata/Solo-FIDO2-CTAP2-Authenticator.json new file mode 100644 index 0000000..9f35933 --- /dev/null +++ b/metadata/Solo-FIDO2-CTAP2-Authenticator.json @@ -0,0 +1,39 @@ +{ + "description": "Solo Secp256R1 FIDO2 CTAP2 Authenticator", + "aaguid": "8876631b-d4a0-427f-5773-0ec71c9e0279", + "alternativeDescriptions": { + }, + "protocolFamily": "fido2", + "authenticatorVersion": 2, + "upv": [ + { + "major": 1, + "minor": 0 + } + ], + "assertionScheme": "FIDOV2", + "authenticationAlgorithm": 1, + "publicKeyAlgAndEncoding": 260, + "attestationTypes": [ + 15879, + 15880 + ], + "userVerificationDetails": [ + [ + { + "userVerification": 4 + } + ] + ], + "keyProtection": 2, + "matcherProtection": 4, + "cryptoStrength": 128, + "attachmentHint": 2, + "isSecondFactorOnly": false, + "tcDisplay": 0, + "attestationRootCertificates": [ +"MIIB9DCCAZoCCQDER2OSj/S+jDAKBggqhkjOPQQDAjCBgDELMAkGA1UEBhMCVVMxETAPBgNVBAgMCE1hcnlsYW5kMRIwEAYDVQQKDAlTb2xvIEtleXMxEDAOBgNVBAsMB1Jvb3QgQ0ExFTATBgNVBAMMDHNvbG9rZXlzLmNvbTEhMB8GCSqGSIb3DQEJARYSaGVsbG9Ac29sb2tleXMuY29tMCAXDTE4MTExMTEyNTE0MloYDzIwNjgxMDI5MTI1MTQyWjCBgDELMAkGA1UEBhMCVVMxETAPBgNVBAgMCE1hcnlsYW5kMRIwEAYDVQQKDAlTb2xvIEtleXMxEDAOBgNVBAsMB1Jvb3QgQ0ExFTATBgNVBAMMDHNvbG9rZXlzLmNvbTEhMB8GCSqGSIb3DQEJARYSaGVsbG9Ac29sb2tleXMuY29tMFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAEWHAN0CCJVZdMs0oktZ5m93uxmB1iyq8ELRLtqVFLSOiHQEab56qRTB/QzrpGAY++Y2mw+vRuQMNhBiU0KzwjBjAKBggqhkjOPQQDAgNIADBFAiEAz9SlrAXIlEu87vra54rICPs+4b0qhp3PdzcTg7rvnP0CIGjxzlteQQx+jQGd7rwSZuE5RWUPVygYhUstQO9zNUOs" + ], + "icon": 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+ +} diff --git a/metadata/Solo-FIDO2-U2F-Authenticator.json b/metadata/Solo-FIDO2-U2F-Authenticator.json new file mode 100644 index 0000000..71a711f --- /dev/null +++ b/metadata/Solo-FIDO2-U2F-Authenticator.json @@ -0,0 +1,37 @@ +{ + "description": "Solo Secp256R1 U2F Authenticator", + "attestationCertificateKeyIdentifiers": ["3be6d2c06ff2e7b07c9d9e28c020b00d07c815c8"], + "alternativeDescriptions": { + }, + "protocolFamily": "u2f", + "authenticatorVersion": 2, + "upv": [ + { + "major": 1, + "minor": 2 + } + ], + "assertionScheme": "U2FV1BIN", + "authenticationAlgorithm": 1, + "publicKeyAlgAndEncoding": 256, + "attestationTypes": [ + 15879 + ], + "userVerificationDetails": [ + [ + { + "userVerification": 1 + } + ] + ], + "keyProtection": 2, + "matcherProtection": 4, + "cryptoStrength": 128, + "attachmentHint": 2, + "isSecondFactorOnly": true, + "tcDisplay": 0, + "attestationRootCertificates": [ +"MIIB9DCCAZoCCQDER2OSj/S+jDAKBggqhkjOPQQDAjCBgDELMAkGA1UEBhMCVVMxETAPBgNVBAgMCE1hcnlsYW5kMRIwEAYDVQQKDAlTb2xvIEtleXMxEDAOBgNVBAsMB1Jvb3QgQ0ExFTATBgNVBAMMDHNvbG9rZXlzLmNvbTEhMB8GCSqGSIb3DQEJARYSaGVsbG9Ac29sb2tleXMuY29tMCAXDTE4MTExMTEyNTE0MloYDzIwNjgxMDI5MTI1MTQyWjCBgDELMAkGA1UEBhMCVVMxETAPBgNVBAgMCE1hcnlsYW5kMRIwEAYDVQQKDAlTb2xvIEtleXMxEDAOBgNVBAsMB1Jvb3QgQ0ExFTATBgNVBAMMDHNvbG9rZXlzLmNvbTEhMB8GCSqGSIb3DQEJARYSaGVsbG9Ac29sb2tleXMuY29tMFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAEWHAN0CCJVZdMs0oktZ5m93uxmB1iyq8ELRLtqVFLSOiHQEab56qRTB/QzrpGAY++Y2mw+vRuQMNhBiU0KzwjBjAKBggqhkjOPQQDAgNIADBFAiEAz9SlrAXIlEu87vra54rICPs+4b0qhp3PdzcTg7rvnP0CIGjxzlteQQx+jQGd7rwSZuE5RWUPVygYhUstQO9zNUOs" + ], + "icon": "data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAALQAAAC0CAMAAAAKE/YAAAAABGdBTUEAALGPC/xhBQAAACBjSFJNAAB6JgAAgIQAAPoAAACA6AAAdTAAAOpgAAA6mAAAF3CculE8AAAC+lBMVEX////w8PDX19e+vb2lpKSko6O/vr7a2dn19PX6+vq7urp6eHhfXFxGQkMsKSojHyAzLzBNSktoZWaKiIjS0dLY19iDgYH8+/zZ2Nl4dncxLS6XlZW6ubn4+Pjo5+d4dXYlISI5NTaurK3+/v64t7csKClZVlfv7++joaHk5OQ5Njfr6+vg3+BlYmJWU1SopqfHxsYmIyM9OTpST1A/PD04NDV8eXrW1dX8/Pze3t6HhYUtKiq8ursvKyzj4+Pv7u5fXF1nZGXR0NEnIyTh4OD09PQrJyhaV1jm5uZ+fH1EQEHFxMTKycq3tbaioKGNi4y2tLXu7e7GxcWxsLCenJyRj5CmpaXQz8+Rj48/OzzEw8SWlJRVUlMmIiNTUFGUkpP9/f3Ix8eIhoZHREVkYWKkoqKenZ3U09NhXl/T0tJKR0d7eXkkICGCgIBsampraWnV1NQqJidraGnl5eW0s7NXVFTs7OxFQUL29vY+Ojt2c3QoJCVcWVqamJnMy8vNzMybmZo6Nzjn5uc3MzTp6elYVVX7+/tmZGRiX2DOzc1STk+Vk5OPjY3q6uo0MTFta2uBf39MSUqGhIVeW1vLysuwr6+qqKi3trY1MTLy8vLj4uJbWFnKyclCPz8pJSaqqalIRUbc3Nysq6uysbGzsrJ1cnPf3t8zMDEuKiuZl5ihn6Ccmpr29fXJyMhPTE2LiIn39/ddWls8ODlzcXFycHCAfn5UUVKXlpZLR0h0cnJYVVa5uLhDQECQjo6fnZ5JRkZxbm9jYGEwLC1MSEllY2Pz8/NBPj9RTk7b2trDwsJQTU2pp6hwbW5OS0yLiYpgXV7Pzs75+flqZ2gyLi87ODjCwcGdm5uJh4erqqpAPT6npabQ0NCEgYJ+e3zx8fGtrKzAv79yb3CFg4SSkJFua2y1s7S9u7ywrq/DwsOMiouEgoPc29uYlpe9vL19envt7e3d3d02MjOvra7p6Oignp9pZmd3dHXBwMDi4eFGQ0R/fX6OjIxvbG3W1tac12V4AAAAAWJLR0QAiAUdSAAAAAd0SU1FB+IJGhc6HI0t8mAAAA2TSURBVHja7Vx5fBRFFi7CHUkaRAy3wUC4xJAAS7jCEQgokVPkTBiyikCGy4UVCUHOoIaQcCcYgsgpyxFAETcCIgRw5UgMuAroxgtWFPBYV113f7/N1OueetVd3TM1ESZ/9PdPpt5R/aW7uvpV1asixIYNGzZs2LBhw4YNGzZs2LBhw4YNGzZsSKNSQOUqVatVr+FvHl6iZuA9tYKCFRW169xb9z5fq6p3P0PIHaRcv0FDxYCgRr7d8caojiZ3jHLTB0IVIZo9GFZRSTdvoZgivGXFJN0qVLFAUOuKSLqKYo02bSse6YdaeCCttKtwpMMe9sRZUSIqGun2OoKRUR06RupknSQ72ztO+gHMLvgPnaPLZCFdunbjWHevWKSb9EAXiIpxy3v2wqR7VyzSfVD9sX2Rol8dpImT+8TcadKBqP7+nKYevtUDKhTpqqj+R3jVo0g10OjZMv6xQYMHDxoSP1SS9IBhwx+vO+KJwJE+/z+jUP2jeVVEb4YxOreAseMSNLfQxPGdvSXtmJD0R9bonnxK7glqmIgbwWNeOj09Sd+T15rsFenuU/QdbHJTH0g3x1U4p3rzxNpOcyoGOKejj70J6RmJRj9lZlJNadJ9+CoaPhPxJw8enaMUIaJYGxGTnmUSL8z+syzpGsaanp1abY65Q+NgxQTBjS1JDzbzU56rL8t6rqialHmp9cTm82NNr62kPG9BeoG5n7JQNo6cb1ZTmweGVDJYL1pscW2l2RJT0gMTrByXpkmyXmZeV8ILL/K2jpewuluv9OXhM7FkdpgJ6YwV2KxT5uNZK7mRxypJ0pVMXizA6jXYdi3SRK6jsV/NVNyXrDch/QiSZMOdyJmOZLEbJFnft0Kxwsu5bsuQjUycF6hJN6En/4pDSHoDehMWblb9ohsgs7mSpEnrlZaslfGa4atIuIX54w/UViHpbegBbWeO9zJxwkOyrOeM2GHJOtkBdihcjYpG7mjKpLeIdNpOVs5E130R2b0mS7rsurtGW7H+CzXancckjbD3KibfmSYgvQeVuXdkL5Ovlidd1l6HWzSSvOouk+7oaXJfsb7IdI+A9D5WnMJddB26RL4vrAmJiZhe24T1fpc+iZUP8J7o8acLSM9mxYOc3wxkON830mVw9El/eaaAtNMVQ77Oyom8WxDTvCEgjTqdfZzfUGS43mfSLjRpv/yQIY57s0xRixWf4V32M800AWn0IAbxjnFM81S5SLvQOj2IJ+0aih1mxam8+VtM81cj6XxULOAd32aaI+UmXYajXGj0Nt8Iknjbe/iGoyOdg4rVeMdjZg3HV8zHjbtFmSCcFd/hTY8zTW8jaYK6St1k1btMM9FbXtF1TjDs0WtP4ltdSEgm3wgQUMNJFpBG0Q3fCPohwy3EWyxEXll65SakdJYNirJY8RRviT6oywWkT7NiA87vDDIc5jXppciro145HCk7ES704D8FLZFhgYB0Misu5a5QgO7KUOIt0GuvKO/plKhfVv5WVm6LOsJN2DCVyWMLBaRR2dkFO6J3Ya/XnMn7mHTD6pwuBn8ezxL+MZ9Dhg4Ut4QTAel+qCPKQo590V047z3pHO7zF4Wjmc6dsIoOWhshARrTYI4TRaTJBVbuUcgc70d2Rd6Txj2CC3Ve3VDsEs8p+CAPy2vTyYmcEia5eEarogg9kezdQtJ4IDo7R3OsgkZc8yQ4k1zFgBWHn31XL1Mf6lgk2jESZJfwnMKHREgaN15lpRohjscXkAuXkhUvsFhdl6uBm0xk4t8rN7//HB6gXsw3IT0DD8Z3TmrU/qO5H+MLPCnFmfSzHNeqcE/yxcdamaUUERPS5EPL+i/KTjKNLFE8AX0RqlrZXSampMlZC7+8K5KcCanfxgPnq3gdIMnczh1FiUjP6W/+gLZKcy7rkM9ZUY5sxFtHmLSQWBYLCefy0j4xuUD2Gq+ZYjgisk05jwvQW+ceENkdYNMjZlO9T+wUOXaQX8ZW8ekR8Wj83D8ES0TFuzrp7RYfLUYGZpPqPZMMc7RTGnuiZoWw+OTndBWeWmU2B5t/+SS6fNyTVXZz6pFo4YOfWsx4cynq/LIPNvYlM4NHy4EL7smc9PCUOv17bxtV2tPStvhS6qrP9u//7PPUUrkFn0pDxmZlhk+au+/oSEe5GduwYcOGDRs2bNiwYcNGhcXlcBe+MNFuodrw/r6vTN4R1KVDzC/Fyq3qKHSXv1lKkP5K5dzK3yQlSK+HPGpnVX9zlCBdoHJ+wt8UJUgHwpyd831/M5QgfQ04h27yoU5/ka6cApxf9Tc/CdKlsEwU+qC/6UmQvgScE677m50E6X/C6mLCcH+TkyA9EPJdEnxZVfAX6fbAOfIrf1OTIL0HpssjTXPtw9YkTR83us3edslr0ZIxcTRxQZyeW0x1rDxg2Lqvz447njXxWvX834N0LizAxjY3sc+4gXJE8k6yHQ7fUEmUQ+CziC6QulPy4lEGlxJ8vhKRho70Gtj/FGuyFBJ9FO9AcuF1d54G5I6MEXh9i0PFCeG6GhqO3U0kwZN+HjinmGzWytirGLBDi7UhT/kdgRvdJRL3Kf1dWbBjM0p2wZYjXQSLZik3xbYxp7RmcfpW0oVmamGnmkVRTJOC4nIMbpOpGeQ+dlFzBfLerrWt3WEts3ZeNJECJj0Snn1eNbHpBmjNoec7w+t2+zokTfSYAfrPackYFEJaR7zrZyGkyY2+rO4TubIM8lS+9pl0H7gLeaViy+hDVL0QZZU1nUdFh2G/4ne00EHvF/K9SxxEf/9ATWajPmYPDcyc7xEZMNKT1YeVMkNsOYJqe3ErdQ5wh1RlAsvf3+j8biITetNLfsTqf1F1JpGBm/TT7myER4Vv8xk6Jvj+U91tpC9Ztwxa2ErdddmRZBq9E9DJ0L2xP/H6Di5ZbYcvpDujpJ5tIsN/U9UPevF7VAyL/jXpErtucyukScFL46AfgRF8DV/QGqSyJ1TSAVyCvSBSWkID7HCjop1LvhF+Q14F3/dEUBnsDQyh/d1ZvgJIsh9PJACkz8EOjLyxMC7c2ddgd8TsflyiCshBeIj2BR9weprxfUpdA6fd5Pf8gnjIVhekZlbqohuc97OWWnXaEEPQbTklDmMFbXFDponUsTiZ8Rcnaz6EQAc0VbJbtiLt6usc0IkZ3qZCOgUi3CC8GLWbIdT5KNLSFhuZoZbUHVzHq5NygZGGb8oSyFfRd5zXqPRxUQ10I0k3eAZp9D84gbQbuf4iQ8v2O5Z+RXa/loh0SmUQVINv1GI+HoDkx0ttBbhFVeq920cLM9x+z9NyqbuMDl6YOW5Vwe3ykdY4E3IDBBe41+Wq4gEqL2jCWW4/+h/hePVz3u3X5OvWeSVWpFGMVFPNw1qAzT7zRFobm9HGskPbglpcYuiYtzTTebb4pAuRBJBOuYZE29WYGp9Zc8ETaS1Ogk272rBnvauQsIi7YtqspTpf57IAIgUgzX/6IaxRTvVjopOeSGt7r0LojTyuluhmR2NOZkBSIp8oF3yNyEA473EQqnqdSeiu1tCYDFO445XB9ObCHtChlFqg6Lr5E8b3QqdEJLxIJCAkXUPdA8QmmGBPmTeHHLWmn+pv6e9Brp/NTA/aCLmSWkvL++4oM+YST4tNhqm8bu7Ng/BV8Op0khdclhA+09R26wD/l6QS/Q3ylbSWhXtO6wbW0OIn3tQIZ0K4opTt9C3ztBN1M6QmymQjm5AOewFY31DLNekMTqI3NUbTUdlVoqZ11/LosJm2/B3lJ01uQ3fqLFXLNCZJEd21W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+} diff --git a/mkdocs.yml b/mkdocs.yml index 2d69cbc..b140e92 100644 --- a/mkdocs.yml +++ b/mkdocs.yml @@ -9,6 +9,7 @@ copyright: 'Copyright © 2018 - 2019 SoloKeys' nav: - Home: solo/index.md - FIDO2 Implementation: solo/fido2-impl.md + - Metadata Statements: solo/metadata-statements.md - Build instructions: solo/building.md - Signed update process: solo/signed-updates.md - Code documentation: solo/code-overview.md @@ -21,3 +22,6 @@ theme: name: material logo: 'solo/images/logo.svg' favicon: 'solo/images/favicon.ico' + +markdown_extensions: + - markdown_include.include diff --git a/pc/app.h b/pc/app.h index b310e81..8dca429 100644 --- a/pc/app.h +++ b/pc/app.h @@ -1,24 +1,10 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. + #ifndef SRC_APP_H_ #define SRC_APP_H_ diff --git a/pc/device.c b/pc/device.c index 4344ef5..b4d5379 100644 --- a/pc/device.c +++ b/pc/device.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include @@ -41,7 +26,7 @@ void authenticator_initialize(); uint32_t __device_status = 0; -void device_set_status(int status) +void device_set_status(uint32_t status) { if (status != CTAPHID_STATUS_IDLE && __device_status != status) { @@ -54,7 +39,11 @@ void device_set_status(int status) int udp_server() { - int fd; + static bool run_already = false; + static int fd = -1; + if (run_already && fd >= 0) return fd; + run_already = true; + if ( (fd = socket(AF_INET, SOCK_DGRAM, 0)) < 0 ) { perror( "socket failed" ); return 1; diff --git a/targets/efm32/.cproject b/targets/efm32/.cproject deleted file mode 100644 index 844809e..0000000 --- a/targets/efm32/.cproject +++ /dev/null @@ -1,253 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/targets/efm32/.project b/targets/efm32/.project deleted file mode 100644 index be49028..0000000 --- a/targets/efm32/.project +++ /dev/null @@ -1,49 +0,0 @@ - - - EFM32 - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - com.silabs.ss.framework.ide.project.sls.core.SLSProjectNature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - crypto - 2 - $%7BPARENT-2-PROJECT_LOC%7D/crypto - - - fido2 - 2 - $%7BPARENT-2-PROJECT_LOC%7D/fido2 - - - CMSIS/EFM32JG1B/startup_gcc_efm32jg1b.s - 1 - STUDIO_SDK_LOC/platform/Device/SiliconLabs/EFM32JG1B/Source/GCC/startup_efm32jg1b.S - - - CMSIS/EFM32JG1B/system_efm32jg1b.c - 1 - STUDIO_SDK_LOC/platform/Device/SiliconLabs/EFM32JG1B/Source/system_efm32jg1b.c - - - diff --git a/targets/efm32/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs b/targets/efm32/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs deleted file mode 100644 index b4554b4..0000000 --- a/targets/efm32/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs +++ /dev/null @@ -1,2 +0,0 @@ -copiedFilesOriginState={} -eclipse.preferences.version=1 diff --git a/targets/efm32/.settings/org.eclipse.cdt.codan.core.prefs b/targets/efm32/.settings/org.eclipse.cdt.codan.core.prefs deleted file mode 100644 index 75be390..0000000 --- a/targets/efm32/.settings/org.eclipse.cdt.codan.core.prefs +++ /dev/null @@ -1,70 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.cdt.codan.checkers.errnoreturn=Warning -org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},implicit\=>false} -org.eclipse.cdt.codan.checkers.errreturnvalue=Error -org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.checkers.nocommentinside=-Error -org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.checkers.nolinecomment=-Error -org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.checkers.noreturn=Error -org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},implicit\=>false} -org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation=Error -org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem=Error -org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem=Warning 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-org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem=Error -org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} diff --git a/targets/efm32/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s b/targets/efm32/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s deleted file mode 100644 index 2a683c7..0000000 --- a/targets/efm32/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s +++ /dev/null @@ -1,317 +0,0 @@ -/* @file startup_efm32pg1b.S - * @brief startup file for Silicon Labs EFM32PG1B devices. - * For use with GCC for ARM Embedded Processors - * @version 5.2.2 - * Date: 12 June 2014 - * - */ -/* Copyright (c) 2011 - 2014 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - .syntax unified - .arch armv7-m - .section .stack - .align 3 -#ifdef __STACK_SIZE - .equ Stack_Size, __STACK_SIZE -#else - .equ Stack_Size, 0x00000400 -#endif - .globl __StackTop - .globl __StackLimit -__StackLimit: - .space Stack_Size - .size __StackLimit, . - __StackLimit -__StackTop: - .size __StackTop, . - __StackTop - - .section .heap - .align 3 -#ifdef __HEAP_SIZE - .equ Heap_Size, __HEAP_SIZE -#else - .equ Heap_Size, 0x00000C00 -#endif - .globl __HeapBase - .globl __HeapLimit -__HeapBase: - .if Heap_Size - .space Heap_Size - .endif - .size __HeapBase, . - __HeapBase -__HeapLimit: - .size __HeapLimit, . - __HeapLimit - - .section .vectors - .align 2 - .globl __Vectors -__Vectors: - .long __StackTop /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long MemManage_Handler /* MPU Fault Handler */ - .long BusFault_Handler /* Bus Fault Handler */ - .long UsageFault_Handler /* Usage Fault Handler */ - .long Default_Handler /* Reserved */ - .long Default_Handler /* Reserved */ - .long Default_Handler /* Reserved */ - .long Default_Handler /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long DebugMon_Handler /* Debug Monitor Handler */ - .long Default_Handler /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* External interrupts */ - .long EMU_IRQHandler /* 0 - EMU */ - .long Default_Handler /* 1 - Reserved */ - .long WDOG0_IRQHandler /* 2 - WDOG0 */ - .long Default_Handler /* 3 - Reserved */ - .long Default_Handler /* 4 - Reserved */ - .long Default_Handler /* 5 - Reserved */ - .long Default_Handler /* 6 - Reserved */ - .long Default_Handler /* 7 - Reserved */ - .long LDMA_IRQHandler /* 8 - LDMA */ - .long GPIO_EVEN_IRQHandler /* 9 - GPIO_EVEN */ - .long TIMER0_IRQHandler /* 10 - TIMER0 */ - .long USART0_RX_IRQHandler /* 11 - USART0_RX */ - .long USART0_TX_IRQHandler /* 12 - USART0_TX */ - .long ACMP0_IRQHandler /* 13 - ACMP0 */ - .long ADC0_IRQHandler /* 14 - ADC0 */ - .long IDAC0_IRQHandler /* 15 - IDAC0 */ - .long I2C0_IRQHandler /* 16 - I2C0 */ - .long GPIO_ODD_IRQHandler /* 17 - GPIO_ODD */ - .long TIMER1_IRQHandler /* 18 - TIMER1 */ - .long USART1_RX_IRQHandler /* 19 - USART1_RX */ - .long USART1_TX_IRQHandler /* 20 - USART1_TX */ - .long LEUART0_IRQHandler /* 21 - LEUART0 */ - .long PCNT0_IRQHandler /* 22 - PCNT0 */ - .long CMU_IRQHandler /* 23 - CMU */ - .long MSC_IRQHandler /* 24 - MSC */ - .long CRYPTO_IRQHandler /* 25 - CRYPTO */ - .long LETIMER0_IRQHandler /* 26 - LETIMER0 */ - .long Default_Handler /* 27 - Reserved */ - .long Default_Handler /* 28 - Reserved */ - .long RTCC_IRQHandler /* 29 - RTCC */ - .long Default_Handler /* 30 - Reserved */ - .long CRYOTIMER_IRQHandler /* 31 - CRYOTIMER */ - .long Default_Handler /* 32 - Reserved */ - .long FPUEH_IRQHandler /* 33 - FPUEH */ - - - .size __Vectors, . - __Vectors - - .text - .thumb - .thumb_func - .align 2 - .globl Reset_Handler - .type Reset_Handler, %function -Reset_Handler: -#ifndef __NO_SYSTEM_INIT - ldr r0, =SystemInit - blx r0 -#endif - -/* Firstly it copies data from read only memory to RAM. There are two schemes - * to copy. One can copy more than one sections. Another can only copy - * one section. The former scheme needs more instructions and read-only - * data to implement than the latter. - * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */ - -#ifdef __STARTUP_COPY_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of triplets, each of which specify: - * offset 0: LMA of start of a section to copy from - * offset 4: VMA of start of a section to copy to - * offset 8: size of the section to copy. Must be multiply of 4 - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - ittt ge - ldrge r0, [r1, r3] - strge r0, [r2, r3] - bge .L_loop0_0 - - adds r4, #12 - b .L_loop0 - -.L_loop0_done: -#else -/* Single section scheme. - * - * The ranges of copy from/to are specified by following symbols - * __etext: LMA of start of the section to copy from. Usually end of text - * __data_start__: VMA of start of the section to copy to - * __data_end__: VMA of end of the section to copy to - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__etext - ldr r2, =__data_start__ - ldr r3, =__data_end__ - -.L_loop1: - cmp r2, r3 - ittt lt - ldrlt r0, [r1], #4 - strlt r0, [r2], #4 - blt .L_loop1 -#endif /*__STARTUP_COPY_MULTIPLE */ - -/* This part of work usually is done in C library startup code. Otherwise, - * define this macro to enable it in this startup. - * - * There are two schemes too. One can clear multiple BSS sections. Another - * can only clear one section. The former is more size expensive than the - * latter. - * - * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. - * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later. - */ -#ifdef __STARTUP_CLEAR_BSS_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __zero_table_start__ and __zero_table_end__, - * there are array of tuples specifying: - * offset 0: Start of a BSS section - * offset 4: Size of this BSS section. Must be multiply of 4 - */ - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - itt ge - strge r0, [r1, r2] - bge .L_loop2_0 - adds r3, #8 - b .L_loop2 -.L_loop2_done: -#elif defined (__STARTUP_CLEAR_BSS) -/* Single BSS section scheme. - * - * The BSS section is specified by following symbols - * __bss_start__: start of the BSS section. - * __bss_end__: end of the BSS section. - * - * Both addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__bss_start__ - ldr r2, =__bss_end__ - - movs r0, 0 -.L_loop3: - cmp r1, r2 - itt lt - strlt r0, [r1], #4 - blt .L_loop3 -#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ - -#ifndef __START -#define __START _start -#endif - bl __START - - .pool - .size Reset_Handler, . - Reset_Handler - - .align 1 - .thumb_func - .weak Default_Handler - .type Default_Handler, %function -Default_Handler: - b . - .size Default_Handler, . - Default_Handler - -/* Macro to define default handlers. Default handler - * will be weak symbol and just dead loops. They can be - * overwritten by other handlers */ - .macro def_irq_handler handler_name - .weak \handler_name - .set \handler_name, Default_Handler - .endm - - def_irq_handler NMI_Handler - def_irq_handler HardFault_Handler - def_irq_handler MemManage_Handler - def_irq_handler BusFault_Handler - def_irq_handler UsageFault_Handler - def_irq_handler SVC_Handler - def_irq_handler DebugMon_Handler - def_irq_handler PendSV_Handler - def_irq_handler SysTick_Handler - - - def_irq_handler EMU_IRQHandler - def_irq_handler WDOG0_IRQHandler - def_irq_handler LDMA_IRQHandler - def_irq_handler GPIO_EVEN_IRQHandler - def_irq_handler TIMER0_IRQHandler - def_irq_handler USART0_RX_IRQHandler - def_irq_handler USART0_TX_IRQHandler - def_irq_handler ACMP0_IRQHandler - def_irq_handler ADC0_IRQHandler - def_irq_handler IDAC0_IRQHandler - def_irq_handler I2C0_IRQHandler - def_irq_handler GPIO_ODD_IRQHandler - def_irq_handler TIMER1_IRQHandler - def_irq_handler USART1_RX_IRQHandler - def_irq_handler USART1_TX_IRQHandler - def_irq_handler LEUART0_IRQHandler - def_irq_handler PCNT0_IRQHandler - def_irq_handler CMU_IRQHandler - def_irq_handler MSC_IRQHandler - def_irq_handler CRYPTO_IRQHandler - def_irq_handler LETIMER0_IRQHandler - def_irq_handler RTCC_IRQHandler - def_irq_handler CRYOTIMER_IRQHandler - def_irq_handler FPUEH_IRQHandler - - .end diff --git a/targets/efm32/CMSIS/EFM32PG1B/system_efm32pg1b.c b/targets/efm32/CMSIS/EFM32PG1B/system_efm32pg1b.c deleted file mode 100644 index c52e3e1..0000000 --- a/targets/efm32/CMSIS/EFM32PG1B/system_efm32pg1b.c +++ /dev/null @@ -1,389 +0,0 @@ -/***************************************************************************//** - * @file system_efm32pg1b.c - * @brief CMSIS Cortex-M3/M4 System Layer for EFM32 devices. - * @version 5.2.2 - ****************************************************************************** - * # License - * Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com - ****************************************************************************** - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software.@n - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software.@n - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. - * has no obligation to support this Software. Silicon Laboratories, Inc. is - * providing the Software "AS IS", with no express or implied warranties of any - * kind, including, but not limited to, any implied warranties of - * merchantability or fitness for any particular purpose or warranties against - * infringement of any proprietary rights of a third party. - * - * Silicon Laboratories, Inc. will not be liable for any consequential, - * incidental, or special damages, or any other relief, or for any claim by - * any third party, arising from your use of this Software. - * - *****************************************************************************/ - -#include -#include "em_device.h" - -/******************************************************************************* - ****************************** DEFINES ************************************ - ******************************************************************************/ - -/** LFRCO frequency, tuned to below frequency during manufacturing. */ -#define EFM32_LFRCO_FREQ (32768UL) -/** ULFRCO frequency */ -#define EFM32_ULFRCO_FREQ (1000UL) - -/******************************************************************************* - ************************** LOCAL VARIABLES ******************************** - ******************************************************************************/ - -/* System oscillator frequencies. These frequencies are normally constant */ -/* for a target, but they are made configurable in order to allow run-time */ -/* handling of different boards. The crystal oscillator clocks can be set */ -/* compile time to a non-default value by defining respective EFM_nFXO_FREQ */ -/* values according to board design. By defining the EFM_nFXO_FREQ to 0, */ -/* one indicates that the oscillator is not present, in order to save some */ -/* SW footprint. */ - -#ifndef EFM32_HFRCO_MAX_FREQ -/** Maximum HFRCO frequency */ -#define EFM32_HFRCO_MAX_FREQ (38000000UL) -#endif - -#ifndef EFM32_HFXO_FREQ -/** HFXO frequency */ -#define EFM32_HFXO_FREQ (40000000UL) -#endif - -#ifndef EFM32_HFRCO_STARTUP_FREQ -/** HFRCO startup frequency */ -#define EFM32_HFRCO_STARTUP_FREQ (19000000UL) -#endif - - -/* Do not define variable if HF crystal oscillator not present */ -#if (EFM32_HFXO_FREQ > 0UL) -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -/** System HFXO clock. */ -static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ; -/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */ -#endif - -#ifndef EFM32_LFXO_FREQ -/** LFXO frequency */ -#define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ) -#endif -/* Do not define variable if LF crystal oscillator not present */ -#if (EFM32_LFXO_FREQ > 0UL) -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -/** System LFXO clock. */ -static uint32_t SystemLFXOClock = 32768UL; -/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */ -#endif - - -/******************************************************************************* - ************************** GLOBAL VARIABLES ******************************* - ******************************************************************************/ - -/** - * @brief - * System System Clock Frequency (Core Clock). - * - * @details - * Required CMSIS global variable that must be kept up-to-date. - */ -uint32_t SystemCoreClock = EFM32_HFRCO_STARTUP_FREQ; - - -/** - * @brief - * System HFRCO frequency - * - * @note - * This is an EFM32 proprietary variable, not part of the CMSIS definition. - * - * @details - * Frequency of the system HFRCO oscillator - */ -uint32_t SystemHfrcoFreq = EFM32_HFRCO_STARTUP_FREQ; - - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Get the current core clock frequency. - * - * @details - * Calculate and get the current core clock frequency based on the current - * configuration. Assuming that the SystemCoreClock global variable is - * maintained, the core clock frequency is stored in that variable as well. - * This function will however calculate the core clock based on actual HW - * configuration. It will also update the SystemCoreClock global variable. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * The current core clock frequency in Hz. - ******************************************************************************/ -uint32_t SystemCoreClockGet(void) -{ - uint32_t ret; - uint32_t presc; - - ret = SystemHFClockGet(); - presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) >> - _CMU_HFCOREPRESC_PRESC_SHIFT; - ret /= (presc + 1); - - /* Keep CMSIS system clock variable up-to-date */ - SystemCoreClock = ret; - - return ret; -} - - -/***************************************************************************//** - * @brief - * Get the maximum core clock frequency. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * The maximum core clock frequency in Hz. - ******************************************************************************/ -uint32_t SystemMaxCoreClockGet(void) -{ - return (EFM32_HFRCO_MAX_FREQ > EFM32_HFXO_FREQ ? \ - EFM32_HFRCO_MAX_FREQ : EFM32_HFXO_FREQ); -} - - -/***************************************************************************//** - * @brief - * Get the current HFCLK frequency. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * The current HFCLK frequency in Hz. - ******************************************************************************/ -uint32_t SystemHFClockGet(void) -{ - uint32_t ret; - - switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) - { - case CMU_HFCLKSTATUS_SELECTED_LFXO: -#if (EFM32_LFXO_FREQ > 0) - ret = SystemLFXOClock; -#else - /* We should not get here, since core should not be clocked. May */ - /* be caused by a misconfiguration though. */ - ret = 0; -#endif - break; - - case CMU_HFCLKSTATUS_SELECTED_LFRCO: - ret = EFM32_LFRCO_FREQ; - break; - - case CMU_HFCLKSTATUS_SELECTED_HFXO: -#if (EFM32_HFXO_FREQ > 0) - ret = SystemHFXOClock; -#else - /* We should not get here, since core should not be clocked. May */ - /* be caused by a misconfiguration though. */ - ret = 0; -#endif - break; - - default: /* CMU_HFCLKSTATUS_SELECTED_HFRCO */ - ret = SystemHfrcoFreq; - break; - } - - return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT)); -} - - -/**************************************************************************//** - * @brief - * Get high frequency crystal oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * HFXO frequency in Hz. - *****************************************************************************/ -uint32_t SystemHFXOClockGet(void) -{ - /* External crystal oscillator present? */ -#if (EFM32_HFXO_FREQ > 0) - return SystemHFXOClock; -#else - return 0; -#endif -} - - -/**************************************************************************//** - * @brief - * Set high frequency crystal oscillator clock frequency for target system. - * - * @note - * This function is mainly provided for being able to handle target systems - * with different HF crystal oscillator frequencies run-time. If used, it - * should probably only be used once during system startup. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @param[in] freq - * HFXO frequency in Hz used for target. - *****************************************************************************/ -void SystemHFXOClockSet(uint32_t freq) -{ - /* External crystal oscillator present? */ -#if (EFM32_HFXO_FREQ > 0) - SystemHFXOClock = freq; - - /* Update core clock frequency if HFXO is used to clock core */ - if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) == CMU_HFCLKSTATUS_SELECTED_HFXO) - { - /* The function will update the global variable */ - SystemCoreClockGet(); - } -#else - (void)freq; /* Unused parameter */ -#endif -} - - -/**************************************************************************//** - * @brief - * Initialize the system. - * - * @details - * Do required generic HW system init. - * - * @note - * This function is invoked during system init, before the main() routine - * and any data has been initialized. For this reason, it cannot do any - * initialization of variables etc. - *****************************************************************************/ -void SystemInit(void) -{ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - /* Set floating point coprosessor access mode. */ - SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ - (3UL << 11*2) ); /* set CP11 Full Access */ -#endif -} - - -/**************************************************************************//** - * @brief - * Get low frequency RC oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * LFRCO frequency in Hz. - *****************************************************************************/ -uint32_t SystemLFRCOClockGet(void) -{ - /* Currently we assume that this frequency is properly tuned during */ - /* manufacturing and is not changed after reset. If future requirements */ - /* for re-tuning by user, we can add support for that. */ - return EFM32_LFRCO_FREQ; -} - - -/**************************************************************************//** - * @brief - * Get ultra low frequency RC oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * ULFRCO frequency in Hz. - *****************************************************************************/ -uint32_t SystemULFRCOClockGet(void) -{ - /* The ULFRCO frequency is not tuned, and can be very inaccurate */ - return EFM32_ULFRCO_FREQ; -} - - -/**************************************************************************//** - * @brief - * Get low frequency crystal oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * LFXO frequency in Hz. - *****************************************************************************/ -uint32_t SystemLFXOClockGet(void) -{ - /* External crystal oscillator present? */ -#if (EFM32_LFXO_FREQ > 0) - return SystemLFXOClock; -#else - return 0; -#endif -} - - -/**************************************************************************//** - * @brief - * Set low frequency crystal oscillator clock frequency for target system. - * - * @note - * This function is mainly provided for being able to handle target systems - * with different HF crystal oscillator frequencies run-time. If used, it - * should probably only be used once during system startup. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @param[in] freq - * LFXO frequency in Hz used for target. - *****************************************************************************/ -void SystemLFXOClockSet(uint32_t freq) -{ - /* External crystal oscillator present? */ -#if (EFM32_LFXO_FREQ > 0) - SystemLFXOClock = freq; - - /* Update core clock frequency if LFXO is used to clock core */ - if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) == CMU_HFCLKSTATUS_SELECTED_LFXO) - { - /* The function will update the global variable */ - SystemCoreClockGet(); - } -#else - (void)freq; /* Unused parameter */ -#endif -} diff --git a/targets/efm32/EFM32.hwconf b/targets/efm32/EFM32.hwconf deleted file mode 100644 index e0a7bdf..0000000 --- a/targets/efm32/EFM32.hwconf +++ /dev/null @@ -1,116 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/targets/efm32/EFM32_EFM32JG1B200F128GM32.hwconf b/targets/efm32/EFM32_EFM32JG1B200F128GM32.hwconf deleted file mode 100644 index df031c7..0000000 --- a/targets/efm32/EFM32_EFM32JG1B200F128GM32.hwconf +++ /dev/null @@ -1,107 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/targets/efm32/Makefile b/targets/efm32/Makefile deleted file mode 100644 index 4b9558a..0000000 --- a/targets/efm32/Makefile +++ /dev/null @@ -1,23 +0,0 @@ - -CC=arm-none-eabi-gcc - -all: - cd 'GNU ARM v7.2.1 - Debug' && make all - - -#arm-none-eabi-gcc -g -gdwarf-2 -mcpu=cortex-m4 -mthumb -std=c99 '-DDEBUG=1' '-DEFM32PG1B200F256GM48=1' -IC:/Users/conor/Desktop/u2f-one/crypto/sha256 -IC:/Users/conor/Desktop/u2f-one/crypto/micro-ecc -IC:/Users/conor/Desktop/u2f-one/crypto/tiny-AES-c -I"C:\Users\conor\Desktop\u2f-one\efm32\inc" -IC:/Users/conor/Desktop/u2f-one/fido2 -IC:/Users/conor/Desktop/u2f-one/tinycbor/src -I"C:/SiliconLabs/SimplicityStudio/v4/developer/sdks/gecko_sdk_suite/v1.1//platform/CMSIS/Include" -I"C:/SiliconLabs/SimplicityStudio/v4/developer/sdks/gecko_sdk_suite/v1.1//hardware/kit/common/drivers" -I"C:/SiliconLabs/SimplicityStudio/v4/developer/sdks/gecko_sdk_suite/v1.1//hardware/kit/SLSTK3401A_EFM32PG/config" -I"C:/SiliconLabs/SimplicityStudio/v4/developer/sdks/gecko_sdk_suite/v1.1//platform/Device/SiliconLabs/EFM32PG1B/Include" -I"C:/SiliconLabs/SimplicityStudio/v4/developer/sdks/gecko_sdk_suite/v1.1//platform/emlib/inc" -I"C:/SiliconLabs/SimplicityStudio/v4/developer/sdks/gecko_sdk_suite/v1.1//hardware/kit/common/bsp" -O0 -Wall -c -fmessage-length=0 -mno-sched-prolog -fno-builtin -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -MMD -MP -MF"src/device.d" -MT"src/device.o" -o "src/device.o" "../src/device.c" - - -#arm-none-eabi-gcc -g -gdwarf-2 -mcpu=cortex-m4 -mthumb -T "EFM32.ld" -Xlinker --gc-sections -Xlinker -Map="EFM32.map" -mfpu=fpv4-sp-d16 -mfloat-abi=softfp --specs=nano.specs -o EFM32.axf "./CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.o" "./CMSIS/EFM32PG1B/system_efm32pg1b.o" "./crypto/micro-ecc/uECC.o" "./crypto/sha256/sha256.o" "./crypto/tiny-AES-c/aes.o" "./emlib/em_assert.o" "./emlib/em_cmu.o" "./emlib/em_emu.o" "./emlib/em_gpio.o" "./emlib/em_system.o" "./emlib/em_usart.o" "./fido2/crypto.o" "./fido2/ctap.o" "./fido2/ctap_parse.o" "./fido2/ctaphid.o" "./fido2/log.o" "./fido2/main.o" "./fido2/stubs.o" "./fido2/test_power.o" "./fido2/u2f.o" "./fido2/util.o" "./src/InitDevice.o" "./src/device.o" "./src/main.o" "./src/printing.o" "./src/retargetio.o" -Wl,--start-group -lgcc -lc -lnosys -Wl,--end-group - - -cbor: - cd ../tinycbor/ && make clean - cd ../tinycbor/ && make CC="$(CC)" \ -LDFLAGS="-lgcc -lc -lnosys --specs=nosys.specs -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -mthumb " \ -CFLAGS="-g -gdwarf-2 -mcpu=cortex-m4 -mthumb -std=c99 -DEFM32PG1B200F256GM48=1 -O3 -Wall -c -fmessage-length=0 -mno-sched-prolog -fno-builtin -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -MMD -MP " - - - -clean: - cd 'GNU ARM v7.2.1 - Debug' && make clean diff --git a/targets/efm32/emlib/em_adc.c b/targets/efm32/emlib/em_adc.c deleted file mode 100644 index 10e9840..0000000 --- a/targets/efm32/emlib/em_adc.c +++ /dev/null @@ -1,1092 +0,0 @@ -/***************************************************************************//** - * @file em_adc.c - * @brief Analog to Digital Converter (ADC) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_adc.h" -#if defined(ADC_COUNT) && (ADC_COUNT > 0) - -#include "em_assert.h" -#include "em_cmu.h" -#include - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup ADC - * @brief Analog to Digital Converter (ADC) Peripheral API - * @details - * This module contains functions to control the ADC peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The ADC is used to convert analog signals into a - * digital representation. - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Validation of ADC register block pointer reference for assert statements. */ -#if (ADC_COUNT == 1) -#define ADC_REF_VALID(ref) ((ref) == ADC0) -#elif (ADC_COUNT == 2) -#define ADC_REF_VALID(ref) (((ref) == ADC0) || ((ref) == ADC1)) -#endif - -/** Max ADC clock */ -#if defined(_SILICON_LABS_32B_SERIES_0) -#define ADC_MAX_CLOCK 13000000 -#else -#define ADC_MAX_CLOCK 16000000 -#endif - -/** Min ADC clock */ -#define ADC_MIN_CLOCK 32000 - -/** Helper defines for selecting ADC calibration and DEVINFO register fields. */ -#if defined(_DEVINFO_ADC0CAL0_1V25_GAIN_MASK) -#define DEVINFO_ADC0_GAIN1V25_MASK _DEVINFO_ADC0CAL0_1V25_GAIN_MASK -#elif defined(_DEVINFO_ADC0CAL0_GAIN1V25_MASK) -#define DEVINFO_ADC0_GAIN1V25_MASK _DEVINFO_ADC0CAL0_GAIN1V25_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT) -#define DEVINFO_ADC0_GAIN1V25_SHIFT _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT -#elif defined(_DEVINFO_ADC0CAL0_GAIN1V25_SHIFT) -#define DEVINFO_ADC0_GAIN1V25_SHIFT _DEVINFO_ADC0CAL0_GAIN1V25_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL0_1V25_OFFSET_MASK) -#define DEVINFO_ADC0_OFFSET1V25_MASK _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK -#elif defined(_DEVINFO_ADC0CAL0_OFFSET1V25_MASK) -#define DEVINFO_ADC0_OFFSET1V25_MASK _DEVINFO_ADC0CAL0_OFFSET1V25_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT) -#define DEVINFO_ADC0_OFFSET1V25_SHIFT _DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT -#elif defined(_DEVINFO_ADC0CAL0_OFFSET1V25_SHIFT) -#define DEVINFO_ADC0_OFFSET1V25_SHIFT _DEVINFO_ADC0CAL0_OFFSET1V25_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL0_2V5_GAIN_MASK) -#define DEVINFO_ADC0_GAIN2V5_MASK _DEVINFO_ADC0CAL0_2V5_GAIN_MASK -#elif defined(_DEVINFO_ADC0CAL0_GAIN2V5_MASK) -#define DEVINFO_ADC0_GAIN2V5_MASK _DEVINFO_ADC0CAL0_GAIN2V5_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT) -#define DEVINFO_ADC0_GAIN2V5_SHIFT _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT -#elif defined(_DEVINFO_ADC0CAL0_GAIN2V5_SHIFT) -#define DEVINFO_ADC0_GAIN2V5_SHIFT _DEVINFO_ADC0CAL0_GAIN2V5_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL0_2V5_OFFSET_MASK) -#define DEVINFO_ADC0_OFFSET2V5_MASK _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK -#elif defined(_DEVINFO_ADC0CAL0_OFFSET2V5_MASK) -#define DEVINFO_ADC0_OFFSET2V5_MASK _DEVINFO_ADC0CAL0_OFFSET2V5_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT) -#define DEVINFO_ADC0_OFFSET2V5_SHIFT _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT -#elif defined(_DEVINFO_ADC0CAL0_OFFSET2V5_SHIFT) -#define DEVINFO_ADC0_OFFSET2V5_SHIFT _DEVINFO_ADC0CAL0_OFFSET2V5_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL1_VDD_GAIN_MASK) -#define DEVINFO_ADC0_GAINVDD_MASK _DEVINFO_ADC0CAL1_VDD_GAIN_MASK -#elif defined(_DEVINFO_ADC0CAL1_GAINVDD_MASK) -#define DEVINFO_ADC0_GAINVDD_MASK _DEVINFO_ADC0CAL1_GAINVDD_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT) -#define DEVINFO_ADC0_GAINVDD_SHIFT _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT -#elif defined(_DEVINFO_ADC0CAL1_GAINVDD_SHIFT) -#define DEVINFO_ADC0_GAINVDD_SHIFT _DEVINFO_ADC0CAL1_GAINVDD_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL1_VDD_OFFSET_MASK) -#define DEVINFO_ADC0_OFFSETVDD_MASK _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK -#elif defined(_DEVINFO_ADC0CAL1_OFFSETVDD_MASK) -#define DEVINFO_ADC0_OFFSETVDD_MASK _DEVINFO_ADC0CAL1_OFFSETVDD_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT) -#define DEVINFO_ADC0_OFFSETVDD_SHIFT _DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT -#elif defined(_DEVINFO_ADC0CAL1_OFFSETVDD_SHIFT) -#define DEVINFO_ADC0_OFFSETVDD_SHIFT _DEVINFO_ADC0CAL1_OFFSETVDD_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK) -#define DEVINFO_ADC0_GAIN5VDIFF_MASK _DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK -#elif defined(_DEVINFO_ADC0CAL1_GAIN5VDIFF_MASK) -#define DEVINFO_ADC0_GAIN5VDIFF_MASK _DEVINFO_ADC0CAL1_GAIN5VDIFF_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT) -#define DEVINFO_ADC0_GAIN5VDIFF_SHIFT _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT -#elif defined(_DEVINFO_ADC0CAL1_GAIN5VDIFF_SHIFT) -#define DEVINFO_ADC0_GAIN5VDIFF_SHIFT _DEVINFO_ADC0CAL1_GAIN5VDIFF_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK) -#define DEVINFO_ADC0_OFFSET5VDIFF_MASK _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK -#elif defined(_DEVINFO_ADC0CAL1_OFFSET5VDIFF_MASK) -#define DEVINFO_ADC0_OFFSET5VDIFF_MASK _DEVINFO_ADC0CAL1_OFFSET5VDIFF_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT) -#define DEVINFO_ADC0_OFFSET5VDIFF_SHIFT _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT -#elif defined(_DEVINFO_ADC0CAL1_OFFSET5VDIFF_SHIFT) -#define DEVINFO_ADC0_OFFSET5VDIFF_SHIFT _DEVINFO_ADC0CAL1_OFFSET5VDIFF_SHIFT -#endif - -#if defined(_DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK) -#define DEVINFO_ADC0_OFFSET2XVDD_MASK _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK -#elif defined(_DEVINFO_ADC0CAL2_OFFSET2XVDD_MASK) -#define DEVINFO_ADC0_OFFSET2XVDD_MASK _DEVINFO_ADC0CAL2_OFFSET2XVDD_MASK -#endif - -#if defined(_DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT) -#define DEVINFO_ADC0_OFFSET2XVDD_SHIFT _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT -#elif defined(_DEVINFO_ADC0CAL2_OFFSET2XVDD_SHIFT) -#define DEVINFO_ADC0_OFFSET2XVDD_SHIFT _DEVINFO_ADC0CAL2_OFFSET2XVDD_SHIFT -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) -#define FIX_ADC_TEMP_BIAS_EN -#endif - -/** @endcond */ - -/******************************************************************************* - *************************** LOCAL FUNCTIONS ******************************* - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/***************************************************************************//** - * @brief - * Load ADC calibration register for a selected reference and conversion mode. - * - * @details - * During production, calibration values are stored in the device - * information page for internal references. Notice that for external references, - * calibration values must be determined explicitly, and this function - * will not modify the calibration register for external references. - * - * @param[in] adc - * Pointer to ADC peripheral register block. - * - * @param[in] ref - * Reference to load calibrated values for. No values are loaded for - * external references. - * - * @param[in] setScanCal - * Select scan mode (true) or single mode (false) calibration load. - ******************************************************************************/ -static void ADC_LoadDevinfoCal(ADC_TypeDef *adc, - ADC_Ref_TypeDef ref, - bool setScanCal) -{ - uint32_t calReg; - uint32_t newCal; - uint32_t mask; - uint32_t shift; - __IM uint32_t * diCalReg; - - if (setScanCal) { - shift = _ADC_CAL_SCANOFFSET_SHIFT; - mask = ~(_ADC_CAL_SCANOFFSET_MASK -#if defined(_ADC_CAL_SCANOFFSETINV_MASK) - | _ADC_CAL_SCANOFFSETINV_MASK -#endif - | _ADC_CAL_SCANGAIN_MASK); - } else { - shift = _ADC_CAL_SINGLEOFFSET_SHIFT; - mask = ~(_ADC_CAL_SINGLEOFFSET_MASK -#if defined(_ADC_CAL_SINGLEOFFSETINV_MASK) - | _ADC_CAL_SINGLEOFFSETINV_MASK -#endif - | _ADC_CAL_SINGLEGAIN_MASK); - } - - calReg = adc->CAL & mask; - newCal = 0; - - if (adc == ADC0) { - diCalReg = &DEVINFO->ADC0CAL0; - } -#if defined(ADC1) - else if (adc == ADC1) { - diCalReg = &DEVINFO->ADC1CAL0; - } -#endif - else { - return; - } - - switch (ref) { - case adcRef1V25: - newCal |= ((diCalReg[0] & DEVINFO_ADC0_GAIN1V25_MASK) - >> DEVINFO_ADC0_GAIN1V25_SHIFT) - << _ADC_CAL_SINGLEGAIN_SHIFT; - newCal |= ((diCalReg[0] & DEVINFO_ADC0_OFFSET1V25_MASK) - >> DEVINFO_ADC0_OFFSET1V25_SHIFT) - << _ADC_CAL_SINGLEOFFSET_SHIFT; -#if defined(_ADC_CAL_SINGLEOFFSETINV_MASK) - newCal |= ((diCalReg[0] & _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_MASK) - >> _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_SHIFT) - << _ADC_CAL_SINGLEOFFSETINV_SHIFT; -#endif - break; - - case adcRef2V5: - newCal |= ((diCalReg[0] & DEVINFO_ADC0_GAIN2V5_MASK) - >> DEVINFO_ADC0_GAIN2V5_SHIFT) - << _ADC_CAL_SINGLEGAIN_SHIFT; - newCal |= ((diCalReg[0] & DEVINFO_ADC0_OFFSET2V5_MASK) - >> DEVINFO_ADC0_OFFSET2V5_SHIFT) - << _ADC_CAL_SINGLEOFFSET_SHIFT; -#if defined(_ADC_CAL_SINGLEOFFSETINV_MASK) - newCal |= ((diCalReg[0] & _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_MASK) - >> _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_SHIFT) - << _ADC_CAL_SINGLEOFFSETINV_SHIFT; -#endif - break; - - case adcRefVDD: - newCal |= ((diCalReg[1] & DEVINFO_ADC0_GAINVDD_MASK) - >> DEVINFO_ADC0_GAINVDD_SHIFT) - << _ADC_CAL_SINGLEGAIN_SHIFT; - newCal |= ((diCalReg[1] & DEVINFO_ADC0_OFFSETVDD_MASK) - >> DEVINFO_ADC0_OFFSETVDD_SHIFT) - << _ADC_CAL_SINGLEOFFSET_SHIFT; -#if defined(_ADC_CAL_SINGLEOFFSETINV_MASK) - newCal |= ((diCalReg[1] & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK) - >> _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_SHIFT) - << _ADC_CAL_SINGLEOFFSETINV_SHIFT; -#endif - break; - - case adcRef5VDIFF: - newCal |= ((diCalReg[1] & DEVINFO_ADC0_GAIN5VDIFF_MASK) - >> DEVINFO_ADC0_GAIN5VDIFF_SHIFT) - << _ADC_CAL_SINGLEGAIN_SHIFT; - newCal |= ((diCalReg[1] & DEVINFO_ADC0_OFFSET5VDIFF_MASK) - >> DEVINFO_ADC0_OFFSET5VDIFF_SHIFT) - << _ADC_CAL_SINGLEOFFSET_SHIFT; -#if defined(_ADC_CAL_SINGLEOFFSETINV_MASK) - newCal |= ((diCalReg[1] & _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_MASK) - >> _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_SHIFT) - << _ADC_CAL_SINGLEOFFSETINV_SHIFT; -#endif - break; - - case adcRef2xVDD: - /* There is no gain calibration for this reference */ - newCal |= ((diCalReg[2] & DEVINFO_ADC0_OFFSET2XVDD_MASK) - >> DEVINFO_ADC0_OFFSET2XVDD_SHIFT) - << _ADC_CAL_SINGLEOFFSET_SHIFT; -#if defined(_ADC_CAL_SINGLEOFFSETINV_MASK) - newCal |= ((diCalReg[2] & _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_MASK) - >> _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_SHIFT) - << _ADC_CAL_SINGLEOFFSETINV_SHIFT; -#endif - break; - -#if defined(_ADC_SINGLECTRLX_VREFSEL_VDDXWATT) - case adcRefVddxAtt: - newCal |= ((diCalReg[1] & DEVINFO_ADC0_GAINVDD_MASK) - >> DEVINFO_ADC0_GAINVDD_SHIFT) - << _ADC_CAL_SINGLEGAIN_SHIFT; - newCal |= ((diCalReg[1] & DEVINFO_ADC0_OFFSETVDD_MASK) - >> DEVINFO_ADC0_OFFSETVDD_SHIFT) - << _ADC_CAL_SINGLEOFFSET_SHIFT; - newCal |= ((diCalReg[1] & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK) - >> _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_SHIFT) - << _ADC_CAL_SINGLEOFFSETINV_SHIFT; - break; -#endif - - /* For external references, the calibration must be determined for the - specific application and set by the user. Calibration data is also not - available for the internal references adcRefVBGR, adcRefVEntropy and - adcRefVBGRlow. */ - default: - newCal = 0; - break; - } - - adc->CAL = calReg | (newCal << shift); -} - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Initialize ADC. - * - * @details - * Initializes common parts for both single conversion and scan sequence. - * In addition, single and/or scan control configuration must be done, please - * refer to @ref ADC_InitSingle() and @ref ADC_InitScan() respectively. - * For ADC architectures with the ADCn->SCANINPUTSEL register, use - * @ref ADC_ScanSingleEndedInputAdd() to configure single-ended scan inputs or - * @ref ADC_ScanDifferentialInputAdd() to configure differential scan inputs. - * @ref ADC_ScanInputClear() is also provided for applications that need to update - * the input configuration. - * - * @note - * This function will stop any ongoing conversion. - * - * @param[in] adc - * Pointer to ADC peripheral register block. - * - * @param[in] init - * Pointer to ADC initialization structure. - ******************************************************************************/ -void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init) -{ - uint32_t tmp; - uint8_t presc = init->prescale; - - EFM_ASSERT(ADC_REF_VALID(adc)); - - if (presc == 0) { - /* Assume maximum ADC clock for prescaler 0 */ - presc = ADC_PrescaleCalc(ADC_MAX_CLOCK, 0); - } else { - /* Check prescaler bounds against ADC_MAX_CLOCK and ADC_MIN_CLOCK */ -#if defined(_ADC_CTRL_ADCCLKMODE_MASK) - if (ADC0->CTRL & ADC_CTRL_ADCCLKMODE_SYNC) -#endif - { - EFM_ASSERT(presc >= ADC_PrescaleCalc(ADC_MAX_CLOCK, 0)); - EFM_ASSERT(presc <= ADC_PrescaleCalc(ADC_MIN_CLOCK, 0)); - } - } - - /* Make sure conversion is not in progress */ - adc->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP; - - tmp = ((uint32_t)(init->ovsRateSel) << _ADC_CTRL_OVSRSEL_SHIFT) - | (((uint32_t)(init->timebase) << _ADC_CTRL_TIMEBASE_SHIFT) - & _ADC_CTRL_TIMEBASE_MASK) - | (((uint32_t)(presc) << _ADC_CTRL_PRESC_SHIFT) - & _ADC_CTRL_PRESC_MASK) -#if defined (_ADC_CTRL_LPFMODE_MASK) - | ((uint32_t)(init->lpfMode) << _ADC_CTRL_LPFMODE_SHIFT) -#endif - | ((uint32_t)(init->warmUpMode) << _ADC_CTRL_WARMUPMODE_SHIFT); - - if (init->tailgate) { - tmp |= ADC_CTRL_TAILGATE; - } - adc->CTRL = tmp; - - /* Set ADC EM2 clock configuration */ -#if defined(_ADC_CTRL_ADCCLKMODE_MASK) - BUS_RegMaskedWrite(&ADC0->CTRL, - _ADC_CTRL_ADCCLKMODE_MASK | _ADC_CTRL_ASYNCCLKEN_MASK, - init->em2ClockConfig); -#endif - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - /* A debugger can trigger the SCANUF interrupt on EFM32xG1 or EFR32xG1 */ - ADC_IntClear(adc, ADC_IFC_SCANUF); -#endif -} - -#if defined(_ADC_SCANINPUTSEL_MASK) -/***************************************************************************//** - * @brief - * Clear ADC scan input configuration. - * - * @param[in] scanInit - * Struct to hold the scan configuration, input configuration. - ******************************************************************************/ -void ADC_ScanInputClear(ADC_InitScan_TypeDef *scanInit) -{ - /* Clear input configuration */ - - /* Select none */ - scanInit->scanInputConfig.scanInputSel = ADC_SCANINPUTSEL_NONE; - scanInit->scanInputConfig.scanInputEn = 0; - - /* Default alternative negative inputs */ - scanInit->scanInputConfig.scanNegSel = _ADC_SCANNEGSEL_RESETVALUE; -} - -/***************************************************************************//** - * @brief - * Initialize ADC scan single-ended input configuration. - * - * @details - * Set configuration for ADC scan conversion with single-ended inputs. The - * ADC_InitScan_TypeDef struct updated from this function should be passed to - * ADC_InitScan(). - * - * @param[in] inputGroup - * ADC scan input group. See section 25.3.4 in the reference manual for - * more information. - * - * @param[in] singleEndedSel - * APORT select. - * - * @return - * Scan ID of selected ADC input. ee section 25.3.4 in the reference manual for - * more information. Note that the returned integer represents the bit position - * in ADCn_SCANMASK set by this function. The accumulated mask is stored in - * scanInit->scanInputConfig->scanInputEn. - ******************************************************************************/ -uint32_t ADC_ScanSingleEndedInputAdd(ADC_InitScan_TypeDef *scanInit, - ADC_ScanInputGroup_TypeDef inputGroup, - ADC_PosSel_TypeDef singleEndedSel) -{ - uint32_t currentSel; - uint32_t newSel; - uint32_t scanId; - - scanInit->diff = false; - - /* Check for unsupported APORTs */ - EFM_ASSERT((singleEndedSel <= adcPosSelAPORT0YCH0) || (singleEndedSel >= adcPosSelAPORT0YCH15)); - - /* Decode the input group select by shifting right by 3 */ - newSel = singleEndedSel >> 3; - - currentSel = (scanInit->scanInputConfig.scanInputSel >> (inputGroup * 8)) & 0xFF; - - /* If none selected */ - if (currentSel == ADC_SCANINPUTSEL_GROUP_NONE) { - scanInit->scanInputConfig.scanInputSel &= ~(0xFF << (inputGroup * 8)); - scanInit->scanInputConfig.scanInputSel |= (newSel << (inputGroup * 8)); - } else if (currentSel == newSel) { - /* Ok, but do nothing. */ - } else { - /* Invalid channel range. A range is already selected for this group. */ - EFM_ASSERT(false); - } - - /* Update and return scan input enable mask (SCANMASK) */ - scanId = (inputGroup * 8) + (singleEndedSel & 0x7); - EFM_ASSERT(scanId < 32); - scanInit->scanInputConfig.scanInputEn |= 0x1 << scanId; - return scanId; -} - -/***************************************************************************//** - * @brief - * Initialize ADC scan differential input configuration. - * - * @details - * Set configuration for ADC scan conversion with differential inputs. The - * ADC_InitScan_TypeDef struct updated by this function should be passed to - * ADC_InitScan(). - * - * @param[in] scanInit - * Struct to hold the scan and input configuration. - * - * @param[in] inputGroup - * ADC scan input group. See section 25.3.4 in the reference manual for - * more information. - * - * @param[in] posSel - * APORT bus pair select. The negative terminal is implicitly selected by - * the positive terminal. - * - * @param[in] negInput - * ADC scan alternative negative input. Set to adcScanNegInputDefault to select - * default negative input (implicit from posSel). - * - * @return - * Scan ID of selected ADC input. ee section 25.3.4 in the reference manual for - * more information. Note that the returned integer represents the bit position - * in ADCn_SCANMASK set by this function. The accumulated mask is stored in - * scanInit->scanInputConfig->scanInputEn. - ******************************************************************************/ -uint32_t ADC_ScanDifferentialInputAdd(ADC_InitScan_TypeDef *scanInit, - ADC_ScanInputGroup_TypeDef inputGroup, - ADC_PosSel_TypeDef posSel, - ADC_ScanNegInput_TypeDef negInput) -{ - uint32_t negInputRegMask = 0; - uint32_t negInputRegShift = 0; - uint32_t negInputRegVal = 0; - uint32_t scanId = 0; - - /* Do a single ended init, then update for differential scan. */ - scanId = ADC_ScanSingleEndedInputAdd(scanInit, inputGroup, posSel); - - /* Reset to differential mode */ - scanInit->diff = true; - - /* Set negative ADC input, unless the default is selected. */ - if (negInput != adcScanNegInputDefault) { - if (scanId == 0) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT0NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT0NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 0); - } else if (scanId == 2) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT2NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT2NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 0); - } else if (scanId == 4) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT4NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT4NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 0); - } else if (scanId == 6) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT6NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT6NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 0); - } else if (scanId == 9) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT9NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT9NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 1); - } else if (scanId == 11) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT11NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT11NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 1); - } else if (scanId == 13) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT13NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT13NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 1); - } else if (scanId == 15) { - negInputRegMask = _ADC_SCANNEGSEL_INPUT15NEGSEL_MASK; - negInputRegShift = _ADC_SCANNEGSEL_INPUT15NEGSEL_SHIFT; - EFM_ASSERT(inputGroup == 1); - } else { - /* There is not negative input option for this positive input (negInput is posInput + 1). */ - EFM_ASSERT(false); - } - - /* Find ADC_SCANNEGSEL_CHxNSEL value for positive input 0, 2, 4 and 6 */ - if (inputGroup == 0) { - switch (negInput) { - case adcScanNegInput1: - negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT1; - break; - - case adcScanNegInput3: - negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT3; - break; - - case adcScanNegInput5: - negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT5; - break; - - case adcScanNegInput7: - negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT7; - break; - - default: - /* Invalid selection. Options are input 1, 3, 5 and 7. */ - EFM_ASSERT(false); - break; - } - } else if (inputGroup == 1) { - /* Find ADC_SCANNEGSEL_CHxNSEL value for positive input 9, 11, 13 and 15 */ - switch (negInput) { - case adcScanNegInput8: - negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT8; - break; - - case adcScanNegInput10: - negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT10; - break; - - case adcScanNegInput12: - negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT12; - break; - - case adcScanNegInput14: - negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT14; - break; - - default: - /* Invalid selection. Options are input 8, 10, 12 and 14. */ - EFM_ASSERT(false); - break; - } - } else { - /* No alternative negative input for input group > 1 */ - EFM_ASSERT(false); - } - - /* Update config */ - scanInit->scanInputConfig.scanNegSel &= ~negInputRegMask; - scanInit->scanInputConfig.scanNegSel |= negInputRegVal << negInputRegShift; - } - return scanId; -} -#endif - -/***************************************************************************//** - * @brief - * Initialize ADC scan sequence. - * - * @details - * Please refer to ADC_Start() for starting scan sequence. - * - * When selecting an external reference, the gain and offset calibration - * must be set explicitly (CAL register). For other references, the - * calibration is updated with values defined during manufacturing. - * For ADC architectures with the ADCn->SCANINPUTSEL register, use - * @ref ADC_ScanSingleEndedInputAdd() to configure single-ended scan inputs or - * @ref ADC_ScanDifferentialInputAdd() to configure differential scan inputs. - * @ref ADC_ScanInputClear() is also provided for applications that need to update - * the input configuration. - * - * @note - * This function will stop any ongoing scan sequence. - * - * @param[in] adc - * Pointer to ADC peripheral register block. - * - * @param[in] init - * Pointer to ADC initialization structure. - ******************************************************************************/ -void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init) -{ - uint32_t tmp; - - EFM_ASSERT(ADC_REF_VALID(adc)); - - /* Make sure scan sequence is not in progress */ - adc->CMD = ADC_CMD_SCANSTOP; - - /* Load calibration data for selected reference */ - ADC_LoadDevinfoCal(adc, init->reference, true); - - tmp = 0 -#if defined (_ADC_SCANCTRL_PRSSEL_MASK) - | (init->prsSel << _ADC_SCANCTRL_PRSSEL_SHIFT) -#endif - | (init->acqTime << _ADC_SCANCTRL_AT_SHIFT) -#if defined (_ADC_SCANCTRL_INPUTMASK_MASK) - | init->input -#endif - | (init->resolution << _ADC_SCANCTRL_RES_SHIFT); - - if (init->prsEnable) { - tmp |= ADC_SCANCTRL_PRSEN; - } - - if (init->leftAdjust) { - tmp |= ADC_SCANCTRL_ADJ_LEFT; - } - -#if defined(_ADC_SCANCTRL_INPUTMASK_MASK) - if (init->diff) -#elif defined(_ADC_SCANINPUTSEL_MASK) - if (init->diff) -#endif - { - tmp |= ADC_SCANCTRL_DIFF; - } - - if (init->rep) { -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - /* Scan repeat mode does not work on EFM32JG1, EFM32PG1 or EFR32xG1x devices. - * The errata is called ADC_E211 in the errata document. */ - EFM_ASSERT(false); -#endif - tmp |= ADC_SCANCTRL_REP; - } - - /* Set scan reference. Check if reference configuraion is extended to SCANCTRLX. */ -#if defined (_ADC_SCANCTRLX_VREFSEL_MASK) - if (init->reference & ADC_CTRLX_VREFSEL_REG) { - /* Select extension register */ - tmp |= ADC_SCANCTRL_REF_CONF; - } else { - tmp |= init->reference << _ADC_SCANCTRL_REF_SHIFT; - } -#else - tmp |= init->reference << _ADC_SCANCTRL_REF_SHIFT; -#endif - -#if defined(_ADC_SCANCTRL_INPUTMASK_MASK) - tmp |= init->input; -#endif - - adc->SCANCTRL = tmp; - - /* Update SINGLECTRLX for reference select and PRS select */ -#if defined (_ADC_SCANCTRLX_MASK) - tmp = adc->SCANCTRLX & ~(_ADC_SCANCTRLX_VREFSEL_MASK - | _ADC_SCANCTRLX_PRSSEL_MASK - | _ADC_SCANCTRLX_FIFOOFACT_MASK); - if (init->reference & ADC_CTRLX_VREFSEL_REG) { - tmp |= (init->reference & ~ADC_CTRLX_VREFSEL_REG) << _ADC_SCANCTRLX_VREFSEL_SHIFT; - } - - tmp |= init->prsSel << _ADC_SCANCTRLX_PRSSEL_SHIFT; - - if (init->fifoOverwrite) { - tmp |= ADC_SCANCTRLX_FIFOOFACT_OVERWRITE; - } - - adc->SCANCTRLX = tmp; -#endif - -#if defined(_ADC_CTRL_SCANDMAWU_MASK) - BUS_RegBitWrite(&adc->CTRL, _ADC_CTRL_SCANDMAWU_SHIFT, init->scanDmaEm2Wu); -#endif - - /* Write scan input configuration */ -#if defined(_ADC_SCANINPUTSEL_MASK) - /* Check for valid scan input configuration. Use @ref ADC_ScanInputClear() - @ref ADC_ScanSingleEndedInputAdd() and @ref ADC_ScanDifferentialInputAdd() to set - scan input configuration. */ - EFM_ASSERT(init->scanInputConfig.scanInputSel != ADC_SCANINPUTSEL_NONE); - adc->SCANINPUTSEL = init->scanInputConfig.scanInputSel; - adc->SCANMASK = init->scanInputConfig.scanInputEn; - adc->SCANNEGSEL = init->scanInputConfig.scanNegSel; -#endif - - /* Assert for any APORT bus conflicts programming errors */ -#if defined(_ADC_BUSCONFLICT_MASK) - tmp = adc->BUSREQ; - EFM_ASSERT(!(tmp & adc->BUSCONFLICT)); - EFM_ASSERT(!(adc->STATUS & _ADC_STATUS_PROGERR_MASK)); -#endif -} - -/***************************************************************************//** - * @brief - * Initialize single ADC sample conversion. - * - * @details - * Please refer to ADC_Start() for starting single conversion. - * - * When selecting an external reference, the gain and offset calibration - * must be set explicitly (CAL register). For other references, the - * calibration is updated with values defined during manufacturing. - * - * @note - * This function will stop any ongoing single conversion. - * - * @cond DOXYDOC_P2_DEVICE - * @note - * This function will set the BIASPROG_GPBIASACC bit when selecting the - * internal temperature sensor and clear the bit otherwise. Any - * application that depends on the state of the BIASPROG_GPBIASACC bit should - * modify it after a call to this function. - * @endcond - * - * @param[in] adc - * Pointer to ADC peripheral register block. - * - * @param[in] init - * Pointer to ADC initialization structure. - ******************************************************************************/ -void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init) -{ - uint32_t tmp; - - EFM_ASSERT(ADC_REF_VALID(adc)); - - /* Make sure single conversion is not in progress */ - adc->CMD = ADC_CMD_SINGLESTOP; - - /* Load calibration data for selected reference */ - ADC_LoadDevinfoCal(adc, init->reference, false); - - tmp = 0 -#if defined(_ADC_SINGLECTRL_PRSSEL_MASK) - | (init->prsSel << _ADC_SINGLECTRL_PRSSEL_SHIFT) -#endif - | (init->acqTime << _ADC_SINGLECTRL_AT_SHIFT) -#if defined(_ADC_SINGLECTRL_INPUTSEL_MASK) - | (init->input << _ADC_SINGLECTRL_INPUTSEL_SHIFT) -#endif -#if defined(_ADC_SINGLECTRL_POSSEL_MASK) - | (init->posSel << _ADC_SINGLECTRL_POSSEL_SHIFT) -#endif -#if defined(_ADC_SINGLECTRL_NEGSEL_MASK) - | (init->negSel << _ADC_SINGLECTRL_NEGSEL_SHIFT) -#endif - | ((uint32_t)(init->resolution) << _ADC_SINGLECTRL_RES_SHIFT); - - if (init->prsEnable) { - tmp |= ADC_SINGLECTRL_PRSEN; - } - - if (init->leftAdjust) { - tmp |= ADC_SINGLECTRL_ADJ_LEFT; - } - - if (init->diff) { - tmp |= ADC_SINGLECTRL_DIFF; - } - - if (init->rep) { - tmp |= ADC_SINGLECTRL_REP; - } - -#if defined(_ADC_SINGLECTRL_POSSEL_TEMP) - /* Force at least 8 cycle acquisition time when reading internal temperature - * sensor with 1.25V reference */ - if ((init->posSel == adcPosSelTEMP) - && (init->reference == adcRef1V25) - && (init->acqTime < adcAcqTime8)) { - tmp = (tmp & ~_ADC_SINGLECTRL_AT_MASK) - | (adcAcqTime8 << _ADC_SINGLECTRL_AT_SHIFT); - } -#endif - - /* Set single reference. Check if reference configuraion is extended to SINGLECTRLX. */ -#if defined (_ADC_SINGLECTRLX_MASK) - if (init->reference & ADC_CTRLX_VREFSEL_REG) { - /* Select extension register */ - tmp |= ADC_SINGLECTRL_REF_CONF; - } else { - tmp |= (init->reference << _ADC_SINGLECTRL_REF_SHIFT); - } -#else - tmp |= (init->reference << _ADC_SINGLECTRL_REF_SHIFT); -#endif - adc->SINGLECTRL = tmp; - - /* Update SINGLECTRLX for reference select and PRS select */ -#if defined (_ADC_SINGLECTRLX_VREFSEL_MASK) - tmp = adc->SINGLECTRLX & ~(_ADC_SINGLECTRLX_VREFSEL_MASK - | _ADC_SINGLECTRLX_PRSSEL_MASK - | _ADC_SINGLECTRLX_FIFOOFACT_MASK); - if (init->reference & ADC_CTRLX_VREFSEL_REG) { - tmp |= ((init->reference & ~ADC_CTRLX_VREFSEL_REG) << _ADC_SINGLECTRLX_VREFSEL_SHIFT); - } - - tmp |= ((init->prsSel << _ADC_SINGLECTRLX_PRSSEL_SHIFT)); - - if (init->fifoOverwrite) { - tmp |= ADC_SINGLECTRLX_FIFOOFACT_OVERWRITE; - } - - adc->SINGLECTRLX = tmp; -#endif - - /* Set DMA availability in EM2 */ -#if defined(_ADC_CTRL_SINGLEDMAWU_MASK) - BUS_RegBitWrite(&adc->CTRL, _ADC_CTRL_SINGLEDMAWU_SHIFT, init->singleDmaEm2Wu); -#endif - -#if defined(_ADC_BIASPROG_GPBIASACC_MASK) && defined(FIX_ADC_TEMP_BIAS_EN) - if (init->posSel == adcPosSelTEMP) { - /* ADC should always use low accuracy setting when reading the internal - * temperature sensor on platform 2 generation 1 devices. Using high - * accuracy setting can introduce a glitch. */ - BUS_RegBitWrite(&adc->BIASPROG, _ADC_BIASPROG_GPBIASACC_SHIFT, 1); - } else { - BUS_RegBitWrite(&adc->BIASPROG, _ADC_BIASPROG_GPBIASACC_SHIFT, 0); - } -#endif - - /* Assert for any APORT bus conflicts programming errors */ -#if defined(_ADC_BUSCONFLICT_MASK) - tmp = adc->BUSREQ; - EFM_ASSERT(!(tmp & adc->BUSCONFLICT)); - EFM_ASSERT(!(adc->STATUS & _ADC_STATUS_PROGERR_MASK)); -#endif -} - -#if defined(_ADC_SCANDATAX_MASK) -/***************************************************************************//** - * @brief - * Get scan result and scan select ID. - * - * @note - * Only use if scan data valid. This function does not check the DV flag. - * The return value is intended to be used as a index for the scan select ID. - * - * @param[in] adc - * Pointer to ADC peripheral register block. - * - * @param[out] scanId - * Scan select ID of first data in scan FIFO. - * - * @return - * First scan data in scan FIFO. - ******************************************************************************/ -uint32_t ADC_DataIdScanGet(ADC_TypeDef *adc, uint32_t *scanId) -{ - uint32_t scanData; - - /* Pop data FIFO with scan ID */ - scanData = adc->SCANDATAX; - *scanId = (scanData & _ADC_SCANDATAX_SCANINPUTID_MASK) >> _ADC_SCANDATAX_SCANINPUTID_SHIFT; - return (scanData & _ADC_SCANDATAX_DATA_MASK) >> _ADC_SCANDATAX_DATA_SHIFT; -} -#endif - -/***************************************************************************//** - * @brief - * Calculate prescaler value used to determine ADC clock. - * - * @details - * The ADC clock is given by: HFPERCLK / (prescale + 1). - * - * @param[in] adcFreq ADC frequency wanted. The frequency will automatically - * be adjusted to be within valid range according to reference manual. - * - * @param[in] hfperFreq Frequency in Hz of reference HFPER clock. Set to 0 to - * use currently defined HFPER clock setting. - * - * @return - * Prescaler value to use for ADC in order to achieve a clock value - * <= @p adcFreq. - ******************************************************************************/ -uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq) -{ - uint32_t ret; - - /* Make sure selected ADC clock is within valid range */ - if (adcFreq > ADC_MAX_CLOCK) { - adcFreq = ADC_MAX_CLOCK; - } else if (adcFreq < ADC_MIN_CLOCK) { - adcFreq = ADC_MIN_CLOCK; - } - - /* Use current HFPER frequency? */ - if (!hfperFreq) { - hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER); - } - - ret = (hfperFreq + adcFreq - 1) / adcFreq; - if (ret) { - ret--; - } - - return (uint8_t)ret; -} - -/***************************************************************************//** - * @brief - * Reset ADC to same state as after a HW reset. - * - * @note - * The ROUTE register is NOT reset by this function, in order to allow for - * centralized setup of this feature. - * - * @param[in] adc - * Pointer to ADC peripheral register block. - ******************************************************************************/ -void ADC_Reset(ADC_TypeDef *adc) -{ - /* Stop conversions, before resetting other registers. */ - adc->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP; - adc->SINGLECTRL = _ADC_SINGLECTRL_RESETVALUE; -#if defined(_ADC_SINGLECTRLX_MASK) - adc->SINGLECTRLX = _ADC_SINGLECTRLX_RESETVALUE; -#endif - adc->SCANCTRL = _ADC_SCANCTRL_RESETVALUE; -#if defined(_ADC_SCANCTRLX_MASK) - adc->SCANCTRLX = _ADC_SCANCTRLX_RESETVALUE; -#endif - adc->CTRL = _ADC_CTRL_RESETVALUE; - adc->IEN = _ADC_IEN_RESETVALUE; - adc->IFC = _ADC_IFC_MASK; - adc->BIASPROG = _ADC_BIASPROG_RESETVALUE; -#if defined(_ADC_SCANMASK_MASK) - adc->SCANMASK = _ADC_SCANMASK_RESETVALUE; -#endif -#if defined(_ADC_SCANINPUTSEL_MASK) - adc->SCANINPUTSEL = _ADC_SCANINPUTSEL_RESETVALUE; -#endif -#if defined(_ADC_SCANNEGSEL_MASK) - adc->SCANNEGSEL = _ADC_SCANNEGSEL_RESETVALUE; -#endif - - /* Clear data FIFOs */ -#if defined(_ADC_SINGLEFIFOCLEAR_MASK) - adc->SINGLEFIFOCLEAR |= ADC_SINGLEFIFOCLEAR_SINGLEFIFOCLEAR; - adc->SCANFIFOCLEAR |= ADC_SCANFIFOCLEAR_SCANFIFOCLEAR; -#endif - - /* Load calibration values for the 1V25 internal reference. */ - ADC_LoadDevinfoCal(adc, adcRef1V25, false); - ADC_LoadDevinfoCal(adc, adcRef1V25, true); - -#if defined(_ADC_SCANINPUTSEL_MASK) - /* Do not reset route register, setting should be done independently */ -#endif -} - -/***************************************************************************//** - * @brief - * Calculate timebase value in order to get a timebase providing at least 1us. - * - * @param[in] hfperFreq Frequency in Hz of reference HFPER clock. Set to 0 to - * use currently defined HFPER clock setting. - * - * @return - * Timebase value to use for ADC in order to achieve at least 1 us. - ******************************************************************************/ -uint8_t ADC_TimebaseCalc(uint32_t hfperFreq) -{ - if (!hfperFreq) { - hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER); - - /* Just in case, make sure we get non-zero freq for below calculation */ - if (!hfperFreq) { - hfperFreq = 1; - } - } -#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY) - /* Handle errata on Giant Gecko, max TIMEBASE is 5 bits wide or max 0x1F */ - /* cycles. This will give a warmp up time of e.g. 0.645us, not the */ - /* required 1us when operating at 48MHz. One must also increase acqTime */ - /* to compensate for the missing clock cycles, adding up to 1us in total.*/ - /* See reference manual for details. */ - if ( hfperFreq > 32000000 ) { - hfperFreq = 32000000; - } -#endif - /* Determine number of HFPERCLK cycle >= 1us */ - hfperFreq += 999999; - hfperFreq /= 1000000; - - /* Return timebase value (N+1 format) */ - return (uint8_t)(hfperFreq - 1); -} - -/** @} (end addtogroup ADC) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_assert.c b/targets/efm32/emlib/em_assert.c deleted file mode 100644 index 71225e0..0000000 --- a/targets/efm32/emlib/em_assert.c +++ /dev/null @@ -1,81 +0,0 @@ -/***************************************************************************//** - * @file em_assert.c - * @brief Assert API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_assert.h" -#include - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup ASSERT - * @{ - ******************************************************************************/ - -#if defined(DEBUG_EFM) -/***************************************************************************//** - * @brief - * EFM internal assert handling. - * - * This function is invoked through EFM_ASSERT() macro usage only, it should - * not be used explicitly. - * - * This implementation simply enters an indefinite loop, allowing - * the use of a debugger to determine cause of failure. By defining - * DEBUG_EFM_USER to the preprocessor for all files, a user defined version - * of this function must be defined and will be invoked instead, possibly - * providing output of assertion location. - * - * @note - * This function is not used unless @ref DEBUG_EFM is defined - * during preprocessing of EFM_ASSERT() usage. - * - * @param[in] file - * Name of source file where assertion failed. - * - * @param[in] line - * Line number in source file where assertion failed. - ******************************************************************************/ -void assertEFM(const char *file, int line) -{ - (void)file; /* Unused parameter */ - (void)line; /* Unused parameter */ - - while (true) { - } -} -#endif /* DEBUG_EFM */ - -/** @} (end addtogroup ASSERT) */ -/** @} (end addtogroup emlib) */ diff --git a/targets/efm32/emlib/em_cmu.c b/targets/efm32/emlib/em_cmu.c deleted file mode 100644 index 96316ff..0000000 --- a/targets/efm32/emlib/em_cmu.c +++ /dev/null @@ -1,5310 +0,0 @@ -/***************************************************************************//** - * @file em_cmu.c - * @brief Clock management unit (CMU) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_cmu.h" -#if defined(CMU_PRESENT) - -#include -#include -#include "em_assert.h" -#include "em_bus.h" -#include "em_emu.h" -#include "em_cmu.h" -#include "em_system.h" -#include "em_common.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup CMU - * @brief Clock management unit (CMU) Peripheral API - * @details - * This module contains functions to control the CMU peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The CMU controls oscillators and clocks. - * @{ - ******************************************************************************/ - -/******************************************************************************* - ****************************** DEFINES ************************************ - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(_SILICON_LABS_32B_SERIES_1) -/** Maximum allowed core frequency when using 0 wait-states on flash access. */ -#define CMU_MAX_FREQ_0WS 26000000 -/** Maximum allowed core frequency when using 1 wait-states on flash access */ -#define CMU_MAX_FREQ_1WS 40000000 -/** Maximum allowed core frequency when using 2 wait-states on flash access */ -#define CMU_MAX_FREQ_2WS 54000000 -/** Maximum allowed core frequency when using 3 wait-states on flash access */ -#define CMU_MAX_FREQ_3WS 72000000 -#elif defined(_SILICON_LABS_32B_SERIES_0) -/** Maximum allowed core frequency when using 0 wait-states on flash access. */ -#define CMU_MAX_FREQ_0WS 16000000 -/** Maximum allowed core frequency when using 1 wait-states on flash access */ -#define CMU_MAX_FREQ_1WS 32000000 -#else -#error "Max Flash wait-state frequencies are not defined for this platform." -#endif - -/** Maximum frequency for HFLE interface */ -#if defined(CMU_CTRL_HFLE) -/** Maximum HFLE frequency for series 0 EFM32 and EZR32 Wonder Gecko. */ -#if defined(_SILICON_LABS_32B_SERIES_0) \ - && (defined(_EFM32_WONDER_FAMILY) \ - || defined(_EZR32_WONDER_FAMILY)) -#define CMU_MAX_FREQ_HFLE 24000000 -/** Maximum HFLE frequency for other series 0 parts with maximum core clock - higher than 32MHz. */ -#elif defined(_SILICON_LABS_32B_SERIES_0) \ - && (defined(_EFM32_GIANT_FAMILY) \ - || defined(_EZR32_LEOPARD_FAMILY)) -#define CMU_MAX_FREQ_HFLE maxFreqHfle() -#endif -#elif defined(CMU_CTRL_WSHFLE) -/** Maximum HFLE frequency for series 1 parts */ -#define CMU_MAX_FREQ_HFLE 32000000 -#endif - -#if defined(CMU_STATUS_HFXOSHUNTOPTRDY) -#define HFXO_TUNING_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY | CMU_STATUS_HFXOSHUNTOPTRDY) -#define HFXO_TUNING_MODE_AUTO (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD) -#define HFXO_TUNING_MODE_CMD (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD) -#elif defined(CMU_STATUS_HFXOPEAKDETRDY) -#define HFXO_TUNING_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY) -#define HFXO_TUNING_MODE_AUTO (_CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD) -#define HFXO_TUNING_MODE_CMD (_CMU_HFXOCTRL_PEAKDETMODE_CMD) -#endif - -#if defined(CMU_HFXOCTRL_MODE_EXTCLK) -/** HFXO external clock mode is renamed from EXTCLK to DIGEXTCLK. */ -#define CMU_HFXOCTRL_MODE_DIGEXTCLK CMU_HFXOCTRL_MODE_EXTCLK -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -#define VSCALE_DEFAULT (EMU_VScaleGet()) -#else -#define VSCALE_DEFAULT 0 -#endif - -/******************************************************************************* - ************************** LOCAL VARIABLES ******************************** - ******************************************************************************/ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -static CMU_AUXHFRCOFreq_TypeDef auxHfrcoFreq = cmuAUXHFRCOFreq_19M0Hz; -#endif -#if defined(_CMU_STATUS_HFXOSHUNTOPTRDY_MASK) -#define HFXO_INVALID_TRIM (~_CMU_HFXOTRIMSTATUS_MASK) -#endif - -#if defined(CMU_OSCENCMD_DPLLEN) -/** Table of HFRCOCTRL values and their associated min/max frequencies and - optional band enumerator. */ -static const struct hfrcoCtrlTableElement{ - uint32_t minFreq; - uint32_t maxFreq; - uint32_t value; - CMU_HFRCOFreq_TypeDef band; -} hfrcoCtrlTable[] = -{ - // minFreq maxFreq HFRCOCTRL value band - { 860000, 1050000, 0xBC601F00, cmuHFRCOFreq_1M0Hz }, - { 1050000, 1280000, 0xBC611F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 1280000, 1480000, 0xBCA21F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 1480000, 1800000, 0xAD231F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 1800000, 2110000, 0xBA601F00, cmuHFRCOFreq_2M0Hz }, - { 2110000, 2560000, 0xBA611F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 2560000, 2970000, 0xBAA21F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 2970000, 3600000, 0xAB231F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 3600000, 4220000, 0xB8601F00, cmuHFRCOFreq_4M0Hz }, - { 4220000, 5120000, 0xB8611F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 5120000, 5930000, 0xB8A21F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 5930000, 7520000, 0xA9231F00, cmuHFRCOFreq_7M0Hz }, - { 7520000, 9520000, 0x99241F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 9520000, 11800000, 0x99251F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 11800000, 14400000, 0x99261F00, cmuHFRCOFreq_13M0Hz }, - { 14400000, 17200000, 0x99271F00, cmuHFRCOFreq_16M0Hz }, - { 17200000, 19700000, 0x99481F00, cmuHFRCOFreq_19M0Hz }, - { 19700000, 23800000, 0x99491F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 23800000, 28700000, 0x994A1F00, cmuHFRCOFreq_26M0Hz }, - { 28700000, 34800000, 0x996B1F00, cmuHFRCOFreq_32M0Hz }, -#if defined(_DEVINFO_HFRCOCAL16_MASK) - { 34800000, 42800000, 0x996C1F00, cmuHFRCOFreq_38M0Hz }, - { 42800000, 51600000, 0x996D1F00, cmuHFRCOFreq_48M0Hz }, - { 51600000, 60500000, 0x998E1F00, cmuHFRCOFreq_56M0Hz }, - { 60500000, 72000000, 0xA98F1F00, cmuHFRCOFreq_64M0Hz } -#else - { 34800000, 40000000, 0x996C1F00, cmuHFRCOFreq_38M0Hz } -#endif -}; - -#define HFRCOCTRLTABLE_ENTRIES (sizeof(hfrcoCtrlTable) \ - / sizeof(struct hfrcoCtrlTableElement)) -#endif // CMU_OSCENCMD_DPLLEN - -#if defined(_SILICON_LABS_32B_SERIES_1) && defined(_EMU_STATUS_VSCALE_MASK) -/* Devices with Voltage Scaling needs extra handling of wait states. */ -static const struct flashWsTableElement{ - uint32_t maxFreq; - uint8_t vscale; - uint8_t ws; -} flashWsTable[] = -{ -#if (_SILICON_LABS_GECKO_INTERNAL_SDID == 100) - { 18000000, 0, 0 }, /* 0 wait states at max frequency 18 MHz and 1.2V */ - { 36000000, 0, 1 }, /* 1 wait states at max frequency 36 MHz and 1.2V */ - { 54000000, 0, 2 }, /* 2 wait states at max frequency 54 MHz and 1.2V */ - { 72000000, 0, 3 }, /* 3 wait states at max frequency 72 MHz and 1.2V */ - { 7000000, 2, 0 }, /* 0 wait states at max frequency 7 MHz and 1.0V */ - { 14000000, 2, 1 }, /* 1 wait states at max frequency 14 MHz and 1.0V */ - { 21000000, 2, 2 }, /* 2 wait states at max frequency 21 MHz and 1.0V */ -#else - { 25000000, 0, 0 }, /* 0 wait states at max frequency 25 MHz and 1.2V */ - { 40000000, 0, 1 }, /* 1 wait states at max frequency 40 MHz and 1.2V */ - { 7000000, 2, 0 }, /* 0 wait states at max frequency 7 MHz and 1.0V */ - { 14000000, 2, 1 }, /* 1 wait states at max frequency 14 MHz and 1.0V */ - { 21000000, 2, 2 }, /* 2 wait states at max frequency 21 MHz and 1.0V */ -#endif -}; - -#define FLASH_WS_TABLE_ENTRIES (sizeof(flashWsTable) / sizeof(flashWsTable[0])) -#endif - -#if defined(_CMU_USHFRCOCTRL_FREQRANGE_MASK) \ - || defined(_CMU_USHFRCOTUNE_MASK) -#ifndef EFM32_USHFRCO_STARTUP_FREQ -#define EFM32_USHFRCO_STARTUP_FREQ (48000000UL) -#endif - -static uint32_t ushfrcoFreq = EFM32_USHFRCO_STARTUP_FREQ; -#endif - -/******************************************************************************* - ************************** LOCAL PROTOTYPES ******************************* - ******************************************************************************/ -#if defined(_CMU_HFRCOCTRL_FREQRANGE_MASK) -static uint32_t CMU_HFRCODevinfoGet(CMU_HFRCOFreq_TypeDef freq); -#endif - -#if defined(_CMU_USHFRCOCTRL_FREQRANGE_MASK) -static uint32_t CMU_USHFRCODevinfoGet(CMU_USHFRCOFreq_TypeDef freq); -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** LOCAL FUNCTIONS ******************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(_SILICON_LABS_32B_SERIES_0) \ - && (defined(_EFM32_GIANT_FAMILY) \ - || defined(_EZR32_LEOPARD_FAMILY)) -/***************************************************************************//** - * @brief - * Return max allowed frequency for low energy peripherals. - ******************************************************************************/ -static uint32_t maxFreqHfle(void) -{ - uint16_t majorMinorRev; - - switch (SYSTEM_GetFamily()) { - case systemPartFamilyEfm32Leopard: - case systemPartFamilyEzr32Leopard: - /* CHIP MAJOR bit [5:0] */ - majorMinorRev = (((ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) - >> _ROMTABLE_PID0_REVMAJOR_SHIFT) << 8); - /* CHIP MINOR bit [7:4] */ - majorMinorRev |= (((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) - >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) << 4); - /* CHIP MINOR bit [3:0] */ - majorMinorRev |= ((ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) - >> _ROMTABLE_PID3_REVMINORLSB_SHIFT); - - if (majorMinorRev >= 0x0204) { - return 24000000; - } else { - return 32000000; - } - - case systemPartFamilyEfm32Giant: - return 32000000; - - default: - /* Invalid device family. */ - EFM_ASSERT(false); - return 0; - } -} -#endif - -#if defined(CMU_MAX_FREQ_HFLE) - -/* Unified definitions for HFLE wait-state and prescaler fields. */ -#if defined(CMU_CTRL_HFLE) -#define _GENERIC_HFLE_WS_MASK _CMU_CTRL_HFLE_MASK -#define _GENERIC_HFLE_WS_SHIFT _CMU_CTRL_HFLE_SHIFT -#define GENERIC_HFLE_PRESC_REG CMU->HFCORECLKDIV -#define _GENERIC_HFLE_PRESC_MASK _CMU_HFCORECLKDIV_HFCORECLKLEDIV_MASK -#define _GENERIC_HFLE_PRESC_SHIFT _CMU_HFCORECLKDIV_HFCORECLKLEDIV_SHIFT -#elif defined(CMU_CTRL_WSHFLE) -#define _GENERIC_HFLE_WS_MASK _CMU_CTRL_WSHFLE_MASK -#define _GENERIC_HFLE_WS_SHIFT _CMU_CTRL_WSHFLE_SHIFT -#define GENERIC_HFLE_PRESC_REG CMU->HFPRESC -#define _GENERIC_HFLE_PRESC_MASK _CMU_HFPRESC_HFCLKLEPRESC_MASK -#define _GENERIC_HFLE_PRESC_SHIFT _CMU_HFPRESC_HFCLKLEPRESC_SHIFT -#endif - -/***************************************************************************//** - * @brief - * Set HFLE wait-states and HFCLKLE prescaler. - * - * @param[in] maxLeFreq - * Max LE frequency - ******************************************************************************/ -static void setHfLeConfig(uint32_t hfFreq) -{ - unsigned int hfleWs; - uint32_t hflePresc; - - /* Check for 1 bit fields. BUS_RegBitWrite() below are going to fail if the - fields are changed to more than 1 bit. */ - EFM_ASSERT((_GENERIC_HFLE_WS_MASK >> _GENERIC_HFLE_WS_SHIFT) == 0x1); - - /* - Enable HFLE wait-state if to allow access to LE peripherals when HFBUSCLK is - above maxLeFreq. - - Set HFLE prescaler. Allowed HFLE clock frequency is maxLeFreq. */ - - hfleWs = 1; - if (hfFreq <= CMU_MAX_FREQ_HFLE) { - hfleWs = 0; - hflePresc = 0; - } else if (hfFreq <= (2 * CMU_MAX_FREQ_HFLE)) { - hflePresc = 1; - } else { - hflePresc = 2; - } - BUS_RegBitWrite(&CMU->CTRL, _GENERIC_HFLE_WS_SHIFT, hfleWs); - GENERIC_HFLE_PRESC_REG = (GENERIC_HFLE_PRESC_REG & ~_GENERIC_HFLE_PRESC_MASK) - | (hflePresc << _GENERIC_HFLE_PRESC_SHIFT); -} - -#if defined(_CMU_CTRL_HFLE_MASK) -/***************************************************************************//** - * @brief - * Get HFLE wait-state configuration. - * - * @return - * Current wait-state configuration. - ******************************************************************************/ -static uint32_t getHfLeConfig(void) -{ - uint32_t ws = BUS_RegBitRead(&CMU->CTRL, _GENERIC_HFLE_WS_SHIFT); - return ws; -} -#endif -#endif - -/***************************************************************************//** - * @brief - * Get the AUX clock frequency. Used by MSC flash programming and LESENSE, - * by default also as debug clock. - * - * @return - * AUX Frequency in Hz - ******************************************************************************/ -static uint32_t auxClkGet(void) -{ - uint32_t ret; - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) - ret = auxHfrcoFreq; - -#elif defined(_CMU_AUXHFRCOCTRL_BAND_MASK) - /* All series 0 families except EFM32G */ - switch (CMU->AUXHFRCOCTRL & _CMU_AUXHFRCOCTRL_BAND_MASK) { - case CMU_AUXHFRCOCTRL_BAND_1MHZ: - if ( SYSTEM_GetProdRev() >= 19 ) { - ret = 1200000; - } else { - ret = 1000000; - } - break; - - case CMU_AUXHFRCOCTRL_BAND_7MHZ: - if ( SYSTEM_GetProdRev() >= 19 ) { - ret = 6600000; - } else { - ret = 7000000; - } - break; - - case CMU_AUXHFRCOCTRL_BAND_11MHZ: - ret = 11000000; - break; - - case CMU_AUXHFRCOCTRL_BAND_14MHZ: - ret = 14000000; - break; - - case CMU_AUXHFRCOCTRL_BAND_21MHZ: - ret = 21000000; - break; - -#if defined(_CMU_AUXHFRCOCTRL_BAND_28MHZ) - case CMU_AUXHFRCOCTRL_BAND_28MHZ: - ret = 28000000; - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - -#else - /* Gecko has a fixed 14Mhz AUXHFRCO clock */ - ret = 14000000; - -#endif - - return ret; -} - -#if defined (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK) \ - || defined (_CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK) -/***************************************************************************//** - * @brief - * Get the HFSRCCLK frequency. - * - * @return - * HFSRCCLK Frequency in Hz - ******************************************************************************/ -static uint32_t hfSrcClkGet(void) -{ - uint32_t ret; - - ret = SystemHFClockGet(); - return ret * (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT)); -} -#endif - -/***************************************************************************//** - * @brief - * Get the Debug Trace clock frequency - * - * @return - * Debug Trace frequency in Hz - ******************************************************************************/ -static uint32_t dbgClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - clk = CMU_ClockSelectGet(cmuClock_DBG); - - switch (clk) { - case cmuSelect_HFCLK: - ret = SystemHFClockGet(); - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} - -#if defined(_CMU_ADCCTRL_MASK) -/***************************************************************************//** - * @brief - * Get the ADC n asynchronous clock frequency - * - * @return - * ADC n asynchronous frequency in Hz - ******************************************************************************/ -static uint32_t adcAsyncClkGet(uint32_t adc) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - switch (adc) { - case 0: - clk = CMU_ClockSelectGet(cmuClock_ADC0ASYNC); - break; - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case 1: - clk = CMU_ClockSelectGet(cmuClock_ADC1ASYNC); - break; -#endif - - default: - EFM_ASSERT(0); - return 0; - } - - switch (clk) { - case cmuSelect_Disabled: - ret = 0; - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_HFSRCCLK: - ret = hfSrcClkGet(); - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -#if defined(_CMU_SDIOCTRL_MASK) -/***************************************************************************//** - * @brief - * Get the SDIO reference clock frequency - * - * @return - * SDIO reference clock frequency in Hz - ******************************************************************************/ -static uint32_t sdioRefClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - clk = CMU_ClockSelectGet(cmuClock_SDIOREF); - - switch (clk) { - case cmuSelect_HFRCO: - ret = SystemHfrcoFreq; - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -#if defined(_CMU_QSPICTRL_MASK) -/***************************************************************************//** - * @brief - * Get the QSPI n reference clock frequency - * - * @return - * QSPI n reference clock frequency in Hz - ******************************************************************************/ -static uint32_t qspiRefClkGet(uint32_t qspi) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - switch (qspi) { - case 0: - clk = CMU_ClockSelectGet(cmuClock_QSPI0REF); - break; - - default: - EFM_ASSERT(0); - return 0; - } - - switch (clk) { - case cmuSelect_HFRCO: - ret = SystemHfrcoFreq; - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -#if defined(USBR_CLOCK_PRESENT) -/***************************************************************************//** - * @brief - * Get the USB rate clock frequency - * - * @return - * USB rate clock frequency in Hz - ******************************************************************************/ -static uint32_t usbRateClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - clk = CMU_ClockSelectGet(cmuClock_USBR); - - switch (clk) { - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_HFXOX2: - ret = 2u * SystemHFXOClockGet(); - break; - - case cmuSelect_HFRCO: - ret = SystemHfrcoFreq; - break; - - case cmuSelect_LFXO: - ret = SystemLFXOClockGet(); - break; - - case cmuSelect_LFRCO: - ret = SystemLFRCOClockGet(); - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -/***************************************************************************//** - * @brief - * Configure flash access wait states in order to support given core clock - * frequency. - * - * @param[in] coreFreq - * Core clock frequency to configure flash wait-states for - * - * @param[in] vscale - * Voltage Scale level. Supported levels are 0 and 2 where 0 is the default. - ******************************************************************************/ -static void flashWaitStateControl(uint32_t coreFreq, int vscale) -{ - uint32_t mode; - bool mscLocked; -#if defined(MSC_READCTRL_MODE_WS0SCBTP) - bool scbtpEn; /* Suppressed Conditional Branch Target Prefetch setting. */ -#endif - (void) vscale; /* vscale parameter is only used on some devices */ - - /* Make sure the MSC is unlocked */ - mscLocked = MSC->LOCK; - MSC->LOCK = MSC_UNLOCK_CODE; - - /* Get mode and SCBTP enable */ - mode = MSC->READCTRL & _MSC_READCTRL_MODE_MASK; -#if defined(MSC_READCTRL_MODE_WS0SCBTP) - /* Devices with MODE and SCBTP in same register field */ - switch (mode) { - case MSC_READCTRL_MODE_WS0: - case MSC_READCTRL_MODE_WS1: -#if defined(MSC_READCTRL_MODE_WS2) - case MSC_READCTRL_MODE_WS2: -#endif - scbtpEn = false; - break; - - default: /* WSxSCBTP */ - scbtpEn = true; - break; - } - - /* Set mode based on the core clock frequency and SCBTP enable */ - if (false) { - } -#if defined(MSC_READCTRL_MODE_WS2) - else if (coreFreq > CMU_MAX_FREQ_1WS) { - mode = (scbtpEn ? MSC_READCTRL_MODE_WS2SCBTP : MSC_READCTRL_MODE_WS2); - } -#endif - else if ((coreFreq <= CMU_MAX_FREQ_1WS) && (coreFreq > CMU_MAX_FREQ_0WS)) { - mode = (scbtpEn ? MSC_READCTRL_MODE_WS1SCBTP : MSC_READCTRL_MODE_WS1); - } else { - mode = (scbtpEn ? MSC_READCTRL_MODE_WS0SCBTP : MSC_READCTRL_MODE_WS0); - } - -#elif defined(_SILICON_LABS_32B_SERIES_1) && defined(_EMU_STATUS_VSCALE_MASK) - - /* These devices have specific requirements on the supported flash wait state - * depending on frequency and voltage scale level. */ - uint32_t i; - for (i = 0; i < FLASH_WS_TABLE_ENTRIES; i++) { - if ((flashWsTable[i].vscale == vscale) - && (coreFreq <= flashWsTable[i].maxFreq)) { - break; // found matching entry - } - } - - if (i == FLASH_WS_TABLE_ENTRIES) { - EFM_ASSERT(false); - mode = 3; // worst case flash wait state for unsupported cases - } else { - mode = flashWsTable[i].ws; - } - mode = mode << _MSC_READCTRL_MODE_SHIFT; - -#else - /* Devices where MODE and SCBTP are in separate fields and where the device - * either does not support voltage scale or where the voltage scale does - * not impact flash wait state configuration. */ - if (coreFreq <= CMU_MAX_FREQ_0WS) { - mode = 0; - } else if (coreFreq <= CMU_MAX_FREQ_1WS) { - mode = 1; - } -#if defined(MSC_READCTRL_MODE_WS2) - else if (coreFreq <= CMU_MAX_FREQ_2WS) { - mode = 2; - } -#endif -#if defined(MSC_READCTRL_MODE_WS3) - else if (coreFreq <= CMU_MAX_FREQ_3WS) { - mode = 3; - } -#endif - mode = mode << _MSC_READCTRL_MODE_SHIFT; - -#endif - - /* BUS_RegMaskedWrite cannot be used here as it would temporarily set the - mode field to WS0 */ - MSC->READCTRL = (MSC->READCTRL & ~_MSC_READCTRL_MODE_MASK) | mode; - - if (mscLocked) { - MSC->LOCK = 0; - } -} - -/***************************************************************************//** - * @brief - * Configure flash access wait states to most conservative setting for - * this target. Retain SCBTP (Suppressed Conditional Branch Target Prefetch) - * setting. - ******************************************************************************/ -static void flashWaitStateMax(void) -{ - flashWaitStateControl(SystemMaxCoreClockGet(), 0); -} - -#if defined(_MSC_RAMCTRL_RAMWSEN_MASK) -/***************************************************************************//** - * @brief - * Configure RAM access wait states in order to support given core clock - * frequency. - * - * @param[in] coreFreq - * Core clock frequency to configure RAM wait-states for - * - * @param[in] vscale - * Voltage Scale level. Supported levels are 0 and 2 where 0 is the default. - ******************************************************************************/ -static void setRamWaitState(uint32_t coreFreq, int vscale) -{ - uint32_t limit = 38000000; - if (vscale == 2) { - limit = 16000000; - } - - if (coreFreq > limit) { - BUS_RegMaskedSet(&MSC->RAMCTRL, (MSC_RAMCTRL_RAMWSEN - | MSC_RAMCTRL_RAM1WSEN - | MSC_RAMCTRL_RAM2WSEN)); - } else { - BUS_RegMaskedClear(&MSC->RAMCTRL, (MSC_RAMCTRL_RAMWSEN - | MSC_RAMCTRL_RAM1WSEN - | MSC_RAMCTRL_RAM2WSEN)); - } -} -#endif - -#if defined(_MSC_CTRL_WAITMODE_MASK) -/***************************************************************************//** - * @brief - * Configure wait state for peripheral accesses over the bus to support - * given bus clock frequency. - * - * @param[in] busFreq - * peripheral bus clock frequency to configure wait-states for - * - * @param[in] vscale - * The voltage scale to configure wait-states for. Expected values are - * 0 or 2. - * - * @li 0 = 1.2 V (VSCALE2) - * @li 2 = 1.0 V (VSCALE0) - * ******************************************************************************/ -static void setBusWaitState(uint32_t busFreq, int vscale) -{ - if ((busFreq > 50000000) && (vscale == 0)) { - BUS_RegMaskedSet(&MSC->CTRL, MSC_CTRL_WAITMODE_WS1); - } else { - BUS_RegMaskedClear(&MSC->CTRL, MSC_CTRL_WAITMODE_WS1); - } -} -#endif - -/***************************************************************************//** - * @brief - * Configure various wait states necessary to switch to a certain frequency - * and a certain voltage scale. - * - * @details - * This function will setup the necessary flash, bus and RAM wait states. - * Updating the wait state configuration must be done before - * increasing the clock frequency, and it must be done after decreasing the - * clock frequency. Updating the wait state configuration must be done before - * core voltage is decreased, and it must be done after a core voltage is - * increased. - * - * @param[in] coreFreq - * Core clock frequency to configure wait-states for. - * - * @param[in] vscale - * The voltage scale to configure wait-states for. Expected values are - * 0 or 2, higher number is lower voltage. - * - * @li 0 = 1.2 V (VSCALE2) - * @li 2 = 1.0 V (VSCALE0) - * - ******************************************************************************/ -void CMU_UpdateWaitStates(uint32_t freq, int vscale) -{ - flashWaitStateControl(freq, vscale); -#if defined(_MSC_RAMCTRL_RAMWSEN_MASK) - setRamWaitState(freq, vscale); -#endif -#if defined(_MSC_CTRL_WAITMODE_MASK) - setBusWaitState(freq, vscale); -#endif -} - -#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK) -/***************************************************************************//** - * @brief - * Return upper value for CMU_HFXOSTEADYSTATECTRL_REGISH - ******************************************************************************/ -static uint32_t getRegIshUpperVal(uint32_t steadyStateRegIsh) -{ - uint32_t regIshUpper; - const uint32_t upperMax = _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK - >> _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_SHIFT; - /* Add 3 as specified in register description for CMU_HFXOSTEADYSTATECTRL_REGISHUPPER. */ - regIshUpper = SL_MIN(steadyStateRegIsh + 3, upperMax); - regIshUpper <<= _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_SHIFT; - return regIshUpper; -} -#endif - -#if defined(_CMU_HFXOCTRL_MASK) -/***************************************************************************//** - * @brief - * Get the HFXO tuning mode - * - * @return - * The current HFXO tuning mode from the HFXOCTRL register. - ******************************************************************************/ -__STATIC_INLINE uint32_t getHfxoTuningMode(void) -{ -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - return (CMU->HFXOCTRL & _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK); -#else - return (CMU->HFXOCTRL & _CMU_HFXOCTRL_PEAKDETMODE_MASK); -#endif -} - -/***************************************************************************//** - * @brief - * Set the HFXO tuning mode - * - * @param[in] mode - * the new HFXO tuning mode, this can be HFXO_TUNING_MODE_AUTO or - * HFXO_TUNING_MODE_CMD. - ******************************************************************************/ -__STATIC_INLINE void setHfxoTuningMode(uint32_t mode) -{ -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) | mode; -#else - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETMODE_MASK) | mode; -#endif -} -#endif - -/***************************************************************************//** - * @brief - * Get the LFnCLK frequency based on current configuration. - * - * @param[in] lfClkBranch - * Selected LF branch - * - * @return - * The LFnCLK frequency in Hz. If no LFnCLK is selected (disabled), 0 is - * returned. - ******************************************************************************/ -static uint32_t lfClkGet(CMU_Clock_TypeDef lfClkBranch) -{ - uint32_t sel; - uint32_t ret = 0; - - switch (lfClkBranch) { - case cmuClock_LFA: - case cmuClock_LFB: -#if defined(_CMU_LFCCLKEN0_MASK) - case cmuClock_LFC: -#endif -#if defined(_CMU_LFECLKSEL_MASK) - case cmuClock_LFE: -#endif - break; - - default: - EFM_ASSERT(0); - break; - } - - sel = CMU_ClockSelectGet(lfClkBranch); - - /* Get clock select field */ - switch (lfClkBranch) { - case cmuClock_LFA: -#if defined(_CMU_LFCLKSEL_MASK) - sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFA_MASK) >> _CMU_LFCLKSEL_LFA_SHIFT; -#elif defined(_CMU_LFACLKSEL_MASK) - sel = (CMU->LFACLKSEL & _CMU_LFACLKSEL_LFA_MASK) >> _CMU_LFACLKSEL_LFA_SHIFT; -#else - EFM_ASSERT(0); -#endif - break; - - case cmuClock_LFB: -#if defined(_CMU_LFCLKSEL_MASK) - sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFB_MASK) >> _CMU_LFCLKSEL_LFB_SHIFT; -#elif defined(_CMU_LFBCLKSEL_MASK) - sel = (CMU->LFBCLKSEL & _CMU_LFBCLKSEL_LFB_MASK) >> _CMU_LFBCLKSEL_LFB_SHIFT; -#else - EFM_ASSERT(0); -#endif - break; - -#if defined(_CMU_LFCCLKEN0_MASK) - case cmuClock_LFC: -#if defined(_CMU_LFCLKSEL_LFC_MASK) - sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFC_MASK) >> _CMU_LFCLKSEL_LFC_SHIFT; -#elif defined(_CMU_LFCCLKSEL_LFC_MASK) - sel = (CMU->LFCCLKSEL & _CMU_LFCCLKSEL_LFC_MASK) >> _CMU_LFCCLKSEL_LFC_SHIFT; -#else - EFM_ASSERT(0); -#endif - break; -#endif - -#if defined(_CMU_LFECLKSEL_MASK) - case cmuClock_LFE: - sel = (CMU->LFECLKSEL & _CMU_LFECLKSEL_LFE_MASK) >> _CMU_LFECLKSEL_LFE_SHIFT; - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - - /* Get clock frequency */ -#if defined(_CMU_LFCLKSEL_MASK) - switch (sel) { - case _CMU_LFCLKSEL_LFA_LFRCO: - ret = SystemLFRCOClockGet(); - break; - - case _CMU_LFCLKSEL_LFA_LFXO: - ret = SystemLFXOClockGet(); - break; - -#if defined(_CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2) - case _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2: -#if defined(CMU_MAX_FREQ_HFLE) - /* HFLE bit is or'ed by hardware with HFCORECLKLEDIV to reduce the - * frequency of CMU_HFCORECLKLEDIV2. */ - ret = SystemCoreClockGet() / (1U << (getHfLeConfig() + 1)); -#else - ret = SystemCoreClockGet() / 2U; -#endif - break; -#endif - - case _CMU_LFCLKSEL_LFA_DISABLED: - ret = 0; -#if defined(CMU_LFCLKSEL_LFAE) - /* Check LF Extended bit setting for LFA or LFB ULFRCO clock */ - if ((lfClkBranch == cmuClock_LFA) || (lfClkBranch == cmuClock_LFB)) { - if (CMU->LFCLKSEL >> (lfClkBranch == cmuClock_LFA - ? _CMU_LFCLKSEL_LFAE_SHIFT - : _CMU_LFCLKSEL_LFBE_SHIFT)) { - ret = SystemULFRCOClockGet(); - } - } -#endif - break; - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } -#endif /* _CMU_LFCLKSEL_MASK */ - -#if defined(_CMU_LFACLKSEL_MASK) - switch (sel) { - case _CMU_LFACLKSEL_LFA_LFRCO: - ret = SystemLFRCOClockGet(); - break; - - case _CMU_LFACLKSEL_LFA_LFXO: - ret = SystemLFXOClockGet(); - break; - - case _CMU_LFACLKSEL_LFA_ULFRCO: - ret = SystemULFRCOClockGet(); - break; - -#if defined(CMU_LFACLKSEL_LFA_PLFRCO) - case _CMU_LFACLKSEL_LFA_PLFRCO: - ret = SystemLFRCOClockGet(); - break; -#endif - -#if defined(_CMU_LFACLKSEL_LFA_HFCLKLE) - case _CMU_LFACLKSEL_LFA_HFCLKLE: - ret = SystemCoreClockGet() - / CMU_Log2ToDiv(((CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) - >> _CMU_HFPRESC_HFCLKLEPRESC_SHIFT) + 1); - break; -#elif defined(_CMU_LFBCLKSEL_LFB_HFCLKLE) - case _CMU_LFBCLKSEL_LFB_HFCLKLE: - ret = SystemCoreClockGet() - / CMU_Log2ToDiv(((CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) - >> _CMU_HFPRESC_HFCLKLEPRESC_SHIFT) + 1); - break; -#endif - - case _CMU_LFACLKSEL_LFA_DISABLED: - ret = 0; - break; - } -#endif - - return ret; -} - -/***************************************************************************//** - * @brief - * Wait for ongoing sync of register(s) to low frequency domain to complete. - * - * @param[in] mask - * Bitmask corresponding to SYNCBUSY register defined bits, indicating - * registers that must complete any ongoing synchronization. - ******************************************************************************/ -__STATIC_INLINE void syncReg(uint32_t mask) -{ - /* Avoid deadlock if modifying the same register twice when freeze mode is */ - /* activated. */ - if (CMU->FREEZE & CMU_FREEZE_REGFREEZE) { - return; - } - - /* Wait for any pending previous write operation to have been completed */ - /* in low frequency domain */ - while (CMU->SYNCBUSY & mask) { - } -} - -#if defined(USBC_CLOCK_PRESENT) -/***************************************************************************//** - * @brief - * Get the USBC frequency - * - * @return - * USBC frequency in Hz - ******************************************************************************/ -static uint32_t usbCClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - clk = CMU_ClockSelectGet(cmuClock_USBC); - - switch (clk) { - case cmuSelect_LFXO: - ret = SystemLFXOClockGet(); - break; - case cmuSelect_LFRCO: - ret = SystemLFRCOClockGet(); - break; -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; -#endif - case cmuSelect_HFCLK: - ret = SystemHFClockGet(); - break; - default: - /* Clock is not enabled */ - ret = 0; - break; - } - return ret; -} -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -#if defined(_CMU_AUXHFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Get AUXHFRCO band in use. - * - * @return - * AUXHFRCO band in use. - ******************************************************************************/ -CMU_AUXHFRCOBand_TypeDef CMU_AUXHFRCOBandGet(void) -{ - return (CMU_AUXHFRCOBand_TypeDef)((CMU->AUXHFRCOCTRL - & _CMU_AUXHFRCOCTRL_BAND_MASK) - >> _CMU_AUXHFRCOCTRL_BAND_SHIFT); -} -#endif /* _CMU_AUXHFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Set AUXHFRCO band and the tuning value based on the value in the - * calibration table made during production. - * - * @param[in] band - * AUXHFRCO band to activate. - ******************************************************************************/ -void CMU_AUXHFRCOBandSet(CMU_AUXHFRCOBand_TypeDef band) -{ - uint32_t tuning; - - /* Read tuning value from calibration table */ - switch (band) { - case cmuAUXHFRCOBand_1MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND1_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND1_SHIFT; - break; - - case cmuAUXHFRCOBand_7MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND7_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND7_SHIFT; - break; - - case cmuAUXHFRCOBand_11MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND11_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND11_SHIFT; - break; - - case cmuAUXHFRCOBand_14MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND14_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND14_SHIFT; - break; - - case cmuAUXHFRCOBand_21MHz: - tuning = (DEVINFO->AUXHFRCOCAL1 & _DEVINFO_AUXHFRCOCAL1_BAND21_MASK) - >> _DEVINFO_AUXHFRCOCAL1_BAND21_SHIFT; - break; - -#if defined(_CMU_AUXHFRCOCTRL_BAND_28MHZ) - case cmuAUXHFRCOBand_28MHz: - tuning = (DEVINFO->AUXHFRCOCAL1 & _DEVINFO_AUXHFRCOCAL1_BAND28_MASK) - >> _DEVINFO_AUXHFRCOCAL1_BAND28_SHIFT; - break; -#endif - - default: - EFM_ASSERT(0); - return; - } - - /* Set band/tuning */ - CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL - & ~(_CMU_AUXHFRCOCTRL_BAND_MASK - | _CMU_AUXHFRCOCTRL_TUNING_MASK)) - | (band << _CMU_AUXHFRCOCTRL_BAND_SHIFT) - | (tuning << _CMU_AUXHFRCOCTRL_TUNING_SHIFT); -} -#endif /* _CMU_AUXHFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -/**************************************************************************//** - * @brief - * Get the AUXHFRCO frequency calibration word in DEVINFO - * - * @param[in] freq - * Frequency in Hz - * - * @return - * AUXHFRCO calibration word for a given frequency - *****************************************************************************/ -static uint32_t CMU_AUXHFRCODevinfoGet(CMU_AUXHFRCOFreq_TypeDef freq) -{ - switch (freq) { - /* 1, 2 and 4MHz share the same calibration word */ - case cmuAUXHFRCOFreq_1M0Hz: - case cmuAUXHFRCOFreq_2M0Hz: - case cmuAUXHFRCOFreq_4M0Hz: - return DEVINFO->AUXHFRCOCAL0; - - case cmuAUXHFRCOFreq_7M0Hz: - return DEVINFO->AUXHFRCOCAL3; - - case cmuAUXHFRCOFreq_13M0Hz: - return DEVINFO->AUXHFRCOCAL6; - - case cmuAUXHFRCOFreq_16M0Hz: - return DEVINFO->AUXHFRCOCAL7; - - case cmuAUXHFRCOFreq_19M0Hz: - return DEVINFO->AUXHFRCOCAL8; - - case cmuAUXHFRCOFreq_26M0Hz: - return DEVINFO->AUXHFRCOCAL10; - - case cmuAUXHFRCOFreq_32M0Hz: - return DEVINFO->AUXHFRCOCAL11; - - case cmuAUXHFRCOFreq_38M0Hz: - return DEVINFO->AUXHFRCOCAL12; - -#if defined(DEVINFO_AUXHFRCOCAL14) - case cmuAUXHFRCOFreq_48M0Hz: - return DEVINFO->AUXHFRCOCAL13; - - case cmuAUXHFRCOFreq_50M0Hz: - return DEVINFO->AUXHFRCOCAL14; -#endif - - default: /* cmuAUXHFRCOFreq_UserDefined */ - return 0; - } -} -#endif /* _CMU_AUXHFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -/***************************************************************************//** - * @brief - * Get current AUXHFRCO frequency. - * - * @return - * AUXHFRCO frequency - ******************************************************************************/ -CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOBandGet(void) -{ - return auxHfrcoFreq; -} -#endif /* _CMU_AUXHFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -/***************************************************************************//** - * @brief - * Set AUXHFRCO calibration for the selected target frequency. - * - * @param[in] setFreq - * AUXHFRCO frequency to set - ******************************************************************************/ -void CMU_AUXHFRCOBandSet(CMU_AUXHFRCOFreq_TypeDef setFreq) -{ - uint32_t freqCal; - - /* Get DEVINFO index, set global auxHfrcoFreq */ - freqCal = CMU_AUXHFRCODevinfoGet(setFreq); - EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); - auxHfrcoFreq = setFreq; - - /* Wait for any previous sync to complete, and then set calibration data - for the selected frequency. */ - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT)) ; - - /* Set divider in AUXHFRCOCTRL for 1, 2 and 4MHz */ - switch (setFreq) { - case cmuAUXHFRCOFreq_1M0Hz: - freqCal = (freqCal & ~_CMU_AUXHFRCOCTRL_CLKDIV_MASK) - | CMU_AUXHFRCOCTRL_CLKDIV_DIV4; - break; - - case cmuAUXHFRCOFreq_2M0Hz: - freqCal = (freqCal & ~_CMU_AUXHFRCOCTRL_CLKDIV_MASK) - | CMU_AUXHFRCOCTRL_CLKDIV_DIV2; - break; - - case cmuAUXHFRCOFreq_4M0Hz: - freqCal = (freqCal & ~_CMU_AUXHFRCOCTRL_CLKDIV_MASK) - | CMU_AUXHFRCOCTRL_CLKDIV_DIV1; - break; - - default: - break; - } - CMU->AUXHFRCOCTRL = freqCal; -} -#endif /* _CMU_AUXHFRCOCTRL_FREQRANGE_MASK */ - -/***************************************************************************//** - * @brief - * Calibrate clock. - * - * @details - * Run a calibration for HFCLK against a selectable reference clock. Please - * refer to the reference manual, CMU chapter, for further details. - * - * @note - * This function will not return until calibration measurement is completed. - * - * @param[in] HFCycles - * The number of HFCLK cycles to run calibration. Increasing this number - * increases precision, but the calibration will take more time. - * - * @param[in] ref - * The reference clock used to compare HFCLK with. - * - * @return - * The number of ticks the reference clock after HFCycles ticks on the HF - * clock. - ******************************************************************************/ -uint32_t CMU_Calibrate(uint32_t HFCycles, CMU_Osc_TypeDef ref) -{ - EFM_ASSERT(HFCycles <= (_CMU_CALCNT_CALCNT_MASK >> _CMU_CALCNT_CALCNT_SHIFT)); - - /* Set reference clock source */ - switch (ref) { - case cmuOsc_LFXO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_LFXO; - break; - - case cmuOsc_LFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_LFRCO; - break; - - case cmuOsc_HFXO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_HFXO; - break; - - case cmuOsc_HFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_HFRCO; - break; - - case cmuOsc_AUXHFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_AUXHFRCO; - break; - -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuOsc_USHFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_USHFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - return 0; - } - - /* Set top value */ - CMU->CALCNT = HFCycles; - - /* Start calibration */ - CMU->CMD = CMU_CMD_CALSTART; - -#if defined(CMU_STATUS_CALRDY) - /* Wait until calibration completes */ - while (!BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALRDY_SHIFT)) { - } -#else - /* Wait until calibration completes */ - while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT)) { - } -#endif - - return CMU->CALCNT; -} - -#if defined(_CMU_CALCTRL_UPSEL_MASK) && defined(_CMU_CALCTRL_DOWNSEL_MASK) -/***************************************************************************//** - * @brief - * Configure clock calibration - * - * @details - * Configure a calibration for a selectable clock source against another - * selectable reference clock. - * Refer to the reference manual, CMU chapter, for further details. - * - * @note - * After configuration, a call to CMU_CalibrateStart() is required, and - * the resulting calibration value can be read out with the - * CMU_CalibrateCountGet() function call. - * - * @param[in] downCycles - * The number of downSel clock cycles to run calibration. Increasing this - * number increases precision, but the calibration will take more time. - * - * @param[in] downSel - * The clock which will be counted down downCycles - * - * @param[in] upSel - * The reference clock, the number of cycles generated by this clock will - * be counted and added up, the result can be given with the - * CMU_CalibrateCountGet() function call. - ******************************************************************************/ -void CMU_CalibrateConfig(uint32_t downCycles, CMU_Osc_TypeDef downSel, - CMU_Osc_TypeDef upSel) -{ - /* Keep untouched configuration settings */ - uint32_t calCtrl = CMU->CALCTRL - & ~(_CMU_CALCTRL_UPSEL_MASK | _CMU_CALCTRL_DOWNSEL_MASK); - - /* 20 bits of precision to calibration count register */ - EFM_ASSERT(downCycles <= (_CMU_CALCNT_CALCNT_MASK >> _CMU_CALCNT_CALCNT_SHIFT)); - - /* Set down counting clock source - down counter */ - switch (downSel) { - case cmuOsc_LFXO: - calCtrl |= CMU_CALCTRL_DOWNSEL_LFXO; - break; - - case cmuOsc_LFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_LFRCO; - break; - - case cmuOsc_HFXO: - calCtrl |= CMU_CALCTRL_DOWNSEL_HFXO; - break; - - case cmuOsc_HFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_HFRCO; - break; - - case cmuOsc_AUXHFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_AUXHFRCO; - break; - -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuOsc_USHFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_USHFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - - /* Set top value to be counted down by the downSel clock */ - CMU->CALCNT = downCycles; - - /* Set reference clock source - up counter */ - switch (upSel) { - case cmuOsc_LFXO: - calCtrl |= CMU_CALCTRL_UPSEL_LFXO; - break; - - case cmuOsc_LFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_LFRCO; - break; - - case cmuOsc_HFXO: - calCtrl |= CMU_CALCTRL_UPSEL_HFXO; - break; - - case cmuOsc_HFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_HFRCO; - break; - - case cmuOsc_AUXHFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_AUXHFRCO; - break; - -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuOsc_USHFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_USHFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - - CMU->CALCTRL = calCtrl; -} -#endif - -/***************************************************************************//** - * @brief - * Get calibration count register - * @note - * If continuous calibrartion mode is active, calibration busy will almost - * always be off, and we just need to read the value, where the normal case - * would be that this function call has been triggered by the CALRDY - * interrupt flag. - * @return - * Calibration count, the number of UPSEL clocks (see CMU_CalibrateConfig) - * in the period of DOWNSEL oscillator clock cycles configured by a previous - * write operation to CMU->CALCNT - ******************************************************************************/ -uint32_t CMU_CalibrateCountGet(void) -{ - /* Wait until calibration completes, UNLESS continuous calibration mode is */ - /* active */ -#if defined(CMU_CALCTRL_CONT) - if (!BUS_RegBitRead(&CMU->CALCTRL, _CMU_CALCTRL_CONT_SHIFT)) { -#if defined(CMU_STATUS_CALRDY) - /* Wait until calibration completes */ - while (!BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALRDY_SHIFT)) { - } -#else - /* Wait until calibration completes */ - while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT)) { - } -#endif - } -#else - while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT)) { - } -#endif - return CMU->CALCNT; -} - -/***************************************************************************//** - * @brief - * Get clock divisor/prescaler. - * - * @param[in] clock - * Clock point to get divisor/prescaler for. Notice that not all clock points - * have a divisor/prescaler. Please refer to CMU overview in reference manual. - * - * @return - * The current clock point divisor/prescaler. 1 is returned - * if @p clock specifies a clock point without a divisor/prescaler. - ******************************************************************************/ -CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) -{ -#if defined(_SILICON_LABS_32B_SERIES_1) - return 1 + (uint32_t)CMU_ClockPrescGet(clock); - -#elif defined(_SILICON_LABS_32B_SERIES_0) - uint32_t divReg; - CMU_ClkDiv_TypeDef ret; - - /* Get divisor reg id */ - divReg = (clock >> CMU_DIV_REG_POS) & CMU_DIV_REG_MASK; - - switch (divReg) { -#if defined(_CMU_CTRL_HFCLKDIV_MASK) - case CMU_HFCLKDIV_REG: - ret = 1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK) - >> _CMU_CTRL_HFCLKDIV_SHIFT); - break; -#endif - - case CMU_HFPERCLKDIV_REG: - ret = (CMU_ClkDiv_TypeDef)((CMU->HFPERCLKDIV - & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - >> _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; - - case CMU_HFCORECLKDIV_REG: - ret = (CMU_ClkDiv_TypeDef)((CMU->HFCORECLKDIV - & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) - >> _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { - case cmuClock_RTC: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) - >> _CMU_LFAPRESC0_RTC_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; - -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LCD_MASK) - case cmuClock_LCDpre: - ret = (CMU_ClkDiv_TypeDef)(((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT) - + CMU_DivToLog2(cmuClkDiv_16)); - ret = CMU_Log2ToDiv(ret); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LESENSE_MASK) - case cmuClock_LESENSE: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) - >> _CMU_LFAPRESC0_LESENSE_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - - default: - EFM_ASSERT(0); - ret = cmuClkDiv_1; - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - - default: - EFM_ASSERT(0); - ret = cmuClkDiv_1; - break; - } - break; - - default: - EFM_ASSERT(0); - ret = cmuClkDiv_1; - break; - } - - return ret; -#endif -} - -/***************************************************************************//** - * @brief - * Set clock divisor/prescaler. - * - * @note - * If setting a LF clock prescaler, synchronization into the low frequency - * domain is required. If the same register is modified before a previous - * update has completed, this function will stall until the previous - * synchronization has completed. Please refer to CMU_FreezeEnable() for - * a suggestion on how to reduce stalling time in some use cases. - * - * @param[in] clock - * Clock point to set divisor/prescaler for. Notice that not all clock points - * have a divisor/prescaler, please refer to CMU overview in the reference - * manual. - * - * @param[in] div - * The clock divisor to use (<= cmuClkDiv_512). - ******************************************************************************/ -void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) -{ -#if defined(_SILICON_LABS_32B_SERIES_1) - CMU_ClockPrescSet(clock, (CMU_ClkPresc_TypeDef)(div - 1)); - -#elif defined(_SILICON_LABS_32B_SERIES_0) - uint32_t freq; - uint32_t divReg; - - /* Get divisor reg id */ - divReg = (clock >> CMU_DIV_REG_POS) & CMU_DIV_REG_MASK; - - switch (divReg) { -#if defined(_CMU_CTRL_HFCLKDIV_MASK) - case CMU_HFCLKDIV_REG: - EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_8)); - - /* Configure worst case wait states for flash access before setting divisor */ - flashWaitStateMax(); - - /* Set divider */ - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFCLKDIV_MASK) - | ((div - 1) << _CMU_CTRL_HFCLKDIV_SHIFT); - - /* Update CMSIS core clock variable */ - /* (The function will update the global variable) */ - freq = SystemCoreClockGet(); - - /* Optimize flash access wait state setting for current core clk */ - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - break; -#endif - - case CMU_HFPERCLKDIV_REG: - EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - CMU->HFPERCLKDIV = (CMU->HFPERCLKDIV & ~_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - | (div << _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT); - break; - - case CMU_HFCORECLKDIV_REG: - EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); - - /* Configure worst case wait states for flash access before setting divisor */ - flashWaitStateMax(); - -#if defined(CMU_MAX_FREQ_HFLE) - setHfLeConfig(SystemHFClockGet() / div); -#endif - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->HFCORECLKDIV = (CMU->HFCORECLKDIV - & ~_CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) - | (div << _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT); - - /* Update CMSIS core clock variable */ - /* (The function will update the global variable) */ - freq = SystemCoreClockGet(); - - /* Optimize wait state setting for current core clk */ - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { - case cmuClock_RTC: - EFM_ASSERT(div <= cmuClkDiv_32768); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTC_MASK) - | (div << _CMU_LFAPRESC0_RTC_SHIFT); - break; - -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - EFM_ASSERT(div <= cmuClkDiv_32768); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER0_MASK) - | (div << _CMU_LFAPRESC0_LETIMER0_SHIFT); - break; -#endif - -#if defined(LCD_PRESENT) - case cmuClock_LCDpre: - EFM_ASSERT((div >= cmuClkDiv_16) && (div <= cmuClkDiv_128)); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LCD_MASK) - | ((div - CMU_DivToLog2(cmuClkDiv_16)) - << _CMU_LFAPRESC0_LCD_SHIFT); - break; -#endif /* defined(LCD_PRESENT) */ - -#if defined(LESENSE_PRESENT) - case cmuClock_LESENSE: - EFM_ASSERT(div <= cmuClkDiv_8); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LESENSE_MASK) - | (div << _CMU_LFAPRESC0_LESENSE_SHIFT); - break; -#endif /* defined(LESENSE_PRESENT) */ - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - EFM_ASSERT(div <= cmuClkDiv_8); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART0_MASK) - | (((uint32_t)div) << _CMU_LFBPRESC0_LEUART0_SHIFT); - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - EFM_ASSERT(div <= cmuClkDiv_8); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART1_MASK) - | (((uint32_t)div) << _CMU_LFBPRESC0_LEUART1_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - default: - EFM_ASSERT(0); - break; - } -#endif -} - -/***************************************************************************//** - * @brief - * Enable/disable a clock. - * - * @details - * In general, module clocking is disabled after a reset. If a module - * clock is disabled, the registers of that module are not accessible and - * reading from such registers may return undefined values. Writing to - * registers of clock disabled modules have no effect. One should normally - * avoid accessing module registers of a module with a disabled clock. - * - * @note - * If enabling/disabling a LF clock, synchronization into the low frequency - * domain is required. If the same register is modified before a previous - * update has completed, this function will stall until the previous - * synchronization has completed. Please refer to CMU_FreezeEnable() for - * a suggestion on how to reduce stalling time in some use cases. - * - * @param[in] clock - * The clock to enable/disable. Notice that not all defined clock - * points have separate enable/disable control, please refer to CMU overview - * in reference manual. - * - * @param[in] enable - * @li true - enable specified clock. - * @li false - disable specified clock. - ******************************************************************************/ -void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) -{ - volatile uint32_t *reg; - uint32_t bit; - uint32_t sync = 0; - - /* Identify enable register */ - switch ((clock >> CMU_EN_REG_POS) & CMU_EN_REG_MASK) { -#if defined(_CMU_CTRL_HFPERCLKEN_MASK) - case CMU_CTRL_EN_REG: - reg = &CMU->CTRL; - break; -#endif - -#if defined(_CMU_HFCORECLKEN0_MASK) - case CMU_HFCORECLKEN0_EN_REG: - reg = &CMU->HFCORECLKEN0; -#if defined(CMU_MAX_FREQ_HFLE) - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); -#endif - break; -#endif - -#if defined(_CMU_HFBUSCLKEN0_MASK) - case CMU_HFBUSCLKEN0_EN_REG: - reg = &CMU->HFBUSCLKEN0; - break; -#endif - -#if defined(_CMU_HFPERCLKDIV_MASK) - case CMU_HFPERCLKDIV_EN_REG: - reg = &CMU->HFPERCLKDIV; - break; -#endif - - case CMU_HFPERCLKEN0_EN_REG: - reg = &CMU->HFPERCLKEN0; - break; - -#if defined(_CMU_HFPERCLKEN1_MASK) - case CMU_HFPERCLKEN1_EN_REG: - reg = &CMU->HFPERCLKEN1; - break; -#endif - - case CMU_LFACLKEN0_EN_REG: - reg = &CMU->LFACLKEN0; - sync = CMU_SYNCBUSY_LFACLKEN0; - break; - - case CMU_LFBCLKEN0_EN_REG: - reg = &CMU->LFBCLKEN0; - sync = CMU_SYNCBUSY_LFBCLKEN0; - break; - -#if defined(_CMU_LFCCLKEN0_MASK) - case CMU_LFCCLKEN0_EN_REG: - reg = &CMU->LFCCLKEN0; - sync = CMU_SYNCBUSY_LFCCLKEN0; - break; -#endif - -#if defined(_CMU_LFECLKEN0_MASK) - case CMU_LFECLKEN0_EN_REG: - reg = &CMU->LFECLKEN0; - sync = CMU_SYNCBUSY_LFECLKEN0; - break; -#endif - -#if defined(_CMU_SDIOCTRL_MASK) - case CMU_SDIOREF_EN_REG: - reg = &CMU->SDIOCTRL; - enable = !enable; - break; -#endif - -#if defined(_CMU_QSPICTRL_MASK) - case CMU_QSPI0REF_EN_REG: - reg = &CMU->QSPICTRL; - enable = !enable; - break; -#endif -#if defined(_CMU_USBCTRL_MASK) - case CMU_USBRCLK_EN_REG: - reg = &CMU->USBCTRL; - break; -#endif - - case CMU_PCNT_EN_REG: - reg = &CMU->PCNTCTRL; - break; - - default: /* Cannot enable/disable clock point */ - EFM_ASSERT(0); - return; - } - - /* Get bit position used to enable/disable */ - bit = (clock >> CMU_EN_BIT_POS) & CMU_EN_BIT_MASK; - - /* LF synchronization required? */ - if (sync) { - syncReg(sync); - } - - /* Set/clear bit as requested */ - BUS_RegBitWrite(reg, bit, enable); -} - -/***************************************************************************//** - * @brief - * Get clock frequency for a clock point. - * - * @param[in] clock - * Clock point to fetch frequency for. - * - * @return - * The current frequency in Hz. - ******************************************************************************/ -uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock) -{ - uint32_t ret; - - switch (clock & (CMU_CLK_BRANCH_MASK << CMU_CLK_BRANCH_POS)) { - case (CMU_HF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - break; - - case (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - /* Calculate frequency after HFPER divider. */ -#if defined(_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - ret >>= (CMU->HFPERCLKDIV & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - >> _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT; -#endif -#if defined(_CMU_HFPERPRESC_PRESC_MASK) - ret /= 1U + ((CMU->HFPERPRESC & _CMU_HFPERPRESC_PRESC_MASK) - >> _CMU_HFPERPRESC_PRESC_SHIFT); -#endif - break; - -#if defined(_SILICON_LABS_32B_SERIES_1) -#if defined(CRYPTO_PRESENT) \ - || defined(LDMA_PRESENT) \ - || defined(GPCRC_PRESENT) \ - || defined(PRS_PRESENT) \ - || defined(GPIO_PRESENT) - case (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - break; -#endif - - case (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - ret /= 1U + ((CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) - >> _CMU_HFCOREPRESC_PRESC_SHIFT); - break; - - case (CMU_HFEXP_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - ret /= 1U + ((CMU->HFEXPPRESC & _CMU_HFEXPPRESC_PRESC_MASK) - >> _CMU_HFEXPPRESC_PRESC_SHIFT); - break; -#endif - -#if defined(_SILICON_LABS_32B_SERIES_0) -#if defined(AES_PRESENT) \ - || defined(DMA_PRESENT) \ - || defined(EBI_PRESENT) \ - || defined(USB_PRESENT) - case (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - { - ret = SystemCoreClockGet(); - } break; -#endif -#endif - - case (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - break; - -#if defined(_CMU_LFACLKEN0_RTC_MASK) - case (CMU_RTC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) - >> _CMU_LFAPRESC0_RTC_SHIFT; - break; -#endif - -#if defined(_CMU_LFECLKEN0_RTCC_MASK) - case (CMU_RTCC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFE); - break; -#endif - -#if defined(_CMU_LFACLKEN0_LETIMER0_MASK) - case (CMU_LETIMER0_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT; -#else - ret /= CMU_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFACLKEN0_LCD_MASK) - case (CMU_LCDPRE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= ((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT) - + CMU_DivToLog2(cmuClkDiv_16); -#else - ret /= CMU_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT); -#endif - break; - -#if defined(_CMU_LCDCTRL_MASK) - case (CMU_LCD_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT; - ret /= 1U + ((CMU->LCDCTRL & _CMU_LCDCTRL_FDIV_MASK) - >> _CMU_LCDCTRL_FDIV_SHIFT); - break; -#endif -#endif - -#if defined(_CMU_LFACLKEN0_LESENSE_MASK) - case (CMU_LESENSE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) - >> _CMU_LFAPRESC0_LESENSE_SHIFT; - break; -#endif - - case (CMU_LFB_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); - break; - -#if defined(_CMU_LFBCLKEN0_LEUART0_MASK) - case (CMU_LEUART0_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT; -#else - ret /= CMU_Log2ToDiv((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFBCLKEN0_LEUART1_MASK) - case (CMU_LEUART1_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT; -#else - ret /= CMU_Log2ToDiv((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFBCLKEN0_CSEN_MASK) - case (CMU_CSEN_LF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); - ret /= CMU_Log2ToDiv(((CMU->LFBPRESC0 & _CMU_LFBPRESC0_CSEN_MASK) - >> _CMU_LFBPRESC0_CSEN_SHIFT) + 4); - break; -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) - case (CMU_LFE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFE); - break; -#endif - - case (CMU_DBG_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = dbgClkGet(); - break; - - case (CMU_AUX_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = auxClkGet(); - break; - -#if defined(USBC_CLOCK_PRESENT) - case (CMU_USBC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = usbCClkGet(); - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC0CLKSEL_MASK) - case (CMU_ADC0ASYNC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = adcAsyncClkGet(0); -#if defined(_CMU_ADCCTRL_ADC0CLKDIV_MASK) - ret /= 1U + ((CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC0CLKDIV_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case (CMU_ADC1ASYNC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = adcAsyncClkGet(1); -#if defined(_CMU_ADCCTRL_ADC1CLKDIV_MASK) - ret /= 1U + ((CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC1CLKDIV_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - case (CMU_SDIOREF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = sdioRefClkGet(); - break; -#endif - -#if defined(_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - case (CMU_QSPI0REF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = qspiRefClkGet(0); - break; -#endif - -#if defined(USBR_CLOCK_PRESENT) - case (CMU_USBR_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = usbRateClkGet(); - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - - return ret; -} - -#if defined(_SILICON_LABS_32B_SERIES_1) -/***************************************************************************//** - * @brief - * Get clock prescaler. - * - * @param[in] clock - * Clock point to get the prescaler for. Notice that not all clock points - * have a prescaler. Please refer to CMU overview in reference manual. - * - * @return - * The prescaler value of the current clock point. 0 is returned - * if @p clock specifies a clock point without a prescaler. - ******************************************************************************/ -uint32_t CMU_ClockPrescGet(CMU_Clock_TypeDef clock) -{ - uint32_t prescReg; - uint32_t ret; - - /* Get prescaler register id. */ - prescReg = (clock >> CMU_PRESC_REG_POS) & CMU_PRESC_REG_MASK; - - switch (prescReg) { - case CMU_HFPRESC_REG: - ret = (CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT; - break; - - case CMU_HFEXPPRESC_REG: - ret = (CMU->HFEXPPRESC & _CMU_HFEXPPRESC_PRESC_MASK) - >> _CMU_HFEXPPRESC_PRESC_SHIFT; - break; - - case CMU_HFCLKLEPRESC_REG: - ret = (CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) - >> _CMU_HFPRESC_HFCLKLEPRESC_SHIFT; - break; - - case CMU_HFPERPRESC_REG: - ret = (CMU->HFPERPRESC & _CMU_HFPERPRESC_PRESC_MASK) - >> _CMU_HFPERPRESC_PRESC_SHIFT; - break; - - case CMU_HFCOREPRESC_REG: - ret = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) - >> _CMU_HFCOREPRESC_PRESC_SHIFT; - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_LESENSE_MASK) - case cmuClock_LESENSE: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) - >> _CMU_LFAPRESC0_LESENSE_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_LETIMER1_MASK) - case cmuClock_LETIMER1: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER1_MASK) - >> _CMU_LFAPRESC0_LETIMER1_SHIFT; - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_LCD_MASK) - case cmuClock_LCD: - case cmuClock_LCDpre: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT; - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_RTC_MASK) - case cmuClock_RTC: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) - >> _CMU_LFAPRESC0_RTC_SHIFT; - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFBPRESC0_CSEN_MASK) - case cmuClock_CSEN_LF: - ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_CSEN_MASK) - >> _CMU_LFBPRESC0_CSEN_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret + 4) - 1U; - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - break; - - case CMU_LFEPRESC0_REG: - switch (clock) { -#if defined(RTCC_PRESENT) - case cmuClock_RTCC: - /* No need to compute with LFEPRESC0_RTCC - DIV1 is the only */ - /* allowed value. Convert the exponent to prescaler value. */ - ret = _CMU_LFEPRESC0_RTCC_DIV1; - break; - - default: - EFM_ASSERT(0); - ret = 0U; - break; -#endif - } - break; - - case CMU_ADCASYNCDIV_REG: - switch (clock) { -#if defined(_CMU_ADCCTRL_ADC0CLKDIV_MASK) - case cmuClock_ADC0ASYNC: - ret = (CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC0CLKDIV_SHIFT; - break; -#endif -#if defined(_CMU_ADCCTRL_ADC1CLKDIV_MASK) - case cmuClock_ADC1ASYNC: - ret = (CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC1CLKDIV_SHIFT; - break; -#endif - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - break; - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - - return ret; -} -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) -/***************************************************************************//** - * @brief - * Set clock prescaler. - * - * @note - * If setting a LF clock prescaler, synchronization into the low frequency - * domain is required. If the same register is modified before a previous - * update has completed, this function will stall until the previous - * synchronization has completed. Please refer to CMU_FreezeEnable() for - * a suggestion on how to reduce stalling time in some use cases. - * - * @param[in] clock - * Clock point to set prescaler for. Notice that not all clock points - * have a prescaler, please refer to CMU overview in the reference manual. - * - * @param[in] presc - * The clock prescaler to use. - ******************************************************************************/ -void CMU_ClockPrescSet(CMU_Clock_TypeDef clock, CMU_ClkPresc_TypeDef presc) -{ - uint32_t freq; - uint32_t prescReg; - - /* Get divisor reg id */ - prescReg = (clock >> CMU_PRESC_REG_POS) & CMU_PRESC_REG_MASK; - - switch (prescReg) { - case CMU_HFPRESC_REG: - EFM_ASSERT(presc < 32U); - - /* Configure worst case wait-states for flash and HFLE. */ - flashWaitStateMax(); - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); - - CMU->HFPRESC = (CMU->HFPRESC & ~_CMU_HFPRESC_PRESC_MASK) - | (presc << _CMU_HFPRESC_PRESC_SHIFT); - - /* Update CMSIS core clock variable (this function updates the global variable). - Optimize flash and HFLE wait states. */ - freq = SystemCoreClockGet(); - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - break; - - case CMU_HFEXPPRESC_REG: - EFM_ASSERT(presc < 32U); - - CMU->HFEXPPRESC = (CMU->HFEXPPRESC & ~_CMU_HFEXPPRESC_PRESC_MASK) - | (presc << _CMU_HFEXPPRESC_PRESC_SHIFT); - break; - - case CMU_HFCLKLEPRESC_REG: -#if defined (CMU_HFPRESC_HFCLKLEPRESC_DIV8) - EFM_ASSERT(presc < 3U); -#else - EFM_ASSERT(presc < 2U); -#endif - - /* Specifies the clock divider for HFCLKLE. This clock divider must be set - * high enough for the divided clock frequency to be at or below the max - * frequency allowed for the HFCLKLE clock. */ - CMU->HFPRESC = (CMU->HFPRESC & ~_CMU_HFPRESC_HFCLKLEPRESC_MASK) - | (presc << _CMU_HFPRESC_HFCLKLEPRESC_SHIFT); - break; - - case CMU_HFPERPRESC_REG: - EFM_ASSERT(presc < 512U); - - CMU->HFPERPRESC = (CMU->HFPERPRESC & ~_CMU_HFPERPRESC_PRESC_MASK) - | (presc << _CMU_HFPERPRESC_PRESC_SHIFT); - break; - - case CMU_HFCOREPRESC_REG: - EFM_ASSERT(presc < 512U); - - /* Configure worst case wait-states for flash and HFLE. */ - flashWaitStateMax(); - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); - - CMU->HFCOREPRESC = (CMU->HFCOREPRESC & ~_CMU_HFCOREPRESC_PRESC_MASK) - | (presc << _CMU_HFCOREPRESC_PRESC_SHIFT); - - /* Update CMSIS core clock variable (this function updates the global variable). - Optimize flash and HFLE wait states. */ - freq = SystemCoreClockGet(); - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { -#if defined(RTC_PRESENT) - case cmuClock_RTC: - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTC_MASK) - | (presc << _CMU_LFAPRESC0_RTC_SHIFT); - break; -#endif - -#if defined(RTCC_PRESENT) - case cmuClock_RTCC: -#if defined(_CMU_LFEPRESC0_RTCC_MASK) - /* DIV1 is the only accepted value. */ - EFM_ASSERT(presc <= 0U); - - /* LF register about to be modified require sync. Busy check.. */ - syncReg(CMU_SYNCBUSY_LFEPRESC0); - - CMU->LFEPRESC0 = (CMU->LFEPRESC0 & ~_CMU_LFEPRESC0_RTCC_MASK) - | (presc << _CMU_LFEPRESC0_RTCC_SHIFT); -#else - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTCC_MASK) - | (presc << _CMU_LFAPRESC0_RTCC_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER0_MASK) - | (presc << _CMU_LFAPRESC0_LETIMER0_SHIFT); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LESENSE_MASK) - case cmuClock_LESENSE: - EFM_ASSERT(presc <= 8); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LESENSE_MASK) - | (presc << _CMU_LFAPRESC0_LESENSE_SHIFT); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LCD_MASK) - case cmuClock_LCDpre: - case cmuClock_LCD: - { - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LCD_MASK) - | (presc << _CMU_LFAPRESC0_LCD_SHIFT); - } break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - EFM_ASSERT(presc <= 8U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART0_MASK) - | (presc << _CMU_LFBPRESC0_LEUART0_SHIFT); - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - EFM_ASSERT(presc <= 8U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART1_MASK) - | (presc << _CMU_LFBPRESC0_LEUART1_SHIFT); - break; -#endif - -#if defined(_CMU_LFBPRESC0_CSEN_MASK) - case cmuClock_CSEN_LF: - EFM_ASSERT((presc <= 127U) && (presc >= 15U)); - - /* Convert prescaler value to DIV exponent scale. - * DIV16 is the lowest supported prescaler. */ - presc = CMU_PrescToLog2(presc) - 4; - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_CSEN_MASK) - | (presc << _CMU_LFBPRESC0_CSEN_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_LFEPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFEPRESC0_RTCC_MASK) - case cmuClock_RTCC: - EFM_ASSERT(presc <= 0U); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFEPRESC0); - - CMU->LFEPRESC0 = (CMU->LFEPRESC0 & ~_CMU_LFEPRESC0_RTCC_MASK) - | (presc << _CMU_LFEPRESC0_RTCC_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_ADCASYNCDIV_REG: - switch (clock) { -#if defined(_CMU_ADCCTRL_ADC0CLKDIV_MASK) - case cmuClock_ADC0ASYNC: - EFM_ASSERT(presc <= 3); - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC0CLKDIV_MASK) - | (presc << _CMU_ADCCTRL_ADC0CLKDIV_SHIFT); - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKDIV_MASK) - case cmuClock_ADC1ASYNC: - EFM_ASSERT(presc <= 3); - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC1CLKDIV_MASK) - | (presc << _CMU_ADCCTRL_ADC1CLKDIV_SHIFT); - break; -#endif - default: - EFM_ASSERT(0); - break; - } - break; - - default: - EFM_ASSERT(0); - break; - } -} -#endif - -/***************************************************************************//** - * @brief - * Get currently selected reference clock used for a clock branch. - * - * @param[in] clock - * Clock branch to fetch selected ref. clock for. One of: - * @li #cmuClock_HF - * @li #cmuClock_LFA - * @li #cmuClock_LFB @if _CMU_LFCLKSEL_LFAE_ULFRCO - * @li #cmuClock_LFC - * @endif @if _SILICON_LABS_32B_SERIES_1 - * @li #cmuClock_LFE - * @endif - * @li #cmuClock_DBG @if DOXYDOC_USB_PRESENT - * @li #cmuClock_USBC - * @endif - * - * @return - * Reference clock used for clocking selected branch, #cmuSelect_Error if - * invalid @p clock provided. - ******************************************************************************/ -CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock) -{ - CMU_Select_TypeDef ret = cmuSelect_Disabled; - uint32_t selReg; - - selReg = (clock >> CMU_SEL_REG_POS) & CMU_SEL_REG_MASK; - - switch (selReg) { - case CMU_HFCLKSEL_REG: -#if defined(_CMU_HFCLKSTATUS_MASK) - switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { - case CMU_HFCLKSTATUS_SELECTED_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_HFCLKSTATUS_SELECTED_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_HFCLKSTATUS_SELECTED_HFXO: - ret = cmuSelect_HFXO; - break; - - default: - ret = cmuSelect_HFRCO; - break; - } -#else - switch (CMU->STATUS - & (CMU_STATUS_HFRCOSEL - | CMU_STATUS_HFXOSEL - | CMU_STATUS_LFRCOSEL -#if defined(CMU_STATUS_USHFRCODIV2SEL) - | CMU_STATUS_USHFRCODIV2SEL -#endif - | CMU_STATUS_LFXOSEL)) { - case CMU_STATUS_LFXOSEL: - ret = cmuSelect_LFXO; - break; - - case CMU_STATUS_LFRCOSEL: - ret = cmuSelect_LFRCO; - break; - - case CMU_STATUS_HFXOSEL: - ret = cmuSelect_HFXO; - break; - -#if defined(CMU_STATUS_USHFRCODIV2SEL) - case CMU_STATUS_USHFRCODIV2SEL: - ret = cmuSelect_USHFRCODIV2; - break; -#endif - - default: - ret = cmuSelect_HFRCO; - break; - } -#endif - break; - -#if defined(_CMU_LFCLKSEL_MASK) || defined(_CMU_LFACLKSEL_MASK) - case CMU_LFACLKSEL_REG: -#if defined(_CMU_LFCLKSEL_MASK) - switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFA_MASK) { - case CMU_LFCLKSEL_LFA_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFCLKSEL_LFA_LFXO: - ret = cmuSelect_LFXO; - break; - -#if defined(CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2) - case CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2: - ret = cmuSelect_HFCLKLE; - break; -#endif - - default: -#if defined(CMU_LFCLKSEL_LFAE) - if (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFAE_MASK) { - ret = cmuSelect_ULFRCO; - break; - } -#else - ret = cmuSelect_Disabled; -#endif - break; - } - -#elif defined(_CMU_LFACLKSEL_MASK) - switch (CMU->LFACLKSEL & _CMU_LFACLKSEL_LFA_MASK) { - case CMU_LFACLKSEL_LFA_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFACLKSEL_LFA_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_LFACLKSEL_LFA_ULFRCO: - ret = cmuSelect_ULFRCO; - break; - -#if defined(_CMU_LFACLKSEL_LFA_HFCLKLE) - case CMU_LFACLKSEL_LFA_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; -#endif - -#if defined(CMU_LFACLKSEL_LFA_PLFRCO) - case CMU_LFACLKSEL_LFA_PLFRCO: - ret = cmuSelect_PLFRCO; - break; -#endif - - default: - ret = cmuSelect_Disabled; - break; - } -#endif - break; -#endif /* _CMU_LFCLKSEL_MASK || _CMU_LFACLKSEL_MASK */ - -#if defined(_CMU_LFCLKSEL_MASK) || defined(_CMU_LFBCLKSEL_MASK) - case CMU_LFBCLKSEL_REG: -#if defined(_CMU_LFCLKSEL_MASK) - switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFB_MASK) { - case CMU_LFCLKSEL_LFB_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFCLKSEL_LFB_LFXO: - ret = cmuSelect_LFXO; - break; - -#if defined(CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2) - case CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2: - ret = cmuSelect_HFCLKLE; - break; -#endif - -#if defined(CMU_LFCLKSEL_LFB_HFCLKLE) - case CMU_LFCLKSEL_LFB_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; -#endif - - default: -#if defined(CMU_LFCLKSEL_LFBE) - if (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFBE_MASK) { - ret = cmuSelect_ULFRCO; - break; - } -#else - ret = cmuSelect_Disabled; -#endif - break; - } - -#elif defined(_CMU_LFBCLKSEL_MASK) - switch (CMU->LFBCLKSEL & _CMU_LFBCLKSEL_LFB_MASK) { - case CMU_LFBCLKSEL_LFB_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFBCLKSEL_LFB_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_LFBCLKSEL_LFB_ULFRCO: - ret = cmuSelect_ULFRCO; - break; - - case CMU_LFBCLKSEL_LFB_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; - -#if defined(CMU_LFBCLKSEL_LFB_PLFRCO) - case CMU_LFBCLKSEL_LFB_PLFRCO: - ret = cmuSelect_PLFRCO; - break; -#endif - - default: - ret = cmuSelect_Disabled; - break; - } -#endif - break; -#endif /* _CMU_LFCLKSEL_MASK || _CMU_LFBCLKSEL_MASK */ - -#if defined(_CMU_LFCLKSEL_LFC_MASK) - case CMU_LFCCLKSEL_REG: - switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFC_MASK) { - case CMU_LFCLKSEL_LFC_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFCLKSEL_LFC_LFXO: - ret = cmuSelect_LFXO; - break; - - default: - ret = cmuSelect_Disabled; - break; - } - break; -#endif - -#if defined(_CMU_LFECLKSEL_LFE_MASK) - case CMU_LFECLKSEL_REG: - switch (CMU->LFECLKSEL & _CMU_LFECLKSEL_LFE_MASK) { - case CMU_LFECLKSEL_LFE_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFECLKSEL_LFE_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_LFECLKSEL_LFE_ULFRCO: - ret = cmuSelect_ULFRCO; - break; - -#if defined (_CMU_LFECLKSEL_LFE_HFCLKLE) - case CMU_LFECLKSEL_LFE_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; -#endif - -#if defined(CMU_LFECLKSEL_LFE_PLFRCO) - case CMU_LFECLKSEL_LFE_PLFRCO: - ret = cmuSelect_PLFRCO; - break; -#endif - - default: - ret = cmuSelect_Disabled; - break; - } - break; -#endif /* CMU_LFECLKSEL_REG */ - - case CMU_DBGCLKSEL_REG: -#if defined(_CMU_DBGCLKSEL_DBG_MASK) - switch (CMU->DBGCLKSEL & _CMU_DBGCLKSEL_DBG_MASK) { - case CMU_DBGCLKSEL_DBG_HFCLK: - ret = cmuSelect_HFCLK; - break; - - case CMU_DBGCLKSEL_DBG_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - } - -#elif defined(_CMU_CTRL_DBGCLK_MASK) - switch (CMU->CTRL & _CMU_CTRL_DBGCLK_MASK) { - case CMU_CTRL_DBGCLK_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_CTRL_DBGCLK_HFCLK: - ret = cmuSelect_HFCLK; - break; - } -#else - ret = cmuSelect_AUXHFRCO; -#endif - break; - -#if defined(USBC_CLOCK_PRESENT) - case CMU_USBCCLKSEL_REG: - switch (CMU->STATUS - & (CMU_STATUS_USBCLFXOSEL -#if defined(_CMU_STATUS_USBCHFCLKSEL_MASK) - | CMU_STATUS_USBCHFCLKSEL -#endif -#if defined(_CMU_STATUS_USBCUSHFRCOSEL_MASK) - | CMU_STATUS_USBCUSHFRCOSEL -#endif - | CMU_STATUS_USBCLFRCOSEL)) { -#if defined(_CMU_STATUS_USBCHFCLKSEL_MASK) - case CMU_STATUS_USBCHFCLKSEL: - ret = cmuSelect_HFCLK; - break; -#endif - -#if defined(_CMU_STATUS_USBCUSHFRCOSEL_MASK) - case CMU_STATUS_USBCUSHFRCOSEL: - ret = cmuSelect_USHFRCO; - break; -#endif - - case CMU_STATUS_USBCLFXOSEL: - ret = cmuSelect_LFXO; - break; - - case CMU_STATUS_USBCLFRCOSEL: - ret = cmuSelect_LFRCO; - break; - - default: - ret = cmuSelect_Disabled; - break; - } - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC0CLKSEL_MASK) - case CMU_ADC0ASYNCSEL_REG: - switch (CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKSEL_MASK) { - case CMU_ADCCTRL_ADC0CLKSEL_DISABLED: - ret = cmuSelect_Disabled; - break; - - case CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_ADCCTRL_ADC0CLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK: - ret = cmuSelect_HFSRCCLK; - break; - } - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case CMU_ADC1ASYNCSEL_REG: - switch (CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKSEL_MASK) { - case CMU_ADCCTRL_ADC1CLKSEL_DISABLED: - ret = cmuSelect_Disabled; - break; - - case CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_ADCCTRL_ADC1CLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK: - ret = cmuSelect_HFSRCCLK; - break; - } - break; -#endif - -#if defined(_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - case CMU_SDIOREFSEL_REG: - switch (CMU->SDIOCTRL & _CMU_SDIOCTRL_SDIOCLKSEL_MASK) { - case CMU_SDIOCTRL_SDIOCLKSEL_HFRCO: - ret = cmuSelect_HFRCO; - break; - - case CMU_SDIOCTRL_SDIOCLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO: - ret = cmuSelect_USHFRCO; - break; - } - break; -#endif - -#if defined(_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - case CMU_QSPI0REFSEL_REG: - switch (CMU->QSPICTRL & _CMU_QSPICTRL_QSPI0CLKSEL_MASK) { - case CMU_QSPICTRL_QSPI0CLKSEL_HFRCO: - ret = cmuSelect_HFRCO; - break; - - case CMU_QSPICTRL_QSPI0CLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO: - ret = cmuSelect_USHFRCO; - break; - } - break; -#endif - -#if defined(_CMU_USBCTRL_USBCLKSEL_MASK) - case CMU_USBRCLKSEL_REG: - switch (CMU->USBCTRL & _CMU_USBCTRL_USBCLKSEL_MASK) { - case CMU_USBCTRL_USBCLKSEL_USHFRCO: - ret = cmuSelect_USHFRCO; - break; - - case CMU_USBCTRL_USBCLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_USBCTRL_USBCLKSEL_HFXOX2: - ret = cmuSelect_HFXOX2; - break; - - case CMU_USBCTRL_USBCLKSEL_HFRCO: - ret = cmuSelect_HFRCO; - break; - - case CMU_USBCTRL_USBCLKSEL_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_USBCTRL_USBCLKSEL_LFRCO: - ret = cmuSelect_LFRCO; - break; - } - break; -#endif - - default: - EFM_ASSERT(0); - ret = cmuSelect_Error; - break; - } - - return ret; -} - -/***************************************************************************//** - * @brief - * Select reference clock/oscillator used for a clock branch. - * - * @details - * Notice that if a selected reference is not enabled prior to selecting its - * use, it will be enabled, and this function will wait for the selected - * oscillator to be stable. It will however NOT be disabled if another - * reference clock is selected later. - * - * This feature is particularly important if selecting a new reference - * clock for the clock branch clocking the core, otherwise the system - * may halt. - * - * @param[in] clock - * Clock branch to select reference clock for. One of: - * @li #cmuClock_HF - * @li #cmuClock_LFA - * @li #cmuClock_LFB - * @if _CMU_LFCCLKEN0_MASK - * @li #cmuClock_LFC - * @endif - * @if _CMU_LFECLKEN0_MASK - * @li #cmuClock_LFE - * @endif - * @li #cmuClock_DBG - * @if _CMU_CMD_USBCLKSEL_MASK - * @li #cmuClock_USBC - * @endif - * @if _CMU_USBCTRL_MASK - * @li #cmuClock_USBR - * @endif - * - * @param[in] ref - * Reference selected for clocking, please refer to reference manual for - * for details on which reference is available for a specific clock branch. - * @li #cmuSelect_HFRCO - * @li #cmuSelect_LFRCO - * @li #cmuSelect_HFXO - * @if _CMU_HFXOCTRL_HFXOX2EN_MASK - * @li #cmuSelect_HFXOX2 - * @endif - * @li #cmuSelect_LFXO - * @li #cmuSelect_HFCLKLE - * @li #cmuSelect_AUXHFRCO - * @if _CMU_USHFRCOCTRL_MASK - * @li #cmuSelect_USHFRCO - * @endif - * @li #cmuSelect_HFCLK - * @ifnot DOXYDOC_EFM32_GECKO_FAMILY - * @li #cmuSelect_ULFRCO - * @li #cmuSelect_PLFRCO - * @endif - ******************************************************************************/ -void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref) -{ - uint32_t select = cmuOsc_HFRCO; - CMU_Osc_TypeDef osc = cmuOsc_HFRCO; - uint32_t freq; - uint32_t tmp; - uint32_t selRegId; -#if defined(_SILICON_LABS_32B_SERIES_1) - volatile uint32_t *selReg = NULL; -#endif -#if defined(CMU_LFCLKSEL_LFAE_ULFRCO) - uint32_t lfExtended = 0; -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - uint32_t vScaleFrequency = 0; /* Use default */ - - /* Start voltage upscaling before clock is set. */ - if (clock == cmuClock_HF) { - if (ref == cmuSelect_HFXO) { - vScaleFrequency = SystemHFXOClockGet(); - } else if ((ref == cmuSelect_HFRCO) - && (CMU_HFRCOBandGet() > CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX)) { - vScaleFrequency = CMU_HFRCOBandGet(); - } - if (vScaleFrequency != 0) { - EMU_VScaleEM01ByClock(vScaleFrequency, false); - } - } -#endif - - selRegId = (clock >> CMU_SEL_REG_POS) & CMU_SEL_REG_MASK; - - switch (selRegId) { - case CMU_HFCLKSEL_REG: - switch (ref) { - case cmuSelect_LFXO: -#if defined(_SILICON_LABS_32B_SERIES_1) - select = CMU_HFCLKSEL_HF_LFXO; -#elif defined(_SILICON_LABS_32B_SERIES_0) - select = CMU_CMD_HFCLKSEL_LFXO; -#endif - osc = cmuOsc_LFXO; - break; - - case cmuSelect_LFRCO: -#if defined(_SILICON_LABS_32B_SERIES_1) - select = CMU_HFCLKSEL_HF_LFRCO; -#elif defined(_SILICON_LABS_32B_SERIES_0) - select = CMU_CMD_HFCLKSEL_LFRCO; -#endif - osc = cmuOsc_LFRCO; - break; - - case cmuSelect_HFXO: -#if defined(CMU_HFCLKSEL_HF_HFXO) - select = CMU_HFCLKSEL_HF_HFXO; -#elif defined(CMU_CMD_HFCLKSEL_HFXO) - select = CMU_CMD_HFCLKSEL_HFXO; -#endif - osc = cmuOsc_HFXO; -#if defined(CMU_MAX_FREQ_HFLE) - /* Set 1 HFLE wait-state until the new HFCLKLE frequency is known. - This is known after 'select' is written below. */ - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); -#endif -#if defined(CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ) - /* Adjust HFXO buffer current for frequencies above 32MHz */ - if (SystemHFXOClockGet() > 32000000) { - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) - | CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ; - } else { - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) - | CMU_CTRL_HFXOBUFCUR_BOOSTUPTO32MHZ; - } -#endif - break; - - case cmuSelect_HFRCO: -#if defined(_SILICON_LABS_32B_SERIES_1) - select = CMU_HFCLKSEL_HF_HFRCO; -#elif defined(_SILICON_LABS_32B_SERIES_0) - select = CMU_CMD_HFCLKSEL_HFRCO; -#endif - osc = cmuOsc_HFRCO; -#if defined(CMU_MAX_FREQ_HFLE) - /* Set 1 HFLE wait-state until the new HFCLKLE frequency is known. - This is known after 'select' is written below. */ - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); -#endif - break; - -#if defined(CMU_CMD_HFCLKSEL_USHFRCODIV2) - case cmuSelect_USHFRCODIV2: - select = CMU_CMD_HFCLKSEL_USHFRCODIV2; - osc = cmuOsc_USHFRCO; - break; -#endif - -#if defined(CMU_LFCLKSEL_LFAE_ULFRCO) || defined(CMU_LFACLKSEL_LFA_ULFRCO) - case cmuSelect_ULFRCO: - /* ULFRCO cannot be used as HFCLK */ - EFM_ASSERT(0); - return; -#endif - - default: - EFM_ASSERT(0); - return; - } - - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(osc, true, true); - - /* Configure worst case wait states for flash access before selecting */ - flashWaitStateMax(); - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Wait for voltage upscaling to complete before clock is set. */ - if (vScaleFrequency != 0) { - EMU_VScaleWait(); - } -#endif - - /* Switch to selected oscillator */ -#if defined(_CMU_HFCLKSEL_MASK) - CMU->HFCLKSEL = select; -#else - CMU->CMD = select; -#endif -#if defined(CMU_MAX_FREQ_HFLE) - /* Update HFLE configuration after 'select' is set. - Note that the HFCLKLE clock is connected differently on planform 1 and 2 */ - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); -#endif - - /* Update CMSIS core clock variable */ - /* (The function will update the global variable) */ - freq = SystemCoreClockGet(); - - /* Optimize flash access wait state setting for currently selected core clk */ - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Keep EMU module informed on source HF clock frequency. This will apply voltage - downscaling after clock is set if downscaling is configured. */ - if (vScaleFrequency == 0) { - EMU_VScaleEM01ByClock(0, true); - } -#endif - break; - -#if defined(_SILICON_LABS_32B_SERIES_1) - case CMU_LFACLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFACLKSEL : selReg; -#if !defined(_CMU_LFACLKSEL_LFA_HFCLKLE) - /* HFCLKCLE can not be used as LFACLK */ - EFM_ASSERT(ref != cmuSelect_HFCLKLE); -#endif - /* Fall through and select clock source */ - -#if defined(_CMU_LFCCLKSEL_MASK) - case CMU_LFCCLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFCCLKSEL : selReg; -#if !defined(_CMU_LFCCLKSEL_LFC_HFCLKLE) - /* HFCLKCLE can not be used as LFCCLK */ - EFM_ASSERT(ref != cmuSelect_HFCLKLE); -#endif -#endif - /* Fall through and select clock source */ - - case CMU_LFECLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFECLKSEL : selReg; -#if !defined(_CMU_LFECLKSEL_LFE_HFCLKLE) - /* HFCLKCLE can not be used as LFECLK */ - EFM_ASSERT(ref != cmuSelect_HFCLKLE); -#endif - /* Fall through and select clock source */ - - case CMU_LFBCLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFBCLKSEL : selReg; - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_LFACLKSEL_LFA_DISABLED; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_LFACLKSEL_LFA_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_LFACLKSEL_LFA_LFRCO; - break; - - case cmuSelect_HFCLKLE: - /* Ensure correct HFLE wait-states and enable HFCLK to LE */ - setHfLeConfig(SystemCoreClockGet()); - BUS_RegBitWrite(&CMU->HFBUSCLKEN0, _CMU_HFBUSCLKEN0_LE_SHIFT, 1); - tmp = _CMU_LFBCLKSEL_LFB_HFCLKLE; - break; - - case cmuSelect_ULFRCO: - /* ULFRCO is always on, there is no need to enable it. */ - tmp = _CMU_LFACLKSEL_LFA_ULFRCO; - break; - -#if defined(_CMU_STATUS_PLFRCOENS_MASK) - case cmuSelect_PLFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_PLFRCO, true, true); - tmp = _CMU_LFACLKSEL_LFA_PLFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - return; - } - *selReg = tmp; - break; - -#elif defined(_SILICON_LABS_32B_SERIES_0) - case CMU_LFACLKSEL_REG: - case CMU_LFBCLKSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_LFCLKSEL_LFA_DISABLED; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_LFCLKSEL_LFA_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_LFCLKSEL_LFA_LFRCO; - break; - - case cmuSelect_HFCLKLE: -#if defined(CMU_MAX_FREQ_HFLE) - /* Set HFLE wait-state and divider */ - freq = SystemCoreClockGet(); - setHfLeConfig(freq); -#endif - /* Ensure HFCORE to LE clocking is enabled */ - BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); - tmp = _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2; - break; - -#if defined(CMU_LFCLKSEL_LFAE_ULFRCO) - case cmuSelect_ULFRCO: - /* ULFRCO is always enabled */ - tmp = _CMU_LFCLKSEL_LFA_DISABLED; - lfExtended = 1; - break; -#endif - - default: - /* Illegal clock source for LFA/LFB selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - if (selRegId == CMU_LFACLKSEL_REG) { -#if defined(_CMU_LFCLKSEL_LFAE_MASK) - CMU->LFCLKSEL = (CMU->LFCLKSEL - & ~(_CMU_LFCLKSEL_LFA_MASK | _CMU_LFCLKSEL_LFAE_MASK)) - | (tmp << _CMU_LFCLKSEL_LFA_SHIFT) - | (lfExtended << _CMU_LFCLKSEL_LFAE_SHIFT); -#else - CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFA_MASK) - | (tmp << _CMU_LFCLKSEL_LFA_SHIFT); -#endif - } else { -#if defined(_CMU_LFCLKSEL_LFBE_MASK) - CMU->LFCLKSEL = (CMU->LFCLKSEL - & ~(_CMU_LFCLKSEL_LFB_MASK | _CMU_LFCLKSEL_LFBE_MASK)) - | (tmp << _CMU_LFCLKSEL_LFB_SHIFT) - | (lfExtended << _CMU_LFCLKSEL_LFBE_SHIFT); -#else - CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFB_MASK) - | (tmp << _CMU_LFCLKSEL_LFB_SHIFT); -#endif - } - break; - -#if defined(_CMU_LFCLKSEL_LFC_MASK) - case CMU_LFCCLKSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_LFCLKSEL_LFA_DISABLED; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_LFCLKSEL_LFC_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_LFCLKSEL_LFC_LFRCO; - break; - - default: - /* Illegal clock source for LFC selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFC_MASK) - | (tmp << _CMU_LFCLKSEL_LFC_SHIFT); - break; -#endif -#endif - -#if defined(_CMU_DBGCLKSEL_DBG_MASK) || defined(CMU_CTRL_DBGCLK) - case CMU_DBGCLKSEL_REG: - switch (ref) { -#if defined(_CMU_DBGCLKSEL_DBG_MASK) - case cmuSelect_AUXHFRCO: - /* Select AUXHFRCO as debug clock */ - CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_AUXHFRCO; - break; - - case cmuSelect_HFCLK: - /* Select divided HFCLK as debug clock */ - CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_HFCLK; - break; -#endif - -#if defined(CMU_CTRL_DBGCLK) - case cmuSelect_AUXHFRCO: - /* Select AUXHFRCO as debug clock */ - CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_DBGCLK_MASK)) - | CMU_CTRL_DBGCLK_AUXHFRCO; - break; - - case cmuSelect_HFCLK: - /* Select divided HFCLK as debug clock */ - CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_DBGCLK_MASK)) - | CMU_CTRL_DBGCLK_HFCLK; - break; -#endif - - default: - /* Illegal clock source for debug selected */ - EFM_ASSERT(0); - return; - } - break; -#endif - -#if defined(USBC_CLOCK_PRESENT) - case CMU_USBCCLKSEL_REG: - switch (ref) { - case cmuSelect_LFXO: - /* Select LFXO as clock source for USB, can only be used in sleep mode */ - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - - /* Switch oscillator */ - CMU->CMD = CMU_CMD_USBCCLKSEL_LFXO; - - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCLFXOSEL) == 0) { - } - break; - - case cmuSelect_LFRCO: - /* Select LFRCO as clock source for USB, can only be used in sleep mode */ - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - - /* Switch oscillator */ - CMU->CMD = CMU_CMD_USBCCLKSEL_LFRCO; - - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCLFRCOSEL) == 0) { - } - break; - -#if defined(CMU_STATUS_USBCHFCLKSEL) - case cmuSelect_HFCLK: - /* Select undivided HFCLK as clock source for USB */ - /* Oscillator must already be enabled to avoid a core lockup */ - CMU->CMD = CMU_CMD_USBCCLKSEL_HFCLKNODIV; - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCHFCLKSEL) == 0) { - } - break; -#endif - -#if defined(CMU_CMD_USBCCLKSEL_USHFRCO) - case cmuSelect_USHFRCO: - /* Select USHFRCO as clock source for USB */ - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - - /* Switch oscillator */ - CMU->CMD = CMU_CMD_USBCCLKSEL_USHFRCO; - - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCUSHFRCOSEL) == 0) { - } - break; -#endif - - default: - /* Illegal clock source for USB */ - EFM_ASSERT(0); - return; - } - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC0CLKSEL_MASK) - case CMU_ADC0ASYNCSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_ADCCTRL_ADC0CLKSEL_DISABLED; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_ADCCTRL_ADC0CLKSEL_HFXO; - break; - - case cmuSelect_HFSRCCLK: - tmp = _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK; - break; - - default: - /* Illegal clock source for ADC0ASYNC selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC0CLKSEL_MASK) - | (tmp << _CMU_ADCCTRL_ADC0CLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case CMU_ADC1ASYNCSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_ADCCTRL_ADC1CLKSEL_DISABLED; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_ADCCTRL_ADC1CLKSEL_HFXO; - break; - - case cmuSelect_HFSRCCLK: - tmp = _CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK; - break; - - default: - /* Illegal clock source for ADC1ASYNC selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC1CLKSEL_MASK) - | (tmp << _CMU_ADCCTRL_ADC1CLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - case CMU_SDIOREFSEL_REG: - switch (ref) { - case cmuSelect_HFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFRCO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_HFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_HFXO; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO; - break; - - case cmuSelect_USHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO; - break; - - default: - /* Illegal clock source for SDIOREF selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->SDIOCTRL = (CMU->SDIOCTRL & ~_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - | (tmp << _CMU_SDIOCTRL_SDIOCLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - case CMU_QSPI0REFSEL_REG: - switch (ref) { - case cmuSelect_HFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFRCO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_HFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_HFXO; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO; - break; - - case cmuSelect_USHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO; - break; - - default: - /* Illegal clock source for QSPI0REF selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->QSPICTRL = (CMU->QSPICTRL & ~_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - | (tmp << _CMU_QSPICTRL_QSPI0CLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_USBCTRL_USBCLKSEL_MASK) - case CMU_USBRCLKSEL_REG: - switch (ref) { - case cmuSelect_USHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_USHFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_HFXO; - break; - - case cmuSelect_HFXOX2: - /* Only allowed for HFXO frequencies up to 25 MHz */ - EFM_ASSERT(SystemHFXOClockGet() <= 25000000u); - - /* Enable HFXO X2 */ - CMU->HFXOCTRL |= CMU_HFXOCTRL_HFXOX2EN; - - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - - tmp = _CMU_USBCTRL_USBCLKSEL_HFXOX2; - break; - - case cmuSelect_HFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFRCO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_HFRCO; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_LFRCO; - break; - - default: - /* Illegal clock source for USBR selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->USBCTRL = (CMU->USBCTRL & ~_CMU_USBCTRL_USBCLKSEL_MASK) - | (tmp << _CMU_USBCTRL_USBCLKSEL_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } -} - -#if defined(CMU_OSCENCMD_DPLLEN) -/**************************************************************************//** - * @brief - * Lock the DPLL to a given frequency. - * - * The frequency is given by: Fout = Fref * (N+1) / (M+1). - * - * @note - * This function does not check if the given N & M values will actually - * produce the desired target frequency. - * Any peripheral running off HFRCO should be switched to HFRCODIV2 prior to - * calling this function to avoid over-clocking. - * - * @param[in] init - * DPLL setup parameters. - * - * @return - * Returns false on invalid target frequency or DPLL locking error. - *****************************************************************************/ -bool CMU_DPLLLock(CMU_DPLLInit_TypeDef *init) -{ - int index = 0; - unsigned int i; - bool hfrcoDiv2 = false; - uint32_t hfrcoCtrlVal, lockStatus, sysFreq; - - EFM_ASSERT(init->frequency >= hfrcoCtrlTable[0].minFreq); - EFM_ASSERT(init->frequency - <= hfrcoCtrlTable[HFRCOCTRLTABLE_ENTRIES - 1].maxFreq); - EFM_ASSERT(init->n >= 32); - EFM_ASSERT(init->n <= (_CMU_DPLLCTRL1_N_MASK >> _CMU_DPLLCTRL1_N_SHIFT)); - EFM_ASSERT(init->m <= (_CMU_DPLLCTRL1_M_MASK >> _CMU_DPLLCTRL1_M_SHIFT)); - EFM_ASSERT(init->ssInterval <= (_CMU_HFRCOSS_SSINV_MASK - >> _CMU_HFRCOSS_SSINV_SHIFT)); - EFM_ASSERT(init->ssAmplitude <= (_CMU_HFRCOSS_SSAMP_MASK - >> _CMU_HFRCOSS_SSAMP_SHIFT)); - -#if defined(_EMU_STATUS_VSCALE_MASK) - if ((EMU_VScaleGet() == emuVScaleEM01_LowPower) - && (init->frequency > CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX)) { - EFM_ASSERT(false); - return false; - } -#endif - - // Find correct HFRCO band, and retrieve a HFRCOCTRL value. - for (i = 0; i < HFRCOCTRLTABLE_ENTRIES; i++) { - if ((init->frequency >= hfrcoCtrlTable[i].minFreq) - && (init->frequency <= hfrcoCtrlTable[i].maxFreq)) { - index = i; // Correct band found - break; - } - } - if (index == HFRCOCTRLTABLE_ENTRIES) { - EFM_ASSERT(false); - return false; // Target frequency out of spec. - } - hfrcoCtrlVal = hfrcoCtrlTable[index].value; - - // Check if we have a calibrated HFRCOCTRL.TUNING value in device DI page. - if (hfrcoCtrlTable[index].band != (CMU_HFRCOFreq_TypeDef)0) { - uint32_t tuning; - - tuning = (CMU_HFRCODevinfoGet(hfrcoCtrlTable[index].band) - & _CMU_HFRCOCTRL_TUNING_MASK) - >> _CMU_HFRCOCTRL_TUNING_SHIFT; - - // When HFRCOCTRL.FINETUNINGEN is enabled, the center frequency - // of the band shifts down by 5.8%. We subtract 9 to compensate. - if (tuning > 9) { - tuning -= 9; - } else { - tuning = 0; - } - - hfrcoCtrlVal |= tuning << _CMU_HFRCOCTRL_TUNING_SHIFT; - } - - // Update CMSIS frequency SystemHfrcoFreq value. - SystemHfrcoFreq = init->frequency; - - // Set max wait-states while changing core clock. - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - flashWaitStateMax(); - } - - // Update HFLE configuration before updating HFRCO, use new DPLL frequency. - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - setHfLeConfig(init->frequency); - - // Switch to HFRCO/2 before setting DPLL to avoid over-clocking. - hfrcoDiv2 = (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) - == CMU_HFCLKSTATUS_SELECTED_HFRCODIV2; - CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCODIV2; - } - - CMU->OSCENCMD = CMU_OSCENCMD_DPLLDIS; - while ((CMU->STATUS & (CMU_STATUS_DPLLENS | CMU_STATUS_DPLLRDY)) != 0) ; - CMU->IFC = CMU_IFC_DPLLRDY | CMU_IFC_DPLLLOCKFAILLOW - | CMU_IFC_DPLLLOCKFAILHIGH; - CMU->DPLLCTRL1 = (init->n << _CMU_DPLLCTRL1_N_SHIFT) - | (init->m << _CMU_DPLLCTRL1_M_SHIFT); - CMU->HFRCOCTRL = hfrcoCtrlVal; - CMU->DPLLCTRL = (init->refClk << _CMU_DPLLCTRL_REFSEL_SHIFT) - | (init->autoRecover << _CMU_DPLLCTRL_AUTORECOVER_SHIFT) - | (init->edgeSel << _CMU_DPLLCTRL_EDGESEL_SHIFT) - | (init->lockMode << _CMU_DPLLCTRL_MODE_SHIFT); - CMU->OSCENCMD = CMU_OSCENCMD_DPLLEN; - while ((lockStatus = (CMU->IF & (CMU_IF_DPLLRDY - | CMU_IF_DPLLLOCKFAILLOW - | CMU_IF_DPLLLOCKFAILHIGH))) == 0) ; - - if ((CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) - && (hfrcoDiv2 == false)) { - CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCO; - } - - // If HFRCO is selected as HF clock, optimize flash access wait-state - // configuration for this frequency and update CMSIS core clock variable. - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - // Call SystemCoreClockGet() to update CMSIS core clock variable. - sysFreq = SystemCoreClockGet(); - EFM_ASSERT(sysFreq <= init->frequency); - EFM_ASSERT(sysFreq <= SystemHfrcoFreq); - EFM_ASSERT(init->frequency == SystemHfrcoFreq); - CMU_UpdateWaitStates(sysFreq, VSCALE_DEFAULT); - } - - // Reduce HFLE frequency if possible. - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - // Update voltage scaling. - EMU_VScaleEM01ByClock(0, true); -#endif - - if (lockStatus == CMU_IF_DPLLRDY) { - return true; - } - return false; -} -#endif // CMU_OSCENCMD_DPLLEN - -/**************************************************************************//** - * @brief - * CMU low frequency register synchronization freeze control. - * - * @details - * Some CMU registers requires synchronization into the low frequency (LF) - * domain. The freeze feature allows for several such registers to be - * modified before passing them to the LF domain simultaneously (which - * takes place when the freeze mode is disabled). - * - * Another usage scenario of this feature, is when using an API (such - * as the CMU API) for modifying several bit fields consecutively in the - * same register. If freeze mode is enabled during this sequence, stalling - * can be avoided. - * - * @note - * When enabling freeze mode, this function will wait for all current - * ongoing CMU synchronization to LF domain to complete (Normally - * synchronization will not be in progress.) However for this reason, when - * using freeze mode, modifications of registers requiring LF synchronization - * should be done within one freeze enable/disable block to avoid unecessary - * stalling. - * - * @param[in] enable - * @li true - enable freeze, modified registers are not propagated to the - * LF domain - * @li false - disable freeze, modified registers are propagated to LF - * domain - *****************************************************************************/ -void CMU_FreezeEnable(bool enable) -{ - if (enable) { - /* Wait for any ongoing LF synchronization to complete. This is just to */ - /* protect against the rare case when a user */ - /* - modifies a register requiring LF sync */ - /* - then enables freeze before LF sync completed */ - /* - then modifies the same register again */ - /* since modifying a register while it is in sync progress should be */ - /* avoided. */ - while (CMU->SYNCBUSY) { - } - - CMU->FREEZE = CMU_FREEZE_REGFREEZE; - } else { - CMU->FREEZE = 0; - } -} - -#if defined(_CMU_HFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Get HFRCO band in use. - * - * @return - * HFRCO band in use. - ******************************************************************************/ -CMU_HFRCOBand_TypeDef CMU_HFRCOBandGet(void) -{ - return (CMU_HFRCOBand_TypeDef)((CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) - >> _CMU_HFRCOCTRL_BAND_SHIFT); -} -#endif /* _CMU_HFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_HFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Set HFRCO band and the tuning value based on the value in the calibration - * table made during production. - * - * @param[in] band - * HFRCO band to activate. - ******************************************************************************/ -void CMU_HFRCOBandSet(CMU_HFRCOBand_TypeDef band) -{ - uint32_t tuning; - uint32_t freq; - CMU_Select_TypeDef osc; - - /* Read tuning value from calibration table */ - switch (band) { - case cmuHFRCOBand_1MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND1_MASK) - >> _DEVINFO_HFRCOCAL0_BAND1_SHIFT; - break; - - case cmuHFRCOBand_7MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND7_MASK) - >> _DEVINFO_HFRCOCAL0_BAND7_SHIFT; - break; - - case cmuHFRCOBand_11MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND11_MASK) - >> _DEVINFO_HFRCOCAL0_BAND11_SHIFT; - break; - - case cmuHFRCOBand_14MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND14_MASK) - >> _DEVINFO_HFRCOCAL0_BAND14_SHIFT; - break; - - case cmuHFRCOBand_21MHz: - tuning = (DEVINFO->HFRCOCAL1 & _DEVINFO_HFRCOCAL1_BAND21_MASK) - >> _DEVINFO_HFRCOCAL1_BAND21_SHIFT; - break; - -#if defined(_CMU_HFRCOCTRL_BAND_28MHZ) - case cmuHFRCOBand_28MHz: - tuning = (DEVINFO->HFRCOCAL1 & _DEVINFO_HFRCOCAL1_BAND28_MASK) - >> _DEVINFO_HFRCOCAL1_BAND28_SHIFT; - break; -#endif - - default: - EFM_ASSERT(0); - return; - } - - /* If HFRCO is used for core clock, we have to consider flash access WS. */ - osc = CMU_ClockSelectGet(cmuClock_HF); - if (osc == cmuSelect_HFRCO) { - /* Configure worst case wait states for flash access before setting divider */ - flashWaitStateMax(); - } - - /* Set band/tuning */ - CMU->HFRCOCTRL = (CMU->HFRCOCTRL - & ~(_CMU_HFRCOCTRL_BAND_MASK | _CMU_HFRCOCTRL_TUNING_MASK)) - | (band << _CMU_HFRCOCTRL_BAND_SHIFT) - | (tuning << _CMU_HFRCOCTRL_TUNING_SHIFT); - - /* If HFRCO is used for core clock, optimize flash WS */ - if (osc == cmuSelect_HFRCO) { - /* Call SystemCoreClockGet() to update CMSIS core clock variable. */ - freq = SystemCoreClockGet(); - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - } - -#if defined(CMU_MAX_FREQ_HFLE) - /* Reduce HFLE frequency if possible. */ - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); -#endif -} -#endif /* _CMU_HFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_HFRCOCTRL_FREQRANGE_MASK) -/**************************************************************************//** - * @brief - * Get the HFRCO frequency calibration word in DEVINFO - * - * @param[in] freq - * Frequency in Hz - * - * @return - * HFRCO calibration word for a given frequency - *****************************************************************************/ -static uint32_t CMU_HFRCODevinfoGet(CMU_HFRCOFreq_TypeDef freq) -{ - switch (freq) { - /* 1, 2 and 4MHz share the same calibration word */ - case cmuHFRCOFreq_1M0Hz: - case cmuHFRCOFreq_2M0Hz: - case cmuHFRCOFreq_4M0Hz: - return DEVINFO->HFRCOCAL0; - - case cmuHFRCOFreq_7M0Hz: - return DEVINFO->HFRCOCAL3; - - case cmuHFRCOFreq_13M0Hz: - return DEVINFO->HFRCOCAL6; - - case cmuHFRCOFreq_16M0Hz: - return DEVINFO->HFRCOCAL7; - - case cmuHFRCOFreq_19M0Hz: - return DEVINFO->HFRCOCAL8; - - case cmuHFRCOFreq_26M0Hz: - return DEVINFO->HFRCOCAL10; - - case cmuHFRCOFreq_32M0Hz: - return DEVINFO->HFRCOCAL11; - - case cmuHFRCOFreq_38M0Hz: - return DEVINFO->HFRCOCAL12; - -#if defined(_DEVINFO_HFRCOCAL16_MASK) - case cmuHFRCOFreq_48M0Hz: - return DEVINFO->HFRCOCAL13; - - case cmuHFRCOFreq_56M0Hz: - return DEVINFO->HFRCOCAL14; - - case cmuHFRCOFreq_64M0Hz: - return DEVINFO->HFRCOCAL15; - - case cmuHFRCOFreq_72M0Hz: - return DEVINFO->HFRCOCAL16; -#endif - - default: /* cmuHFRCOFreq_UserDefined */ - return 0; - } -} - -/***************************************************************************//** - * @brief - * Get current HFRCO frequency. - * - * @return - * HFRCO frequency - ******************************************************************************/ -CMU_HFRCOFreq_TypeDef CMU_HFRCOBandGet(void) -{ - return (CMU_HFRCOFreq_TypeDef)SystemHfrcoFreq; -} - -/***************************************************************************//** - * @brief - * Set HFRCO calibration for the selected target frequency. - * - * @param[in] setFreq - * HFRCO frequency to set - ******************************************************************************/ -void CMU_HFRCOBandSet(CMU_HFRCOFreq_TypeDef setFreq) -{ - uint32_t freqCal; - uint32_t sysFreq; - uint32_t prevFreq; - - /* Get DEVINFO index, set CMSIS frequency SystemHfrcoFreq */ - freqCal = CMU_HFRCODevinfoGet(setFreq); - EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); - prevFreq = SystemHfrcoFreq; - SystemHfrcoFreq = (uint32_t)setFreq; - - /* Set max wait-states while changing core clock */ - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - flashWaitStateMax(); - } - - /* Wait for any previous sync to complete, and then set calibration data - for the selected frequency. */ - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT)) ; - - /* Check for valid calibration data */ - EFM_ASSERT(freqCal != UINT_MAX); - - /* Set divider in HFRCOCTRL for 1, 2 and 4MHz */ - switch (setFreq) { - case cmuHFRCOFreq_1M0Hz: - freqCal = (freqCal & ~_CMU_HFRCOCTRL_CLKDIV_MASK) - | CMU_HFRCOCTRL_CLKDIV_DIV4; - break; - - case cmuHFRCOFreq_2M0Hz: - freqCal = (freqCal & ~_CMU_HFRCOCTRL_CLKDIV_MASK) - | CMU_HFRCOCTRL_CLKDIV_DIV2; - break; - - case cmuHFRCOFreq_4M0Hz: - freqCal = (freqCal & ~_CMU_HFRCOCTRL_CLKDIV_MASK) - | CMU_HFRCOCTRL_CLKDIV_DIV1; - break; - - default: - break; - } - - /* Update HFLE configuration before updating HFRCO. - Use the new set frequency. */ - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - /* setFreq is worst-case as dividers may reduce the HFLE frequency. */ - setHfLeConfig(setFreq); - } - - if (setFreq > prevFreq) { -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* When increasing frequency we need to voltage scale before the change */ - EMU_VScaleEM01ByClock(setFreq, true); -#endif - } - - CMU->HFRCOCTRL = freqCal; - - /* If HFRCO is selected as HF clock, optimize flash access wait-state configuration - for this frequency and update CMSIS core clock variable. */ - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - /* Call SystemCoreClockGet() to update CMSIS core clock variable. */ - sysFreq = SystemCoreClockGet(); - EFM_ASSERT(sysFreq <= (uint32_t)setFreq); - EFM_ASSERT(sysFreq <= SystemHfrcoFreq); - EFM_ASSERT(setFreq == SystemHfrcoFreq); - CMU_UpdateWaitStates(sysFreq, VSCALE_DEFAULT); - } - - /* Reduce HFLE frequency if possible. */ - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - - if (setFreq <= prevFreq) { -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* When decreasing frequency we need to voltage scale after the change */ - EMU_VScaleEM01ByClock(0, true); -#endif - } -} -#endif /* _CMU_HFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_HFRCOCTRL_SUDELAY_MASK) -/***************************************************************************//** - * @brief - * Get the HFRCO startup delay. - * - * @details - * Please refer to the reference manual for further details. - * - * @return - * The startup delay in use. - ******************************************************************************/ -uint32_t CMU_HFRCOStartupDelayGet(void) -{ - return (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_SUDELAY_MASK) - >> _CMU_HFRCOCTRL_SUDELAY_SHIFT; -} - -/***************************************************************************//** - * @brief - * Set the HFRCO startup delay. - * - * @details - * Please refer to the reference manual for further details. - * - * @param[in] delay - * The startup delay to set (<= 31). - ******************************************************************************/ -void CMU_HFRCOStartupDelaySet(uint32_t delay) -{ - EFM_ASSERT(delay <= 31); - - delay &= _CMU_HFRCOCTRL_SUDELAY_MASK >> _CMU_HFRCOCTRL_SUDELAY_SHIFT; - CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_SUDELAY_MASK)) - | (delay << _CMU_HFRCOCTRL_SUDELAY_SHIFT); -} -#endif - -#if defined(_CMU_USHFRCOCTRL_FREQRANGE_MASK) -/**************************************************************************//** - * @brief - * Get the USHFRCO frequency calibration word in DEVINFO - * - * @param[in] freq - * Frequency in Hz - * - * @return - * USHFRCO calibration word for a given frequency - *****************************************************************************/ -static uint32_t CMU_USHFRCODevinfoGet(CMU_USHFRCOFreq_TypeDef freq) -{ - switch (freq) { - case cmuUSHFRCOFreq_16M0Hz: - return DEVINFO->USHFRCOCAL7; - - case cmuUSHFRCOFreq_32M0Hz: - return DEVINFO->USHFRCOCAL11; - - case cmuUSHFRCOFreq_48M0Hz: - return DEVINFO->USHFRCOCAL13; - - case cmuUSHFRCOFreq_50M0Hz: - return DEVINFO->USHFRCOCAL14; - - default: /* cmuUSHFRCOFreq_UserDefined */ - return 0; - } -} - -/***************************************************************************//** - * @brief - * Get current USHFRCO frequency. - * - * @return - * HFRCO frequency - ******************************************************************************/ -CMU_USHFRCOFreq_TypeDef CMU_USHFRCOBandGet(void) -{ - return (CMU_USHFRCOFreq_TypeDef) ushfrcoFreq; -} - -/***************************************************************************//** - * @brief - * Set USHFRCO calibration for the selected target frequency. - * - * @param[in] setFreq - * USHFRCO frequency to set - ******************************************************************************/ -void CMU_USHFRCOBandSet(CMU_USHFRCOFreq_TypeDef setFreq) -{ - uint32_t freqCal; - - /* Get DEVINFO calibration values */ - freqCal = CMU_USHFRCODevinfoGet(setFreq); - EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); - ushfrcoFreq = (uint32_t)setFreq; - - /* Wait for any previous sync to complete, and then set calibration data - for the selected frequency. */ - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) ; - - CMU->USHFRCOCTRL = freqCal; -} -#endif /* _CMU_USHFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK) -/***************************************************************************//** - * @brief - * Enable or disable HFXO autostart - * - * @param[in] userSel - * Additional user specified enable bit. - * - * @param[in] enEM0EM1Start - * If true, HFXO is automatically started upon entering EM0/EM1 entry from - * EM2/EM3. HFXO selection has to be handled by the user. - * If false, HFXO is not started automatically when entering EM0/EM1. - * - * @param[in] enEM0EM1StartSel - * If true, HFXO is automatically started and immediately selected upon - * entering EM0/EM1 entry from EM2/EM3. Note that this option stalls the use of - * HFSRCCLK until HFXO becomes ready. - * If false, HFXO is not started or selected automatically when entering - * EM0/EM1. - ******************************************************************************/ -void CMU_HFXOAutostartEnable(uint32_t userSel, - bool enEM0EM1Start, - bool enEM0EM1StartSel) -{ - uint32_t hfxoFreq; - uint32_t hfxoCtrl; - - /* Mask supported enable bits. */ -#if defined(_CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_MASK) - userSel &= _CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_MASK; -#else - userSel = 0; -#endif - - hfxoCtrl = CMU->HFXOCTRL & ~(userSel - | _CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK - | _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK); - - hfxoCtrl |= userSel - | (enEM0EM1Start ? CMU_HFXOCTRL_AUTOSTARTEM0EM1 : 0) - | (enEM0EM1StartSel ? CMU_HFXOCTRL_AUTOSTARTSELEM0EM1 : 0); - - /* Set wait-states for HFXO if automatic start and select is configured. */ - if (userSel || enEM0EM1StartSel) { - hfxoFreq = SystemHFXOClockGet(); - CMU_UpdateWaitStates(hfxoFreq, VSCALE_DEFAULT); - setHfLeConfig(hfxoFreq); - } - - /* Update HFXOCTRL after wait-states are updated as HF may automatically switch - to HFXO when automatic select is enabled . */ - CMU->HFXOCTRL = hfxoCtrl; -} -#endif - -/**************************************************************************//** - * @brief - * Set HFXO control registers - * - * @note - * HFXO configuration should be obtained from a configuration tool, - * app note or xtal datasheet. This function disables the HFXO to ensure - * a valid state before update. - * - * @param[in] hfxoInit - * HFXO setup parameters - *****************************************************************************/ -void CMU_HFXOInit(const CMU_HFXOInit_TypeDef *hfxoInit) -{ - /* Do not disable HFXO if it is currently selected as HF/Core clock */ - EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_HFXO); - - /* HFXO must be disabled before reconfiguration */ - CMU_OscillatorEnable(cmuOsc_HFXO, false, true); - -#if defined(_SILICON_LABS_32B_SERIES_1) && (_SILICON_LABS_GECKO_INTERNAL_SDID >= 100) - uint32_t tmp = CMU_HFXOCTRL_MODE_XTAL; - - switch (hfxoInit->mode) { - case cmuOscMode_Crystal: - tmp = CMU_HFXOCTRL_MODE_XTAL; - break; - case cmuOscMode_External: - tmp = CMU_HFXOCTRL_MODE_DIGEXTCLK; - break; - case cmuOscMode_AcCoupled: - tmp = CMU_HFXOCTRL_MODE_ACBUFEXTCLK; - break; - default: - EFM_ASSERT(false); /* Unsupported configuration */ - } - - /* HFXO Doubler can only be enabled on crystals up to max 25 MHz */ - if (SystemHFXOClockGet() <= 25000000) { - tmp |= CMU_HFXOCTRL_HFXOX2EN; - } - - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~(_CMU_HFXOCTRL_MODE_MASK - | _CMU_HFXOCTRL_HFXOX2EN_MASK)) - | tmp; - - /* Set tuning for startup and steady state */ - CMU->HFXOSTARTUPCTRL = (hfxoInit->ctuneStartup << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimStartup << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT); - - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK - | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)) - | (hfxoInit->ctuneSteadyState << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimSteadyState << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT); - - /* Set timeouts */ - CMU->HFXOTIMEOUTCTRL = (hfxoInit->timeoutPeakDetect << _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT) - | (hfxoInit->timeoutSteady << _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT) - | (hfxoInit->timeoutStartup << _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT); - -#elif defined(_CMU_HFXOCTRL_MASK) - /* Verify that the deprecated autostart fields are not used, - * @ref CMU_HFXOAutostartEnable must be used instead. */ - EFM_ASSERT(!(hfxoInit->autoStartEm01 - || hfxoInit->autoSelEm01 - || hfxoInit->autoStartSelOnRacWakeup)); - - uint32_t tmp = CMU_HFXOCTRL_MODE_XTAL; - - /* AC coupled external clock not supported */ - EFM_ASSERT(hfxoInit->mode != cmuOscMode_AcCoupled); - if (hfxoInit->mode == cmuOscMode_External) { - tmp = CMU_HFXOCTRL_MODE_DIGEXTCLK; - } - - /* Apply control settings */ - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_MODE_MASK) - | tmp; - BUS_RegBitWrite(&CMU->HFXOCTRL, _CMU_HFXOCTRL_LOWPOWER_SHIFT, hfxoInit->lowPowerMode); - - /* Set XTAL tuning parameters */ - -#if defined(_CMU_HFXOCTRL1_PEAKDETTHR_MASK) - /* Set peak detection threshold */ - CMU->HFXOCTRL1 = (CMU->HFXOCTRL1 & ~_CMU_HFXOCTRL1_PEAKDETTHR_MASK) - | (hfxoInit->thresholdPeakDetect << _CMU_HFXOCTRL1_PEAKDETTHR_SHIFT); -#endif - /* Set tuning for startup and steady state */ - CMU->HFXOSTARTUPCTRL = (hfxoInit->ctuneStartup << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimStartup << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT); - - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK - | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK)) - | (hfxoInit->ctuneSteadyState << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimSteadyState << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT) - | (hfxoInit->regIshSteadyState << _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT) - | getRegIshUpperVal(hfxoInit->regIshSteadyState); - - /* Set timeouts */ - CMU->HFXOTIMEOUTCTRL = (hfxoInit->timeoutPeakDetect << _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT) - | (hfxoInit->timeoutSteady << _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT) - | (hfxoInit->timeoutStartup << _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT) - | (hfxoInit->timeoutShuntOptimization << _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_SHIFT); - -#else - CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_HFXOTIMEOUT_MASK - | _CMU_CTRL_HFXOBOOST_MASK - | _CMU_CTRL_HFXOMODE_MASK - | _CMU_CTRL_HFXOGLITCHDETEN_MASK)) - | (hfxoInit->timeout << _CMU_CTRL_HFXOTIMEOUT_SHIFT) - | (hfxoInit->boost << _CMU_CTRL_HFXOBOOST_SHIFT) - | (hfxoInit->mode << _CMU_CTRL_HFXOMODE_SHIFT) - | (hfxoInit->glitchDetector ? CMU_CTRL_HFXOGLITCHDETEN : 0); -#endif -} - -/***************************************************************************//** - * @brief - * Get the LCD framerate divisor (FDIV) setting. - * - * @return - * The LCD framerate divisor. - ******************************************************************************/ -uint32_t CMU_LCDClkFDIVGet(void) -{ -#if defined(LCD_PRESENT) && defined(_CMU_LCDCTRL_MASK) - return (CMU->LCDCTRL & _CMU_LCDCTRL_FDIV_MASK) >> _CMU_LCDCTRL_FDIV_SHIFT; -#else - return 0; -#endif /* defined(LCD_PRESENT) */ -} - -/***************************************************************************//** - * @brief - * Set the LCD framerate divisor (FDIV) setting. - * - * @note - * The FDIV field (CMU LCDCTRL register) should only be modified while the - * LCD module is clock disabled (CMU LFACLKEN0.LCD bit is 0). This function - * will NOT modify FDIV if the LCD module clock is enabled. Please refer to - * CMU_ClockEnable() for disabling/enabling LCD clock. - * - * @param[in] div - * The FDIV setting to use. - ******************************************************************************/ -void CMU_LCDClkFDIVSet(uint32_t div) -{ -#if defined(LCD_PRESENT) && defined(_CMU_LCDCTRL_MASK) - EFM_ASSERT(div <= cmuClkDiv_128); - - /* Do not allow modification if LCD clock enabled */ - if (CMU->LFACLKEN0 & CMU_LFACLKEN0_LCD) { - return; - } - - div <<= _CMU_LCDCTRL_FDIV_SHIFT; - div &= _CMU_LCDCTRL_FDIV_MASK; - CMU->LCDCTRL = (CMU->LCDCTRL & ~_CMU_LCDCTRL_FDIV_MASK) | div; -#else - (void)div; /* Unused parameter */ -#endif /* defined(LCD_PRESENT) */ -} - -/**************************************************************************//** - * @brief - * Set LFXO control registers - * - * @note - * LFXO configuration should be obtained from a configuration tool, - * app note or xtal datasheet. This function disables the LFXO to ensure - * a valid state before update. - * - * @param[in] lfxoInit - * LFXO setup parameters - *****************************************************************************/ -void CMU_LFXOInit(const CMU_LFXOInit_TypeDef *lfxoInit) -{ - /* Do not disable LFXO if it is currently selected as HF/Core clock */ - EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_LFXO); - - /* LFXO must be disabled before reconfiguration */ - CMU_OscillatorEnable(cmuOsc_LFXO, false, false); - -#if defined(_CMU_LFXOCTRL_MASK) - BUS_RegMaskedWrite(&CMU->LFXOCTRL, - _CMU_LFXOCTRL_TUNING_MASK - | _CMU_LFXOCTRL_GAIN_MASK - | _CMU_LFXOCTRL_TIMEOUT_MASK - | _CMU_LFXOCTRL_MODE_MASK, - (lfxoInit->ctune << _CMU_LFXOCTRL_TUNING_SHIFT) - | (lfxoInit->gain << _CMU_LFXOCTRL_GAIN_SHIFT) - | (lfxoInit->timeout << _CMU_LFXOCTRL_TIMEOUT_SHIFT) - | (lfxoInit->mode << _CMU_LFXOCTRL_MODE_SHIFT)); -#else - bool cmuBoost = (lfxoInit->boost & 0x2); - BUS_RegMaskedWrite(&CMU->CTRL, - _CMU_CTRL_LFXOTIMEOUT_MASK - | _CMU_CTRL_LFXOBOOST_MASK - | _CMU_CTRL_LFXOMODE_MASK, - (lfxoInit->timeout << _CMU_CTRL_LFXOTIMEOUT_SHIFT) - | ((cmuBoost ? 1 : 0) << _CMU_CTRL_LFXOBOOST_SHIFT) - | (lfxoInit->mode << _CMU_CTRL_LFXOMODE_SHIFT)); -#endif - -#if defined(_EMU_AUXCTRL_REDLFXOBOOST_MASK) - bool emuReduce = (lfxoInit->boost & 0x1); - BUS_RegBitWrite(&EMU->AUXCTRL, _EMU_AUXCTRL_REDLFXOBOOST_SHIFT, emuReduce ? 1 : 0); -#endif -} - -/***************************************************************************//** - * @brief - * Enable/disable oscillator. - * - * @note - * WARNING: When this function is called to disable either cmuOsc_LFXO or - * cmuOsc_HFXO the LFXOMODE or HFXOMODE fields of the CMU_CTRL register - * are reset to the reset value. I.e. if external clock sources are selected - * in either LFXOMODE or HFXOMODE fields, the configuration will be cleared - * and needs to be reconfigured if needed later. - * - * @param[in] osc - * The oscillator to enable/disable. - * - * @param[in] enable - * @li true - enable specified oscillator. - * @li false - disable specified oscillator. - * - * @param[in] wait - * Only used if @p enable is true. - * @li true - wait for oscillator start-up time to timeout before returning. - * @li false - do not wait for oscillator start-up time to timeout before - * returning. - ******************************************************************************/ -void CMU_OscillatorEnable(CMU_Osc_TypeDef osc, bool enable, bool wait) -{ - uint32_t rdyBitPos; -#if defined(_SILICON_LABS_32B_SERIES_1) - uint32_t ensBitPos; -#endif -#if defined(_CMU_STATUS_HFXOPEAKDETRDY_MASK) - uint32_t hfxoTrimStatus; -#endif - - uint32_t enBit; - uint32_t disBit; - - switch (osc) { - case cmuOsc_HFRCO: - enBit = CMU_OSCENCMD_HFRCOEN; - disBit = CMU_OSCENCMD_HFRCODIS; - rdyBitPos = _CMU_STATUS_HFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_HFRCOENS_SHIFT; -#endif - break; - - case cmuOsc_HFXO: - enBit = CMU_OSCENCMD_HFXOEN; - disBit = CMU_OSCENCMD_HFXODIS; - rdyBitPos = _CMU_STATUS_HFXORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_HFXOENS_SHIFT; -#endif - break; - - case cmuOsc_AUXHFRCO: - enBit = CMU_OSCENCMD_AUXHFRCOEN; - disBit = CMU_OSCENCMD_AUXHFRCODIS; - rdyBitPos = _CMU_STATUS_AUXHFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_AUXHFRCOENS_SHIFT; -#endif - break; - - case cmuOsc_LFRCO: - enBit = CMU_OSCENCMD_LFRCOEN; - disBit = CMU_OSCENCMD_LFRCODIS; - rdyBitPos = _CMU_STATUS_LFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_LFRCOENS_SHIFT; -#endif - break; - - case cmuOsc_LFXO: - enBit = CMU_OSCENCMD_LFXOEN; - disBit = CMU_OSCENCMD_LFXODIS; - rdyBitPos = _CMU_STATUS_LFXORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_LFXOENS_SHIFT; -#endif - break; - -#if defined(_CMU_STATUS_USHFRCOENS_MASK) - case cmuOsc_USHFRCO: - enBit = CMU_OSCENCMD_USHFRCOEN; - disBit = CMU_OSCENCMD_USHFRCODIS; - rdyBitPos = _CMU_STATUS_USHFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_USHFRCOENS_SHIFT; -#endif - break; -#endif - -#if defined(_CMU_STATUS_PLFRCOENS_MASK) - case cmuOsc_PLFRCO: - enBit = CMU_OSCENCMD_PLFRCOEN; - disBit = CMU_OSCENCMD_PLFRCODIS; - rdyBitPos = _CMU_STATUS_PLFRCORDY_SHIFT; - ensBitPos = _CMU_STATUS_PLFRCOENS_SHIFT; - break; -#endif - - default: - /* Undefined clock source or cmuOsc_ULFRCO. ULFRCO is always enabled, - and cannot be disabled. Ie. the definition of cmuOsc_ULFRCO is primarely - intended for information: the ULFRCO is always on. */ - EFM_ASSERT(0); - return; - } - - if (enable) { - #if defined(_CMU_HFXOCTRL_MASK) - bool firstHfxoEnable = false; - - /* Enabling the HFXO for the first time requires special handling. We use the - * PEAKDETSHUTOPTMODE field of the HFXOCTRL register to see if this is the - * first time the HFXO is enabled. */ - if ((osc == cmuOsc_HFXO) && (getHfxoTuningMode() == HFXO_TUNING_MODE_AUTO)) { - /* REGPWRSEL must be set to DVDD before the HFXO can be enabled. */ -#if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) - EFM_ASSERT(EMU->PWRCTRL & EMU_PWRCTRL_REGPWRSEL_DVDD); -#endif - - firstHfxoEnable = true; - /* First time we enable an external clock we should switch to CMD mode to make sure that - * we only do SCO and not PDA tuning. */ - if ((CMU->HFXOCTRL & (_CMU_HFXOCTRL_MODE_MASK)) == CMU_HFXOCTRL_MODE_DIGEXTCLK) { - setHfxoTuningMode(HFXO_TUNING_MODE_CMD); - } - } -#endif - CMU->OSCENCMD = enBit; - -#if defined(_SILICON_LABS_32B_SERIES_1) - /* Always wait for ENS to go high */ - while (!BUS_RegBitRead(&CMU->STATUS, ensBitPos)) { - } -#endif - - /* Wait for clock to become ready after enable */ - if (wait) { - while (!BUS_RegBitRead(&CMU->STATUS, rdyBitPos)) ; -#if defined(_SILICON_LABS_32B_SERIES_1) - if ((osc == cmuOsc_HFXO) && firstHfxoEnable) { - if ((CMU->HFXOCTRL & _CMU_HFXOCTRL_MODE_MASK) == CMU_HFXOCTRL_MODE_DIGEXTCLK) { -#if defined(CMU_CMD_HFXOSHUNTOPTSTART) - /* External clock mode should only do shunt current optimization. */ - CMU_OscillatorTuningOptimize(cmuOsc_HFXO, cmuHFXOTuningMode_ShuntCommand, true); -#endif - } else { - /* Wait for peak detection and shunt current optimization to complete. */ - CMU_OscillatorTuningWait(cmuOsc_HFXO, cmuHFXOTuningMode_Auto); - } - - /* Disable the HFXO again to apply the trims. Apply trim from HFXOTRIMSTATUS - when disabled. */ - hfxoTrimStatus = CMU_OscillatorTuningGet(cmuOsc_HFXO); - CMU_OscillatorEnable(cmuOsc_HFXO, false, true); - CMU_OscillatorTuningSet(cmuOsc_HFXO, hfxoTrimStatus); - - /* Restart in CMD mode. */ - CMU->OSCENCMD = enBit; - while (!BUS_RegBitRead(&CMU->STATUS, rdyBitPos)) ; - } -#endif - } - } else { - CMU->OSCENCMD = disBit; - -#if defined(_SILICON_LABS_32B_SERIES_1) - /* Always wait for ENS to go low */ - while (BUS_RegBitRead(&CMU->STATUS, ensBitPos)) { - } -#endif - } -} - -/***************************************************************************//** - * @brief - * Get oscillator frequency tuning setting. - * - * @param[in] osc - * Oscillator to get tuning value for, one of: - * @li #cmuOsc_LFRCO - * @li #cmuOsc_HFRCO @if _CMU_USHFRCOCTRL_TUNING_MASK - * @li #cmuOsc_USHFRCO - * @endif - * @li #cmuOsc_AUXHFRCO - * @li #cmuOsc_HFXO if CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE is defined - * - * @return - * The oscillator frequency tuning setting in use. - ******************************************************************************/ -uint32_t CMU_OscillatorTuningGet(CMU_Osc_TypeDef osc) -{ - uint32_t ret; - - switch (osc) { - case cmuOsc_LFRCO: - ret = (CMU->LFRCOCTRL & _CMU_LFRCOCTRL_TUNING_MASK) - >> _CMU_LFRCOCTRL_TUNING_SHIFT; - break; - - case cmuOsc_HFRCO: - ret = (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_TUNING_MASK) - >> _CMU_HFRCOCTRL_TUNING_SHIFT; - break; - -#if defined (_CMU_USHFRCOCTRL_TUNING_MASK) - case cmuOsc_USHFRCO: - ret = (CMU->USHFRCOCTRL & _CMU_USHFRCOCTRL_TUNING_MASK) - >> _CMU_USHFRCOCTRL_TUNING_SHIFT; - break; -#endif - - case cmuOsc_AUXHFRCO: - ret = (CMU->AUXHFRCOCTRL & _CMU_AUXHFRCOCTRL_TUNING_MASK) - >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT; - break; - -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - case cmuOsc_HFXO: - ret = CMU->HFXOTRIMSTATUS & (_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK -#if defined(_CMU_HFXOTRIMSTATUS_REGISH_MASK) - | _CMU_HFXOTRIMSTATUS_REGISH_MASK -#endif - ); - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - - return ret; -} - -/***************************************************************************//** - * @brief - * Set the oscillator frequency tuning control. - * - * @note - * Oscillator tuning is done during production, and the tuning value is - * automatically loaded after a reset. Changing the tuning value from the - * calibrated value is for more advanced use. Certain oscillators also have - * build-in tuning optimization. - * - * @param[in] osc - * Oscillator to set tuning value for, one of: - * @li #cmuOsc_LFRCO - * @li #cmuOsc_HFRCO @if _CMU_USHFRCOCTRL_TUNING_MASK - * @li #cmuOsc_USHFRCO - * @endif - * @li #cmuOsc_AUXHFRCO - * @li #cmuOsc_HFXO if PEAKDETSHUNTOPTMODE is available. Note that CMD mode is set. - * - * @param[in] val - * The oscillator frequency tuning setting to use. - ******************************************************************************/ -void CMU_OscillatorTuningSet(CMU_Osc_TypeDef osc, uint32_t val) -{ -#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK) - uint32_t regIshUpper; -#endif - - switch (osc) { - case cmuOsc_LFRCO: - EFM_ASSERT(val <= (_CMU_LFRCOCTRL_TUNING_MASK - >> _CMU_LFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_LFRCOCTRL_TUNING_MASK >> _CMU_LFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_LFRCOBSY_SHIFT)) ; -#endif - CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~(_CMU_LFRCOCTRL_TUNING_MASK)) - | (val << _CMU_LFRCOCTRL_TUNING_SHIFT); - break; - - case cmuOsc_HFRCO: - EFM_ASSERT(val <= (_CMU_HFRCOCTRL_TUNING_MASK - >> _CMU_HFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_HFRCOCTRL_TUNING_MASK >> _CMU_HFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT)) { - } -#endif - CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_TUNING_MASK)) - | (val << _CMU_HFRCOCTRL_TUNING_SHIFT); - break; - -#if defined (_CMU_USHFRCOCTRL_TUNING_MASK) - case cmuOsc_USHFRCO: - EFM_ASSERT(val <= (_CMU_USHFRCOCTRL_TUNING_MASK - >> _CMU_USHFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_USHFRCOCTRL_TUNING_MASK >> _CMU_USHFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) { - } -#endif - CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~(_CMU_USHFRCOCTRL_TUNING_MASK)) - | (val << _CMU_USHFRCOCTRL_TUNING_SHIFT); - break; -#endif - - case cmuOsc_AUXHFRCO: - EFM_ASSERT(val <= (_CMU_AUXHFRCOCTRL_TUNING_MASK - >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_AUXHFRCOCTRL_TUNING_MASK >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT)) { - } -#endif - CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL & ~(_CMU_AUXHFRCOCTRL_TUNING_MASK)) - | (val << _CMU_AUXHFRCOCTRL_TUNING_SHIFT); - break; - -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - case cmuOsc_HFXO: - - /* Do set PEAKDETSHUNTOPTMODE or HFXOSTEADYSTATECTRL if HFXO is enabled */ - EFM_ASSERT(!(CMU->STATUS & CMU_STATUS_HFXOENS)); - - /* Switch to command mode. Automatic SCO and PDA calibration is not done - at the next enable. Set user REGISH, REGISHUPPER and IBTRIMXOCORE. */ - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - | CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD; - -#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK) - regIshUpper = getRegIshUpperVal((val & _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK) - >> _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT); - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL - & ~(_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK)) - | val - | regIshUpper; -#else - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL - & ~_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK) - | val; -#endif - - break; -#endif - - default: - EFM_ASSERT(0); - break; - } -} - -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) || defined(_CMU_HFXOCTRL_PEAKDETMODE_MASK) -/***************************************************************************//** - * @brief - * Wait for oscillator tuning optimization. - * - * @param[in] osc - * Oscillator to set tuning value for, one of: - * @li #cmuOsc_HFXO - * - * @param[in] mode - * Tuning optimization mode. - * - * @return - * Returns false on invalid parameters or oscillator error status. - ******************************************************************************/ -bool CMU_OscillatorTuningWait(CMU_Osc_TypeDef osc, - CMU_HFXOTuningMode_TypeDef mode) -{ - uint32_t waitFlags; - EFM_ASSERT(osc == cmuOsc_HFXO); - - /* Currently implemented for HFXO with PEAKDETSHUNTOPTMODE only */ - (void)osc; - - if (getHfxoTuningMode() == HFXO_TUNING_MODE_AUTO) { - waitFlags = HFXO_TUNING_READY_FLAGS; - } else { - /* Set wait flags for each command and wait */ - switch (mode) { -#if defined(_CMU_STATUS_HFXOSHUNTOPTRDY_MASK) - case cmuHFXOTuningMode_ShuntCommand: - waitFlags = CMU_STATUS_HFXOSHUNTOPTRDY; - break; -#endif - case cmuHFXOTuningMode_Auto: - waitFlags = HFXO_TUNING_READY_FLAGS; - break; - -#if defined(CMU_CMD_HFXOSHUNTOPTSTART) - case cmuHFXOTuningMode_PeakShuntCommand: - waitFlags = HFXO_TUNING_READY_FLAGS; - break; -#endif - - default: - waitFlags = _CMU_STATUS_MASK; - EFM_ASSERT(false); - } - } - while ((CMU->STATUS & waitFlags) != waitFlags) ; - -#if defined(CMU_IF_HFXOPEAKDETERR) - /* Check error flags */ - if (waitFlags & CMU_STATUS_HFXOPEAKDETRDY) { - return (CMU->IF & CMU_IF_HFXOPEAKDETERR ? true : false); - } -#endif - return true; -} - -/***************************************************************************//** - * @brief - * Start and optionally wait for oscillator tuning optimization. - * - * @param[in] osc - * Oscillator to set tuning value for, one of: - * @li #cmuOsc_HFXO - * - * @param[in] mode - * Tuning optimization mode. - * - * @param[in] wait - * Wait for tuning optimization to complete. - * true - wait for tuning optimization to complete. - * false - return without waiting. - * - * @return - * Returns false on invalid parameters or oscillator error status. - ******************************************************************************/ -bool CMU_OscillatorTuningOptimize(CMU_Osc_TypeDef osc, - CMU_HFXOTuningMode_TypeDef mode, - bool wait) -{ - switch (osc) { - case cmuOsc_HFXO: - if (mode) { -#if defined(CMU_IF_HFXOPEAKDETERR) - /* Clear error flag before command write */ - CMU->IFC = CMU_IFC_HFXOPEAKDETERR; -#endif - CMU->CMD = mode; - } - if (wait) { - return CMU_OscillatorTuningWait(osc, mode); - } - break; - - default: - EFM_ASSERT(false); - } - return true; -} -#endif - -/**************************************************************************//** - * @brief - * Determine if currently selected PCNTn clock used is external or LFBCLK. - * - * @param[in] instance - * PCNT instance number to get currently selected clock source for. - * - * @return - * @li true - selected clock is external clock. - * @li false - selected clock is LFBCLK. - *****************************************************************************/ -bool CMU_PCNTClockExternalGet(unsigned int instance) -{ - uint32_t setting; - - switch (instance) { -#if defined(_CMU_PCNTCTRL_PCNT0CLKEN_MASK) - case 0: - setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0; - break; - -#if defined(_CMU_PCNTCTRL_PCNT1CLKEN_MASK) - case 1: - setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0; - break; - -#if defined(_CMU_PCNTCTRL_PCNT2CLKEN_MASK) - case 2: - setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0; - break; -#endif -#endif -#endif - - default: - setting = 0; - break; - } - return (setting ? true : false); -} - -/**************************************************************************//** - * @brief - * Select PCNTn clock. - * - * @param[in] instance - * PCNT instance number to set selected clock source for. - * - * @param[in] external - * Set to true to select external clock, false to select LFBCLK. - *****************************************************************************/ -void CMU_PCNTClockExternalSet(unsigned int instance, bool external) -{ -#if defined(PCNT_PRESENT) - uint32_t setting = 0; - - EFM_ASSERT(instance < PCNT_COUNT); - - if (external) { - setting = 1; - } - - BUS_RegBitWrite(&(CMU->PCNTCTRL), (instance * 2) + 1, setting); - -#else - (void)instance; /* Unused parameter */ - (void)external; /* Unused parameter */ -#endif -} - -#if defined(_CMU_USHFRCOCONF_BAND_MASK) -/***************************************************************************//** - * @brief - * Get USHFRCO band in use. - * - * @return - * USHFRCO band in use. - ******************************************************************************/ -CMU_USHFRCOBand_TypeDef CMU_USHFRCOBandGet(void) -{ - return (CMU_USHFRCOBand_TypeDef)((CMU->USHFRCOCONF - & _CMU_USHFRCOCONF_BAND_MASK) - >> _CMU_USHFRCOCONF_BAND_SHIFT); -} -#endif - -#if defined(_CMU_USHFRCOCONF_BAND_MASK) -/***************************************************************************//** - * @brief - * Set USHFRCO band to use. - * - * @param[in] band - * USHFRCO band to activate. - ******************************************************************************/ -void CMU_USHFRCOBandSet(CMU_USHFRCOBand_TypeDef band) -{ - uint32_t tuning; - uint32_t fineTuning; - CMU_Select_TypeDef osc; - - /* Cannot switch band if USHFRCO is already selected as HF clock. */ - osc = CMU_ClockSelectGet(cmuClock_HF); - EFM_ASSERT((CMU_USHFRCOBandGet() != band) && (osc != cmuSelect_USHFRCO)); - - /* Read tuning value from calibration table */ - switch (band) { - case cmuUSHFRCOBand_24MHz: - tuning = (DEVINFO->USHFRCOCAL0 & _DEVINFO_USHFRCOCAL0_BAND24_TUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND24_TUNING_SHIFT; - fineTuning = (DEVINFO->USHFRCOCAL0 - & _DEVINFO_USHFRCOCAL0_BAND24_FINETUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND24_FINETUNING_SHIFT; - ushfrcoFreq = 24000000UL; - break; - - case cmuUSHFRCOBand_48MHz: - tuning = (DEVINFO->USHFRCOCAL0 & _DEVINFO_USHFRCOCAL0_BAND48_TUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND48_TUNING_SHIFT; - fineTuning = (DEVINFO->USHFRCOCAL0 - & _DEVINFO_USHFRCOCAL0_BAND48_FINETUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND48_FINETUNING_SHIFT; - /* Enable the clock divider before switching the band from 24 to 48MHz */ - BUS_RegBitWrite(&CMU->USHFRCOCONF, _CMU_USHFRCOCONF_USHFRCODIV2DIS_SHIFT, 0); - ushfrcoFreq = 48000000UL; - break; - - default: - EFM_ASSERT(0); - return; - } - - /* Set band and tuning */ - CMU->USHFRCOCONF = (CMU->USHFRCOCONF & ~_CMU_USHFRCOCONF_BAND_MASK) - | (band << _CMU_USHFRCOCONF_BAND_SHIFT); - CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~_CMU_USHFRCOCTRL_TUNING_MASK) - | (tuning << _CMU_USHFRCOCTRL_TUNING_SHIFT); - CMU->USHFRCOTUNE = (CMU->USHFRCOTUNE & ~_CMU_USHFRCOTUNE_FINETUNING_MASK) - | (fineTuning << _CMU_USHFRCOTUNE_FINETUNING_SHIFT); - - /* Disable the clock divider after switching the band from 48 to 24MHz */ - if (band == cmuUSHFRCOBand_24MHz) { - BUS_RegBitWrite(&CMU->USHFRCOCONF, _CMU_USHFRCOCONF_USHFRCODIV2DIS_SHIFT, 1); - } -} -#endif - -/** @} (end addtogroup CMU) */ -/** @} (end addtogroup emlib) */ -#endif /* __EM_CMU_H */ diff --git a/targets/efm32/emlib/em_cryotimer.c b/targets/efm32/emlib/em_cryotimer.c deleted file mode 100644 index 66f4ac5..0000000 --- a/targets/efm32/emlib/em_cryotimer.c +++ /dev/null @@ -1,61 +0,0 @@ -/***************************************************************************//** - * @file em_cryotimer.c - * @brief Ultra Low Energy Timer/Counter (CRYOTIMER) peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software.@n - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software.@n - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_cryotimer.h" -#include "em_bus.h" - -#if defined(CRYOTIMER_PRESENT) && (CRYOTIMER_COUNT == 1) - -/***************************************************************************//** - * @brief - * Initialize the CRYOTIMER. - * - * @details - * Use this function to initialize the CRYOTIMER. - * Select prescaler setting and select low frequency oscillator. - * Refer to the configuration structure @ref CRYOTIMER_Init_TypeDef for more - * details. - * - * @param[in] init - * Pointer to initialization structure. - ******************************************************************************/ -void CRYOTIMER_Init(const CRYOTIMER_Init_TypeDef *init) -{ - CRYOTIMER->PERIODSEL = (uint32_t)init->period & _CRYOTIMER_PERIODSEL_MASK; - CRYOTIMER->CTRL = ((uint32_t)init->enable << _CRYOTIMER_CTRL_EN_SHIFT) - | ((uint32_t)init->debugRun << _CRYOTIMER_CTRL_DEBUGRUN_SHIFT) - | ((uint32_t)init->osc << _CRYOTIMER_CTRL_OSCSEL_SHIFT) - | ((uint32_t)init->presc << _CRYOTIMER_CTRL_PRESC_SHIFT); - CRYOTIMER_EM4WakeupEnable(init->em4Wakeup); -} - -#endif /* defined(CRYOTIMER_PRESENT) && (CRYOTIMER_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_crypto.c b/targets/efm32/emlib/em_crypto.c deleted file mode 100644 index 61f5bc9..0000000 --- a/targets/efm32/emlib/em_crypto.c +++ /dev/null @@ -1,1822 +0,0 @@ -/***************************************************************************//** - * @file em_crypto.c - * @brief Cryptography accelerator peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software.@n - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software.@n - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ -#include "em_device.h" - -#if defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0) - -#include "em_crypto.h" -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup CRYPTO - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#define CRYPTO_INSTRUCTIONS_PER_REG (4) -#define CRYPTO_INSTRUCTIONS_MAX (12) -#define CRYPTO_INSTRUCTION_REGS (CRYPTO_INSTRUCTIONS_MAX / CRYPTO_INSTRUCTIONS_PER_REG) - -#define CRYPTO_SHA1_BLOCK_SIZE_IN_BITS (512) -#define CRYPTO_SHA1_BLOCK_SIZE_IN_BYTES (CRYPTO_SHA1_BLOCK_SIZE_IN_BITS / 8) -#define CRYPTO_SHA1_BLOCK_SIZE_IN_32BIT_WORDS (CRYPTO_SHA1_BLOCK_SIZE_IN_BYTES / sizeof(uint32_t)) -#define CRYPTO_SHA1_DIGEST_SIZE_IN_32BIT_WORDS (CRYPTO_SHA1_DIGEST_SIZE_IN_BYTES / sizeof(uint32_t)) - -#define CRYPTO_SHA256_BLOCK_SIZE_IN_BITS (512) -#define CRYPTO_SHA256_BLOCK_SIZE_IN_BYTES (CRYPTO_SHA256_BLOCK_SIZE_IN_BITS / 8) -#define CRYPTO_SHA256_BLOCK_SIZE_IN_32BIT_WORDS (CRYPTO_SHA256_BLOCK_SIZE_IN_BYTES / sizeof(uint32_t)) - -#define CRYPTO_SHA256_DIGEST_SIZE_IN_32BIT_WORDS (CRYPTO_SHA256_DIGEST_SIZE_IN_BYTES / sizeof(uint32_t)) - -#define PARTIAL_OPERAND_WIDTH_LOG2 (7) /* 2^7 = 128 */ -#define PARTIAL_OPERAND_WIDTH (1 << PARTIAL_OPERAND_WIDTH_LOG2) -#define PARTIAL_OPERAND_WIDTH_MASK (PARTIAL_OPERAND_WIDTH - 1) -#define PARTIAL_OPERAND_WIDTH_IN_BYTES (PARTIAL_OPERAND_WIDTH / 8) -#define PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS (PARTIAL_OPERAND_WIDTH_IN_BYTES / sizeof(uint32_t)) - -#define SWAP32(x) (__REV(x)) - -#define CRYPTO_AES_BLOCKSIZE (16) - -/******************************************************************************* - *********************** STATIC FUNCTIONS ********************************** - ******************************************************************************/ - -static inline void CRYPTO_AES_ProcessLoop(CRYPTO_TypeDef *crypto, - uint32_t len, - CRYPTO_DataReg_TypeDef inReg, - uint32_t * in, - CRYPTO_DataReg_TypeDef outReg, - uint32_t * out); - -static void CRYPTO_AES_CBCx(CRYPTO_TypeDef *crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt, - CRYPTO_KeyWidth_TypeDef keyWidth); - -static void CRYPTO_AES_CFBx(CRYPTO_TypeDef *crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt, - CRYPTO_KeyWidth_TypeDef keyWidth); - -static void CRYPTO_AES_CTRx(CRYPTO_TypeDef *crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - uint8_t * ctr, - CRYPTO_AES_CtrFuncPtr_TypeDef ctrFunc, - CRYPTO_KeyWidth_TypeDef keyWidth); - -static void CRYPTO_AES_ECBx(CRYPTO_TypeDef *crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - bool encrypt, - CRYPTO_KeyWidth_TypeDef keyWidth); - -static void CRYPTO_AES_OFBx(CRYPTO_TypeDef *crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - CRYPTO_KeyWidth_TypeDef keyWidth); - -#ifdef USE_VARIABLE_SIZED_DATA_LOADS -/***************************************************************************//** - * @brief - * Write variable sized 32 bit data array (max 128 bits) to a DATAX register - * - * @details - * Write variable sized 32 bit array (max 128 bits / 4 words) to a DATAX - * register in the CRYPTO module. - * - * @param[in] dataReg The 128 bits DATA register. - * @param[in] val Value of the data to write to the DATA register. - * @param[in] valSize Size of @ref val in number of 32bit words. - ******************************************************************************/ -__STATIC_INLINE -void CRYPTO_DataWriteVariableSize(CRYPTO_DataReg_TypeDef dataReg, - const CRYPTO_Data_TypeDef val, - int valSize) -{ - int i; - volatile uint32_t * reg = (volatile uint32_t *) dataReg; - - if (valSize < 4) { - /* Non optimal write of data. */ - for (i = 0; i < valSize; i++) { - *reg = *val++; - } - for (; i < 4; i++) { - *reg = 0; - } - } else { - CRYPTO_BurstToCrypto(reg, &val[0]); - } -} -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Set the modulus used for wide modular operations. - * - * @details - * This function sets the modulus to be used by the modular instructions - * of the CRYPTO module. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[in] modulusId - * Modulus identifier. - ******************************************************************************/ -void CRYPTO_ModulusSet(CRYPTO_TypeDef * crypto, - CRYPTO_ModulusId_TypeDef modulusId) -{ - uint32_t temp = crypto->WAC & (~(_CRYPTO_WAC_MODULUS_MASK | _CRYPTO_WAC_MODOP_MASK)); - - switch (modulusId) { - case cryptoModulusBin256: - case cryptoModulusBin128: - case cryptoModulusGcmBin128: - case cryptoModulusEccB233: - case cryptoModulusEccB163: -#ifdef _CRYPTO_WAC_MODULUS_ECCBIN233N - case cryptoModulusEccB233Order: - case cryptoModulusEccB233KOrder: - case cryptoModulusEccB163Order: - case cryptoModulusEccB163KOrder: -#endif - crypto->WAC = temp | modulusId | CRYPTO_WAC_MODOP_BINARY; - break; - - case cryptoModulusEccP256: - case cryptoModulusEccP224: - case cryptoModulusEccP192: -#ifdef _CRYPTO_WAC_MODULUS_ECCPRIME256P - case cryptoModulusEccP256Order: - case cryptoModulusEccP224Order: - case cryptoModulusEccP192Order: -#endif - crypto->WAC = temp | modulusId | CRYPTO_WAC_MODOP_REGULAR; - break; - - default: - /* Unknown modulus identifier. */ - EFM_ASSERT(0); - } -} - -/***************************************************************************//** - * @brief - * Read the key value currently used by the CRYPTO module. - * - * @details - * Read 128 bits or 256 bits from KEY register in the CRYPTO module. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[in] val - * Value of the data to write to the KEYBUF register. - * - * @param[in] keyWidth - * Key width - 128 or 256 bits - ******************************************************************************/ -void CRYPTO_KeyRead(CRYPTO_TypeDef * crypto, - CRYPTO_KeyBuf_TypeDef val, - CRYPTO_KeyWidth_TypeDef keyWidth) -{ - EFM_ASSERT(val); - - CRYPTO_BurstFromCrypto(&crypto->KEY, &val[0]); - if (keyWidth == cryptoKey256Bits) { - CRYPTO_BurstFromCrypto(&crypto->KEY, &val[4]); - } -} - -/***************************************************************************//** - * @brief - * Perform a SHA-1 hash operation on a message. - * - * @details - * This function performs a SHA-1 hash operation on the message specified by - * msg with length msgLen, and returns the message digest in msgDigest. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[in] msg - * Message to hash. - * - * @param[in] msgLen - * Length of message in bytes. - * - * @param[out] msgDigest - * Message digest. - ******************************************************************************/ -void CRYPTO_SHA_1(CRYPTO_TypeDef * crypto, - const uint8_t * msg, - uint64_t msgLen, - CRYPTO_SHA1_Digest_TypeDef msgDigest) -{ - uint32_t temp; - uint32_t len; - int blockLen; - uint32_t shaBlock[CRYPTO_SHA1_BLOCK_SIZE_IN_32BIT_WORDS] = - { - /* Initial value */ - 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0 - }; - uint8_t * p8ShaBlock = (uint8_t *) shaBlock; - - /* Initialize crypto module to do SHA-1. */ - crypto->CTRL = CRYPTO_CTRL_SHA_SHA1; - crypto->SEQCTRL = 0; - crypto->SEQCTRLB = 0; - - /* Set result width of MADD32 operation. */ - CRYPTO_ResultWidthSet(crypto, cryptoResult256Bits); - - /* Write init value to DDATA1. */ - CRYPTO_DDataWrite(&crypto->DDATA1, shaBlock); - - /* Copy data to DDATA0 and select DDATA0 and DDATA1 for SHA operation. */ - CRYPTO_EXECUTE_2(crypto, - CRYPTO_CMD_INSTR_DDATA1TODDATA0, - CRYPTO_CMD_INSTR_SELDDATA0DDATA1); - - len = msgLen; - - while (len >= CRYPTO_SHA1_BLOCK_SIZE_IN_BYTES) { - /* Write block to QDATA1. */ - CRYPTO_QDataWrite(&crypto->QDATA1BIG, (uint32_t *) msg); - - /* Execute SHA */ - CRYPTO_EXECUTE_3(crypto, - CRYPTO_CMD_INSTR_SHA, - CRYPTO_CMD_INSTR_MADD32, - CRYPTO_CMD_INSTR_DDATA0TODDATA1); - - len -= CRYPTO_SHA1_BLOCK_SIZE_IN_BYTES; - msg += CRYPTO_SHA1_BLOCK_SIZE_IN_BYTES; - } - - blockLen = 0; - - /* Build the last (or second to last) block */ - for (; len; len--) { - p8ShaBlock[blockLen++] = *msg++; - } - - /* append the '1' bit */ - p8ShaBlock[blockLen++] = 0x80; - - /* if the length is currently above 56 bytes we append zeros - * then compress. Then we can fall back to padding zeros and length - * encoding like normal. - */ - if (blockLen > 56) { - while (blockLen < 64) - p8ShaBlock[blockLen++] = 0; - - /* Write block to QDATA1BIG. */ - CRYPTO_QDataWrite(&crypto->QDATA1BIG, shaBlock); - - /* Execute SHA */ - CRYPTO_EXECUTE_3(crypto, - CRYPTO_CMD_INSTR_SHA, - CRYPTO_CMD_INSTR_MADD32, - CRYPTO_CMD_INSTR_DDATA0TODDATA1); - blockLen = 0; - } - - /* pad upto 56 bytes of zeroes */ - while (blockLen < 56) - p8ShaBlock[blockLen++] = 0; - - /* And finally, encode the message length. */ - { - uint64_t msgLenInBits = msgLen << 3; - temp = msgLenInBits >> 32; - *(uint32_t*)&p8ShaBlock[56] = SWAP32(temp); - temp = msgLenInBits & 0xFFFFFFFF; - *(uint32_t*)&p8ShaBlock[60] = SWAP32(temp); - } - - /* Write block to QDATA1BIG. */ - CRYPTO_QDataWrite(&crypto->QDATA1BIG, shaBlock); - - /* Execute SHA */ - CRYPTO_EXECUTE_3(crypto, - CRYPTO_CMD_INSTR_SHA, - CRYPTO_CMD_INSTR_MADD32, - CRYPTO_CMD_INSTR_DDATA0TODDATA1); - - /* Read resulting message digest from DDATA0BIG. */ - ((uint32_t*)msgDigest)[0] = crypto->DDATA0BIG; - ((uint32_t*)msgDigest)[1] = crypto->DDATA0BIG; - ((uint32_t*)msgDigest)[2] = crypto->DDATA0BIG; - ((uint32_t*)msgDigest)[3] = crypto->DDATA0BIG; - ((uint32_t*)msgDigest)[4] = crypto->DDATA0BIG; - temp = crypto->DDATA0BIG; - temp = crypto->DDATA0BIG; - temp = crypto->DDATA0BIG; -} - -/***************************************************************************//** - * @brief - * Perform a SHA-256 hash operation on a message. - * - * @details - * This function performs a SHA-256 hash operation on the message specified - * by msg with length msgLen, and returns the message digest in msgDigest. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[in] msg - * Message to hash. - * - * @param[in] msgLen - * Length of message in bytes. - * - * @param[out] msgDigest - * Message digest. - ******************************************************************************/ -void CRYPTO_SHA_256(CRYPTO_TypeDef * crypto, - const uint8_t * msg, - uint64_t msgLen, - CRYPTO_SHA256_Digest_TypeDef msgDigest) -{ - uint32_t temp; - uint32_t len; - int blockLen; - uint32_t shaBlock[CRYPTO_SHA256_BLOCK_SIZE_IN_32BIT_WORDS] = - { - /* Initial value */ - 0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a, - 0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19 - }; - uint8_t * p8ShaBlock = (uint8_t *) shaBlock; - - /* Initialize crypyo module to do SHA-256 (SHA-2). */ - crypto->CTRL = CRYPTO_CTRL_SHA_SHA2; - crypto->SEQCTRL = 0; - crypto->SEQCTRLB = 0; - - /* Set result width of MADD32 operation. */ - CRYPTO_ResultWidthSet(crypto, cryptoResult256Bits); - - /* Write init value to DDATA1. */ - CRYPTO_DDataWrite(&crypto->DDATA1, shaBlock); - - /* Copy data ot DDATA0 and select DDATA0 and DDATA1 for SHA operation. */ - CRYPTO_EXECUTE_2(crypto, - CRYPTO_CMD_INSTR_DDATA1TODDATA0, - CRYPTO_CMD_INSTR_SELDDATA0DDATA1); - len = msgLen; - - while (len >= CRYPTO_SHA256_BLOCK_SIZE_IN_BYTES) { - /* Write block to QDATA1BIG. */ - CRYPTO_QDataWrite(&crypto->QDATA1BIG, (uint32_t *) msg); - - /* Execute SHA */ - CRYPTO_EXECUTE_3(crypto, - CRYPTO_CMD_INSTR_SHA, - CRYPTO_CMD_INSTR_MADD32, - CRYPTO_CMD_INSTR_DDATA0TODDATA1); - - len -= CRYPTO_SHA256_BLOCK_SIZE_IN_BYTES; - msg += CRYPTO_SHA256_BLOCK_SIZE_IN_BYTES; - } - - blockLen = 0; - - /* Build the last (or second to last) block */ - for (; len; len--) { - p8ShaBlock[blockLen++] = *msg++; - } - - /* append the '1' bit */ - p8ShaBlock[blockLen++] = 0x80; - - /* if the length is currently above 56 bytes we append zeros - * then compress. Then we can fall back to padding zeros and length - * encoding like normal. - */ - if (blockLen > 56) { - while (blockLen < 64) - p8ShaBlock[blockLen++] = 0; - - /* Write block to QDATA1BIG. */ - CRYPTO_QDataWrite(&crypto->QDATA1BIG, shaBlock); - - /* Execute SHA */ - CRYPTO_EXECUTE_3(crypto, - CRYPTO_CMD_INSTR_SHA, - CRYPTO_CMD_INSTR_MADD32, - CRYPTO_CMD_INSTR_DDATA0TODDATA1); - blockLen = 0; - } - - /* Pad upto 56 bytes of zeroes */ - while (blockLen < 56) - p8ShaBlock[blockLen++] = 0; - - /* And finally, encode the message length. */ - { - uint64_t msgLenInBits = msgLen << 3; - temp = msgLenInBits >> 32; - *(uint32_t *)&p8ShaBlock[56] = SWAP32(temp); - temp = msgLenInBits & 0xFFFFFFFF; - *(uint32_t *)&p8ShaBlock[60] = SWAP32(temp); - } - - /* Write the final block to QDATA1BIG. */ - CRYPTO_QDataWrite(&crypto->QDATA1BIG, shaBlock); - - /* Execute SHA */ - CRYPTO_EXECUTE_3(crypto, - CRYPTO_CMD_INSTR_SHA, - CRYPTO_CMD_INSTR_MADD32, - CRYPTO_CMD_INSTR_DDATA0TODDATA1); - - /* Read resulting message digest from DDATA0BIG. */ - CRYPTO_DDataRead(&crypto->DDATA0BIG, (uint32_t *)msgDigest); -} - -/***************************************************************************//** - * @brief - * Set 32bit word array to zero. - * - * @param[in] words32bits Pointer to 32bit word array - * @param[in] num32bitWords Number of 32bit words in array - ******************************************************************************/ -__STATIC_INLINE void cryptoBigintZeroize(uint32_t * words32bits, - int num32bitWords) -{ - while (num32bitWords--) - *words32bits++ = 0; -} - -/***************************************************************************//** - * @brief - * Increment value of 32bit word array by one. - * - * @param[in] words32bits Pointer to 32bit word array - * @param[in] num32bitWords Number of 32bit words in array - ******************************************************************************/ -__STATIC_INLINE void cryptoBigintIncrement(uint32_t * words32bits, - int num32bitWords) -{ - int i; - for (i = 0; i < num32bitWords; i++) { - if (++words32bits[i] != 0) { - break; - } - } - return; -} - -/***************************************************************************//** - * @brief - * Multiply two big integers. - * - * @details - * This function uses the CRYPTO unit to multiply two big integer operands. - * If USE_VARIABLE_SIZED_DATA_LOADS is defined, the sizes of the operands - * may be any multiple of 32 bits. If USE_VARIABLE_SIZED_DATA_LOADS is _not_ - * defined, the sizes of the operands must be a multiple of 128 bits. - * - * @param[in] A operand A - * @param[in] aSize size of operand A in bits - * @param[in] B operand B - * @param[in] bSize size of operand B in bits - * @param[out] R result of multiplication - * @param[in] rSize size of result buffer R in bits - ******************************************************************************/ -void CRYPTO_Mul(CRYPTO_TypeDef * crypto, - uint32_t * A, int aSize, - uint32_t * B, int bSize, - uint32_t * R, int rSize) -{ - int i, j; - - /**************** Initializations ******************/ - -#ifdef USE_VARIABLE_SIZED_DATA_LOADS - int numWordsLastOperandA = (aSize & PARTIAL_OPERAND_WIDTH_MASK) >> 5; - int numPartialOperandsA = numWordsLastOperandA - ? (aSize >> PARTIAL_OPERAND_WIDTH_LOG2) + 1 - : aSize >> PARTIAL_OPERAND_WIDTH_LOG2; - int numWordsLastOperandB = (bSize & PARTIAL_OPERAND_WIDTH_MASK) >> 5; - int numPartialOperandsB = numWordsLastOperandB - ? (bSize >> PARTIAL_OPERAND_WIDTH_LOG2) + 1 - : bSize >> PARTIAL_OPERAND_WIDTH_LOG2; - int numWordsLastOperandR = (rSize & PARTIAL_OPERAND_WIDTH_MASK) >> 5; - int numPartialOperandsR = numWordsLastOperandR - ? (rSize >> PARTIAL_OPERAND_WIDTH_LOG2) + 1 - : rSize >> PARTIAL_OPERAND_WIDTH_LOG2; - EFM_ASSERT(numPartialOperandsA + numPartialOperandsB <= numPartialOperandsR); -#else - int numPartialOperandsA = aSize >> PARTIAL_OPERAND_WIDTH_LOG2; - int numPartialOperandsB = bSize >> PARTIAL_OPERAND_WIDTH_LOG2; - EFM_ASSERT((aSize & PARTIAL_OPERAND_WIDTH_MASK) == 0); - EFM_ASSERT((bSize & PARTIAL_OPERAND_WIDTH_MASK) == 0); -#endif - EFM_ASSERT(aSize + bSize <= rSize); - - /* Set R to zero. */ - cryptoBigintZeroize(R, rSize >> 5); - - /* Set multiplication width. */ - crypto->WAC = CRYPTO_WAC_MULWIDTH_MUL128 | CRYPTO_WAC_RESULTWIDTH_256BIT; - - /* Setup DMA request signalling in order for MCU to run in parallel with - CRYPTO instruction sequence execution, and prepare data loading which - can take place immediately when CRYPTO is ready inside the instruction - sequence. */ - crypto->CTRL = - CRYPTO_CTRL_DMA0RSEL_DATA0 | CRYPTO_CTRL_DMA0MODE_FULL - | CRYPTO_CTRL_DMA1RSEL_DATA1 | CRYPTO_CTRL_DMA1MODE_FULL; - - CRYPTO_EXECUTE_4(crypto, - CRYPTO_CMD_INSTR_CCLR, /* Carry = 0 */ - CRYPTO_CMD_INSTR_CLR, /* DDATA0 = 0 */ - /* clear result accumulation register */ - CRYPTO_CMD_INSTR_DDATA0TODDATA2, - CRYPTO_CMD_INSTR_SELDDATA1DDATA3); - /* - register map: - DDATA0: working register - DDATA1: B(j) - DDATA2: R(i+j+1) and R(i+j), combined with DMA entry for B(j) - DDATA3: A(i) - */ - - CRYPTO_SEQ_LOAD_10(crypto, - /* Temporarily load partial operand B(j) to DATA0. */ - /* R(i+j+1) is still in DATA1 */ - CRYPTO_CMD_INSTR_DMA0TODATA, - /* Move B(j) to DDATA1 */ - CRYPTO_CMD_INSTR_DDATA2TODDATA1, - - /* Restore previous partial result (now R(i+j)) */ - CRYPTO_CMD_INSTR_DATA1TODATA0, - - /* Load next partial result R(i+j+1) */ - CRYPTO_CMD_INSTR_DMA1TODATA, - - /* Execute partial multiplication A(i)inDDATA1 * B(j)inDDATA3*/ - CRYPTO_CMD_INSTR_MULO, - - /* Add the result to the previous partial result */ - /* AND take the previous carry value into account */ - /* at the right place (bit 128, ADDIC instruction */ - CRYPTO_CMD_INSTR_SELDDATA0DDATA2, - CRYPTO_CMD_INSTR_ADDIC, - - /* Save the new partial result (lower half) */ - CRYPTO_CMD_INSTR_DDATA0TODDATA2, - CRYPTO_CMD_INSTR_DATATODMA0, - /* Reset the operand selector for next*/ - CRYPTO_CMD_INSTR_SELDDATA2DDATA3 - ); - - /**************** End Initializations ******************/ - - for (i = 0; i < numPartialOperandsA; i++) { - /* Load partial operand #1 A>>(i*PARTIAL_OPERAND_WIDTH) to DDATA1. */ -#ifdef USE_VARIABLE_SIZED_DATA_LOADS - if ( (numWordsLastOperandA != 0) && (i == numPartialOperandsA - 1) ) { - CRYPTO_DataWriteVariableSize(&crypto->DATA2, - &A[i * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS], - numWordsLastOperandA); - } else { - CRYPTO_DataWrite(&crypto->DATA2, &A[i * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); - } -#else - CRYPTO_DataWrite(&crypto->DATA2, &A[i * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); -#endif - - /* Load partial result in R>>(i*PARTIAL_OPERAND_WIDTH) to DATA1. */ -#ifdef USE_VARIABLE_SIZED_DATA_LOADS - if ( (numWordsLastOperandR != 0) && (i == numPartialOperandsR - 1) ) { - CRYPTO_DataWriteVariableSize(&crypto->DATA1, - &R[i * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS], - numWordsLastOperandR); - } else { - CRYPTO_DataWrite(&crypto->DATA1, &R[i * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); - } -#else - CRYPTO_DataWrite(&crypto->DATA1, &R[i * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); -#endif - - /* Clear carry */ - crypto->CMD = CRYPTO_CMD_INSTR_CCLR; - - /* Setup number of sequence iterations and block size. */ - crypto->SEQCTRL = CRYPTO_SEQCTRL_BLOCKSIZE_16BYTES - | (PARTIAL_OPERAND_WIDTH_IN_BYTES * numPartialOperandsB); - - /* Execute the MULtiply instruction sequence. */ - CRYPTO_InstructionSequenceExecute(crypto); - - for (j = 0; j < numPartialOperandsB; j++) { - /* Load partial operand 2 B>>(j*`PARTIAL_OPERAND_WIDTH) to DDATA2 - (via DATA0). */ -#ifdef USE_VARIABLE_SIZED_DATA_LOADS - if ( (numWordsLastOperandB != 0) && (j == numPartialOperandsB - 1) ) { - CRYPTO_DataWriteVariableSize(&crypto->DATA0, - &B[j * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS], - numWordsLastOperandB); - } else { - CRYPTO_DataWrite(&crypto->DATA0, - &B[j * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); - } -#else - CRYPTO_DataWrite(&crypto->DATA0, - &B[j * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); -#endif - - /* Load most significant partial result - R>>((i+j+1)*`PARTIAL_OPERAND_WIDTH) into DATA1. */ -#ifdef USE_VARIABLE_SIZED_DATA_LOADS - if ( (numWordsLastOperandR != 0) && ( (i + j + 1) == numPartialOperandsR - 1) ) { - CRYPTO_DataWriteVariableSize(&crypto->DATA1, - &R[(i + j + 1) * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS], - numWordsLastOperandR); - } else { - CRYPTO_DataWrite(&crypto->DATA1, - &R[(i + j + 1) * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); - } -#else - CRYPTO_DataWrite(&crypto->DATA1, - &R[(i + j + 1) * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); -#endif - /* Store least significant partial result */ - CRYPTO_DataRead(&crypto->DATA0, - &R[(i + j) * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); - } /* for (j=0; jDATA1, - &R[(i + numPartialOperandsB) - * PARTIAL_OPERAND_WIDTH_IN_32BIT_WORDS]); - } /* for (i=0; iXOR +-------------->XOR - * | | | - * V | V - * +--------------+ | +--------------+ - * Key ->| Block cipher | | Key ->| Block cipher | - * | encryption | | | encryption | - * +--------------+ | +--------------+ - * |---------+ | - * V V - * Ciphertext Ciphertext - * @endverbatim - * Decryption: - * @verbatim - * Ciphertext Ciphertext - * |----------+ | - * V | V - * +--------------+ | +--------------+ - * Key ->| Block cipher | | Key ->| Block cipher | - * | decryption | | | decryption | - * +--------------+ | +--------------+ - * | | | - * V | V - * InitVector ->XOR +-------------->XOR - * | | - * V V - * Plaintext Plaintext - * @endverbatim - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * When doing encryption, this is the 128 bit encryption key. When doing - * decryption, this is the 128 bit decryption key. The decryption key may - * be generated from the encryption key with CRYPTO_AES_DecryptKey128(). - * If this argument is null, the key will not be loaded, as it is assumed - * the key has been loaded into KEYHA previously. - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - ******************************************************************************/ -void CRYPTO_AES_CBC128(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES128; - CRYPTO_AES_CBCx(crypto, out, in, len, key, iv, encrypt, cryptoKey128Bits); -} - -/***************************************************************************//** - * @brief - * AES Cipher-block chaining (CBC) cipher mode encryption/decryption, 256 bit - * key. - * - * @details - * Please see CRYPTO_AES_CBC128() for CBC figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * When doing encryption, this is the 256 bit encryption key. When doing - * decryption, this is the 256 bit decryption key. The decryption key may - * be generated from the encryption key with CRYPTO_AES_DecryptKey256(). - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - ******************************************************************************/ -void CRYPTO_AES_CBC256(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES256; - CRYPTO_AES_CBCx(crypto, out, in, len, key, iv, encrypt, cryptoKey256Bits); -} - -/***************************************************************************//** - * @brief - * AES Cipher feedback (CFB) cipher mode encryption/decryption, 128 bit key. - * - * @details - * Encryption: - * @verbatim - * InitVector +----------------+ - * | | | - * V | V - * +--------------+ | +--------------+ - * Key ->| Block cipher | | Key ->| Block cipher | - * | encryption | | | encryption | - * +--------------+ | +--------------+ - * | | | - * V | V - * Plaintext ->XOR | Plaintext ->XOR - * |---------+ | - * V V - * Ciphertext Ciphertext - * @endverbatim - * Decryption: - * @verbatim - * InitVector +----------------+ - * | | | - * V | V - * +--------------+ | +--------------+ - * Key ->| Block cipher | | Key ->| Block cipher | - * | encryption | | | encryption | - * +--------------+ | +--------------+ - * | | | - * V | V - * XOR<- Ciphertext XOR<- Ciphertext - * | | - * V V - * Plaintext Plaintext - * @endverbatim - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 128 bit encryption key is used for both encryption and decryption modes. - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - ******************************************************************************/ -void CRYPTO_AES_CFB128(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES128; - CRYPTO_AES_CFBx(crypto, out, in, len, key, iv, encrypt, cryptoKey128Bits); -} - -/***************************************************************************//** - * @brief - * AES Cipher feedback (CFB) cipher mode encryption/decryption, 256 bit key. - * - * @details - * Please see CRYPTO_AES_CFB128() for CFB figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 256 bit encryption key is used for both encryption and decryption modes. - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - ******************************************************************************/ -void CRYPTO_AES_CFB256(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES256; - CRYPTO_AES_CFBx(crypto, out, in, len, key, iv, encrypt, cryptoKey256Bits); -} - -/***************************************************************************//** - * @brief - * AES Counter (CTR) cipher mode encryption/decryption, 128 bit key. - * - * @details - * Encryption: - * @verbatim - * Counter Counter - * | | - * V V - * +--------------+ +--------------+ - * Key ->| Block cipher | Key ->| Block cipher | - * | encryption | | encryption | - * +--------------+ +--------------+ - * | | - * Plaintext ->XOR Plaintext ->XOR - * | | - * V V - * Ciphertext Ciphertext - * @endverbatim - * Decryption: - * @verbatim - * Counter Counter - * | | - * V V - * +--------------+ +--------------+ - * Key ->| Block cipher | Key ->| Block cipher | - * | encryption | | encryption | - * +--------------+ +--------------+ - * | | - * Ciphertext ->XOR Ciphertext ->XOR - * | | - * V V - * Plaintext Plaintext - * @endverbatim - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 128 bit encryption key. - * If this argument is null, the key will not be loaded, as it is assumed - * the key has been loaded into KEYHA previously. - * - * @param[in,out] ctr - * 128 bit initial counter value. The counter is updated after each AES - * block encoding through use of @p ctrFunc. - * - * @param[in] ctrFunc - * Function used to update counter value. Not supported by CRYPTO. - * This parameter is included in order for backwards compatibility with - * the EFM32 em_aes.h API. - ******************************************************************************/ -void CRYPTO_AES_CTR128(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - uint8_t * ctr, - CRYPTO_AES_CtrFuncPtr_TypeDef ctrFunc) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES128; - CRYPTO_AES_CTRx(crypto, out, in, len, key, ctr, ctrFunc, cryptoKey128Bits); -} - -/***************************************************************************//** - * @brief - * AES Counter (CTR) cipher mode encryption/decryption, 256 bit key. - * - * @details - * Please see CRYPTO_AES_CTR128() for CTR figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 256 bit encryption key. - * - * @param[in,out] ctr - * 128 bit initial counter value. The counter is updated after each AES - * block encoding through use of @p ctrFunc. - * - * @param[in] ctrFunc - * Function used to update counter value. Not supported by CRYPTO. - * This parameter is included in order for backwards compatibility with - * the EFM32 em_aes.h API. - ******************************************************************************/ -void CRYPTO_AES_CTR256(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - uint8_t * ctr, - CRYPTO_AES_CtrFuncPtr_TypeDef ctrFunc) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES256; - CRYPTO_AES_CTRx(crypto, out, in, len, key, ctr, ctrFunc, cryptoKey256Bits); -} - -/***************************************************************************//** - * @brief - * Update last 32 bits of 128 bit counter, by incrementing with 1. - * - * @details - * Notice that no special consideration is given to possible wrap around. If - * 32 least significant bits are 0xFFFFFFFF, they will be updated to 0x00000000, - * ignoring overflow. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in,out] ctr - * Buffer holding 128 bit counter to be updated. - ******************************************************************************/ -void CRYPTO_AES_CTRUpdate32Bit(uint8_t * ctr) -{ - uint32_t * _ctr = (uint32_t *) ctr; - - _ctr[3] = __REV(__REV(_ctr[3]) + 1); -} - -/***************************************************************************//** - * @brief - * Generate 128 bit AES decryption key from 128 bit encryption key. The - * decryption key is used for some cipher modes when decrypting. - * - * @details - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place 128 bit decryption key. Must be at least 16 bytes long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding 128 bit encryption key. Must be at least 16 bytes long. - ******************************************************************************/ -void CRYPTO_AES_DecryptKey128(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in) -{ - uint32_t * _out = (uint32_t *) out; - const uint32_t * _in = (const uint32_t *) in; - - /* Setup CRYPTO in AES-128 mode. */ - crypto->CTRL = CRYPTO_CTRL_AES_AES128; - - /* Load key */ - CRYPTO_BurstToCrypto(&crypto->KEYBUF, &_in[0]); - - /* Do dummy encryption to generate decrypt key */ - crypto->CMD = CRYPTO_CMD_INSTR_AESENC; - - /* Save decryption key */ - CRYPTO_BurstFromCrypto(&crypto->KEY, &_out[0]); -} - -/***************************************************************************//** - * @brief - * Generate 256 bit AES decryption key from 256 bit encryption key. The - * decryption key is used for some cipher modes when decrypting. - * - * @details - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place 256 bit decryption key. Must be at least 32 bytes long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding 256 bit encryption key. Must be at least 32 bytes long. - ******************************************************************************/ -void CRYPTO_AES_DecryptKey256(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in) -{ - uint32_t * _out = (uint32_t *) out; - const uint32_t * _in = (const uint32_t *) in; - - /* Setup CRYPTO in AES-256 mode. */ - crypto->CTRL = CRYPTO_CTRL_AES_AES256; - - /* Load key */ - CRYPTO_BurstToCrypto(&crypto->KEYBUF, &_in[0]); - CRYPTO_BurstToCrypto(&crypto->KEYBUF, &_in[4]); - - /* Do dummy encryption to generate decrypt key */ - crypto->CMD = CRYPTO_CMD_INSTR_AESENC; - - /* Save decryption key */ - CRYPTO_BurstFromCrypto(&crypto->KEY, &_out[0]); - CRYPTO_BurstFromCrypto(&crypto->KEY, &_out[4]); -} - -/***************************************************************************//** - * @brief - * AES Electronic Codebook (ECB) cipher mode encryption/decryption, - * 128 bit key. - * - * @details - * Encryption: - * @verbatim - * Plaintext Plaintext - * | | - * V V - * +--------------+ +--------------+ - * Key ->| Block cipher | Key ->| Block cipher | - * | encryption | | encryption | - * +--------------+ +--------------+ - * | | - * V V - * Ciphertext Ciphertext - * @endverbatim - * Decryption: - * @verbatim - * Ciphertext Ciphertext - * | | - * V V - * +--------------+ +--------------+ - * Key ->| Block cipher | Key ->| Block cipher | - * | decryption | | decryption | - * +--------------+ +--------------+ - * | | - * V V - * Plaintext Plaintext - * @endverbatim - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * When doing encryption, this is the 128 bit encryption key. When doing - * decryption, this is the 128 bit decryption key. The decryption key may - * be generated from the encryption key with CRYPTO_AES_DecryptKey128(). - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - ******************************************************************************/ -void CRYPTO_AES_ECB128(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - bool encrypt) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES128; - CRYPTO_AES_ECBx(crypto, out, in, len, key, encrypt, cryptoKey128Bits); -} - -/***************************************************************************//** - * @brief - * AES Electronic Codebook (ECB) cipher mode encryption/decryption, - * 256 bit key. - * - * @details - * Please see CRYPTO_AES_ECB128() for ECB figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * When doing encryption, this is the 256 bit encryption key. When doing - * decryption, this is the 256 bit decryption key. The decryption key may - * be generated from the encryption key with CRYPTO_AES_DecryptKey256(). - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - ******************************************************************************/ -void CRYPTO_AES_ECB256(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - bool encrypt) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES256; - CRYPTO_AES_ECBx(crypto, out, in, len, key, encrypt, cryptoKey256Bits); -} - -/***************************************************************************//** - * @brief - * AES Output feedback (OFB) cipher mode encryption/decryption, 128 bit key. - * - * @details - * Encryption: - * @verbatim - * InitVector +----------------+ - * | | | - * V | V - * +--------------+ | +--------------+ - * Key ->| Block cipher | | Key ->| Block cipher | - * | encryption | | | encryption | - * +--------------+ | +--------------+ - * | | | - * |---------+ | - * V V - * Plaintext ->XOR Plaintext ->XOR - * | | - * V V - * Ciphertext Ciphertext - * @endverbatim - * Decryption: - * @verbatim - * InitVector +----------------+ - * | | | - * V | V - * +--------------+ | +--------------+ - * Key ->| Block cipher | | Key ->| Block cipher | - * | encryption | | | encryption | - * +--------------+ | +--------------+ - * | | | - * |---------+ | - * V V - * Ciphertext ->XOR Ciphertext ->XOR - * | | - * V V - * Plaintext Plaintext - * @endverbatim - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 128 bit encryption key. - * - * @param[in] iv - * 128 bit initialization vector to use. - ******************************************************************************/ -void CRYPTO_AES_OFB128(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES128; - CRYPTO_AES_OFBx(crypto, out, in, len, key, iv, cryptoKey128Bits); -} - -/***************************************************************************//** - * @brief - * AES Output feedback (OFB) cipher mode encryption/decryption, 256 bit key. - * - * @details - * Please see CRYPTO_AES_OFB128() for OFB figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 256 bit encryption key. - * - * @param[in] iv - * 128 bit initialization vector to use. - ******************************************************************************/ -void CRYPTO_AES_OFB256(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv) -{ - crypto->CTRL = CRYPTO_CTRL_AES_AES256; - CRYPTO_AES_OFBx(crypto, out, in, len, key, iv, cryptoKey256Bits); -} - -/******************************************************************************* - ************************** LOCAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Cipher-block chaining (CBC) cipher mode encryption/decryption, 128/256 bit key. - * - * @details - * Please see CRYPTO_AES_CBC128() for CBC figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * When doing encryption, this is the 256 bit encryption key. When doing - * decryption, this is the 256 bit decryption key. The decryption key may - * be generated from the encryption key with CRYPTO_AES_DecryptKey256(). - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - * - * @param[in] keyWidth - * Set to cryptoKey128Bits or cryptoKey256Bits. - ******************************************************************************/ -static void CRYPTO_AES_CBCx(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt, - CRYPTO_KeyWidth_TypeDef keyWidth) -{ - EFM_ASSERT(!(len % CRYPTO_AES_BLOCKSIZE)); - - /* Initialize control registers. */ - crypto->WAC = 0; - - CRYPTO_KeyBufWrite(crypto, (uint32_t *)key, keyWidth); - - if (encrypt) { - CRYPTO_DataWrite(&crypto->DATA0, (uint32_t *)iv); - - crypto->SEQ0 = CRYPTO_CMD_INSTR_DATA1TODATA0XOR << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_AESENC << _CRYPTO_SEQ0_INSTR1_SHIFT; - - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA1, (uint32_t *) in, - &crypto->DATA0, (uint32_t *) out); - } else { - CRYPTO_DataWrite(&crypto->DATA2, (uint32_t *) iv); - - crypto->SEQ0 = CRYPTO_CMD_INSTR_DATA1TODATA0 << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_AESDEC << _CRYPTO_SEQ0_INSTR1_SHIFT - | CRYPTO_CMD_INSTR_DATA2TODATA0XOR << _CRYPTO_SEQ0_INSTR2_SHIFT - | CRYPTO_CMD_INSTR_DATA1TODATA2 << _CRYPTO_SEQ0_INSTR3_SHIFT; - - crypto->SEQ1 = 0; - - /* The following call is equivalent to the last call in the - 'if( encrypt )' branch. However moving this - call outside the conditional scope results in slightly poorer - performance for some compiler optimizations. */ - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA1, (uint32_t *) in, - &crypto->DATA0, (uint32_t *) out); - } -} - -/***************************************************************************//** - * @brief - * Cipher feedback (CFB) cipher mode encryption/decryption, 128/256 bit key. - * - * @details - * Please see CRYPTO_AES_CFB128() for CFB figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 256 bit encryption key is used for both encryption and decryption modes. - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - * - * @param[in] keyWidth - * Set to cryptoKey128Bits or cryptoKey256Bits. - ******************************************************************************/ -static void CRYPTO_AES_CFBx(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - bool encrypt, - CRYPTO_KeyWidth_TypeDef keyWidth) -{ - EFM_ASSERT(!(len % CRYPTO_AES_BLOCKSIZE)); - - /* Initialize control registers. */ - crypto->WAC = 0; - - /* Load Key */ - CRYPTO_KeyBufWrite(crypto, (uint32_t *)key, keyWidth); - - /* Load instructions to CRYPTO sequencer. */ - if (encrypt) { - /* Load IV */ - CRYPTO_DataWrite(&crypto->DATA0, (uint32_t *)iv); - - crypto->SEQ0 = CRYPTO_CMD_INSTR_AESENC << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_DATA1TODATA0XOR << _CRYPTO_SEQ0_INSTR1_SHIFT; - - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA1, (uint32_t *)in, - &crypto->DATA0, (uint32_t *)out - ); - } else { - /* Load IV */ - CRYPTO_DataWrite(&crypto->DATA2, (uint32_t *)iv); - - crypto->SEQ0 = CRYPTO_CMD_INSTR_DATA2TODATA0 << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_AESENC << _CRYPTO_SEQ0_INSTR1_SHIFT - | CRYPTO_CMD_INSTR_DATA1TODATA0XOR << _CRYPTO_SEQ0_INSTR2_SHIFT - | CRYPTO_CMD_INSTR_DATA1TODATA2 << _CRYPTO_SEQ0_INSTR3_SHIFT; - crypto->SEQ1 = 0; - - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA1, (uint32_t *)in, - &crypto->DATA0, (uint32_t *)out - ); - } -} - -/***************************************************************************//** - * @brief - * Counter (CTR) cipher mode encryption/decryption, 128/256 bit key. - * - * @details - * Please see CRYPTO_AES_CTR128() for CTR figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 256 bit encryption key. - * - * @param[in,out] ctr - * 128 bit initial counter value. The counter is updated after each AES - * block encoding through use of @p ctrFunc. - * - * @param[in] ctrFunc - * Function used to update counter value. Not supported by CRYPTO. - * This parameter is included in order for backwards compatibility with - * the EFM32 em_aes.h API. - * - * @param[in] keyWidth - * Set to cryptoKey128Bits or cryptoKey256Bits. - ******************************************************************************/ -static void CRYPTO_AES_CTRx(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - uint8_t * ctr, - CRYPTO_AES_CtrFuncPtr_TypeDef ctrFunc, - CRYPTO_KeyWidth_TypeDef keyWidth) -{ - (void) ctrFunc; - - EFM_ASSERT(!(len % CRYPTO_AES_BLOCKSIZE)); - - /* Initialize control registers. */ - crypto->CTRL |= CRYPTO_CTRL_INCWIDTH_INCWIDTH4; - crypto->WAC = 0; - - CRYPTO_KeyBufWrite(crypto, (uint32_t *)key, keyWidth); - - CRYPTO_DataWrite(&crypto->DATA1, (uint32_t *) ctr); - - crypto->SEQ0 = CRYPTO_CMD_INSTR_DATA1TODATA0 << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_AESENC << _CRYPTO_SEQ0_INSTR1_SHIFT - | CRYPTO_CMD_INSTR_DATA0TODATA3 << _CRYPTO_SEQ0_INSTR2_SHIFT - | CRYPTO_CMD_INSTR_DATA1INC << _CRYPTO_SEQ0_INSTR3_SHIFT; - - crypto->SEQ1 = CRYPTO_CMD_INSTR_DATA2TODATA0XOR << _CRYPTO_SEQ1_INSTR4_SHIFT; - - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA2, (uint32_t *) in, - &crypto->DATA0, (uint32_t *) out); - - CRYPTO_DataRead(&crypto->DATA1, (uint32_t *) ctr); -} - -/***************************************************************************//** - * @brief - * Electronic Codebook (ECB) cipher mode encryption/decryption, 128/256 bit key. - * - * @details - * Please see CRYPTO_AES_ECB128() for ECB figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * When doing encryption, this is the 256 bit encryption key. When doing - * decryption, this is the 256 bit decryption key. The decryption key may - * be generated from the encryption key with CRYPTO_AES_DecryptKey256(). - * - * @param[in] encrypt - * Set to true to encrypt, false to decrypt. - * - * @param[in] keyWidth - * Set to cryptoKey128Bits or cryptoKey256Bits. - ******************************************************************************/ -static void CRYPTO_AES_ECBx(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - bool encrypt, - CRYPTO_KeyWidth_TypeDef keyWidth) -{ - EFM_ASSERT(!(len % CRYPTO_AES_BLOCKSIZE)); - - crypto->WAC = 0; - - CRYPTO_KeyBufWrite(crypto, (uint32_t *)key, keyWidth); - - if (encrypt) { - crypto->SEQ0 = CRYPTO_CMD_INSTR_AESENC << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_DATA0TODATA1 << _CRYPTO_SEQ0_INSTR1_SHIFT; - } else { - crypto->SEQ0 = CRYPTO_CMD_INSTR_AESDEC << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_DATA0TODATA1 << _CRYPTO_SEQ0_INSTR1_SHIFT; - } - - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA0, (uint32_t *) in, - &crypto->DATA1, (uint32_t *) out); -} - -/***************************************************************************//** - * @brief - * Output feedback (OFB) cipher mode encryption/decryption, 128/256 bit key. - * - * @details - * Please see CRYPTO_AES_OFB128() for OFB figure. - * - * Please refer to general comments on layout and byte ordering of parameters. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] key - * 256 bit encryption key. - * - * @param[in] iv - * 128 bit initialization vector to use. - * - * @param[in] keyWidth - * Set to cryptoKey128Bits or cryptoKey256Bits. - ******************************************************************************/ -static void CRYPTO_AES_OFBx(CRYPTO_TypeDef * crypto, - uint8_t * out, - const uint8_t * in, - unsigned int len, - const uint8_t * key, - const uint8_t * iv, - CRYPTO_KeyWidth_TypeDef keyWidth) -{ - EFM_ASSERT(!(len % CRYPTO_AES_BLOCKSIZE)); - - crypto->WAC = 0; - - CRYPTO_KeyBufWrite(crypto, (uint32_t *)key, keyWidth); - - CRYPTO_DataWrite(&crypto->DATA2, (uint32_t *)iv); - - crypto->SEQ0 = CRYPTO_CMD_INSTR_DATA0TODATA1 << _CRYPTO_SEQ0_INSTR0_SHIFT - | CRYPTO_CMD_INSTR_DATA2TODATA0 << _CRYPTO_SEQ0_INSTR1_SHIFT - | CRYPTO_CMD_INSTR_AESENC << _CRYPTO_SEQ0_INSTR2_SHIFT - | CRYPTO_CMD_INSTR_DATA0TODATA2 << _CRYPTO_SEQ0_INSTR3_SHIFT; - crypto->SEQ1 = CRYPTO_CMD_INSTR_DATA1TODATA0XOR << _CRYPTO_SEQ1_INSTR4_SHIFT - | CRYPTO_CMD_INSTR_DATA0TODATA1 << _CRYPTO_SEQ1_INSTR5_SHIFT; - - CRYPTO_AES_ProcessLoop(crypto, len, - &crypto->DATA0, (uint32_t *) in, - &crypto->DATA1, (uint32_t *) out); -} - -/***************************************************************************//** - * @brief - * Function performs generic AES loop. - * - * @details - * Function loads given register with provided input data. Triggers CRYPTO to - * perform sequence of instructions and read specified output register to - * output buffer. - * - * @param[in] crypto - * Pointer to CRYPTO peripheral register block. - * - * @param[in] len - * Number of bytes to encrypt/decrypt. Must be a multiple of 16. - * - * @param[in] inReg - * Input register - one of DATA0,DATA1,DATA2,DATA3 - * - * @param[in] in - * Buffer holding data to encrypt/decrypt. Must be at least @p len long. - * - * @param[in] outReg - * Output register - one of DATA0,DATA1,DATA2,DATA3 - * - * @param[out] out - * Buffer to place encrypted/decrypted data. Must be at least @p len long. It - * may be set equal to @p in, in which case the input buffer is overwritten. - ******************************************************************************/ -static inline void CRYPTO_AES_ProcessLoop(CRYPTO_TypeDef * crypto, - uint32_t len, - CRYPTO_DataReg_TypeDef inReg, - uint32_t * in, - CRYPTO_DataReg_TypeDef outReg, - uint32_t * out) -{ - len /= CRYPTO_AES_BLOCKSIZE; - crypto->SEQCTRL = 16 << _CRYPTO_SEQCTRL_LENGTHA_SHIFT; - - while (len--) { - /* Load data and trigger encryption */ - CRYPTO_DataWrite(inReg, (uint32_t *)in); - - crypto->CMD = CRYPTO_CMD_SEQSTART; - - /* Save encrypted/decrypted data */ - CRYPTO_DataRead(outReg, (uint32_t *)out); - - out += 4; - in += 4; - } -} - -/** @} (end addtogroup CRYPTO) */ -/** @} (end addtogroup emlib) */ - -#endif /* defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_emu.c b/targets/efm32/emlib/em_emu.c deleted file mode 100644 index 1ba8a46..0000000 --- a/targets/efm32/emlib/em_emu.c +++ /dev/null @@ -1,2587 +0,0 @@ -/***************************************************************************//** - * @file em_emu.c - * @brief Energy Management Unit (EMU) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include - -#include "em_emu.h" -#if defined(EMU_PRESENT) && (EMU_COUNT > 0) - -#include "em_cmu.h" -#include "em_system.h" -#include "em_common.h" -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup EMU - * @brief Energy Management Unit (EMU) Peripheral API - * @details - * This module contains functions to control the EMU peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The EMU handles the different low energy modes - * in Silicon Labs microcontrollers. - * @{ - ******************************************************************************/ - -/* Consistency check, since restoring assumes similar bitpositions in */ -/* CMU OSCENCMD and STATUS regs */ -#if (CMU_STATUS_AUXHFRCOENS != CMU_OSCENCMD_AUXHFRCOEN) -#error Conflict in AUXHFRCOENS and AUXHFRCOEN bitpositions -#endif -#if (CMU_STATUS_HFXOENS != CMU_OSCENCMD_HFXOEN) -#error Conflict in HFXOENS and HFXOEN bitpositions -#endif -#if (CMU_STATUS_LFRCOENS != CMU_OSCENCMD_LFRCOEN) -#error Conflict in LFRCOENS and LFRCOEN bitpositions -#endif -#if (CMU_STATUS_LFXOENS != CMU_OSCENCMD_LFXOEN) -#error Conflict in LFXOENS and LFXOEN bitpositions -#endif - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -#if defined(_SILICON_LABS_32B_SERIES_0) -/* Fix for errata EMU_E107 - non-WIC interrupt masks. - * Zero Gecko and future families are not affected by errata EMU_E107 */ -#if defined(_EFM32_GECKO_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0x0dfc0323U)) -#define NON_WIC_INT_MASK_1 (~(0x0U)) - -#elif defined(_EFM32_TINY_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0x001be323U)) -#define NON_WIC_INT_MASK_1 (~(0x0U)) - -#elif defined(_EFM32_GIANT_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0xff020e63U)) -#define NON_WIC_INT_MASK_1 (~(0x00000046U)) - -#elif defined(_EFM32_WONDER_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0xff020e63U)) -#define NON_WIC_INT_MASK_1 (~(0x00000046U)) - -#endif -#endif - -/* Fix for errata EMU_E108 - High Current Consumption on EM4 Entry. */ -#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_HAPPY_FAMILY) -#define ERRATA_FIX_EMU_E108_EN -#endif - -/* Fix for errata EMU_E208 - Occasional Full Reset After Exiting EM4H */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -#define ERRATA_FIX_EMU_E208_EN -#endif - -/* Enable FETCNT tuning errata fix */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -#define ERRATA_FIX_DCDC_FETCNT_SET_EN -#endif - -/* Enable LN handshake errata fix */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -#define ERRATA_FIX_DCDC_LNHS_BLOCK_EN -typedef enum { - errataFixDcdcHsInit, - errataFixDcdcHsTrimSet, - errataFixDcdcHsBypassLn, - errataFixDcdcHsLnWaitDone -} errataFixDcdcHs_TypeDef; -static errataFixDcdcHs_TypeDef errataFixDcdcHsState = errataFixDcdcHsInit; -#endif - -/* Used to figure out if a memory address is inside or outside of a RAM block. - * A memory address is inside a RAM block if the address is greater than the - * RAM block address. */ -#define ADDRESS_NOT_IN_BLOCK(addr, block) ((addr) <= (block)) - -/* RAM Block layout for various device families. Note that some devices - * have special layout in RAM0 and some devices have a special RAM block - * at the end of their block layout. */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84) -#define RAM1_BLOCKS 2 -#define RAM1_BLOCK_SIZE 0x10000 // 64 kB blocks -#define RAM2_BLOCKS 1 -#define RAM2_BLOCK_SIZE 0x800 // 2 kB block -#elif defined(_SILICON_LABS_GECKO_INTERNAL_SDID_89) -#define RAM0_BLOCKS 2 -#define RAM0_BLOCK_SIZE 0x4000 -#define RAM1_BLOCKS 2 -#define RAM1_BLOCK_SIZE 0x4000 // 16 kB blocks -#define RAM2_BLOCKS 1 -#define RAM2_BLOCK_SIZE 0x800 // 2 kB block -#elif defined(_SILICON_LABS_GECKO_INTERNAL_SDID_95) -#define RAM0_BLOCKS 1 -#define RAM0_BLOCK_SIZE 0x4000 // 16 kB block -#define RAM1_BLOCKS 1 -#define RAM1_BLOCK_SIZE 0x4000 // 16 kB block -#define RAM2_BLOCKS 1 -#define RAM2_BLOCK_SIZE 0x800 // 2 kB block -#elif defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_GIANT_FAMILY) -#define RAM0_BLOCKS 4 -#define RAM0_BLOCK_SIZE 0x8000 // 32 kB blocks -#elif defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_GECKO_FAMILY) -#define RAM0_BLOCKS 4 -#define RAM0_BLOCK_SIZE 0x1000 // 4 kB blocks -#elif defined(_SILICON_LABS_32B_SERIES_1) && defined(_EFM32_GIANT_FAMILY) -#define RAM0_BLOCKS 8 -#define RAM0_BLOCK_SIZE 0x4000 // 16 kB blocks -#define RAM1_BLOCKS 8 -#define RAM1_BLOCK_SIZE 0x4000 // 16 kB blocks -#define RAM2_BLOCKS 4 -#define RAM2_BLOCK_SIZE 0x10000 // 64 kB blocks -#endif - -#if defined(_SILICON_LABS_32B_SERIES_0) -/* RAM_MEM_END on Gecko devices have a value larger than the SRAM_SIZE */ -#define RAM0_END (SRAM_BASE + SRAM_SIZE - 1) -#else -#define RAM0_END RAM_MEM_END -#endif - -#if defined(CMU_STATUS_HFXOSHUNTOPTRDY) -#define HFXO_STATUS_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY | CMU_STATUS_HFXOSHUNTOPTRDY) -#elif defined(CMU_STATUS_HFXOPEAKDETRDY) -#define HFXO_STATUS_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY) -#endif - -/** @endcond */ - -#if defined(_EMU_DCDCCTRL_MASK) -/* DCDCTODVDD output range min/max */ -#if !defined(PWRCFG_DCDCTODVDD_VMIN) -#define PWRCFG_DCDCTODVDD_VMIN 1800 -#endif -#if !defined(PWRCFG_DCDCTODVDD_VMAX) -#define PWRCFG_DCDCTODVDD_VMAX 3000 -#endif -#endif - -/******************************************************************************* - *************************** LOCAL VARIABLES ******************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/* Static user configuration */ -#if defined(_EMU_DCDCCTRL_MASK) -static uint16_t dcdcMaxCurrent_mA; -static uint16_t dcdcEm01LoadCurrent_mA; -static EMU_DcdcLnReverseCurrentControl_TypeDef dcdcReverseCurrentControl; -#endif -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -static EMU_EM01Init_TypeDef vScaleEM01Config = { false }; -#endif -/** @endcond */ - -/******************************************************************************* - ************************** LOCAL FUNCTIONS ******************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/* Convert from level to EM0 and 1 command bit */ -__STATIC_INLINE uint32_t vScaleEM01Cmd(EMU_VScaleEM01_TypeDef level) -{ - return EMU_CMD_EM01VSCALE0 << (_EMU_STATUS_VSCALE_VSCALE0 - (uint32_t)level); -} -#endif - -/***************************************************************************//** - * @brief - * Save/restore/update oscillator, core clock and voltage scaling configuration on - * EM2 or EM3 entry/exit. - * - * @details - * Hardware may automatically change oscillator and voltage scaling configuration - * when going into or out of an energy mode. Static data in this function keeps track of - * such configuration bits and is used to restore state if needed. - * - ******************************************************************************/ -typedef enum { - emState_Save, /* Save EMU and CMU state */ - emState_Restore, /* Restore and unlock */ -} emState_TypeDef; - -static void emState(emState_TypeDef action) -{ - uint32_t oscEnCmd; - uint32_t cmuLocked; - static uint32_t cmuStatus; - static CMU_Select_TypeDef hfClock; -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - static uint8_t vScaleStatus; -#endif - - /* Save or update state */ - if (action == emState_Save) { - /* Save configuration. */ - cmuStatus = CMU->STATUS; - hfClock = CMU_ClockSelectGet(cmuClock_HF); -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Save vscale */ - EMU_VScaleWait(); - vScaleStatus = (uint8_t)((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) - >> _EMU_STATUS_VSCALE_SHIFT); -#endif - } else if (action == emState_Restore) { /* Restore state */ - /* Apply saved configuration. */ -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Restore EM0 and 1 voltage scaling level. EMU_VScaleWait() is called later, - just before HF clock select is set. */ - EMU->CMD = vScaleEM01Cmd((EMU_VScaleEM01_TypeDef)vScaleStatus); -#endif - - /* CMU registers may be locked */ - cmuLocked = CMU->LOCK & CMU_LOCK_LOCKKEY_LOCKED; - CMU_Unlock(); - - /* AUXHFRCO are automatically disabled (except if using debugger). */ - /* HFRCO, USHFRCO and HFXO are automatically disabled. */ - /* LFRCO/LFXO may be disabled by SW in EM3. */ - /* Restore according to status prior to entering energy mode. */ - oscEnCmd = 0; - oscEnCmd |= ((cmuStatus & CMU_STATUS_HFRCOENS) ? CMU_OSCENCMD_HFRCOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_AUXHFRCOENS) ? CMU_OSCENCMD_AUXHFRCOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_LFRCOENS) ? CMU_OSCENCMD_LFRCOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_HFXOENS) ? CMU_OSCENCMD_HFXOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_LFXOENS) ? CMU_OSCENCMD_LFXOEN : 0); -#if defined(_CMU_STATUS_USHFRCOENS_MASK) - oscEnCmd |= ((cmuStatus & CMU_STATUS_USHFRCOENS) ? CMU_OSCENCMD_USHFRCOEN : 0); -#endif - CMU->OSCENCMD = oscEnCmd; - -#if defined(_EMU_STATUS_VSCALE_MASK) - /* Wait for upscale to complete and then restore selected clock */ - EMU_VScaleWait(); -#endif - - if (hfClock != cmuSelect_HFRCO) { - CMU_ClockSelectSet(cmuClock_HF, hfClock); - } - - /* If HFRCO was disabled before entering Energy Mode, turn it off again */ - /* as it is automatically enabled by wake up */ - if ( !(cmuStatus & CMU_STATUS_HFRCOENS) ) { - CMU->OSCENCMD = CMU_OSCENCMD_HFRCODIS; - } - - /* Restore CMU register locking */ - if (cmuLocked) { - CMU_Lock(); - } - } -} - -#if defined(ERRATA_FIX_EMU_E107_EN) -/* Get enable conditions for errata EMU_E107 fix. */ -__STATIC_INLINE bool getErrataFixEmuE107En(void) -{ - /* SYSTEM_ChipRevisionGet could have been used here, but we would like a - * faster implementation in this case. - */ - uint16_t majorMinorRev; - - /* CHIP MAJOR bit [3:0] */ - majorMinorRev = ((ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) - >> _ROMTABLE_PID0_REVMAJOR_SHIFT) - << 8; - /* CHIP MINOR bit [7:4] */ - majorMinorRev |= ((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) - >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) - << 4; - /* CHIP MINOR bit [3:0] */ - majorMinorRev |= (ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) - >> _ROMTABLE_PID3_REVMINORLSB_SHIFT; - -#if defined(_EFM32_GECKO_FAMILY) - return (majorMinorRev <= 0x0103); -#elif defined(_EFM32_TINY_FAMILY) - return (majorMinorRev <= 0x0102); -#elif defined(_EFM32_GIANT_FAMILY) - return (majorMinorRev <= 0x0103) || (majorMinorRev == 0x0204); -#elif defined(_EFM32_WONDER_FAMILY) - return (majorMinorRev == 0x0100); -#else - /* Zero Gecko and future families are not affected by errata EMU_E107 */ - return false; -#endif -} -#endif - -/* LP prepare / LN restore P/NFET count */ -#define DCDC_LP_PFET_CNT 7 -#define DCDC_LP_NFET_CNT 7 -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) -static void currentLimitersUpdate(void); -static void dcdcFetCntSet(bool lpModeSet) -{ - uint32_t tmp; - static uint32_t emuDcdcMiscCtrlReg; - - if (lpModeSet) { - emuDcdcMiscCtrlReg = EMU->DCDCMISCCTRL; - tmp = EMU->DCDCMISCCTRL - & ~(_EMU_DCDCMISCCTRL_PFETCNT_MASK | _EMU_DCDCMISCCTRL_NFETCNT_MASK); - tmp |= (DCDC_LP_PFET_CNT << _EMU_DCDCMISCCTRL_PFETCNT_SHIFT) - | (DCDC_LP_NFET_CNT << _EMU_DCDCMISCCTRL_NFETCNT_SHIFT); - EMU->DCDCMISCCTRL = tmp; - currentLimitersUpdate(); - } else { - EMU->DCDCMISCCTRL = emuDcdcMiscCtrlReg; - currentLimitersUpdate(); - } -} -#endif - -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) -static void dcdcHsFixLnBlock(void) -{ -#define EMU_DCDCSTATUS (*(volatile uint32_t *)(EMU_BASE + 0x7C)) - if ((errataFixDcdcHsState == errataFixDcdcHsTrimSet) - || (errataFixDcdcHsState == errataFixDcdcHsBypassLn)) { - /* Wait for LNRUNNING */ - if ((EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK) == EMU_DCDCCTRL_DCDCMODE_LOWNOISE) { - while (!(EMU_DCDCSTATUS & (0x1 << 16))) ; - } - errataFixDcdcHsState = errataFixDcdcHsLnWaitDone; - } -} -#endif - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) -/* Configure EMU and CMU for EM2 and 3 voltage downscale */ -static void vScaleDownEM23Setup(void) -{ - uint32_t hfSrcClockFrequency; - - EMU_VScaleEM23_TypeDef scaleEM23Voltage = - (EMU_VScaleEM23_TypeDef)((EMU->CTRL & _EMU_CTRL_EM23VSCALE_MASK) - >> _EMU_CTRL_EM23VSCALE_SHIFT); - - EMU_VScaleEM01_TypeDef currentEM01Voltage = - (EMU_VScaleEM01_TypeDef)((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) - >> _EMU_STATUS_VSCALE_SHIFT); - - /* Wait until previous scaling is done. */ - EMU_VScaleWait(); - - /* Inverse coding. */ - if ((uint32_t)scaleEM23Voltage > (uint32_t)currentEM01Voltage) { - /* Set safe clock and wait-states. */ - if (scaleEM23Voltage == emuVScaleEM23_LowPower) { - hfSrcClockFrequency = CMU_ClockDivGet(cmuClock_HF) * CMU_ClockFreqGet(cmuClock_HF); - /* Set default low power voltage HFRCO band as HF clock. */ - if (hfSrcClockFrequency > CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX) { - CMU_HFRCOBandSet(cmuHFRCOFreq_19M0Hz); - } - CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFRCO); - } else { - /* Other voltage scaling levels are not currently supported. */ - EFM_ASSERT(false); - } - } else { - /* Same voltage or hardware will scale to min(EMU_CTRL_EM23VSCALE, EMU_STATUS_VSCALE) */ - } -} -#endif -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Enter energy mode 2 (EM2). - * - * @details - * When entering EM2, the high frequency clocks are disabled, ie HFXO, HFRCO - * and AUXHFRCO (for AUXHFRCO, see exception note below). When re-entering - * EM0, HFRCO is re-enabled and the core will be clocked by the configured - * HFRCO band. This ensures a quick wakeup from EM2. - * - * However, prior to entering EM2, the core may have been using another - * oscillator than HFRCO. The @p restore parameter gives the user the option - * to restore all HF oscillators according to state prior to entering EM2, - * as well as the clock used to clock the core. This restore procedure is - * handled by SW. However, since handled by SW, it will not be restored - * before completing the interrupt function(s) waking up the core! - * - * @note - * If restoring core clock to use the HFXO oscillator, which has been - * disabled during EM2 mode, this function will stall until the oscillator - * has stabilized. Stalling time can be reduced by adding interrupt - * support detecting stable oscillator, and an asynchronous switch to the - * original oscillator. See CMU documentation. Such a feature is however - * outside the scope of the implementation in this function. - * @par - * If HFXO is re-enabled by this function, and NOT used to clock the core, - * this function will not wait for HFXO to stabilize. This must be considered - * by the application if trying to use features relying on that oscillator - * upon return. - * @par - * If a debugger is attached, the AUXHFRCO will not be disabled if enabled - * upon entering EM2. It will thus remain enabled when returning to EM0 - * regardless of the @p restore parameter. - * @par - * If HFXO autostart and select is enabled by using CMU_HFXOAutostartEnable(), - * the starting and selecting of the core clocks will be identical to the user - * independently of the value of the @p restore parameter when waking up on - * the wakeup sources corresponding to the autostart and select setting. - * @par - * If voltage scaling is supported, the restore parameter is true and the EM0 - * voltage scaling level is set higher than the EM2 level, then the EM0 level is - * also restored. - * - * @param[in] restore - * @li true - save and restore oscillators, clocks and voltage scaling, see - * function details. - * @li false - do not save and restore oscillators and clocks, see function - * details. - * @par - * The @p restore option should only be used if all clock control is done - * via the CMU API. - ******************************************************************************/ -void EMU_EnterEM2(bool restore) -{ -#if defined(ERRATA_FIX_EMU_E107_EN) - bool errataFixEmuE107En; - uint32_t nonWicIntEn[2]; -#endif - - /* Only save EMU and CMU state if restored on wake-up. */ - if (restore) { - emState(emState_Save); - } - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) - vScaleDownEM23Setup(); -#endif - - /* Enter Cortex deep sleep mode */ - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - - /* Fix for errata EMU_E107 - store non-WIC interrupt enable flags. - Disable the enabled non-WIC interrupts. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - errataFixEmuE107En = getErrataFixEmuE107En(); - if (errataFixEmuE107En) { - nonWicIntEn[0] = NVIC->ISER[0] & NON_WIC_INT_MASK_0; - NVIC->ICER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - nonWicIntEn[1] = NVIC->ISER[1] & NON_WIC_INT_MASK_1; - NVIC->ICER[1] = nonWicIntEn[1]; -#endif - } -#endif - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(true); -#endif -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) - dcdcHsFixLnBlock(); -#endif - - __WFI(); - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(false); -#endif - - /* Fix for errata EMU_E107 - restore state of non-WIC interrupt enable flags. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - if (errataFixEmuE107En) { - NVIC->ISER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - NVIC->ISER[1] = nonWicIntEn[1]; -#endif - } -#endif - - /* Restore oscillators/clocks and voltage scaling if supported. */ - if (restore) { - emState(emState_Restore); - } else { - /* If not restoring, and original clock was not HFRCO, we have to */ - /* update CMSIS core clock variable since HF clock has changed */ - /* to HFRCO. */ - SystemCoreClockUpdate(); - } -} - -/***************************************************************************//** - * @brief - * Enter energy mode 3 (EM3). - * - * @details - * When entering EM3, the high frequency clocks are disabled by HW, ie HFXO, - * HFRCO and AUXHFRCO (for AUXHFRCO, see exception note below). In addition, - * the low frequency clocks, ie LFXO and LFRCO are disabled by SW. When - * re-entering EM0, HFRCO is re-enabled and the core will be clocked by the - * configured HFRCO band. This ensures a quick wakeup from EM3. - * - * However, prior to entering EM3, the core may have been using another - * oscillator than HFRCO. The @p restore parameter gives the user the option - * to restore all HF/LF oscillators according to state prior to entering EM3, - * as well as the clock used to clock the core. This restore procedure is - * handled by SW. However, since handled by SW, it will not be restored - * before completing the interrupt function(s) waking up the core! - * - * @note - * If restoring core clock to use an oscillator other than HFRCO, this - * function will stall until the oscillator has stabilized. Stalling time - * can be reduced by adding interrupt support detecting stable oscillator, - * and an asynchronous switch to the original oscillator. See CMU - * documentation. Such a feature is however outside the scope of the - * implementation in this function. - * @par - * If HFXO/LFXO/LFRCO are re-enabled by this function, and NOT used to clock - * the core, this function will not wait for those oscillators to stabilize. - * This must be considered by the application if trying to use features - * relying on those oscillators upon return. - * @par - * If a debugger is attached, the AUXHFRCO will not be disabled if enabled - * upon entering EM3. It will thus remain enabled when returning to EM0 - * regardless of the @p restore parameter. - * @par - * If voltage scaling is supported, the restore parameter is true and the EM0 - * voltage scaling level is set higher than the EM3 level, then the EM0 level is - * also restored. - * - * @param[in] restore - * @li true - save and restore oscillators, clocks and voltage scaling, see - * function details. - * @li false - do not save and restore oscillators and clocks, see function - * details. - * @par - * The @p restore option should only be used if all clock control is done - * via the CMU API. - ******************************************************************************/ -void EMU_EnterEM3(bool restore) -{ - uint32_t cmuLocked; - -#if defined(ERRATA_FIX_EMU_E107_EN) - bool errataFixEmuE107En; - uint32_t nonWicIntEn[2]; -#endif - - /* Only save EMU and CMU state if restored on wake-up. */ - if (restore) { - emState(emState_Save); - } - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) - vScaleDownEM23Setup(); -#endif - - /* CMU registers may be locked */ - cmuLocked = CMU->LOCK & CMU_LOCK_LOCKKEY_LOCKED; - CMU_Unlock(); - - /* Disable LF oscillators */ - CMU->OSCENCMD = CMU_OSCENCMD_LFXODIS | CMU_OSCENCMD_LFRCODIS; - - /* Restore CMU register locking */ - if (cmuLocked) { - CMU_Lock(); - } - - /* Enter Cortex deep sleep mode */ - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - - /* Fix for errata EMU_E107 - store non-WIC interrupt enable flags. - Disable the enabled non-WIC interrupts. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - errataFixEmuE107En = getErrataFixEmuE107En(); - if (errataFixEmuE107En) { - nonWicIntEn[0] = NVIC->ISER[0] & NON_WIC_INT_MASK_0; - NVIC->ICER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - nonWicIntEn[1] = NVIC->ISER[1] & NON_WIC_INT_MASK_1; - NVIC->ICER[1] = nonWicIntEn[1]; -#endif - } -#endif - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(true); -#endif -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) - dcdcHsFixLnBlock(); -#endif - - __WFI(); - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(false); -#endif - - /* Fix for errata EMU_E107 - restore state of non-WIC interrupt enable flags. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - if (errataFixEmuE107En) { - NVIC->ISER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - NVIC->ISER[1] = nonWicIntEn[1]; -#endif - } -#endif - - /* Restore oscillators/clocks and voltage scaling if supported. */ - if (restore) { - emState(emState_Restore); - } else { - /* If not restoring, and original clock was not HFRCO, we have to */ - /* update CMSIS core clock variable since HF clock has changed */ - /* to HFRCO. */ - SystemCoreClockUpdate(); - } -} - -/***************************************************************************//** - * @brief - * Save CMU HF clock select state, oscillator enable and voltage scaling - * (if available) before @ref EMU_EnterEM2() or @ref EMU_EnterEM3() are called - * with the restore parameter set to false. Calling this function is - * equivalent to calling @ref EMU_EnterEM2() or @ref EMU_EnterEM3() with the - * restore parameter set to true, but it allows the state to be saved without - * going to sleep. The state can be restored manually by calling - * @ref EMU_Restore(). - ******************************************************************************/ -void EMU_Save(void) -{ - emState(emState_Save); -} - -/***************************************************************************//** - * @brief - * Restore CMU HF clock select state, oscillator enable and voltage scaling - * (if available) after @ref EMU_EnterEM2() or @ref EMU_EnterEM3() are called - * with the restore parameter set to false. Calling this function is - * equivalent to calling @ref EMU_EnterEM2() or @ref EMU_EnterEM3() with the - * restore parameter set to true, but it allows the application to evaluate the - * wakeup reason before restoring state. - ******************************************************************************/ -void EMU_Restore(void) -{ - emState(emState_Restore); -} - -/***************************************************************************//** - * @brief - * Enter energy mode 4 (EM4). - * - * @note - * Only a power on reset or external reset pin can wake the device from EM4. - ******************************************************************************/ -void EMU_EnterEM4(void) -{ - int i; - -#if defined(_EMU_EM4CTRL_EM4ENTRY_SHIFT) - uint32_t em4seq2 = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4ENTRY_MASK) - | (2 << _EMU_EM4CTRL_EM4ENTRY_SHIFT); - uint32_t em4seq3 = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4ENTRY_MASK) - | (3 << _EMU_EM4CTRL_EM4ENTRY_SHIFT); -#else - uint32_t em4seq2 = (EMU->CTRL & ~_EMU_CTRL_EM4CTRL_MASK) - | (2 << _EMU_CTRL_EM4CTRL_SHIFT); - uint32_t em4seq3 = (EMU->CTRL & ~_EMU_CTRL_EM4CTRL_MASK) - | (3 << _EMU_CTRL_EM4CTRL_SHIFT); -#endif - - /* Make sure register write lock is disabled */ - EMU_Unlock(); - -#if defined(_EMU_EM4CTRL_MASK) - if ((EMU->EM4CTRL & _EMU_EM4CTRL_EM4STATE_MASK) == EMU_EM4CTRL_EM4STATE_EM4S) { - uint32_t dcdcMode = EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK; - if (dcdcMode == EMU_DCDCCTRL_DCDCMODE_LOWNOISE - || dcdcMode == EMU_DCDCCTRL_DCDCMODE_LOWPOWER) { - /* DCDC is not supported in EM4S so we switch DCDC to bypass mode before - * entering EM4S */ - EMU_DCDCModeSet(emuDcdcMode_Bypass); - } - } -#endif - -#if defined(_EMU_EM4CTRL_MASK) && defined(ERRATA_FIX_EMU_E208_EN) - if (EMU->EM4CTRL & EMU_EM4CTRL_EM4STATE_EM4H) { - /* Fix for errata EMU_E208 - Occasional Full Reset After Exiting EM4H. - * Full description of errata fix can be found in the errata document. */ - __disable_irq(); - *(volatile uint32_t *)(EMU_BASE + 0x190) = 0x0000ADE8UL; - *(volatile uint32_t *)(EMU_BASE + 0x198) |= (0x1UL << 7); - *(volatile uint32_t *)(EMU_BASE + 0x88) |= (0x1UL << 8); - } -#endif - -#if defined(ERRATA_FIX_EMU_E108_EN) - /* Fix for errata EMU_E108 - High Current Consumption on EM4 Entry. */ - __disable_irq(); - *(volatile uint32_t *)0x400C80E4 = 0; -#endif - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(true); -#endif -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) - dcdcHsFixLnBlock(); -#endif - - for (i = 0; i < 4; i++) { -#if defined(_EMU_EM4CTRL_EM4ENTRY_SHIFT) - EMU->EM4CTRL = em4seq2; - EMU->EM4CTRL = em4seq3; - } - EMU->EM4CTRL = em4seq2; -#else - EMU->CTRL = em4seq2; - EMU->CTRL = em4seq3; - } - EMU->CTRL = em4seq2; -#endif -} - -#if defined(_EMU_EM4CTRL_MASK) -/***************************************************************************//** - * @brief - * Enter energy mode 4 hibernate (EM4H). - * - * @note - * Retention of clocks and GPIO in EM4 can be configured using - * @ref EMU_EM4Init before calling this function. - ******************************************************************************/ -void EMU_EnterEM4H(void) -{ - BUS_RegBitWrite(&EMU->EM4CTRL, _EMU_EM4CTRL_EM4STATE_SHIFT, 1); - EMU_EnterEM4(); -} - -/***************************************************************************//** - * @brief - * Enter energy mode 4 shutoff (EM4S). - * - * @note - * Retention of clocks and GPIO in EM4 can be configured using - * @ref EMU_EM4Init before calling this function. - ******************************************************************************/ -void EMU_EnterEM4S(void) -{ - BUS_RegBitWrite(&EMU->EM4CTRL, _EMU_EM4CTRL_EM4STATE_SHIFT, 0); - EMU_EnterEM4(); -} -#endif - -/***************************************************************************//** - * @brief - * Power down memory block. - * - * @param[in] blocks - * Specifies a logical OR of bits indicating memory blocks to power down. - * Bit 0 selects block 1, bit 1 selects block 2, etc. Memory block 0 cannot - * be disabled. Please refer to the reference manual for available - * memory blocks for a device. - * - * @note - * Only a POR reset can power up the specified memory block(s) after powerdown. - * - * @deprecated - * This function is deprecated, use @ref EMU_RamPowerDown() instead which - * maps a user provided memory range into RAM blocks to power down. - ******************************************************************************/ -void EMU_MemPwrDown(uint32_t blocks) -{ -#if defined(_EMU_MEMCTRL_MASK) - EMU->MEMCTRL = blocks & _EMU_MEMCTRL_MASK; -#elif defined(_EMU_RAM0CTRL_MASK) - EMU->RAM0CTRL = blocks & _EMU_RAM0CTRL_MASK; -#else - (void)blocks; -#endif -} - -/***************************************************************************//** - * @brief - * Power down RAM memory blocks. - * - * @details - * This function will power down all the RAM blocks that are within a given - * range. The RAM block layout is different between device families, so this - * function can be used in a generic way to power down a RAM memory region - * which is known to be unused. - * - * This function will only power down blocks which are completely enclosed - * by the memory range given by [start, end). - * - * Here is an example of how to power down all RAM blocks except the first - * one. The first RAM block is special in that it cannot be powered down - * by the hardware. The size of this first RAM block is device specific - * see the reference manual to find the RAM block sizes. - * - * @code - * EMU_RamPowerDown(SRAM_BASE, SRAM_BASE + SRAM_SIZE); - * @endcode - * - * @note - * Only a POR reset can power up the specified memory block(s) after powerdown. - * - * @param[in] start - * The start address of the RAM region to power down. This address is - * inclusive. - * - * @param[in] end - * The end address of the RAM region to power down. This address is - * exclusive. If this parameter is 0, then all RAM blocks contained in the - * region from start to the upper RAM address will be powered down. - ******************************************************************************/ -void EMU_RamPowerDown(uint32_t start, uint32_t end) -{ - uint32_t mask = 0; - - if (end == 0) { - end = SRAM_BASE + SRAM_SIZE; - } - - // Check to see if something in RAM0 can be powered down - if (end > RAM0_END) { -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84) // EFM32xG12 and EFR32xG12 - // Block 0 is 16 kB and cannot be powered off - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20004000) << 0; // Block 1, 16 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20008000) << 1; // Block 2, 16 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x2000C000) << 2; // Block 3, 16 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20010000) << 3; // Block 4, 64 kB -#elif defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) // EFM32xG1 and EFR32xG1 - // Block 0 is 4 kB and cannot be powered off - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20001000) << 0; // Block 1, 4 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20002000) << 1; // Block 2, 8 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20004000) << 2; // Block 3, 8 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20006000) << 3; // Block 4, 7 kB -#elif defined(RAM0_BLOCKS) - // These platforms have equally sized RAM blocks - for (int i = 1; i < RAM0_BLOCKS; i++) { - mask |= ADDRESS_NOT_IN_BLOCK(start, RAM_MEM_BASE + (i * RAM0_BLOCK_SIZE)) << (i - 1); - } -#endif - } - - // Power down the selected blocks -#if defined(_EMU_MEMCTRL_MASK) - EMU->MEMCTRL = EMU->MEMCTRL | mask; -#elif defined(_EMU_RAM0CTRL_MASK) - EMU->RAM0CTRL = EMU->RAM0CTRL | mask; -#else - // These devices are unable to power down RAM blocks - (void) mask; - (void) start; -#endif - -#if defined(RAM1_MEM_END) - mask = 0; - if (end > RAM1_MEM_END) { - for (int i = 0; i < RAM1_BLOCKS; i++) { - mask |= ADDRESS_NOT_IN_BLOCK(start, RAM1_MEM_BASE + (i * RAM1_BLOCK_SIZE)) << i; - } - } - EMU->RAM1CTRL |= mask; -#endif - -#if defined(RAM2_MEM_END) - mask = 0; - if (end > RAM2_MEM_END) { - for (int i = 0; i < RAM2_BLOCKS; i++) { - mask |= ADDRESS_NOT_IN_BLOCK(start, RAM2_MEM_BASE + (i * RAM2_BLOCK_SIZE)) << i; - } - } - EMU->RAM2CTRL |= mask; -#endif -} - -#if defined(_EMU_EM23PERNORETAINCTRL_MASK) -/***************************************************************************//** - * @brief - * Set EM2 3 peripheral retention control. - * - * @param[in] periMask - * Peripheral select mask. Use | operator to select multiple peripheral, for example - * @ref emuPeripheralRetention_LEUART0 | @ref emuPeripheralRetention_VDAC0. - * @param[in] enable - * Peripheral retention enable (true) or disable (false). - * - * - * @note - * Only peripheral retention disable is currently supported. Peripherals are - * enabled by default, and can only be disabled. - ******************************************************************************/ -void EMU_PeripheralRetention(EMU_PeripheralRetention_TypeDef periMask, bool enable) -{ - EFM_ASSERT(!enable); - EMU->EM23PERNORETAINCTRL = periMask & emuPeripheralRetention_ALL; -} -#endif - -/***************************************************************************//** - * @brief - * Update EMU module with CMU oscillator selection/enable status. - * - * @deprecated - * Oscillator status is saved in @ref EMU_EnterEM2() and @ref EMU_EnterEM3(). - ******************************************************************************/ -void EMU_UpdateOscConfig(void) -{ - emState(emState_Save); -} - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/***************************************************************************//** - * @brief - * Voltage scale in EM0 and 1 by clock frequency. - * - * @param[in] clockFrequency - * Use CMSIS HF clock if 0, or override to custom clock. Providing a - * custom clock frequency is required if using a non-standard HFXO - * frequency. - * @param[in] wait - * Wait for scaling to complete. - * - * @note - * This function is primarily needed by the @ref CMU module. - ******************************************************************************/ -void EMU_VScaleEM01ByClock(uint32_t clockFrequency, bool wait) -{ - uint32_t hfSrcClockFrequency; - uint32_t hfPresc = 1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT); - - /* VSCALE frequency is HFSRCCLK */ - if (clockFrequency == 0) { - hfSrcClockFrequency = SystemHFClockGet() * hfPresc; - } else { - hfSrcClockFrequency = clockFrequency; - } - - /* Apply EM0 and 1 voltage scaling command. */ - if (vScaleEM01Config.vScaleEM01LowPowerVoltageEnable - && (hfSrcClockFrequency < CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX)) { - EMU_VScaleEM01(emuVScaleEM01_LowPower, wait); - } else { - EMU_VScaleEM01(emuVScaleEM01_HighPerformance, wait); - } -} -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/***************************************************************************//** - * @brief - * Force voltage scaling in EM0 and 1 to a specific voltage level. - * - * @param[in] voltage - * Target VSCALE voltage level. - * @param[in] wait - * Wait for scaling to complate. - * - * @note - * This function is useful for upscaling before programming Flash from @ref MSC, - * and downscaling after programming is done. Flash programming is only supported - * at @ref emuVScaleEM01_HighPerformance. - * - * @note - * This function ignores @ref vScaleEM01LowPowerVoltageEnable set from @ref - * EMU_EM01Init(). - ******************************************************************************/ -void EMU_VScaleEM01(EMU_VScaleEM01_TypeDef voltage, bool wait) -{ - uint32_t hfSrcClockFrequency; - uint32_t hfPresc = 1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT); - uint32_t hfFreq = SystemHFClockGet(); - EMU_VScaleEM01_TypeDef current = EMU_VScaleGet(); - - if (current == voltage) { - /* Voltage is already at correct level. */ - return; - } - - hfSrcClockFrequency = hfFreq * hfPresc; - - if (voltage == emuVScaleEM01_LowPower) { - EFM_ASSERT(hfSrcClockFrequency <= CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX); - /* Update wait states before scaling down voltage */ - CMU_UpdateWaitStates(hfFreq, emuVScaleEM01_LowPower); - } - - EMU->CMD = vScaleEM01Cmd(voltage); - - if (voltage == emuVScaleEM01_HighPerformance) { - /* Update wait states after scaling up voltage */ - CMU_UpdateWaitStates(hfFreq, emuVScaleEM01_HighPerformance); - } - - if (wait) { - EMU_VScaleWait(); - } -} -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/***************************************************************************//** - * @brief - * Update EMU module with Energy Mode 0 and 1 configuration - * - * @param[in] em01Init - * Energy Mode 0 and 1 configuration structure - ******************************************************************************/ -void EMU_EM01Init(const EMU_EM01Init_TypeDef *em01Init) -{ - vScaleEM01Config.vScaleEM01LowPowerVoltageEnable = - em01Init->vScaleEM01LowPowerVoltageEnable; - EMU_VScaleEM01ByClock(0, true); -} -#endif - -/***************************************************************************//** - * @brief - * Update EMU module with Energy Mode 2 and 3 configuration - * - * @param[in] em23Init - * Energy Mode 2 and 3 configuration structure - ******************************************************************************/ -void EMU_EM23Init(const EMU_EM23Init_TypeDef *em23Init) -{ -#if defined(_EMU_CTRL_EMVREG_MASK) - EMU->CTRL = em23Init->em23VregFullEn ? (EMU->CTRL | EMU_CTRL_EMVREG) - : (EMU->CTRL & ~EMU_CTRL_EMVREG); -#elif defined(_EMU_CTRL_EM23VREG_MASK) - EMU->CTRL = em23Init->em23VregFullEn ? (EMU->CTRL | EMU_CTRL_EM23VREG) - : (EMU->CTRL & ~EMU_CTRL_EM23VREG); -#else - (void)em23Init; -#endif - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) - EMU->CTRL = (EMU->CTRL & ~_EMU_CTRL_EM23VSCALE_MASK) - | (em23Init->vScaleEM23Voltage << _EMU_CTRL_EM23VSCALE_SHIFT); -#endif -} - -#if defined(_EMU_EM4CONF_MASK) || defined(_EMU_EM4CTRL_MASK) -/***************************************************************************//** - * @brief - * Update EMU module with Energy Mode 4 configuration - * - * @param[in] em4Init - * Energy Mode 4 configuration structure - ******************************************************************************/ -void EMU_EM4Init(const EMU_EM4Init_TypeDef *em4Init) -{ -#if defined(_EMU_EM4CONF_MASK) - /* Init for platforms with EMU->EM4CONF register */ - uint32_t em4conf = EMU->EM4CONF; - - /* Clear fields that will be reconfigured */ - em4conf &= ~(_EMU_EM4CONF_LOCKCONF_MASK - | _EMU_EM4CONF_OSC_MASK - | _EMU_EM4CONF_BURTCWU_MASK - | _EMU_EM4CONF_VREGEN_MASK); - - /* Configure new settings */ - em4conf |= (em4Init->lockConfig << _EMU_EM4CONF_LOCKCONF_SHIFT) - | (em4Init->osc) - | (em4Init->buRtcWakeup << _EMU_EM4CONF_BURTCWU_SHIFT) - | (em4Init->vreg << _EMU_EM4CONF_VREGEN_SHIFT); - - /* Apply configuration. Note that lock can be set after this stage. */ - EMU->EM4CONF = em4conf; - -#elif defined(_EMU_EM4CTRL_MASK) - /* Init for platforms with EMU->EM4CTRL register */ - - uint32_t em4ctrl = EMU->EM4CTRL; - - em4ctrl &= ~(_EMU_EM4CTRL_RETAINLFXO_MASK - | _EMU_EM4CTRL_RETAINLFRCO_MASK - | _EMU_EM4CTRL_RETAINULFRCO_MASK - | _EMU_EM4CTRL_EM4STATE_MASK - | _EMU_EM4CTRL_EM4IORETMODE_MASK); - - em4ctrl |= (em4Init->retainLfxo ? EMU_EM4CTRL_RETAINLFXO : 0) - | (em4Init->retainLfrco ? EMU_EM4CTRL_RETAINLFRCO : 0) - | (em4Init->retainUlfrco ? EMU_EM4CTRL_RETAINULFRCO : 0) - | (em4Init->em4State ? EMU_EM4CTRL_EM4STATE_EM4H : 0) - | (em4Init->pinRetentionMode); - - EMU->EM4CTRL = em4ctrl; -#endif - -#if defined(_EMU_CTRL_EM4HVSCALE_MASK) - EMU->CTRL = (EMU->CTRL & ~_EMU_CTRL_EM4HVSCALE_MASK) - | (em4Init->vScaleEM4HVoltage << _EMU_CTRL_EM4HVSCALE_SHIFT); -#endif -} -#endif - -#if defined(BU_PRESENT) -/***************************************************************************//** - * @brief - * Configure Backup Power Domain settings - * - * @param[in] bupdInit - * Backup power domain initialization structure - ******************************************************************************/ -void EMU_BUPDInit(const EMU_BUPDInit_TypeDef *bupdInit) -{ - uint32_t reg; - - /* Set power connection configuration */ - reg = EMU->PWRCONF & ~(_EMU_PWRCONF_PWRRES_MASK - | _EMU_PWRCONF_VOUTSTRONG_MASK - | _EMU_PWRCONF_VOUTMED_MASK - | _EMU_PWRCONF_VOUTWEAK_MASK); - - reg |= bupdInit->resistor - | (bupdInit->voutStrong << _EMU_PWRCONF_VOUTSTRONG_SHIFT) - | (bupdInit->voutMed << _EMU_PWRCONF_VOUTMED_SHIFT) - | (bupdInit->voutWeak << _EMU_PWRCONF_VOUTWEAK_SHIFT); - - EMU->PWRCONF = reg; - - /* Set backup domain inactive mode configuration */ - reg = EMU->BUINACT & ~(_EMU_BUINACT_PWRCON_MASK); - reg |= (bupdInit->inactivePower); - EMU->BUINACT = reg; - - /* Set backup domain active mode configuration */ - reg = EMU->BUACT & ~(_EMU_BUACT_PWRCON_MASK); - reg |= (bupdInit->activePower); - EMU->BUACT = reg; - - /* Set power control configuration */ - reg = EMU->BUCTRL & ~(_EMU_BUCTRL_PROBE_MASK - | _EMU_BUCTRL_BODCAL_MASK - | _EMU_BUCTRL_STATEN_MASK - | _EMU_BUCTRL_EN_MASK); - - /* Note use of ->enable to both enable BUPD, use BU_VIN pin input and - release reset */ - reg |= bupdInit->probe - | (bupdInit->bodCal << _EMU_BUCTRL_BODCAL_SHIFT) - | (bupdInit->statusPinEnable << _EMU_BUCTRL_STATEN_SHIFT) - | (bupdInit->enable << _EMU_BUCTRL_EN_SHIFT); - - /* Enable configuration */ - EMU->BUCTRL = reg; - - /* If enable is true, enable BU_VIN input power pin, if not disable it */ - EMU_BUPinEnable(bupdInit->enable); - - /* If enable is true, release BU reset, if not keep reset asserted */ - BUS_RegBitWrite(&(RMU->CTRL), _RMU_CTRL_BURSTEN_SHIFT, !bupdInit->enable); -} - -/***************************************************************************//** - * @brief - * Configure Backup Power Domain BOD Threshold value - * @note - * These values are precalibrated - * @param[in] mode Active or Inactive mode - * @param[in] value - ******************************************************************************/ -void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value) -{ - EFM_ASSERT(value < 8); - EFM_ASSERT(value <= (_EMU_BUACT_BUEXTHRES_MASK >> _EMU_BUACT_BUEXTHRES_SHIFT)); - - switch (mode) { - case emuBODMode_Active: - EMU->BUACT = (EMU->BUACT & ~_EMU_BUACT_BUEXTHRES_MASK) - | (value << _EMU_BUACT_BUEXTHRES_SHIFT); - break; - case emuBODMode_Inactive: - EMU->BUINACT = (EMU->BUINACT & ~_EMU_BUINACT_BUENTHRES_MASK) - | (value << _EMU_BUINACT_BUENTHRES_SHIFT); - break; - } -} - -/***************************************************************************//** - * @brief - * Configure Backup Power Domain BOD Threshold Range - * @note - * These values are precalibrated - * @param[in] mode Active or Inactive mode - * @param[in] value - ******************************************************************************/ -void EMU_BUThresRangeSet(EMU_BODMode_TypeDef mode, uint32_t value) -{ - EFM_ASSERT(value < 4); - EFM_ASSERT(value <= (_EMU_BUACT_BUEXRANGE_MASK >> _EMU_BUACT_BUEXRANGE_SHIFT)); - - switch (mode) { - case emuBODMode_Active: - EMU->BUACT = (EMU->BUACT & ~_EMU_BUACT_BUEXRANGE_MASK) - | (value << _EMU_BUACT_BUEXRANGE_SHIFT); - break; - case emuBODMode_Inactive: - EMU->BUINACT = (EMU->BUINACT & ~_EMU_BUINACT_BUENRANGE_MASK) - | (value << _EMU_BUINACT_BUENRANGE_SHIFT); - break; - } -} -#endif - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -#if defined(_EMU_DCDCCTRL_MASK) -/* Translate fields with different names across platform generations to common names. */ -#if defined(_EMU_DCDCMISCCTRL_LPCMPBIAS_MASK) -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK _EMU_DCDCMISCCTRL_LPCMPBIAS_MASK -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT _EMU_DCDCMISCCTRL_LPCMPBIAS_SHIFT -#elif defined(_EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK) -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT -#endif -#if defined(_EMU_DCDCLPCTRL_LPCMPHYSSEL_MASK) -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK _EMU_DCDCLPCTRL_LPCMPHYSSEL_MASK -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT _EMU_DCDCLPCTRL_LPCMPHYSSEL_SHIFT -#elif defined(_EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT -#endif - -/* Internal DCDC trim modes. */ -typedef enum { - dcdcTrimMode_EM234H_LP = 0, -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - dcdcTrimMode_EM01_LP, -#endif - dcdcTrimMode_LN, -} dcdcTrimMode_TypeDef; - -/***************************************************************************//** - * @brief - * Load DCDC calibration constants from DI page. Const means calibration - * data that does not change depending on other configuration parameters. - * - * @return - * False if calibration registers are locked - ******************************************************************************/ -static bool dcdcConstCalibrationLoad(void) -{ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - uint32_t val; - volatile uint32_t *reg; - - /* DI calib data in flash */ - volatile uint32_t* const diCal_EMU_DCDCLNFREQCTRL = (volatile uint32_t *)(0x0FE08038); - volatile uint32_t* const diCal_EMU_DCDCLNVCTRL = (volatile uint32_t *)(0x0FE08040); - volatile uint32_t* const diCal_EMU_DCDCLPCTRL = (volatile uint32_t *)(0x0FE08048); - volatile uint32_t* const diCal_EMU_DCDCLPVCTRL = (volatile uint32_t *)(0x0FE08050); - volatile uint32_t* const diCal_EMU_DCDCTRIM0 = (volatile uint32_t *)(0x0FE08058); - volatile uint32_t* const diCal_EMU_DCDCTRIM1 = (volatile uint32_t *)(0x0FE08060); - - if (DEVINFO->DCDCLPVCTRL0 != UINT_MAX) { - val = *(diCal_EMU_DCDCLNFREQCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLNFREQCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCLNVCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLNVCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCLPCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLPCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCLPVCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLPVCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCTRIM0 + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCTRIM0; - *reg = val; - - val = *(diCal_EMU_DCDCTRIM1 + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCTRIM1; - *reg = val; - - return true; - } - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - -#else - return true; -#endif -} - -/***************************************************************************//** - * @brief - * Set recommended and validated current optimization and timing settings - * - ******************************************************************************/ -static void dcdcValidatedConfigSet(void) -{ -/* Disable LP mode hysterysis in the state machine control */ -#define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) -/* Comparator threshold on the high side */ -#define EMU_DCDCMISCCTRL_LPCMPHYSHI (0x1UL << 2) -#define EMU_DCDCSMCTRL (*(volatile uint32_t *)(EMU_BASE + 0x44)) - - uint32_t lnForceCcm; - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - uint32_t dcdcTiming; - SYSTEM_ChipRevision_TypeDef rev; -#endif - - /* Enable duty cycling of the bias */ - EMU->DCDCLPCTRL |= EMU_DCDCLPCTRL_LPVREFDUTYEN; - - /* Set low-noise RCO for LNFORCECCM configuration - * LNFORCECCM is default 1 for EFR32 - * LNFORCECCM is default 0 for EFM32 - */ - lnForceCcm = BUS_RegBitRead(&EMU->DCDCMISCCTRL, _EMU_DCDCMISCCTRL_LNFORCECCM_SHIFT); - if (lnForceCcm) { - /* 7MHz is recommended for LNFORCECCM = 1 */ - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_7MHz); - } else { - /* 3MHz is recommended for LNFORCECCM = 0 */ - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_3MHz); - } - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - EMU->DCDCTIMING &= ~_EMU_DCDCTIMING_DUTYSCALE_MASK; - EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LPCMPHYSDIS - | EMU_DCDCMISCCTRL_LPCMPHYSHI; - - SYSTEM_ChipRevisionGet(&rev); - if ((rev.major == 1) - && (rev.minor < 3) - && (errataFixDcdcHsState == errataFixDcdcHsInit)) { - /* LPCMPWAITDIS = 1 */ - EMU_DCDCSMCTRL |= 1; - - dcdcTiming = EMU->DCDCTIMING; - dcdcTiming &= ~(_EMU_DCDCTIMING_LPINITWAIT_MASK - | _EMU_DCDCTIMING_LNWAIT_MASK - | _EMU_DCDCTIMING_BYPWAIT_MASK); - - dcdcTiming |= ((180 << _EMU_DCDCTIMING_LPINITWAIT_SHIFT) - | (12 << _EMU_DCDCTIMING_LNWAIT_SHIFT) - | (180 << _EMU_DCDCTIMING_BYPWAIT_SHIFT)); - EMU->DCDCTIMING = dcdcTiming; - - errataFixDcdcHsState = errataFixDcdcHsTrimSet; - } -#endif -} - -/***************************************************************************//** - * @brief - * Compute current limiters: - * LNCLIMILIMSEL: LN current limiter threshold - * LPCLIMILIMSEL: LP current limiter threshold - * DCDCZDETCTRL: zero detector limiter threshold - ******************************************************************************/ -static void currentLimitersUpdate(void) -{ - uint32_t lncLimSel; - uint32_t zdetLimSel; - uint32_t pFetCnt; - uint16_t maxReverseCurrent_mA; - - /* 80mA as recommended peak in Application Note AN0948. - The peak current is the average current plus 50% of the current ripple. - Hence, a 14mA average current is recommended in LP mode. Since LP PFETCNT is also - a constant, we get lpcLimImSel = 1. The following calculation is provided - for documentation only. */ - const uint32_t lpcLim = (((14 + 40) + ((14 + 40) / 2)) - / (5 * (DCDC_LP_PFET_CNT + 1))) - - 1; - const uint32_t lpcLimSel = lpcLim << _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_SHIFT; - - /* Get enabled PFETs */ - pFetCnt = (EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_PFETCNT_MASK) - >> _EMU_DCDCMISCCTRL_PFETCNT_SHIFT; - - /* Compute LN current limiter threshold from nominal user input current and - LN PFETCNT as described in the register description for - EMU_DCDCMISCCTRL_LNCLIMILIMSEL. */ - lncLimSel = (((dcdcMaxCurrent_mA + 40) + ((dcdcMaxCurrent_mA + 40) / 2)) - / (5 * (pFetCnt + 1))) - - 1; - - /* Saturate the register field value */ - lncLimSel = SL_MIN(lncLimSel, - _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK - >> _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT); - - lncLimSel <<= _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT; - - /* Check for overflow */ - EFM_ASSERT((lncLimSel & ~_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK) == 0x0); - EFM_ASSERT((lpcLimSel & ~_EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK) == 0x0); - - EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK - | _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK)) - | (lncLimSel | lpcLimSel); - - /* Compute reverse current limit threshold for the zero detector from user input - maximum reverse current and LN PFETCNT as described in the register description - for EMU_DCDCZDETCTRL_ZDETILIMSEL. */ - if (dcdcReverseCurrentControl >= 0) { - /* If dcdcReverseCurrentControl < 0, then EMU_DCDCZDETCTRL_ZDETILIMSEL is "don't care" */ - maxReverseCurrent_mA = (uint16_t)dcdcReverseCurrentControl; - - zdetLimSel = ( ((maxReverseCurrent_mA + 40) + ((maxReverseCurrent_mA + 40) / 2)) - / ((2 * (pFetCnt + 1)) + ((pFetCnt + 1) / 2)) ); - /* Saturate the register field value */ - zdetLimSel = SL_MIN(zdetLimSel, - _EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK - >> _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT); - - zdetLimSel <<= _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT; - - /* Check for overflow */ - EFM_ASSERT((zdetLimSel & ~_EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK) == 0x0); - - EMU->DCDCZDETCTRL = (EMU->DCDCZDETCTRL & ~_EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK) - | zdetLimSel; - } -} - -/***************************************************************************//** - * @brief - * Set static variables that hold the user set maximum peak current - * and reverse current. Update limiters. - * - * @param[in] maxCurrent_mA - * Set the maximum peak current that the DCDC can draw from the power source. - * @param[in] reverseCurrentControl - * Reverse current control as defined by - * @ref EMU_DcdcLnReverseCurrentControl_TypeDef. Positive values have unit mA. - ******************************************************************************/ -static void userCurrentLimitsSet(uint32_t maxCurrent_mA, - EMU_DcdcLnReverseCurrentControl_TypeDef reverseCurrentControl) -{ - dcdcMaxCurrent_mA = maxCurrent_mA; - dcdcReverseCurrentControl = reverseCurrentControl; -} - -/***************************************************************************//** - * @brief - * Set DCDC low noise compensator control register - * - * @param[in] comp - * Low-noise mode compensator trim setpoint - ******************************************************************************/ -static void compCtrlSet(EMU_DcdcLnCompCtrl_TypeDef comp) -{ - switch (comp) { - case emuDcdcLnCompCtrl_1u0F: - EMU->DCDCLNCOMPCTRL = 0x57204077UL; - break; - - case emuDcdcLnCompCtrl_4u7F: - EMU->DCDCLNCOMPCTRL = 0xB7102137UL; - break; - - default: - EFM_ASSERT(false); - break; - } -} - -/***************************************************************************//** - * @brief - * Load EMU_DCDCLPCTRL_LPCMPHYSSEL depending on LP bias, LP feedback - * attenuation and DEVINFOREV. - * - * @param[in] lpAttenuation - * LP feedback attenuation. - * @param[in] lpCmpBias - * lpCmpBias selection. - * @param[in] trimMode - * DCDC trim mode. - ******************************************************************************/ -static bool lpCmpHystCalibrationLoad(bool lpAttenuation, - uint8_t lpCmpBias, - dcdcTrimMode_TypeDef trimMode) -{ - uint32_t lpcmpHystSel; - - /* Get calib data revision */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - uint8_t devinfoRev = SYSTEM_GetDevinfoRev(); - - /* Load LPATT indexed calibration data */ - if (devinfoRev < 4) -#else - /* Format change not present of newer families. */ - if (false) -#endif - { - lpcmpHystSel = DEVINFO->DCDCLPCMPHYSSEL0; - - if (lpAttenuation) { - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT1_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT1_SHIFT; - } else { - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT0_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT0_SHIFT; - } - } else { - /* devinfoRev >= 4: load LPCMPBIAS indexed calibration data */ - lpcmpHystSel = DEVINFO->DCDCLPCMPHYSSEL1; - switch (lpCmpBias) { - case 0: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS0_SHIFT; - break; - - case 1: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS1_SHIFT; - break; - - case 2: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS2_SHIFT; - break; - - case 3: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS3_SHIFT; - break; - - default: - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - } - - /* Set trims */ - if (trimMode == dcdcTrimMode_EM234H_LP) { - /* Make sure the sel value is within the field range. */ - lpcmpHystSel <<= _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT; - if (lpcmpHystSel & ~_GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - EMU->DCDCLPCTRL = (EMU->DCDCLPCTRL & ~_GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) | lpcmpHystSel; - } - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) - if (trimMode == dcdcTrimMode_EM01_LP) { - /* Make sure the sel value is within the field range. */ - lpcmpHystSel <<= _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_SHIFT; - if (lpcmpHystSel & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - EMU->DCDCLPEM01CFG = (EMU->DCDCLPEM01CFG & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) | lpcmpHystSel; - } -#endif - - return true; -} - -/***************************************************************************//** - * @brief - * Load LPVREF low and high from DEVINFO. - * - * @param[out] vrefL - * LPVREF low from DEVINFO. - * @param[out] vrefH - * LPVREF high from DEVINFO. - * @param[in] lpAttenuation - * LP feedback attenuation. - * @param[in] lpcmpBias - * lpcmpBias to lookup in DEVINFO. - ******************************************************************************/ -static void lpGetDevinfoVrefLowHigh(uint32_t *vrefL, - uint32_t *vrefH, - bool lpAttenuation, - uint8_t lpcmpBias) -{ - uint32_t vrefLow = 0; - uint32_t vrefHigh = 0; - - /* Find VREF high and low in DEVINFO indexed by LPCMPBIAS (lpcmpBias) - and LPATT (lpAttenuation) */ - uint32_t switchVal = (lpcmpBias << 8) | (lpAttenuation ? 1 : 0); - switch (switchVal) { - case ((0 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL2; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT; - break; - - case ((1 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL2; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT; - break; - - case ((2 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL3; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT; - break; - - case ((3 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL3; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT; - break; - - case ((0 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL0; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS0_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS0_SHIFT; - break; - - case ((1 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL0; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS1_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS1_SHIFT; - break; - - case ((2 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL1; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS2_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS2_SHIFT; - break; - - case ((3 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL1; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS3_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS3_SHIFT; - break; - - default: - EFM_ASSERT(false); - break; - } - *vrefL = vrefLow; - *vrefH = vrefHigh; -} - -/** @endcond */ - -/***************************************************************************//** - * @brief - * Set DCDC regulator operating mode - * - * @param[in] dcdcMode - * DCDC mode - ******************************************************************************/ -void EMU_DCDCModeSet(EMU_DcdcMode_TypeDef dcdcMode) -{ - uint32_t currentDcdcMode; - - /* Wait for any previous write sync to complete and read DCDC mode. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - currentDcdcMode = (EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK); - - /* Enable bypass current limiter when not in bypass mode to prevent - excessive current between VREGVDD and DVDD supplies when reentering bypass mode. */ - if (currentDcdcMode != EMU_DCDCCTRL_DCDCMODE_BYPASS) { - BUS_RegBitWrite(&EMU->DCDCCLIMCTRL, _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, 1); - } - - if ((EMU_DcdcMode_TypeDef)currentDcdcMode == dcdcMode) { - /* Mode already set. If already in bypass, make sure bypass current limiter - is disabled. */ - if (dcdcMode == emuDcdcMode_Bypass) { - BUS_RegBitWrite(&EMU->DCDCCLIMCTRL, _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, 0); - } - return; - } - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - - /* Fix for errata DCDC_E203 */ - if ((currentDcdcMode == EMU_DCDCCTRL_DCDCMODE_BYPASS) - && (dcdcMode == emuDcdcMode_LowNoise)) { - errataFixDcdcHsState = errataFixDcdcHsBypassLn; - } - -#else - - /* Fix for errata DCDC_E204 */ - if (((currentDcdcMode == EMU_DCDCCTRL_DCDCMODE_OFF) || (currentDcdcMode == EMU_DCDCCTRL_DCDCMODE_BYPASS)) - && ((dcdcMode == emuDcdcMode_LowPower) || (dcdcMode == emuDcdcMode_LowNoise))) { - /* Always start in LOWNOISE mode and then switch to LOWPOWER mode once LOWNOISE startup is complete. */ - EMU_IntClear(EMU_IFC_DCDCLNRUNNING); - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - EMU->DCDCCTRL = (EMU->DCDCCTRL & ~_EMU_DCDCCTRL_DCDCMODE_MASK) | EMU_DCDCCTRL_DCDCMODE_LOWNOISE; - while (!(EMU_IntGet() & EMU_IF_DCDCLNRUNNING)) ; - } -#endif - - /* Set user requested mode. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - EMU->DCDCCTRL = (EMU->DCDCCTRL & ~_EMU_DCDCCTRL_DCDCMODE_MASK) | dcdcMode; - - /* Disable bypass current limiter after bypass mode is entered. - Enable the limiter if any other mode is entered. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - BUS_RegBitWrite(&EMU->DCDCCLIMCTRL, _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, dcdcMode == emuDcdcMode_Bypass ? 0 : 1); -} - -/***************************************************************************//** - * @brief - * Set DCDC LN regulator conduction mode - * - * @param[in] conductionMode - * DCDC LN conduction mode. - * @param[in] rcoDefaultSet - * The default DCDC RCO band for the conductionMode will be used if true. - * Otherwise the current RCO configuration is used. - ******************************************************************************/ -void EMU_DCDCConductionModeSet(EMU_DcdcConductionMode_TypeDef conductionMode, bool rcoDefaultSet) -{ - EMU_DcdcMode_TypeDef currentDcdcMode - = (EMU_DcdcMode_TypeDef)(EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK); - EMU_DcdcLnRcoBand_TypeDef rcoBand - = (EMU_DcdcLnRcoBand_TypeDef)((EMU->DCDCLNFREQCTRL & _EMU_DCDCLNFREQCTRL_RCOBAND_MASK) - >> _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT); - - /* Set bypass mode and wait for bypass mode to settle before - EMU_DCDCMISCCTRL_LNFORCECCM is set. Restore current DCDC mode. */ - EMU_IntClear(EMU_IFC_DCDCINBYPASS); - EMU_DCDCModeSet(emuDcdcMode_Bypass); - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - while (!(EMU_IntGet() & EMU_IF_DCDCINBYPASS)) ; - if (conductionMode == emuDcdcConductionMode_DiscontinuousLN) { - EMU->DCDCMISCCTRL &= ~EMU_DCDCMISCCTRL_LNFORCECCM; - if (rcoDefaultSet) { - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_3MHz); - } else { - /* emuDcdcConductionMode_DiscontinuousLN supports up to 4MHz LN RCO. */ - EFM_ASSERT(rcoBand <= emuDcdcLnRcoBand_4MHz); - } - } else { - EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LNFORCECCM; - if (rcoDefaultSet) { - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_7MHz); - } - } - EMU_DCDCModeSet(currentDcdcMode); - /* Update slice configuration as it depends on conduction mode and RCO band. */ - EMU_DCDCOptimizeSlice(dcdcEm01LoadCurrent_mA); -} - -/***************************************************************************//** - * @brief - * Configure DCDC regulator - * - * @note - * If the power circuit is configured for NODCDC as described in Section - * 11.3.4.3 of the Reference Manual, do not call this function. Instead call - * EMU_DCDCPowerOff(). - * - * @param[in] dcdcInit - * DCDC initialization structure - * - * @return - * True if initialization parameters are valid - ******************************************************************************/ -bool EMU_DCDCInit(const EMU_DCDCInit_TypeDef *dcdcInit) -{ - uint32_t lpCmpBiasSelEM234H; - -#if defined(_EMU_PWRCFG_MASK) - /* Set external power configuration. This enables writing to the other - DCDC registers. */ - EMU->PWRCFG = EMU_PWRCFG_PWRCFG_DCDCTODVDD; - - /* EMU->PWRCFG is write-once and POR reset only. Check that - we could set the desired power configuration. */ - if ((EMU->PWRCFG & _EMU_PWRCFG_PWRCFG_MASK) != EMU_PWRCFG_PWRCFG_DCDCTODVDD) { - /* If this assert triggers unexpectedly, please power cycle the - kit to reset the power configuration. */ - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } -#endif - - /* Load DCDC calibration data from the DI page */ - dcdcConstCalibrationLoad(); - - /* Check current parameters */ - EFM_ASSERT(dcdcInit->maxCurrent_mA <= 200); - EFM_ASSERT(dcdcInit->em01LoadCurrent_mA <= dcdcInit->maxCurrent_mA); - EFM_ASSERT(dcdcInit->reverseCurrentControl <= 200); - - if (dcdcInit->dcdcMode == emuDcdcMode_LowNoise) { - /* DCDC low-noise supports max 200mA */ - EFM_ASSERT(dcdcInit->em01LoadCurrent_mA <= 200); - } -#if (_SILICON_LABS_GECKO_INTERNAL_SDID != 80) - else if (dcdcInit->dcdcMode == emuDcdcMode_LowPower) { - /* Up to 10mA is supported for EM01-LP mode. */ - EFM_ASSERT(dcdcInit->em01LoadCurrent_mA <= 10); - } -#endif - - /* EM2/3/4 current above 10mA is not supported */ - EFM_ASSERT(dcdcInit->em234LoadCurrent_uA <= 10000); - - if (dcdcInit->em234LoadCurrent_uA < 75) { - lpCmpBiasSelEM234H = 0; - } else if (dcdcInit->em234LoadCurrent_uA < 500) { - lpCmpBiasSelEM234H = 1 << _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - } else if (dcdcInit->em234LoadCurrent_uA < 2500) { - lpCmpBiasSelEM234H = 2 << _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - } else { - lpCmpBiasSelEM234H = 3 << _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - } - - /* ==== THESE NEXT STEPS ARE STRONGLY ORDER DEPENDENT ==== */ - - /* Set DCDC low-power mode comparator bias selection */ - - /* 1. Set DCDC low-power mode comparator bias selection and forced CCM - => Updates DCDCMISCCTRL_LNFORCECCM */ - EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK - | _EMU_DCDCMISCCTRL_LNFORCECCM_MASK)) - | ((uint32_t)lpCmpBiasSelEM234H - | (dcdcInit->reverseCurrentControl >= 0 - ? EMU_DCDCMISCCTRL_LNFORCECCM : 0)); -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - /* Only 10mA EM01-LP current is supported */ - EMU->DCDCLPEM01CFG = (EMU->DCDCLPEM01CFG & ~_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - | EMU_DCDCLPEM01CFG_LPCMPBIASEM01_BIAS3; -#endif - - /* 2. Set recommended and validated current optimization settings - <= Depends on LNFORCECCM - => Updates DCDCLNFREQCTRL_RCOBAND */ - dcdcValidatedConfigSet(); - - /* 3. Updated static currents and limits user data. - Limiters are updated in EMU_DCDCOptimizeSlice() */ - userCurrentLimitsSet(dcdcInit->maxCurrent_mA, - dcdcInit->reverseCurrentControl); - dcdcEm01LoadCurrent_mA = dcdcInit->em01LoadCurrent_mA; - - /* 4. Optimize LN slice based on given user input load current - <= Depends on DCDCMISCCTRL_LNFORCECCM and DCDCLNFREQCTRL_RCOBAND - <= Depends on dcdcInit->maxCurrent_mA and dcdcInit->reverseCurrentControl - => Updates DCDCMISCCTRL_P/NFETCNT - => Updates DCDCMISCCTRL_LNCLIMILIMSEL and DCDCMISCCTRL_LPCLIMILIMSEL - => Updates DCDCZDETCTRL_ZDETILIMSEL */ - EMU_DCDCOptimizeSlice(dcdcInit->em01LoadCurrent_mA); - - /* ======================================================= */ - - /* Set DCDC low noise mode compensator control register. */ - compCtrlSet(dcdcInit->dcdcLnCompCtrl); - - /* Set DCDC output voltage */ - if (!EMU_DCDCOutputVoltageSet(dcdcInit->mVout, true, true)) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - -#if (_SILICON_LABS_GECKO_INTERNAL_SDID == 80) - /* Select analog peripheral power supply. This must be done before - DCDC mode is set for all EFM32xG1 and EFR32xG1 devices. */ - BUS_RegBitWrite(&EMU->PWRCTRL, - _EMU_PWRCTRL_ANASW_SHIFT, - dcdcInit->anaPeripheralPower ? 1 : 0); -#endif - -#if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) - /* Select DVDD as input to the digital regulator. The switch to DVDD will take - effect once the DCDC output is stable. */ - EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD; -#endif - - /* Set EM0 DCDC operating mode. Output voltage set in - EMU_DCDCOutputVoltageSet() above takes effect if mode - is changed from bypass/off mode. */ - EMU_DCDCModeSet(dcdcInit->dcdcMode); - -#if (_SILICON_LABS_GECKO_INTERNAL_SDID != 80) - /* Select analog peripheral power supply. This must be done after - DCDC mode is set for all devices other than EFM32xG1 and EFR32xG1. */ - BUS_RegBitWrite(&EMU->PWRCTRL, - _EMU_PWRCTRL_ANASW_SHIFT, - dcdcInit->anaPeripheralPower ? 1 : 0); -#endif - - return true; -} - -/***************************************************************************//** - * @brief - * Set DCDC output voltage - * - * @param[in] mV - * Target DCDC output voltage in mV - * - * @return - * True if the mV parameter is valid - ******************************************************************************/ -bool EMU_DCDCOutputVoltageSet(uint32_t mV, - bool setLpVoltage, - bool setLnVoltage) -{ -#if defined(_DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK) - -#define DCDC_TRIM_MODES ((uint8_t)dcdcTrimMode_LN + 1) - bool validOutVoltage; - bool attenuationSet; - uint32_t mVlow = 0; - uint32_t mVhigh = 0; - uint32_t mVdiff; - uint32_t vrefVal[DCDC_TRIM_MODES] = { 0 }; - uint32_t vrefLow[DCDC_TRIM_MODES] = { 0 }; - uint32_t vrefHigh[DCDC_TRIM_MODES] = { 0 }; - uint8_t lpcmpBias[DCDC_TRIM_MODES] = { 0 }; - - /* Check that the set voltage is within valid range. - Voltages are obtained from the datasheet. */ - validOutVoltage = ((mV >= PWRCFG_DCDCTODVDD_VMIN) - && (mV <= PWRCFG_DCDCTODVDD_VMAX)); - - if (!validOutVoltage) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - - /* Set attenuation to use and low/high range. */ - attenuationSet = (mV > 1800); - if (attenuationSet) { - mVlow = 1800; - mVhigh = 3000; - mVdiff = mVhigh - mVlow; - } else { - mVlow = 1200; - mVhigh = 1800; - mVdiff = mVhigh - mVlow; - } - - /* Get 2-point calib data from DEVINFO */ - - /* LN mode */ - if (attenuationSet) { - vrefLow[dcdcTrimMode_LN] = DEVINFO->DCDCLNVCTRL0; - vrefHigh[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK) - >> _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_SHIFT; - vrefLow[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_MASK) - >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_SHIFT; - } else { - vrefLow[dcdcTrimMode_LN] = DEVINFO->DCDCLNVCTRL0; - vrefHigh[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK) - >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_SHIFT; - vrefLow[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_MASK) - >> _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_SHIFT; - } - - /* LP EM234H mode */ - lpcmpBias[dcdcTrimMode_EM234H_LP] = (EMU->DCDCMISCCTRL & _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK) - >> _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - lpGetDevinfoVrefLowHigh(&vrefLow[dcdcTrimMode_EM234H_LP], - &vrefHigh[dcdcTrimMode_EM234H_LP], - attenuationSet, - lpcmpBias[dcdcTrimMode_EM234H_LP]); - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - /* LP EM01 mode */ - lpcmpBias[dcdcTrimMode_EM01_LP] = (EMU->DCDCLPEM01CFG & _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - >> _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_SHIFT; - lpGetDevinfoVrefLowHigh(&vrefLow[dcdcTrimMode_EM01_LP], - &vrefHigh[dcdcTrimMode_EM01_LP], - attenuationSet, - lpcmpBias[dcdcTrimMode_EM01_LP]); -#endif - - /* Calculate output voltage trims */ - vrefVal[dcdcTrimMode_LN] = ((mV - mVlow) * (vrefHigh[dcdcTrimMode_LN] - vrefLow[dcdcTrimMode_LN])) - / mVdiff; - vrefVal[dcdcTrimMode_LN] += vrefLow[dcdcTrimMode_LN]; - - vrefVal[dcdcTrimMode_EM234H_LP] = ((mV - mVlow) * (vrefHigh[dcdcTrimMode_EM234H_LP] - vrefLow[dcdcTrimMode_EM234H_LP])) - / mVdiff; - vrefVal[dcdcTrimMode_EM234H_LP] += vrefLow[dcdcTrimMode_EM234H_LP]; - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - vrefVal[dcdcTrimMode_EM01_LP] = ((mV - mVlow) * (vrefHigh[dcdcTrimMode_EM01_LP] - vrefLow[dcdcTrimMode_EM01_LP])) - / mVdiff; - vrefVal[dcdcTrimMode_EM01_LP] += vrefLow[dcdcTrimMode_EM01_LP]; -#endif - - /* Range checks */ - if ((vrefVal[dcdcTrimMode_LN] > vrefHigh[dcdcTrimMode_LN]) - || (vrefVal[dcdcTrimMode_LN] < vrefLow[dcdcTrimMode_LN]) -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - || (vrefVal[dcdcTrimMode_EM01_LP] > vrefHigh[dcdcTrimMode_EM01_LP]) - || (vrefVal[dcdcTrimMode_EM01_LP] < vrefLow[dcdcTrimMode_EM01_LP]) -#endif - || (vrefVal[dcdcTrimMode_EM234H_LP] > vrefHigh[dcdcTrimMode_EM234H_LP]) - || (vrefVal[dcdcTrimMode_EM234H_LP] < vrefLow[dcdcTrimMode_EM234H_LP])) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - - /* Update output voltage tuning for LN and LP modes. */ - if (setLnVoltage) { - EMU->DCDCLNVCTRL = (EMU->DCDCLNVCTRL & ~(_EMU_DCDCLNVCTRL_LNVREF_MASK | _EMU_DCDCLNVCTRL_LNATT_MASK)) - | (vrefVal[dcdcTrimMode_LN] << _EMU_DCDCLNVCTRL_LNVREF_SHIFT) - | (attenuationSet ? EMU_DCDCLNVCTRL_LNATT : 0); - } - - if (setLpVoltage) { - /* Load LP EM234H comparator hysteresis calibration */ - if (!(lpCmpHystCalibrationLoad(attenuationSet, lpcmpBias[dcdcTrimMode_EM234H_LP], dcdcTrimMode_EM234H_LP))) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - /* Load LP EM234H comparator hysteresis calibration */ - if (!(lpCmpHystCalibrationLoad(attenuationSet, lpcmpBias[dcdcTrimMode_EM01_LP], dcdcTrimMode_EM01_LP))) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - - /* LP VREF is that max of trims for EM01 and EM234H. */ - vrefVal[dcdcTrimMode_EM234H_LP] = SL_MAX(vrefVal[dcdcTrimMode_EM234H_LP], vrefVal[dcdcTrimMode_EM01_LP]); -#endif - - /* Don't exceed max available code as specified in the reference manual for EMU_DCDCLPVCTRL. */ - vrefVal[dcdcTrimMode_EM234H_LP] = SL_MIN(vrefVal[dcdcTrimMode_EM234H_LP], 0xE7U); - EMU->DCDCLPVCTRL = (EMU->DCDCLPVCTRL & ~(_EMU_DCDCLPVCTRL_LPVREF_MASK | _EMU_DCDCLPVCTRL_LPATT_MASK)) - | (vrefVal[dcdcTrimMode_EM234H_LP] << _EMU_DCDCLPVCTRL_LPVREF_SHIFT) - | (attenuationSet ? EMU_DCDCLPVCTRL_LPATT : 0); - } -#endif - return true; -} - -/***************************************************************************//** - * @brief - * Optimize DCDC slice count based on the estimated average load current - * in EM0 - * - * @param[in] em0LoadCurrent_mA - * Estimated average EM0 load current in mA. - ******************************************************************************/ -void EMU_DCDCOptimizeSlice(uint32_t em0LoadCurrent_mA) -{ - uint32_t sliceCount = 0; - uint32_t rcoBand = (EMU->DCDCLNFREQCTRL & _EMU_DCDCLNFREQCTRL_RCOBAND_MASK) - >> _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT; - - /* Set recommended slice count */ - if ((EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_LNFORCECCM_MASK) && (rcoBand >= emuDcdcLnRcoBand_5MHz)) { - if (em0LoadCurrent_mA < 20) { - sliceCount = 4; - } else if ((em0LoadCurrent_mA >= 20) && (em0LoadCurrent_mA < 40)) { - sliceCount = 8; - } else { - sliceCount = 16; - } - } else if ((!(EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_LNFORCECCM_MASK)) && (rcoBand <= emuDcdcLnRcoBand_4MHz)) { - if (em0LoadCurrent_mA < 10) { - sliceCount = 4; - } else if ((em0LoadCurrent_mA >= 10) && (em0LoadCurrent_mA < 20)) { - sliceCount = 8; - } else { - sliceCount = 16; - } - } else if ((EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_LNFORCECCM_MASK) && (rcoBand <= emuDcdcLnRcoBand_4MHz)) { - if (em0LoadCurrent_mA < 40) { - sliceCount = 8; - } else { - sliceCount = 16; - } - } else { - /* This configuration is not recommended. EMU_DCDCInit() applies a recommended - configuration. */ - EFM_ASSERT(false); - } - - /* The selected slices are PSLICESEL + 1 */ - sliceCount--; - - /* Apply slice count to both N and P slice */ - sliceCount = (sliceCount << _EMU_DCDCMISCCTRL_PFETCNT_SHIFT - | sliceCount << _EMU_DCDCMISCCTRL_NFETCNT_SHIFT); - EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_PFETCNT_MASK - | _EMU_DCDCMISCCTRL_NFETCNT_MASK)) - | sliceCount; - - /* Update current limiters */ - currentLimitersUpdate(); -} - -/***************************************************************************//** - * @brief - * Set DCDC Low-noise RCO band. - * - * @param[in] band - * RCO band to set. - ******************************************************************************/ -void EMU_DCDCLnRcoBandSet(EMU_DcdcLnRcoBand_TypeDef band) -{ - uint32_t forcedCcm; - forcedCcm = BUS_RegBitRead(&EMU->DCDCMISCCTRL, _EMU_DCDCMISCCTRL_LNFORCECCM_SHIFT); - - /* DCM mode supports up to 4MHz LN RCO. */ - EFM_ASSERT((!forcedCcm && band <= emuDcdcLnRcoBand_4MHz) || forcedCcm); - - EMU->DCDCLNFREQCTRL = (EMU->DCDCLNFREQCTRL & ~_EMU_DCDCLNFREQCTRL_RCOBAND_MASK) - | (band << _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT); - - /* Update slice configuration as this depends on the RCO band. */ - EMU_DCDCOptimizeSlice(dcdcEm01LoadCurrent_mA); -} - -/***************************************************************************//** - * @brief - * Power off the DCDC regulator. - * - * @details - * This function powers off the DCDC controller. This function should only be - * used if the external power circuit is wired for no DCDC. If the external power - * circuit is wired for DCDC usage, then use EMU_DCDCInit() and set the - * DCDC in bypass mode to disable DCDC. - * - * @return - * Return false if the DCDC could not be disabled. - ******************************************************************************/ -bool EMU_DCDCPowerOff(void) -{ - bool dcdcModeSet; - -#if defined(_EMU_PWRCFG_MASK) - /* Set DCDCTODVDD only to enable write access to EMU->DCDCCTRL */ - EMU->PWRCFG = EMU_PWRCFG_PWRCFG_DCDCTODVDD; -#endif - - /* Select DVDD as input to the digital regulator */ -#if defined(EMU_PWRCTRL_IMMEDIATEPWRSWITCH) - EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_IMMEDIATEPWRSWITCH; -#elif defined(EMU_PWRCTRL_REGPWRSEL_DVDD) - EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD; -#endif - - /* Set DCDC to OFF and disable LP in EM2/3/4. Verify that the required - mode could be set. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - EMU->DCDCCTRL = EMU_DCDCCTRL_DCDCMODE_OFF; - - dcdcModeSet = (EMU->DCDCCTRL == EMU_DCDCCTRL_DCDCMODE_OFF); - EFM_ASSERT(dcdcModeSet); - - return dcdcModeSet; -} -#endif - -#if defined(EMU_STATUS_VMONRDY) -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/***************************************************************************//** - * @brief - * Get calibrated threshold value. - * - * @details - * All VMON channels have two calibration fields in the DI page that - * describes the threshold at 1.86V and 2.98V. This function will convert - * the uncalibrated input voltage threshold in millivolts into a calibrated - * threshold. - * - * @param[in] channel - * VMON channel - * - * @param[in] threshold - * Desired threshold in millivolts. - * - * @return - * Calibrated threshold value to use. First digit of return value is placed - * in the "fine" register fields while the next digits are placed in the - * "coarse" register fields. - ******************************************************************************/ -static uint32_t vmonCalibratedThreshold(EMU_VmonChannel_TypeDef channel, - int threshold) -{ - uint32_t tLow; - uint32_t tHigh; - uint32_t calReg; - - /* Get calibration values for 1.86V and 2.98V */ - switch (channel) { - case emuVmonChannel_AVDD: - calReg = DEVINFO->VMONCAL0; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL0_AVDD1V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_AVDD1V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_AVDD1V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_AVDD1V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL0_AVDD2V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_AVDD2V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_AVDD2V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_AVDD2V98THRESFINE_SHIFT); - break; - case emuVmonChannel_ALTAVDD: - calReg = DEVINFO->VMONCAL0; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL0_ALTAVDD1V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD1V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_ALTAVDD1V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD1V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL0_ALTAVDD2V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD2V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_ALTAVDD2V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD2V98THRESFINE_SHIFT); - break; - case emuVmonChannel_DVDD: - calReg = DEVINFO->VMONCAL1; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL1_DVDD1V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_DVDD1V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_DVDD1V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_DVDD1V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL1_DVDD2V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_DVDD2V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_DVDD2V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_DVDD2V98THRESFINE_SHIFT); - break; - case emuVmonChannel_IOVDD0: - calReg = DEVINFO->VMONCAL1; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL1_IO01V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_IO01V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_IO01V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_IO01V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL1_IO02V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_IO02V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_IO02V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_IO02V98THRESFINE_SHIFT); - break; - default: - EFM_ASSERT(false); - return threshold; - } - - if (tHigh <= tLow) { - /* Uncalibrated device guard */ - return threshold; - } - - /* Calculate threshold. - * - * Note that volt is used in the reference manual, however we are interested - * in millivolt results. We also increase the precision of Va and Vb in the - * calculation instead of using floating points. - */ - uint32_t va = (1120 * 100) / (tHigh - tLow); - uint32_t vb = (1860 * 100) - (va * tLow); - /* Round threshold to nearest integer value. */ - return ((threshold * 100) - vb + (va / 2)) / va; -} - -/** @endcond */ - -/***************************************************************************//** - * @brief - * Initialize VMON channel. - * - * @details - * Initialize a VMON channel without hysteresis. If the channel supports - * separate rise and fall triggers, both thresholds will be set to the same - * value. The threshold will be converted to a register field value based - * on calibration values from the DI page. - * - * @param[in] vmonInit - * VMON initialization struct - ******************************************************************************/ -void EMU_VmonInit(const EMU_VmonInit_TypeDef *vmonInit) -{ - uint32_t thresholdCoarse, thresholdFine; - uint32_t threshold; - - EFM_ASSERT((vmonInit->threshold >= 1620) && (vmonInit->threshold <= 3400)); - - threshold = vmonCalibratedThreshold(vmonInit->channel, vmonInit->threshold); - thresholdFine = threshold % 10; - thresholdCoarse = threshold / 10; - - /* Saturate threshold to max values. */ - if (thresholdCoarse > 0xF) { - thresholdCoarse = 0xF; - thresholdFine = 9; - } - - switch (vmonInit->channel) { - case emuVmonChannel_AVDD: - EMU->VMONAVDDCTRL = (thresholdCoarse << _EMU_VMONAVDDCTRL_RISETHRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONAVDDCTRL_RISETHRESFINE_SHIFT) - | (thresholdCoarse << _EMU_VMONAVDDCTRL_FALLTHRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONAVDDCTRL_FALLTHRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONAVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONAVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONAVDDCTRL_EN : 0); - break; - case emuVmonChannel_ALTAVDD: - EMU->VMONALTAVDDCTRL = (thresholdCoarse << _EMU_VMONALTAVDDCTRL_THRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONALTAVDDCTRL_THRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONALTAVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONALTAVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONALTAVDDCTRL_EN : 0); - break; - case emuVmonChannel_DVDD: - EMU->VMONDVDDCTRL = (thresholdCoarse << _EMU_VMONDVDDCTRL_THRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONDVDDCTRL_THRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONDVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONDVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONDVDDCTRL_EN : 0); - break; - case emuVmonChannel_IOVDD0: - EMU->VMONIO0CTRL = (thresholdCoarse << _EMU_VMONIO0CTRL_THRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONIO0CTRL_THRESFINE_SHIFT) - | (vmonInit->retDisable ? EMU_VMONIO0CTRL_RETDIS : 0) - | (vmonInit->riseWakeup ? EMU_VMONIO0CTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONIO0CTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONIO0CTRL_EN : 0); - break; - default: - EFM_ASSERT(false); - return; - } -} - -/***************************************************************************//** - * @brief - * Initialize VMON channel with hysteresis (separate rise and fall triggers). - * - * @details - * Initialize a VMON channel which supports hysteresis. The AVDD channel is - * the only channel to support separate rise and fall triggers. The rise and - * fall thresholds will be converted to a register field value based on - * calibration values from the DI page. - * - * @param[in] vmonInit - * VMON Hysteresis initialization struct - ******************************************************************************/ -void EMU_VmonHystInit(const EMU_VmonHystInit_TypeDef *vmonInit) -{ - uint32_t riseThreshold; - uint32_t fallThreshold; - - /* VMON supports voltages between 1620 mV and 3400 mV (inclusive) */ - EFM_ASSERT((vmonInit->riseThreshold >= 1620) && (vmonInit->riseThreshold <= 3400)); - EFM_ASSERT((vmonInit->fallThreshold >= 1620) && (vmonInit->fallThreshold <= 3400)); - /* Fall threshold has to be lower than rise threshold */ - EFM_ASSERT(vmonInit->fallThreshold <= vmonInit->riseThreshold); - - riseThreshold = vmonCalibratedThreshold(vmonInit->channel, vmonInit->riseThreshold); - fallThreshold = vmonCalibratedThreshold(vmonInit->channel, vmonInit->fallThreshold); - - switch (vmonInit->channel) { - case emuVmonChannel_AVDD: - EMU->VMONAVDDCTRL = ((riseThreshold / 10) << _EMU_VMONAVDDCTRL_RISETHRESCOARSE_SHIFT) - | ((riseThreshold % 10) << _EMU_VMONAVDDCTRL_RISETHRESFINE_SHIFT) - | ((fallThreshold / 10) << _EMU_VMONAVDDCTRL_FALLTHRESCOARSE_SHIFT) - | ((fallThreshold % 10) << _EMU_VMONAVDDCTRL_FALLTHRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONAVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONAVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONAVDDCTRL_EN : 0); - break; - default: - EFM_ASSERT(false); - return; - } -} - -/***************************************************************************//** - * @brief - * Enable or disable a VMON channel - * - * @param[in] channel - * VMON channel to enable/disable - * - * @param[in] enable - * Whether to enable or disable - ******************************************************************************/ -void EMU_VmonEnable(EMU_VmonChannel_TypeDef channel, bool enable) -{ - uint32_t volatile * reg; - uint32_t bit; - - switch (channel) { - case emuVmonChannel_AVDD: - reg = &(EMU->VMONAVDDCTRL); - bit = _EMU_VMONAVDDCTRL_EN_SHIFT; - break; - case emuVmonChannel_ALTAVDD: - reg = &(EMU->VMONALTAVDDCTRL); - bit = _EMU_VMONALTAVDDCTRL_EN_SHIFT; - break; - case emuVmonChannel_DVDD: - reg = &(EMU->VMONDVDDCTRL); - bit = _EMU_VMONDVDDCTRL_EN_SHIFT; - break; - case emuVmonChannel_IOVDD0: - reg = &(EMU->VMONIO0CTRL); - bit = _EMU_VMONIO0CTRL_EN_SHIFT; - break; - default: - EFM_ASSERT(false); - return; - } - - BUS_RegBitWrite(reg, bit, enable); -} - -/***************************************************************************//** - * @brief - * Get the status of a voltage monitor channel. - * - * @param[in] channel - * VMON channel to get status for - * - * @return - * Status of the selected VMON channel. True if channel is triggered. - ******************************************************************************/ -bool EMU_VmonChannelStatusGet(EMU_VmonChannel_TypeDef channel) -{ - uint32_t bit; - switch (channel) { - case emuVmonChannel_AVDD: - bit = _EMU_STATUS_VMONAVDD_SHIFT; - break; - case emuVmonChannel_ALTAVDD: - bit = _EMU_STATUS_VMONALTAVDD_SHIFT; - break; - case emuVmonChannel_DVDD: - bit = _EMU_STATUS_VMONDVDD_SHIFT; - break; - case emuVmonChannel_IOVDD0: - bit = _EMU_STATUS_VMONIO0_SHIFT; - break; - default: - EFM_ASSERT(false); - bit = 0; - } - - return BUS_RegBitRead(&EMU->STATUS, bit); -} -#endif /* EMU_STATUS_VMONRDY */ - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -/***************************************************************************//** - * @brief - * Adjust the bias refresh rate - * - * @details - * This function is only meant to be used under high-temperature operation on - * EFR32xG1 and EFM32xG1 devices. Adjusting the bias mode will - * increase the typical current consumption. See application note 1027 - * and errata documents for further details. - * - * @param [in] mode - * The new bias refresh rate - ******************************************************************************/ -void EMU_SetBiasMode(EMU_BiasMode_TypeDef mode) -{ -#define EMU_TESTLOCK (*(volatile uint32_t *) (EMU_BASE + 0x190)) -#define EMU_BIASCONF (*(volatile uint32_t *) (EMU_BASE + 0x164)) -#define EMU_BIASTESTCTRL (*(volatile uint32_t *) (EMU_BASE + 0x19C)) -#define CMU_ULFRCOCTRL (*(volatile uint32_t *) (CMU_BASE + 0x03C)) - - uint32_t freq = 0x2u; - bool emuTestLocked = false; - - if (mode == emuBiasMode_1KHz) { - freq = 0x0u; - } - - if (EMU_TESTLOCK == 0x1u) { - emuTestLocked = true; - EMU_TESTLOCK = 0xADE8u; - } - - if (mode == emuBiasMode_Continuous) { - EMU_BIASCONF &= ~0x74u; - } else { - EMU_BIASCONF |= 0x74u; - } - - EMU_BIASTESTCTRL |= 0x8u; - CMU_ULFRCOCTRL = (CMU_ULFRCOCTRL & ~0xC00u) - | ((freq & 0x3u) << 10u); - EMU_BIASTESTCTRL &= ~0x8u; - - if (emuTestLocked) { - EMU_TESTLOCK = 0u; - } -} -#endif - -/** @} (end addtogroup EMU) */ -/** @} (end addtogroup emlib) */ -#endif /* __EM_EMU_H */ diff --git a/targets/efm32/emlib/em_gpio.c b/targets/efm32/emlib/em_gpio.c deleted file mode 100644 index 3b1d146..0000000 --- a/targets/efm32/emlib/em_gpio.c +++ /dev/null @@ -1,367 +0,0 @@ -/***************************************************************************//** - * @file em_gpio.c - * @brief General Purpose IO (GPIO) peripheral API - * devices. - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_gpio.h" - -#if defined(GPIO_COUNT) && (GPIO_COUNT > 0) - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup GPIO - * @brief General Purpose Input/Output (GPIO) API - * @details - * This module contains functions to control the GPIO peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The GPIO peripheral is used for pin configuration - * and direct pin manipulation and sensing as well as routing for peripheral - * pin connections. - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Validation of pin typically usable in assert statements. */ -#define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3) -#define GPIO_STRENGHT_VALID(strenght) (!((strenght) \ - & ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \ - | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK))) -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Sets the pin location of the debug pins (Serial Wire interface). - * - * @note - * Changing the pins used for debugging uncontrolled, may result in a lockout. - * - * @param[in] location - * The debug pin location to use (0-3). - ******************************************************************************/ -void GPIO_DbgLocationSet(unsigned int location) -{ -#if defined (_GPIO_ROUTE_SWLOCATION_MASK) - EFM_ASSERT(location < AFCHANLOC_MAX); - - GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) - | (location << _GPIO_ROUTE_SWLOCATION_SHIFT); -#else - (void)location; -#endif -} - -#if defined (_GPIO_P_CTRL_DRIVEMODE_MASK) -/***************************************************************************//** - * @brief - * Sets the drive mode for a GPIO port. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] mode - * Drive mode to use for port. - ******************************************************************************/ -void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode) -{ - EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode)); - - GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK)) - | (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT); -} -#endif - -#if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK) -/***************************************************************************//** - * @brief - * Sets the drive strength for a GPIO port. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] strength - * Drive strength to use for port. - ******************************************************************************/ -void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port, - GPIO_DriveStrength_TypeDef strength) -{ - EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength)); - BUS_RegMaskedWrite(&GPIO->P[port].CTRL, - _GPIO_P_CTRL_DRIVESTRENGTH_MASK | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK, - strength); -} -#endif - -/***************************************************************************//** - * @brief - * Configure GPIO external pin interrupt. - * - * @details - * If reconfiguring a GPIO interrupt that is already enabled, it is generally - * recommended to disable it first, see GPIO_Disable(). - * - * The actual GPIO interrupt handler must be in place before enabling the - * interrupt. - * - * Notice that any pending interrupt for the selected interrupt is cleared - * by this function. - * - * @note - * On series 0 devices the pin number parameter is not used. The - * pin number used on these devices is hardwired to the interrupt with the - * same number. @n - * On series 1 devices, pin number can be selected freely within a group. - * Interrupt numbers are divided into 4 groups (intNo / 4) and valid pin - * number within the interrupt groups are: - * 0: pins 0-3 - * 1: pins 4-7 - * 2: pins 8-11 - * 3: pins 12-15 - * - * @param[in] port - * The port to associate with @p pin. - * - * @param[in] pin - * The pin number on the port. - * - * @param[in] intNo - * The interrupt number to trigger. - * - * @param[in] risingEdge - * Set to true if interrupts shall be enabled on rising edge, otherwise false. - * - * @param[in] fallingEdge - * Set to true if interrupts shall be enabled on falling edge, otherwise false. - * - * @param[in] enable - * Set to true if interrupt shall be enabled after configuration completed, - * false to leave disabled. See GPIO_IntDisable() and GPIO_IntEnable(). - ******************************************************************************/ -void GPIO_ExtIntConfig(GPIO_Port_TypeDef port, - unsigned int pin, - unsigned int intNo, - bool risingEdge, - bool fallingEdge, - bool enable) -{ - uint32_t tmp = 0; -#if !defined(_GPIO_EXTIPINSELL_MASK) - (void)pin; -#endif - - EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); -#if defined(_GPIO_EXTIPINSELL_MASK) - EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin)); -#endif - - /* There are two registers controlling the interrupt configuration: - * The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls - * pins 8-15. */ - if (intNo < 8) { - BUS_RegMaskedWrite(&GPIO->EXTIPSELL, - _GPIO_EXTIPSELL_EXTIPSEL0_MASK - << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo), - port << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo)); - } else { - tmp = intNo - 8; - BUS_RegMaskedWrite(&GPIO->EXTIPSELH, - _GPIO_EXTIPSELH_EXTIPSEL8_MASK - << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp), - port << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp)); - } - -#if defined(_GPIO_EXTIPINSELL_MASK) - /* There are two registers controlling the interrupt/pin number mapping: - * The EXTIPINSELL register controls interrupt 0-7 and EXTIPINSELH controls - * interrupt 8-15. */ - if (intNo < 8) { - BUS_RegMaskedWrite(&GPIO->EXTIPINSELL, - _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK - << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo), - ((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK) - << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo)); - } else { - BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, - _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK - << (_GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT * tmp), - ((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK) - << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp)); - } -#endif - - /* Enable/disable rising edge */ - BUS_RegBitWrite(&(GPIO->EXTIRISE), intNo, risingEdge); - - /* Enable/disable falling edge */ - BUS_RegBitWrite(&(GPIO->EXTIFALL), intNo, fallingEdge); - - /* Clear any pending interrupt */ - GPIO->IFC = 1 << intNo; - - /* Finally enable/disable interrupt */ - BUS_RegBitWrite(&(GPIO->IEN), intNo, enable); -} - -/***************************************************************************//** - * @brief - * Set the mode for a GPIO pin. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] pin - * The pin number in the port. - * - * @param[in] mode - * The desired pin mode. - * - * @param[in] out - * Value to set for pin in DOUT register. The DOUT setting is important for - * even some input mode configurations, determining pull-up/down direction. - ******************************************************************************/ -void GPIO_PinModeSet(GPIO_Port_TypeDef port, - unsigned int pin, - GPIO_Mode_TypeDef mode, - unsigned int out) -{ - EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); - - /* If disabling pin, do not modify DOUT in order to reduce chance for */ - /* glitch/spike (may not be sufficient precaution in all use cases) */ - if (mode != gpioModeDisabled) { - if (out) { - GPIO_PinOutSet(port, pin); - } else { - GPIO_PinOutClear(port, pin); - } - } - - /* There are two registers controlling the pins for each port. The MODEL - * register controls pins 0-7 and MODEH controls pins 8-15. */ - if (pin < 8) { - GPIO->P[port].MODEL = (GPIO->P[port].MODEL & ~(0xFu << (pin * 4))) - | (mode << (pin * 4)); - } else { - GPIO->P[port].MODEH = (GPIO->P[port].MODEH & ~(0xFu << ((pin - 8) * 4))) - | (mode << ((pin - 8) * 4)); - } - - if (mode == gpioModeDisabled) { - if (out) { - GPIO_PinOutSet(port, pin); - } else { - GPIO_PinOutClear(port, pin); - } - } -} - -/***************************************************************************//** - * @brief - * Get the mode for a GPIO pin. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] pin - * The pin number in the port. - * - * @return - * The pin mode. - ******************************************************************************/ -GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port, - unsigned int pin) -{ - EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); - - if (pin < 8) { - return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEL >> (pin * 4)) & 0xF); - } else { - return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEH >> ((pin - 8) * 4)) & 0xF); - } -} - -#if defined(_GPIO_EM4WUEN_MASK) -/**************************************************************************//** - * @brief - * Enable GPIO pin wake-up from EM4. When the function exits, - * EM4 mode can be safely entered. - * - * @note - * It is assumed that the GPIO pin modes are set correctly. - * Valid modes are @ref gpioModeInput and @ref gpioModeInputPull. - * - * @param[in] pinmask - * Bitmask containing the bitwise logic OR of which GPIO pin(s) to enable. - * Refer to Reference Manuals for pinmask to GPIO port/pin mapping. - * @param[in] polaritymask - * Bitmask containing the bitwise logic OR of GPIO pin(s) wake-up polarity. - * Refer to Reference Manuals for pinmask to GPIO port/pin mapping. - *****************************************************************************/ -void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask) -{ - EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0); - -#if defined(_GPIO_EM4WUPOL_MASK) - EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0); - GPIO->EM4WUPOL &= ~pinmask; /* Set wakeup polarity */ - GPIO->EM4WUPOL |= pinmask & polaritymask; -#elif defined(_GPIO_EXTILEVEL_MASK) - EFM_ASSERT((polaritymask & ~_GPIO_EXTILEVEL_MASK) == 0); - GPIO->EXTILEVEL &= ~pinmask; - GPIO->EXTILEVEL |= pinmask & polaritymask; -#endif - GPIO->EM4WUEN |= pinmask; /* Enable wakeup */ - - GPIO_EM4SetPinRetention(true); /* Enable pin retention */ - -#if defined(_GPIO_CMD_EM4WUCLR_MASK) - GPIO->CMD = GPIO_CMD_EM4WUCLR; /* Clear wake-up logic */ -#elif defined(_GPIO_IFC_EM4WU_MASK) - GPIO_IntClear(pinmask); -#endif -} -#endif - -/** @} (end addtogroup GPIO) */ -/** @} (end addtogroup emlib) */ - -#endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_i2c.c b/targets/efm32/emlib/em_i2c.c deleted file mode 100644 index 106f0ea..0000000 --- a/targets/efm32/emlib/em_i2c.c +++ /dev/null @@ -1,811 +0,0 @@ -/***************************************************************************//** - * @file em_i2c.c - * @brief Inter-integrated Circuit (I2C) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_i2c.h" -#if defined(I2C_COUNT) && (I2C_COUNT > 0) - -#include "em_cmu.h" -#include "em_bus.h" -#include "em_assert.h" - - #include - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup I2C - * @brief Inter-integrated Circuit (I2C) Peripheral API - * @details - * This module contains functions to control the I2C peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The I2C interface allows communication on I2C - * buses with the lowest energy consumption possible. - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Validation of I2C register block pointer reference for assert statements. */ -#if (I2C_COUNT == 1) -#define I2C_REF_VALID(ref) ((ref) == I2C0) -#elif (I2C_COUNT == 2) -#define I2C_REF_VALID(ref) ((ref == I2C0) || (ref == I2C1)) -#elif (I2C_COUNT == 3) -#define I2C_REF_VALID(ref) ((ref == I2C0) || (ref == I2C1) || (ref == I2C2)) -#endif - -/** Error flags indicating I2C transfer has failed somehow. */ -/* Notice that I2C_IF_TXOF (transmit overflow) is not really possible with */ -/* this SW supporting master mode. Likewise for I2C_IF_RXUF (receive underflow) */ -/* RXUF is only likely to occur with this SW if using a debugger peeking into */ -/* RXDATA register. Thus, we ignore those types of fault. */ -#define I2C_IF_ERRORS (I2C_IF_BUSERR | I2C_IF_ARBLOST) - -/* Max I2C transmission rate constant */ -#if defined(_SILICON_LABS_32B_SERIES_0) -#define I2C_CR_MAX 4 -#elif defined(_SILICON_LABS_32B_SERIES_1) -#define I2C_CR_MAX 8 -#else -#warning "Max I2C transmission rate constant is not defined" -#endif - -/** @endcond */ - -/******************************************************************************* - ******************************** ENUMS ************************************ - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Master mode transfer states. */ -typedef enum { - i2cStateStartAddrSend, /**< Send start + (first part of) address. */ - i2cStateAddrWFAckNack, /**< Wait for ACK/NACK on (first part of) address. */ - i2cStateAddrWF2ndAckNack, /**< Wait for ACK/NACK on second part of 10 bit address. */ - i2cStateRStartAddrSend, /**< Send repeated start + (first part of) address. */ - i2cStateRAddrWFAckNack, /**< Wait for ACK/NACK on address sent after repeated start. */ - i2cStateDataSend, /**< Send data. */ - i2cStateDataWFAckNack, /**< Wait for ACK/NACK on data sent. */ - i2cStateWFData, /**< Wait for data. */ - i2cStateWFStopSent, /**< Wait for STOP to have been transmitted. */ - i2cStateDone /**< Transfer completed successfully. */ -} I2C_TransferState_TypeDef; - -/** @endcond */ - -/******************************************************************************* - ******************************* STRUCTS *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Structure used to store state information on an ongoing master mode transfer. */ -typedef struct { - /** Current state. */ - I2C_TransferState_TypeDef state; - - /** Result return code. */ - I2C_TransferReturn_TypeDef result; - - /** Offset in current sequence buffer. */ - uint16_t offset; - - /* Index to current sequence buffer in use. */ - uint8_t bufIndx; - - /** Reference to I2C transfer sequence definition provided by user. */ - I2C_TransferSeq_TypeDef *seq; -} I2C_Transfer_TypeDef; - -/** @endcond */ - -/******************************************************************************* - ***************************** LOCAL DATA *******^************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** - * Lookup table for Nlow + Nhigh setting defined by CLHR. Set undefined - * index (0x3) to reflect default setting just in case. - */ -static const uint8_t i2cNSum[] = { 4 + 4, 6 + 3, 11 + 6, 4 + 4 }; - -/** Transfer state info for ongoing master mode transfer */ -static I2C_Transfer_TypeDef i2cTransfer[I2C_COUNT]; - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Get current configured I2C bus frequency. - * - * @details - * This frequency is only of relevance when acting as master. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - * - * @return - * Current I2C frequency in Hz. - ******************************************************************************/ -uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c) -{ - uint32_t freqHfper; - uint32_t n; - - /* Max frequency is given by freqScl = freqHfper/((Nlow + Nhigh)(DIV + 1) + I2C_CR_MAX) - * More details can be found in the reference manual, - * I2C Clock Generation chapter. */ - freqHfper = CMU_ClockFreqGet(cmuClock_HFPER); - /* n = Nlow + Nhigh */ - n = (uint32_t)(i2cNSum[(i2c->CTRL & _I2C_CTRL_CLHR_MASK) >> _I2C_CTRL_CLHR_SHIFT]); - - return (freqHfper / ((n * (i2c->CLKDIV + 1)) + I2C_CR_MAX)); -} - -/***************************************************************************//** - * @brief - * Set I2C bus frequency. - * - * @details - * The bus frequency is only of relevance when acting as a master. The bus - * frequency should not be set higher than the max frequency accepted by the - * slowest device on the bus. - * - * Notice that due to asymmetric requirements on low and high I2C clock - * cycles by the I2C specification, the actual max frequency allowed in order - * to comply with the specification may be somewhat lower than expected. - * - * Please refer to the reference manual, details on I2C clock generation, - * for max allowed theoretical frequencies for different modes. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - * - * @param[in] freqRef - * I2C reference clock frequency in Hz that will be used. If set to 0, - * then HFPER clock is used. Setting it to a higher than actual configured - * value only has the consequence of reducing the real I2C frequency. - * - * @param[in] freqScl - * Bus frequency to set (actual bus speed may be lower due to integer - * prescaling). Safe (according to I2C specification) max frequencies for - * standard, fast and fast+ modes are available using I2C_FREQ_ defines. - * (Using I2C_FREQ_ defines requires corresponding setting of @p type.) - * Slowest slave device on bus must always be considered. - * - * @param[in] i2cMode - * Clock low to high ratio type to use. If not using i2cClockHLRStandard, - * make sure all devices on the bus support the specified mode. Using a - * non-standard ratio is useful to achieve higher bus clock in fast and - * fast+ modes. - ******************************************************************************/ -void I2C_BusFreqSet(I2C_TypeDef *i2c, - uint32_t freqRef, - uint32_t freqScl, - I2C_ClockHLR_TypeDef i2cMode) -{ - uint32_t n, minFreq; - int32_t div; - - /* Avoid divide by 0 */ - EFM_ASSERT(freqScl); - if (!freqScl) { - return; - } - - /* Set the CLHR (clock low to high ratio). */ - i2c->CTRL &= ~_I2C_CTRL_CLHR_MASK; - BUS_RegMaskedWrite(&i2c->CTRL, - _I2C_CTRL_CLHR_MASK, - i2cMode << _I2C_CTRL_CLHR_SHIFT); - - if (!freqRef) { - freqRef = CMU_ClockFreqGet(cmuClock_HFPER); - } - - /* Check minumum HF peripheral clock */ - minFreq = UINT_MAX; - if (i2c->CTRL & I2C_CTRL_SLAVE) { - switch (i2cMode) { - case i2cClockHLRStandard: -#if defined(_SILICON_LABS_32B_SERIES_0) - minFreq = 4200000; break; -#elif defined(_SILICON_LABS_32B_SERIES_1) - minFreq = 2000000; break; -#endif - case i2cClockHLRAsymetric: -#if defined(_SILICON_LABS_32B_SERIES_0) - minFreq = 11000000; break; -#elif defined(_SILICON_LABS_32B_SERIES_1) - minFreq = 5000000; break; -#endif - case i2cClockHLRFast: -#if defined(_SILICON_LABS_32B_SERIES_0) - minFreq = 24400000; break; -#elif defined(_SILICON_LABS_32B_SERIES_1) - minFreq = 14000000; break; -#endif - } - } else { - /* For master mode, platform 1 and 2 share the same - min frequencies */ - switch (i2cMode) { - case i2cClockHLRStandard: - minFreq = 2000000; break; - case i2cClockHLRAsymetric: - minFreq = 9000000; break; - case i2cClockHLRFast: - minFreq = 20000000; break; - } - } - - /* Frequency most be larger-than */ - EFM_ASSERT(freqRef > minFreq); - - /* SCL frequency is given by - * freqScl = freqRef/((Nlow + Nhigh) * (DIV + 1) + I2C_CR_MAX) - * - * Thus - * DIV = ((freqRef - (I2C_CR_MAX * freqScl))/((Nlow + Nhigh) * freqScl)) - 1 - * - * More details can be found in the reference manual, - * I2C Clock Generation chapter. */ - - /* n = Nlow + Nhigh */ - n = (uint32_t)(i2cNSum[i2cMode]); - div = ((freqRef - (I2C_CR_MAX * freqScl)) / (n * freqScl)) - 1; - EFM_ASSERT(div >= 0); - EFM_ASSERT((uint32_t)div <= _I2C_CLKDIV_DIV_MASK); - - /* Clock divisor must be at least 1 in slave mode according to reference */ - /* manual (in which case there is normally no need to set bus frequency). */ - if ((i2c->CTRL & I2C_CTRL_SLAVE) && !div) { - div = 1; - } - i2c->CLKDIV = (uint32_t)div; -} - -/***************************************************************************//** - * @brief - * Enable/disable I2C. - * - * @note - * After enabling the I2C (from being disabled), the I2C is in BUSY state. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - * - * @param[in] enable - * true to enable counting, false to disable. - ******************************************************************************/ -void I2C_Enable(I2C_TypeDef *i2c, bool enable) -{ - EFM_ASSERT(I2C_REF_VALID(i2c)); - - BUS_RegBitWrite(&(i2c->CTRL), _I2C_CTRL_EN_SHIFT, enable); -} - -/***************************************************************************//** - * @brief - * Initialize I2C. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - * - * @param[in] init - * Pointer to I2C initialization structure. - ******************************************************************************/ -void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init) -{ - EFM_ASSERT(I2C_REF_VALID(i2c)); - - i2c->IEN = 0; - i2c->IFC = _I2C_IFC_MASK; - - /* Set SLAVE select mode */ - BUS_RegBitWrite(&(i2c->CTRL), _I2C_CTRL_SLAVE_SHIFT, init->master ? 0 : 1); - - I2C_BusFreqSet(i2c, init->refFreq, init->freq, init->clhr); - - BUS_RegBitWrite(&(i2c->CTRL), _I2C_CTRL_EN_SHIFT, init->enable); -} - -/***************************************************************************//** - * @brief - * Reset I2C to same state as after a HW reset. - * - * @note - * The ROUTE register is NOT reset by this function, in order to allow for - * centralized setup of this feature. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - ******************************************************************************/ -void I2C_Reset(I2C_TypeDef *i2c) -{ - i2c->CTRL = _I2C_CTRL_RESETVALUE; - i2c->CLKDIV = _I2C_CLKDIV_RESETVALUE; - i2c->SADDR = _I2C_SADDR_RESETVALUE; - i2c->SADDRMASK = _I2C_SADDRMASK_RESETVALUE; - i2c->IEN = _I2C_IEN_RESETVALUE; - i2c->IFC = _I2C_IFC_MASK; - /* Do not reset route register, setting should be done independently */ -} - -/***************************************************************************//** - * @brief - * Continue an initiated I2C transfer (single master mode only). - * - * @details - * This function is used repeatedly after a I2C_TransferInit() in order to - * complete a transfer. It may be used in polled mode as the below example - * shows: - * @verbatim - * I2C_TransferReturn_TypeDef ret; - * - * // Do a polled transfer - * ret = I2C_TransferInit(I2C0, seq); - * while (ret == i2cTransferInProgress) - * { - * ret = I2C_Transfer(I2C0); - * } - * @endverbatim - * It may also be used in interrupt driven mode, where this function is invoked - * from the interrupt handler. Notice that if used in interrupt mode, NVIC - * interrupts must be configured and enabled for the I2C bus used. I2C - * peripheral specific interrupts are managed by this SW. - * - * @note - * Only single master mode is supported. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - * - * @return - * Returns status for ongoing transfer. - * @li #i2cTransferInProgress - indicates that transfer not finished. - * @li #i2cTransferDone - transfer completed successfully. - * @li otherwise some sort of error has occurred. - * - ******************************************************************************/ -I2C_TransferReturn_TypeDef I2C_Transfer(I2C_TypeDef *i2c) -{ - uint32_t tmp; - uint32_t pending; - I2C_Transfer_TypeDef *transfer; - I2C_TransferSeq_TypeDef *seq; - - EFM_ASSERT(I2C_REF_VALID(i2c)); - - /* Support up to 2 I2C buses */ - if (i2c == I2C0) { - transfer = i2cTransfer; - } -#if (I2C_COUNT > 1) - else if (i2c == I2C1) { - transfer = i2cTransfer + 1; - } -#endif -#if (I2C_COUNT > 2) - else if (i2c == I2C2) { - transfer = i2cTransfer + 2; - } -#endif - else { - return i2cTransferUsageFault; - } - - seq = transfer->seq; - for (;; ) { - pending = i2c->IF; - - /* If some sort of fault, abort transfer. */ - if (pending & I2C_IF_ERRORS) { - if (pending & I2C_IF_ARBLOST) { - /* If arbitration fault, it indicates either a slave device */ - /* not responding as expected, or other master which is not */ - /* supported by this SW. */ - transfer->result = i2cTransferArbLost; - } else if (pending & I2C_IF_BUSERR) { - /* A bus error indicates a misplaced start or stop, which should */ - /* not occur in master mode controlled by this SW. */ - transfer->result = i2cTransferBusErr; - } - - /* If error situation occurred, it is difficult to know */ - /* exact cause and how to resolve. It will be up to a wrapper */ - /* to determine how to handle a fault/recovery if possible. */ - transfer->state = i2cStateDone; - goto done; - } - - switch (transfer->state) { - /***************************************************/ - /* Send first start+address (first byte if 10 bit) */ - /***************************************************/ - case i2cStateStartAddrSend: - if (seq->flags & I2C_FLAG_10BIT_ADDR) { - tmp = (((uint32_t)(seq->addr) >> 8) & 0x06) | 0xf0; - - /* In 10 bit address mode, the address following the first */ - /* start always indicate write. */ - } else { - tmp = (uint32_t)(seq->addr) & 0xfe; - - if (seq->flags & I2C_FLAG_READ) { - /* Indicate read request */ - tmp |= 1; - } - } - - transfer->state = i2cStateAddrWFAckNack; - i2c->TXDATA = tmp;/* Data not transmitted until START sent */ - i2c->CMD = I2C_CMD_START; - goto done; - - /*******************************************************/ - /* Wait for ACK/NACK on address (first byte if 10 bit) */ - /*******************************************************/ - case i2cStateAddrWFAckNack: - if (pending & I2C_IF_NACK) { - i2c->IFC = I2C_IFC_NACK; - transfer->result = i2cTransferNack; - transfer->state = i2cStateWFStopSent; - i2c->CMD = I2C_CMD_STOP; - } else if (pending & I2C_IF_ACK) { - i2c->IFC = I2C_IFC_ACK; - - /* If 10 bit address, send 2nd byte of address. */ - if (seq->flags & I2C_FLAG_10BIT_ADDR) { - transfer->state = i2cStateAddrWF2ndAckNack; - i2c->TXDATA = (uint32_t)(seq->addr) & 0xff; - } else { - /* Determine whether receiving or sending data */ - if (seq->flags & I2C_FLAG_READ) { - transfer->state = i2cStateWFData; - if (seq->buf[transfer->bufIndx].len == 1) { - i2c->CMD = I2C_CMD_NACK; - } - } else { - transfer->state = i2cStateDataSend; - continue; - } - } - } - goto done; - - /******************************************************/ - /* Wait for ACK/NACK on second byte of 10 bit address */ - /******************************************************/ - case i2cStateAddrWF2ndAckNack: - if (pending & I2C_IF_NACK) { - i2c->IFC = I2C_IFC_NACK; - transfer->result = i2cTransferNack; - transfer->state = i2cStateWFStopSent; - i2c->CMD = I2C_CMD_STOP; - } else if (pending & I2C_IF_ACK) { - i2c->IFC = I2C_IFC_ACK; - - /* If using plain read sequence with 10 bit address, switch to send */ - /* repeated start. */ - if (seq->flags & I2C_FLAG_READ) { - transfer->state = i2cStateRStartAddrSend; - } - /* Otherwise expected to write 0 or more bytes */ - else { - transfer->state = i2cStateDataSend; - } - continue; - } - goto done; - - /*******************************/ - /* Send repeated start+address */ - /*******************************/ - case i2cStateRStartAddrSend: - if (seq->flags & I2C_FLAG_10BIT_ADDR) { - tmp = ((seq->addr >> 8) & 0x06) | 0xf0; - } else { - tmp = seq->addr & 0xfe; - } - - /* If this is a write+read combined sequence, then read is about to start */ - if (seq->flags & I2C_FLAG_WRITE_READ) { - /* Indicate read request */ - tmp |= 1; - } - - transfer->state = i2cStateRAddrWFAckNack; - /* We have to write START cmd first since repeated start, otherwise */ - /* data would be sent first. */ - i2c->CMD = I2C_CMD_START; - i2c->TXDATA = tmp; - goto done; - - /**********************************************************************/ - /* Wait for ACK/NACK on repeated start+address (first byte if 10 bit) */ - /**********************************************************************/ - case i2cStateRAddrWFAckNack: - if (pending & I2C_IF_NACK) { - i2c->IFC = I2C_IFC_NACK; - transfer->result = i2cTransferNack; - transfer->state = i2cStateWFStopSent; - i2c->CMD = I2C_CMD_STOP; - } else if (pending & I2C_IF_ACK) { - i2c->IFC = I2C_IFC_ACK; - - /* Determine whether receiving or sending data */ - if (seq->flags & I2C_FLAG_WRITE_READ) { - transfer->state = i2cStateWFData; - } else { - transfer->state = i2cStateDataSend; - continue; - } - } - goto done; - - /*****************************/ - /* Send a data byte to slave */ - /*****************************/ - case i2cStateDataSend: - /* Reached end of data buffer? */ - if (transfer->offset >= seq->buf[transfer->bufIndx].len) { - /* Move to next message part */ - transfer->offset = 0; - transfer->bufIndx++; - - /* Send repeated start when switching to read mode on 2nd buffer */ - if (seq->flags & I2C_FLAG_WRITE_READ) { - transfer->state = i2cStateRStartAddrSend; - continue; - } - - /* Only writing from one buffer, or finished both buffers */ - if ((seq->flags & I2C_FLAG_WRITE) || (transfer->bufIndx > 1)) { - transfer->state = i2cStateWFStopSent; - i2c->CMD = I2C_CMD_STOP; - goto done; - } - - /* Reprocess in case next buffer is empty */ - continue; - } - - /* Send byte */ - i2c->TXDATA = (uint32_t)(seq->buf[transfer->bufIndx].data[transfer->offset++]); - transfer->state = i2cStateDataWFAckNack; - goto done; - - /*********************************************************/ - /* Wait for ACK/NACK from slave after sending data to it */ - /*********************************************************/ - case i2cStateDataWFAckNack: - if (pending & I2C_IF_NACK) { - i2c->IFC = I2C_IFC_NACK; - transfer->result = i2cTransferNack; - transfer->state = i2cStateWFStopSent; - i2c->CMD = I2C_CMD_STOP; - } else if (pending & I2C_IF_ACK) { - i2c->IFC = I2C_IFC_ACK; - transfer->state = i2cStateDataSend; - continue; - } - goto done; - - /****************************/ - /* Wait for data from slave */ - /****************************/ - case i2cStateWFData: - if (pending & I2C_IF_RXDATAV) { - uint8_t data; - unsigned int rxLen = seq->buf[transfer->bufIndx].len; - - /* Must read out data in order to not block further progress */ - data = (uint8_t)(i2c->RXDATA); - - /* Make sure not storing beyond end of buffer just in case */ - if (transfer->offset < rxLen) { - seq->buf[transfer->bufIndx].data[transfer->offset++] = data; - } - - /* If we have read all requested data, then the sequence should end */ - if (transfer->offset >= rxLen) { - /* If there is only one byte to receive we need to transmit the - NACK now, before the stop. */ - if (1 == rxLen) { - i2c->CMD = I2C_CMD_NACK; - } - - transfer->state = i2cStateWFStopSent; - i2c->CMD = I2C_CMD_STOP; - } else { - /* Send ACK and wait for next byte */ - i2c->CMD = I2C_CMD_ACK; - - if ( (1 < rxLen) && (transfer->offset == (rxLen - 1)) ) { - /* If there is more than one byte to receive and this is the next - to last byte we need to transmit the NACK now, before receiving - the last byte. */ - i2c->CMD = I2C_CMD_NACK; - } - } - } - goto done; - - /***********************************/ - /* Wait for STOP to have been sent */ - /***********************************/ - case i2cStateWFStopSent: - if (pending & I2C_IF_MSTOP) { - i2c->IFC = I2C_IFC_MSTOP; - transfer->state = i2cStateDone; - } - goto done; - - /******************************/ - /* Unexpected state, SW fault */ - /******************************/ - default: - transfer->result = i2cTransferSwFault; - transfer->state = i2cStateDone; - goto done; - } - } - - done: - - if (transfer->state == i2cStateDone) { - /* Disable interrupt sources when done */ - i2c->IEN = 0; - - /* Update result unless some fault already occurred */ - if (transfer->result == i2cTransferInProgress) { - transfer->result = i2cTransferDone; - } - } - /* Until transfer is done keep returning i2cTransferInProgress */ - else { - return i2cTransferInProgress; - } - - return transfer->result; -} - -/***************************************************************************//** - * @brief - * Prepare and start an I2C transfer (single master mode only). - * - * @details - * This function must be invoked in order to start an I2C transfer - * sequence. In order to actually complete the transfer, I2C_Transfer() must - * be used either in polled mode or by adding a small driver wrapper utilizing - * interrupts. - * - * @note - * Only single master mode is supported. - * - * @param[in] i2c - * Pointer to I2C peripheral register block. - * - * @param[in] seq - * Pointer to sequence structure defining the I2C transfer to take place. The - * referenced structure must exist until the transfer has fully completed. - * - * @return - * Returns status for ongoing transfer: - * @li #i2cTransferInProgress - indicates that transfer not finished. - * @li otherwise some sort of error has occurred. - ******************************************************************************/ -I2C_TransferReturn_TypeDef I2C_TransferInit(I2C_TypeDef *i2c, - I2C_TransferSeq_TypeDef *seq) -{ - I2C_Transfer_TypeDef *transfer; - - EFM_ASSERT(I2C_REF_VALID(i2c)); - EFM_ASSERT(seq); - - /* Support up to 2 I2C buses */ - if (i2c == I2C0) { - transfer = i2cTransfer; - } -#if (I2C_COUNT > 1) - else if (i2c == I2C1) { - transfer = i2cTransfer + 1; - } -#endif -#if (I2C_COUNT > 2) - else if (i2c == I2C2) { - transfer = i2cTransfer + 2; - } -#endif - else { - return i2cTransferUsageFault; - } - - /* Check if in busy state. Since this SW assumes single master, we can */ - /* just issue an abort. The BUSY state is normal after a reset. */ - if (i2c->STATE & I2C_STATE_BUSY) { - i2c->CMD = I2C_CMD_ABORT; - } - - /* Make sure user is not trying to read 0 bytes, it is not */ - /* possible according to I2C spec, since slave will always start */ - /* sending first byte ACK on address. The read operation can */ - /* only be stopped by NACKing a received byte, ie minimum 1 byte. */ - if (((seq->flags & I2C_FLAG_READ) && !(seq->buf[0].len)) - || ((seq->flags & I2C_FLAG_WRITE_READ) && !(seq->buf[1].len)) - ) { - return i2cTransferUsageFault; - } - - /* Prepare for a transfer */ - transfer->state = i2cStateStartAddrSend; - transfer->result = i2cTransferInProgress; - transfer->offset = 0; - transfer->bufIndx = 0; - transfer->seq = seq; - - /* Ensure buffers are empty */ - i2c->CMD = I2C_CMD_CLEARPC | I2C_CMD_CLEARTX; - if (i2c->IF & I2C_IF_RXDATAV) { - (void)i2c->RXDATA; - } - - /* Clear all pending interrupts prior to starting transfer. */ - i2c->IFC = _I2C_IFC_MASK; - - /* Enable those interrupts we are interested in throughout transfer. */ - /* Notice that the I2C interrupt must also be enabled in the NVIC, but */ - /* that is left for an additional driver wrapper. */ - i2c->IEN |= I2C_IF_NACK | I2C_IF_ACK | I2C_IF_MSTOP - | I2C_IF_RXDATAV | I2C_IF_ERRORS; - - /* Start transfer */ - return I2C_Transfer(i2c); -} - -/** @} (end addtogroup I2C) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(I2C_COUNT) && (I2C_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_ldma.c b/targets/efm32/emlib/em_ldma.c deleted file mode 100644 index 57bc322..0000000 --- a/targets/efm32/emlib/em_ldma.c +++ /dev/null @@ -1,355 +0,0 @@ -/***************************************************************************//** - * @file em_ldma.c - * @brief Direct memory access (LDMA) module peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software.@n - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software.@n - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_ldma.h" - -#if defined(LDMA_PRESENT) && (LDMA_COUNT == 1) - -#include -#include "em_assert.h" -#include "em_bus.h" -#include "em_cmu.h" -#include "em_core.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup LDMA - * @{ - ******************************************************************************/ - -#if defined(LDMA_IRQ_HANDLER_TEMPLATE) -/***************************************************************************//** - * @brief - * Template for an LDMA IRQ handler. - ******************************************************************************/ -void LDMA_IRQHandler(void) -{ - uint32_t ch; - /* Get all pending and enabled interrupts. */ - uint32_t pending = LDMA_IntGetEnabled(); - - /* Loop here on an LDMA error to enable debugging. */ - while (pending & LDMA_IF_ERROR) { - } - - /* Iterate over all LDMA channels. */ - for (ch = 0; ch < DMA_CHAN_COUNT; ch++) { - uint32_t mask = 0x1 << ch; - if (pending & mask) { - /* Clear interrupt flag. */ - LDMA->IFC = mask; - - /* Do more stuff here, execute callbacks etc. */ - } - } -} -#endif - -/***************************************************************************//** - * @brief - * De-initialize the LDMA controller. - * - * LDMA interrupts are disabled and the LDMA clock is stopped. - ******************************************************************************/ -void LDMA_DeInit(void) -{ - NVIC_DisableIRQ(LDMA_IRQn); - LDMA->IEN = 0; - LDMA->CHEN = 0; - CMU_ClockEnable(cmuClock_LDMA, false); -} - -/***************************************************************************//** - * @brief - * Enable or disable a LDMA channel request. - * - * @details - * Use this function to enable or disable a LDMA channel request. This will - * prevent the LDMA from proceeding after its current transaction if disabled. - * - * @param[in] channel - * LDMA channel to enable or disable requests on. - * - * @param[in] enable - * If 'true' request will be enabled. If 'false' request will be disabled. - ******************************************************************************/ -void LDMA_EnableChannelRequest(int ch, bool enable) -{ - EFM_ASSERT(ch < DMA_CHAN_COUNT); - - BUS_RegBitWrite(&LDMA->REQDIS, ch, !enable); -} - -/***************************************************************************//** - * @brief - * Initialize the LDMA controller. - * - * @details - * This function will disable all the LDMA channels and enable the LDMA bus - * clock in the CMU. This function will also enable the LDMA IRQ in the NVIC - * and set the LDMA IRQ priority to a user configurable priority. The LDMA - * interrupt priority is configured using the @ref LDMA_Init_t structure. - * - * @note - * Since this function enables the LDMA IRQ you should always add a custom - * LDMA_IRQHandler to the application in order to handle any interrupts - * from LDMA. - * - * @param[in] init - * Pointer to initialization structure used to configure the LDMA. - ******************************************************************************/ -void LDMA_Init(const LDMA_Init_t *init) -{ - EFM_ASSERT(init != NULL); - EFM_ASSERT(!((init->ldmaInitCtrlNumFixed << _LDMA_CTRL_NUMFIXED_SHIFT) - & ~_LDMA_CTRL_NUMFIXED_MASK)); - EFM_ASSERT(!((init->ldmaInitCtrlSyncPrsClrEn << _LDMA_CTRL_SYNCPRSCLREN_SHIFT) - & ~_LDMA_CTRL_SYNCPRSCLREN_MASK)); - EFM_ASSERT(!((init->ldmaInitCtrlSyncPrsSetEn << _LDMA_CTRL_SYNCPRSSETEN_SHIFT) - & ~_LDMA_CTRL_SYNCPRSSETEN_MASK)); - EFM_ASSERT(init->ldmaInitIrqPriority < (1 << __NVIC_PRIO_BITS)); - - CMU_ClockEnable(cmuClock_LDMA, true); - - LDMA->CTRL = (init->ldmaInitCtrlNumFixed << _LDMA_CTRL_NUMFIXED_SHIFT) - | (init->ldmaInitCtrlSyncPrsClrEn << _LDMA_CTRL_SYNCPRSCLREN_SHIFT) - | (init->ldmaInitCtrlSyncPrsSetEn << _LDMA_CTRL_SYNCPRSSETEN_SHIFT); - - LDMA->CHEN = 0; - LDMA->DBGHALT = 0; - LDMA->REQDIS = 0; - - /* Enable LDMA error interrupt. */ - LDMA->IEN = LDMA_IEN_ERROR; - LDMA->IFC = 0xFFFFFFFF; - - NVIC_ClearPendingIRQ(LDMA_IRQn); - - /* Range is 0..7, 0 is highest priority. */ - NVIC_SetPriority(LDMA_IRQn, init->ldmaInitIrqPriority); - - NVIC_EnableIRQ(LDMA_IRQn); -} - -/***************************************************************************//** - * @brief - * Start a DMA transfer. - * - * @param[in] ch - * DMA channel. - * - * @param[in] transfer - * Initialization structure used to configure the transfer. - * - * @param[in] descriptor - * Transfer descriptor, can be an array of descriptors linked together. - ******************************************************************************/ -void LDMA_StartTransfer(int ch, - const LDMA_TransferCfg_t *transfer, - const LDMA_Descriptor_t *descriptor) -{ - uint32_t tmp; - CORE_DECLARE_IRQ_STATE; - uint32_t chMask = 1 << ch; - - EFM_ASSERT(ch < DMA_CHAN_COUNT); - EFM_ASSERT(transfer != NULL); - EFM_ASSERT(!(transfer->ldmaReqSel & ~_LDMA_CH_REQSEL_MASK)); - - EFM_ASSERT(!((transfer->ldmaCtrlSyncPrsClrOff << _LDMA_CTRL_SYNCPRSCLREN_SHIFT) - & ~_LDMA_CTRL_SYNCPRSCLREN_MASK)); - EFM_ASSERT(!((transfer->ldmaCtrlSyncPrsClrOn << _LDMA_CTRL_SYNCPRSCLREN_SHIFT) - & ~_LDMA_CTRL_SYNCPRSCLREN_MASK)); - EFM_ASSERT(!((transfer->ldmaCtrlSyncPrsSetOff << _LDMA_CTRL_SYNCPRSSETEN_SHIFT) - & ~_LDMA_CTRL_SYNCPRSSETEN_MASK)); - EFM_ASSERT(!((transfer->ldmaCtrlSyncPrsSetOn << _LDMA_CTRL_SYNCPRSSETEN_SHIFT) - & ~_LDMA_CTRL_SYNCPRSSETEN_MASK)); - - EFM_ASSERT(!((transfer->ldmaCfgArbSlots << _LDMA_CH_CFG_ARBSLOTS_SHIFT) - & ~_LDMA_CH_CFG_ARBSLOTS_MASK)); - EFM_ASSERT(!((transfer->ldmaCfgSrcIncSign << _LDMA_CH_CFG_SRCINCSIGN_SHIFT) - & ~_LDMA_CH_CFG_SRCINCSIGN_MASK) ); - EFM_ASSERT(!((transfer->ldmaCfgDstIncSign << _LDMA_CH_CFG_DSTINCSIGN_SHIFT) - & ~_LDMA_CH_CFG_DSTINCSIGN_MASK)); - EFM_ASSERT(!((transfer->ldmaLoopCnt << _LDMA_CH_LOOP_LOOPCNT_SHIFT) - & ~_LDMA_CH_LOOP_LOOPCNT_MASK)); - - LDMA->CH[ch].REQSEL = transfer->ldmaReqSel; - LDMA->CH[ch].LOOP = (transfer->ldmaLoopCnt << _LDMA_CH_LOOP_LOOPCNT_SHIFT); - LDMA->CH[ch].CFG = (transfer->ldmaCfgArbSlots << _LDMA_CH_CFG_ARBSLOTS_SHIFT) - | (transfer->ldmaCfgSrcIncSign << _LDMA_CH_CFG_SRCINCSIGN_SHIFT) - | (transfer->ldmaCfgDstIncSign << _LDMA_CH_CFG_DSTINCSIGN_SHIFT); - - /* Set descriptor address. */ - LDMA->CH[ch].LINK = (uint32_t)descriptor & _LDMA_CH_LINK_LINKADDR_MASK; - - /* Clear pending channel interrupt. */ - LDMA->IFC = chMask; - - /* Critical region. */ - CORE_ENTER_ATOMIC(); - - /* Enable channel interrupt. */ - LDMA->IEN |= chMask; - - if (transfer->ldmaReqDis) { - LDMA->REQDIS |= chMask; - } - - if (transfer->ldmaDbgHalt) { - LDMA->DBGHALT |= chMask; - } - - tmp = LDMA->CTRL; - - if (transfer->ldmaCtrlSyncPrsClrOff) { - tmp &= ~_LDMA_CTRL_SYNCPRSCLREN_MASK - | (~transfer->ldmaCtrlSyncPrsClrOff << _LDMA_CTRL_SYNCPRSCLREN_SHIFT); - } - - if (transfer->ldmaCtrlSyncPrsClrOn) { - tmp |= transfer->ldmaCtrlSyncPrsClrOn << _LDMA_CTRL_SYNCPRSCLREN_SHIFT; - } - - if (transfer->ldmaCtrlSyncPrsSetOff) { - tmp &= ~_LDMA_CTRL_SYNCPRSSETEN_MASK - | (~transfer->ldmaCtrlSyncPrsSetOff << _LDMA_CTRL_SYNCPRSSETEN_SHIFT); - } - - if (transfer->ldmaCtrlSyncPrsSetOn) { - tmp |= transfer->ldmaCtrlSyncPrsSetOn << _LDMA_CTRL_SYNCPRSSETEN_SHIFT; - } - - LDMA->CTRL = tmp; - - BUS_RegMaskedClear(&LDMA->CHDONE, chMask); /* Clear the done flag. */ - LDMA->LINKLOAD = chMask; /* Start transfer by loading descriptor. */ - - /* Critical region end. */ - CORE_EXIT_ATOMIC(); -} - -/***************************************************************************//** - * @brief - * Stop a DMA transfer. - * - * @note - * The DMA will complete the current AHB burst transfer before stopping. - * - * @param[in] ch - * DMA channel to stop. - ******************************************************************************/ -void LDMA_StopTransfer(int ch) -{ - uint32_t chMask = 1 << ch; - - EFM_ASSERT(ch < DMA_CHAN_COUNT); - - CORE_ATOMIC_SECTION( - LDMA->IEN &= ~chMask; - BUS_RegMaskedClear(&LDMA->CHEN, chMask); - ) -} - -/***************************************************************************//** - * @brief - * Check if a DMA transfer has completed. - * - * @param[in] ch - * DMA channel to check. - * - * @return - * True if transfer has completed, false if not. - ******************************************************************************/ -bool LDMA_TransferDone(int ch) -{ - bool retVal = false; - uint32_t chMask = 1 << ch; - - EFM_ASSERT(ch < DMA_CHAN_COUNT); - - CORE_ATOMIC_SECTION( - if (((LDMA->CHEN & chMask) == 0) - && ((LDMA->CHDONE & chMask) == chMask)) { - retVal = true; - } - ) - return retVal; -} - -/***************************************************************************//** - * @brief - * Get number of items remaining in a transfer. - * - * @note - * This function is does not take into account that a DMA transfers with - * a chain of linked transfers might be ongoing. It will only check the - * count for the current transfer. - * - * @param[in] ch - * The channel number of the transfer to check. - * - * @return - * Number of items remaining in the transfer. - ******************************************************************************/ -uint32_t LDMA_TransferRemainingCount(int ch) -{ - uint32_t remaining, done, iflag; - uint32_t chMask = 1 << ch; - - EFM_ASSERT(ch < DMA_CHAN_COUNT); - - CORE_ATOMIC_SECTION( - iflag = LDMA->IF; - done = LDMA->CHDONE; - remaining = LDMA->CH[ch].CTRL; - ) - - iflag &= chMask; - done &= chMask; - remaining = (remaining & _LDMA_CH_CTRL_XFERCNT_MASK) - >> _LDMA_CH_CTRL_XFERCNT_SHIFT; - - if (done || ((remaining == 0) && iflag)) { - return 0; - } - - return remaining + 1; -} - -/** @} (end addtogroup LDMA) */ -/** @} (end addtogroup emlib) */ -#endif /* defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 ) */ diff --git a/targets/efm32/emlib/em_msc.c b/targets/efm32/emlib/em_msc.c deleted file mode 100644 index 2391d2a..0000000 --- a/targets/efm32/emlib/em_msc.c +++ /dev/null @@ -1,1163 +0,0 @@ -/***************************************************************************//** - * @file em_msc.c - * @brief Flash controller (MSC) Peripheral API - * @version 5.5.0 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_msc.h" -#if defined(MSC_COUNT) && (MSC_COUNT > 0) - -#include "em_system.h" -#if defined(_MSC_TIMEBASE_MASK) -#include "em_cmu.h" -#endif -#include "em_assert.h" -#if defined(_MSC_ECCCTRL_MASK) -#include "em_cmu.h" -#include "em_core.h" -#endif - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(__ICCARM__) -/* Suppress warnings originating from use of EFM_ASSERT() with IAR: - EFM_ASSERT() is implemented as a local ramfunc */ -#pragma diag_suppress=Ta022 -#endif - -#if defined(EM_MSC_RUN_FROM_FLASH) && defined(_EFM32_GECKO_FAMILY) -#error "Running Flash write/erase operations from Flash is not supported on EFM32G." -#endif - -/******************************************************************************* - ****************************** DEFINES ****************************** - ******************************************************************************/ -#if defined(MSC_WRITECTRL_WDOUBLE) -#define WORDS_PER_DATA_PHASE (FLASH_SIZE < (512 * 1024) ? 1 : 2) -#else -#define WORDS_PER_DATA_PHASE (1) -#endif - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -/* Fix for errata FLASH_E201 - Potential program failure after Power On */ -#define ERRATA_FIX_FLASH_E201_EN -#endif - -#if defined(_MSC_ECCCTRL_MASK) -#if defined(_SILICON_LABS_32B_SERIES_1_CONFIG_1) -/* On Series 1 Config 1, EFM32GG11, ECC is supported for RAM0 and RAM1 - banks (not RAM2). It is necessary to figure out which is biggest to - calculate the number of DMA descriptors needed. */ -#define ECC_RAM_SIZE_MAX (SL_MAX(RAM0_MEM_SIZE, RAM1_MEM_SIZE)) - -#define ECC_RAM0_MEM_BASE (RAM0_MEM_BASE) -#define ECC_RAM0_MEM_SIZE (RAM0_MEM_SIZE) - -#define ECC_RAM1_MEM_BASE (RAM1_MEM_BASE) -#define ECC_RAM1_MEM_SIZE (RAM1_MEM_SIZE) - -#define ECC_CTRL_REG_ADDR (&MSC->ECCCTRL) -#define ECC_RAM0_WRITE_EN (_MSC_ECCCTRL_RAMECCEWEN_SHIFT) -#define ECC_RAM0_CHECK_EN (_MSC_ECCCTRL_RAMECCCHKEN_SHIFT) -#define ECC_RAM1_WRITE_EN (_MSC_ECCCTRL_RAM1ECCEWEN_SHIFT) -#define ECC_RAM1_CHECK_EN (_MSC_ECCCTRL_RAM1ECCCHKEN_SHIFT) - -#define ECC_IFC_REG_ADDR (&MSC->IFC) -#define ECC_IFC_MASK (MSC_IFC_RAMERR1B | MSC_IFC_RAMERR2B \ - | MSC_IFC_RAM1ERR1B | MSC_IFC_RAM1ERR2B) -#else -#error Unknown device. -#endif - -#define ECC_DMA_MAX_XFERCNT (_LDMA_CH_CTRL_XFERCNT_MASK \ - >> _LDMA_CH_CTRL_XFERCNT_SHIFT) -#define ECC_DMA_DESC_SIZE ((ECC_DMA_MAX_XFERCNT + 1) * 4) /* 4 bytes units */ - -#define ECC_DMA_DESCS (ECC_RAM_SIZE_MAX / ECC_DMA_DESC_SIZE) - -#endif - -/******************************************************************************* - ****************************** TYPEDEFS ****************************** - ******************************************************************************/ -typedef enum { - mscWriteIntSafe, - mscWriteFast, -} MSC_WriteStrategy_Typedef; - -#if defined(_MSC_ECCCTRL_MASK) -typedef struct { - volatile uint32_t *ctrlReg; - uint32_t writeEnBit; - uint32_t checkEnBit; - volatile uint32_t *ifClearReg; - uint32_t ifClearMask; - uint32_t base; - uint32_t size; -} MSC_EccBank_Typedef; -#endif - -/******************************************************************************* - ****************************** LOCALS ******************************* - ******************************************************************************/ -#if defined(_MSC_ECCCTRL_MASK) -static const MSC_EccBank_Typedef eccBank[MSC_ECC_BANKS] = -{ - { ECC_CTRL_REG_ADDR, ECC_RAM0_WRITE_EN, ECC_RAM0_CHECK_EN, - ECC_IFC_REG_ADDR, ECC_IFC_MASK, - ECC_RAM0_MEM_BASE, ECC_RAM0_MEM_SIZE }, -#if MSC_ECC_BANKS > 1 - { ECC_CTRL_REG_ADDR, ECC_RAM1_WRITE_EN, ECC_RAM1_CHECK_EN, - ECC_IFC_REG_ADDR, ECC_IFC_MASK, - ECC_RAM1_MEM_BASE, ECC_RAM1_MEM_SIZE }, -#endif -}; -#endif - -/******************************************************************************* - ****************************** FUNCTIONS ****************************** - ******************************************************************************/ -MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef -MSC_WriteWordI(uint32_t *address, - void const *data, - uint32_t numBytes, - MSC_WriteStrategy_Typedef writeStrategy); - -MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef -MSC_LoadWriteData(uint32_t* data, - uint32_t numWords, - MSC_WriteStrategy_Typedef writeStrategy); - -MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef -MSC_LoadVerifyAddress(uint32_t* address); - -#if !defined(EM_MSC_RUN_FROM_FLASH) - -MSC_RAMFUNC_DECLARATOR void mscRfAssertEFM(const char *file, int line); - -/***************************************************************************//** - * @brief - * Local ramfunc assertEFM. - * - * A local ramfunc version of assertEFM is needed because certain MSC functions - * are allocated to RAM. The Flash may get erased and code normally located in - * Flash must therefore have a RAM copy. - * - * This function is invoked through EFM_ASSERT() macro usage only and should - * not be used explicitly. - * - * @param[in] file - * The source file where assertion failed. - * - * @param[in] line - * A line number in the source file where assertion failed. - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -void mscRfAssertEFM(const char *file, int line) -{ - (void)file; /* Unused parameter */ - (void)line; /* Unused parameter */ - - while (true) { - } -} -MSC_RAMFUNC_DEFINITION_END - -/* Undef the define from em_assert.h and redirect to a local ramfunc version. */ -#undef EFM_ASSERT -#if defined(DEBUG_EFM) || defined(DEBUG_EFM_USER) -#define EFM_ASSERT(expr) ((expr) ? ((void)0) : mscRfAssertEFM(__FILE__, __LINE__)) -#else -#define EFM_ASSERT(expr) ((void)(expr)) -#endif /* defined(DEBUG_EFM) || defined(DEBUG_EFM_USER) */ - -#endif /* !EM_MSC_RUN_FROM_FLASH */ - -/** @endcond */ - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup MSC - * @{ - ******************************************************************************/ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Enables the flash controller for writing. - * @note - * This function must be called before flash operations when - * AUXHFRCO clock has been changed from a default band. - ******************************************************************************/ -void MSC_Init(void) -{ -#if defined(_MSC_TIMEBASE_MASK) - uint32_t freq, cycles; -#endif - -#if defined(_EMU_STATUS_VSCALE_MASK) - /* VSCALE must be done. Flash erase and write requires VSCALE2. */ - EFM_ASSERT(!(EMU->STATUS & _EMU_STATUS_VSCALEBUSY_MASK)); - EFM_ASSERT((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) == EMU_STATUS_VSCALE_VSCALE2); -#endif - - /* Unlock the MSC module. */ - MSC->LOCK = MSC_UNLOCK_CODE; - /* Disable writing to the Flash. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - -#if defined(_MSC_TIMEBASE_MASK) - /* Configure MSC->TIMEBASE according to a selected frequency. */ - freq = CMU_ClockFreqGet(cmuClock_AUX); - - /* Timebase 5us is used for the 1/1.2 MHz band only. Note that the 1 MHz band - is tuned to 1.2 MHz on newer revisions. */ - if (freq > 1200000) { - /* Calculate a number of clock cycles for 1 us as a base period. */ - freq = (freq * 11) / 10; - cycles = (freq / 1000000) + 1; - - /* Configure clock cycles for flash timing. */ - MSC->TIMEBASE = (MSC->TIMEBASE & ~(_MSC_TIMEBASE_BASE_MASK - | _MSC_TIMEBASE_PERIOD_MASK)) - | MSC_TIMEBASE_PERIOD_1US - | (cycles << _MSC_TIMEBASE_BASE_SHIFT); - } else { - /* Calculate a number of clock cycles for 5 us as a base period. */ - freq = (freq * 5 * 11) / 10; - cycles = (freq / 1000000) + 1; - - /* Configure clock cycles for flash timing */ - MSC->TIMEBASE = (MSC->TIMEBASE & ~(_MSC_TIMEBASE_BASE_MASK - | _MSC_TIMEBASE_PERIOD_MASK)) - | MSC_TIMEBASE_PERIOD_5US - | (cycles << _MSC_TIMEBASE_BASE_SHIFT); - } -#endif -} - -/***************************************************************************//** - * @brief - * Disables the flash controller for writing. - ******************************************************************************/ -void MSC_Deinit(void) -{ - /* Disable writing to the Flash. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - /* Lock the MSC module.*/ - MSC->LOCK = 0; -} - -/***************************************************************************//** - * @brief - * Set the MSC code execution configuration. - * - * @param[in] execConfig - * The code execution configuration. - ******************************************************************************/ -void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig) -{ - uint32_t mscReadCtrl; - -#if defined(MSC_READCTRL_MODE_WS0SCBTP) - mscReadCtrl = MSC->READCTRL & _MSC_READCTRL_MODE_MASK; - if ((mscReadCtrl == MSC_READCTRL_MODE_WS0) && (execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS0SCBTP; - } else if ((mscReadCtrl == MSC_READCTRL_MODE_WS1) && (execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS1SCBTP; - } else if ((mscReadCtrl == MSC_READCTRL_MODE_WS0SCBTP) && (!execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS0; - } else if ((mscReadCtrl == MSC_READCTRL_MODE_WS1SCBTP) && (!execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS1; - } else { - /* No change needed. */ - } -#endif - - mscReadCtrl = MSC->READCTRL & ~(0 -#if defined(MSC_READCTRL_SCBTP) - | MSC_READCTRL_SCBTP -#endif -#if defined(MSC_READCTRL_USEHPROT) - | MSC_READCTRL_USEHPROT -#endif -#if defined(MSC_READCTRL_PREFETCH) - | MSC_READCTRL_PREFETCH -#endif -#if defined(MSC_READCTRL_ICCDIS) - | MSC_READCTRL_ICCDIS -#endif -#if defined(MSC_READCTRL_AIDIS) - | MSC_READCTRL_AIDIS -#endif -#if defined(MSC_READCTRL_IFCDIS) - | MSC_READCTRL_IFCDIS -#endif - ); - mscReadCtrl |= (0 -#if defined(MSC_READCTRL_SCBTP) - | (execConfig->scbtEn ? MSC_READCTRL_SCBTP : 0) -#endif -#if defined(MSC_READCTRL_USEHPROT) - | (execConfig->useHprot ? MSC_READCTRL_USEHPROT : 0) -#endif -#if defined(MSC_READCTRL_PREFETCH) - | (execConfig->prefetchEn ? MSC_READCTRL_PREFETCH : 0) -#endif -#if defined(MSC_READCTRL_ICCDIS) - | (execConfig->iccDis ? MSC_READCTRL_ICCDIS : 0) -#endif -#if defined(MSC_READCTRL_AIDIS) - | (execConfig->aiDis ? MSC_READCTRL_AIDIS : 0) -#endif -#if defined(MSC_READCTRL_IFCDIS) - | (execConfig->ifcDis ? MSC_READCTRL_IFCDIS : 0) -#endif - ); - - MSC->READCTRL = mscReadCtrl; -} - -#if defined(_MSC_ECCCTRL_MASK) - -/***************************************************************************//** - * @brief - * DMA read and write existing values (for ECC initialization). - * - * @details - * This function uses DMA to read and write the existing data values in - * the RAM region specified by start and size. The function will use the - * 2 DMA channels specified by the channels[2] array. - * - * @param[in] start - * A start address of the address range in RAM to read/write. - * - * @param[in] size - * A size of the address range in RAM to read/write. - * - * @param[in] channels[2] - * An array of 2 DMA channels to use. - ******************************************************************************/ -static void mscEccReadWriteExistingDma(uint32_t start, - uint32_t size, - uint32_t channels[2]) -{ - uint32_t descCnt = 0; - uint32_t dmaDesc[ECC_DMA_DESCS][4]; - uint32_t chMask = (1 << channels[0]) | (1 << channels[1]); - /* Assert that the 2 DMA channel numbers are different. */ - EFM_ASSERT(channels[0] != channels[1]); - - /* Make sure that the ECC_RAM_SIZE_MAX is a multiple of ECC_DMA_DESC_SIZE - to match the total xfer size of the descriptor chain with the largest - ECC RAM bank. */ - EFM_ASSERT((ECC_RAM_SIZE_MAX % ECC_DMA_DESC_SIZE) == 0); - - /* Initialize the LDMA descriptor chain. */ - do { - dmaDesc[descCnt][0] = /* DMA desc CTRL word */ - LDMA_CH_CTRL_STRUCTTYPE_TRANSFER - | LDMA_CH_CTRL_STRUCTREQ - | _LDMA_CH_CTRL_XFERCNT_MASK - | LDMA_CH_CTRL_BLOCKSIZE_ALL - | LDMA_CH_CTRL_REQMODE_ALL - | LDMA_CH_CTRL_SRCINC_ONE - | LDMA_CH_CTRL_SIZE_WORD - | LDMA_CH_CTRL_DSTINC_ONE; - - /* A source and destination address. */ - dmaDesc[descCnt][1] = start; - dmaDesc[descCnt][2] = start; - /* A link to the next descriptor. */ - dmaDesc[descCnt][3] = LDMA_CH_LINK_LINK - | (((uint32_t) &dmaDesc[descCnt + 1][0]) - & _LDMA_CH_LINK_LINKADDR_MASK); - - start += ECC_DMA_DESC_SIZE; - size -= ECC_DMA_DESC_SIZE; - descCnt++; - } while (size); - - /* Divide the descriptor list in two parts, one for each channel, - by setting the link bit and address 0 of the descriptor in the middle - to 0. */ - dmaDesc[(descCnt / 2) - 1][3] = 0; - - /* Set the last descriptor link bit and address to 0. */ - dmaDesc[descCnt - 1][3] = 0; - - /* Start the LDMA clock. */ - CMU_ClockEnable(cmuClock_LDMA, true); - - /* Round robin scheduling for all channels (0 = no fixed priority channels). - */ - LDMA->CTRL = 0 << _LDMA_CTRL_NUMFIXED_SHIFT; - LDMA->CHEN = 0; - LDMA->DBGHALT = 0; - LDMA->REQDIS = 0; - - /* Disable LDMA interrupts and clear interrupt status. */ - LDMA->IEN = 0; - LDMA->IFC = 0xFFFFFFFF; - - /* Disable looping. */ - LDMA->CH[channels[0]].LOOP = 0; - LDMA->CH[channels[1]].LOOP = 0; - - /* Set the descriptor address for the first channel. */ - LDMA->CH[channels[0]].LINK = ((uint32_t)&dmaDesc[0][0]) - & _LDMA_CH_LINK_LINKADDR_MASK; - /* Set the descriptor address for the second channel. */ - LDMA->CH[channels[1]].LINK = ((uint32_t)&dmaDesc[descCnt / 2][0]) - & _LDMA_CH_LINK_LINKADDR_MASK; - /* Clear the channel done flags. */ - BUS_RegMaskedClear(&LDMA->CHDONE, chMask); - - /* Start transfer by loading descriptors. */ - LDMA->LINKLOAD = chMask; - - /* Wait until finished. */ - while (!(((LDMA->CHEN & chMask) == 0) - && ((LDMA->CHDONE & chMask) == chMask))) { - } - - /* Stop the LDMA clock. */ - CMU_ClockEnable(cmuClock_LDMA, false); -} - -/***************************************************************************//** - * @brief - * Initialize ECC for a given memory bank. - * - * @brief - * This function initializes ECC for a given memory bank which is specified - * with the MSC_EccBank_Typedef structure input parameter. - * - * @param[in] eccBank - * The ECC memory bank device structure. - * - * @param[in] dmaChannels - * An array of 2 DMA channels that may be used during ECC initialization. - * - ******************************************************************************/ -static void mscEccBankInit(const MSC_EccBank_Typedef *eccBank, - uint32_t dmaChannels[2]) -{ - uint32_t ctrlReg; - - CORE_DECLARE_IRQ_STATE; - - CORE_ENTER_CRITICAL(); - - /* Enable the ECC write. Keep ECC checking disabled during initialization. */ - ctrlReg = *eccBank->ctrlReg; - ctrlReg |= 1 << eccBank->writeEnBit; - *eccBank->ctrlReg = ctrlReg; - - /* Initialize ECC syndromes by using DMA to read and write the existing - data values in RAM. */ - mscEccReadWriteExistingDma(eccBank->base, eccBank->size, dmaChannels); - - /* Clear any ECC errors that may have been reported before or during - initialization. */ - *eccBank->ifClearReg = eccBank->ifClearMask; - - /* Enable the ECC decoder to detect and report ECC errors. */ - ctrlReg |= 1 << eccBank->checkEnBit; - *eccBank->ctrlReg = ctrlReg; - - CORE_EXIT_CRITICAL(); -} - -/***************************************************************************//** - * @brief - * Disable ECC for a given memory bank. - * - * @brief - * This function disables ECC for a given memory bank which is specified - * with the MSC_EccBank_Typedef structure input parameter. - * - * @param[in] eccBank - * ECC memory bank device structure. - * - ******************************************************************************/ -static void mscEccBankDisable(const MSC_EccBank_Typedef *eccBank) -{ - /* Disable ECC write (encoder) and checking (decoder). */ - *eccBank->ctrlReg &= ~((1 << eccBank->writeEnBit) | (1 << eccBank->checkEnBit)); -} - -/***************************************************************************//** - * @brief - * Configure Error Correcting Code (ECC) - * - * @details - * This function configures ECC support according to the configuration - * input parameter. If the user requests enabling ECC for a given RAM bank, - * this function will initialize ECC memory (syndromes) for the bank by - * reading and writing the existing values in memory, i.e., all data is - * preserved. The initialization process runs in a critical section - * disallowing interrupts and thread scheduling and will consume a - * considerable amount of clock cycles. Therefore, carefully - * assess where to call this function. Consider increasing - * the clock frequency to reduce the execution time. - * This function makes use of 2 DMA channels to move data to/from RAM in an - * efficient way. The user can select which 2 DMA channels to use - * to avoid conflicts with the application. However, make sure - * that no other DMA operations take place while this function is executing. - * If the application is using the DMA controller prior to calling this - * function, the application will need to reinitialize DMA registers after - * this function has completed. - * - * @note - * This function protects the ECC initialization procedure from interrupts - * and other threads by using a critical section (defined by em_core.h) - * When running on an RTOS, the user may need to override CORE_EnterCritical - * CORE_ExitCritical which are declared as 'SL_WEAK' in em_core.c. - * - * @param[in] eccConfig - * ECC configuration - ******************************************************************************/ -void MSC_EccConfigSet(MSC_EccConfig_TypeDef *eccConfig) -{ - unsigned int cnt; - -#if defined(_SILICON_LABS_32B_SERIES_1_CONFIG_1) - /* On Series 1 Config 1, EFM32GG11, disable the ECC fault enable. */ - MSC->CTRL &= ~MSC_CTRL_RAMECCERRFAULTEN; -#endif - - /* Loop through the ECC banks array and enable or disable according to - the eccConfig->enableEccBank array. */ - for (cnt = 0; cnt < MSC_ECC_BANKS; cnt++) { - if (eccConfig->enableEccBank[cnt]) { - mscEccBankInit(&eccBank[cnt], eccConfig->dmaChannels); - } else { - mscEccBankDisable(&eccBank[cnt]); - } - } -} - -#endif /* #if defined(_MSC_ECCCTRL_MASK) */ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/***************************************************************************//** - * @brief - * Perform the address phase of the flash write cycle. - * @details - * This function performs the address phase of a flash write operation by - * writing the given flash address to the ADDRB register and issuing the - * LADDRIM command to load the address. - * @param[in] address - * An address in flash memory. Must be aligned at a 4 byte boundary. - * @return - * Returns the status of the address load operation, #MSC_Status_TypeDef - * @verbatim - * mscReturnOk - The operation completed successfully. - * mscReturnInvalidAddr - The operation tried to erase a non-flash area. - * mscReturnLocked - The operation tried to erase a locked area of the Flash. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_LoadVerifyAddress(uint32_t* address) -{ - uint32_t status; - uint32_t timeOut; - - /* Wait for the MSC to become ready. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - - /* Check for timeout. */ - if (timeOut == 0) { - return mscReturnTimeOut; - } - /* Load the address. */ - MSC->ADDRB = (uint32_t)address; - MSC->WRITECMD = MSC_WRITECMD_LADDRIM; - - status = MSC->STATUS; - if (status & (MSC_STATUS_INVADDR | MSC_STATUS_LOCKED)) { - /* Check for an invalid address. */ - if (status & MSC_STATUS_INVADDR) { - return mscReturnInvalidAddr; - } - /* Check for the write protected page. */ - if (status & MSC_STATUS_LOCKED) { - return mscReturnLocked; - } - } - return mscReturnOk; -} -MSC_RAMFUNC_DEFINITION_END - -/***************************************************************************//** - * @brief - * Perform a flash data write phase. - * @details - * This function performs the data phase of a flash write operation by loading - * the given number of 32-bit words to the WDATA register. - * @param[in] data - * A pointer to the first data word to load. - * @param[in] numWords - * A number of data words (32-bit) to load. - * @param[in] writeStrategy - * A write strategy to apply. - * @return - * Returns the status of the data load operation. - * @verbatim - * mscReturnOk - An operation completed successfully. - * mscReturnTimeOut - An operation timed out waiting for the flash operation - * to complete. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_LoadWriteData(uint32_t* data, - uint32_t numWords, - MSC_WriteStrategy_Typedef writeStrategy) -{ - uint32_t timeOut; - uint32_t wordIndex; - bool useWDouble = false; - MSC_Status_TypeDef retval = mscReturnOk; -#if !defined(_EFM32_GECKO_FAMILY) - uint32_t irqState; -#endif - -#if defined(_MSC_WRITECTRL_LPWRITE_MASK) && defined(_MSC_WRITECTRL_WDOUBLE_MASK) - /* If the LPWRITE (Low Power Write) is NOT enabled, set WDOUBLE (Write Double word). */ - if (!(MSC->WRITECTRL & MSC_WRITECTRL_LPWRITE)) { -#if defined(_SILICON_LABS_32B_SERIES_0) - /* If the number of words to be written is odd, align by writing - a single word first, before setting the WDOUBLE bit. */ - if (numWords & 0x1) { - /* Wait for the MSC to become ready for the next word. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((!(MSC->STATUS & MSC_STATUS_WDATAREADY)) && (timeOut != 0)) { - timeOut--; - } - /* Check for timeout. */ - if (timeOut == 0) { - return mscReturnTimeOut; - } - /* Clear the double word option to write the initial single word. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WDOUBLE; - /* Write first data word. */ - MSC->WDATA = *data++; - MSC->WRITECMD = MSC_WRITECMD_WRITEONCE; - - /* Wait for the operation to finish. It may be required to change the WDOUBLE - configuration after the initial write. It should not be changed while BUSY. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - /* Check for timeout. */ - if (timeOut == 0) { - return mscReturnTimeOut; - } - /* Subtract this initial odd word for the write loop below. */ - numWords -= 1; - retval = mscReturnOk; - } - /* Set the double word option to write two words per - data phase. */ -#endif - MSC->WRITECTRL |= MSC_WRITECTRL_WDOUBLE; - useWDouble = true; - } -#endif /* defined( _MSC_WRITECTRL_LPWRITE_MASK ) && defined( _MSC_WRITECTRL_WDOUBLE_MASK ) */ - - /* Write the rest as a double word write if wordsPerDataPhase == 2 */ - if (numWords > 0) { - /**** Write strategy: mscWriteIntSafe ****/ - if (writeStrategy == mscWriteIntSafe) { - /* Requires a system core clock at 1MHz or higher */ - EFM_ASSERT(SystemCoreClock >= 1000000); - wordIndex = 0; - while (wordIndex < numWords) { - if (!useWDouble) { - MSC->WDATA = *data++; - wordIndex++; - MSC->WRITECMD = MSC_WRITECMD_WRITEONCE; - } else { // useWDouble == true - /* Trigger a double write according to flash properties. */ -#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_MSC_WRITECTRL_WDOUBLE_MASK) - MSC->WDATA = *data++; - while (!(MSC->STATUS & MSC_STATUS_WDATAREADY)) ; - MSC->WDATA = *data++; - wordIndex += 2; - MSC->WRITECMD = MSC_WRITECMD_WRITEONCE; - -#elif defined(_SILICON_LABS_32B_SERIES_1) && defined(_MSC_WRITECTRL_WDOUBLE_MASK) - while (!(MSC->STATUS & MSC_STATUS_WDATAREADY)) ; - do { - MSC->WDATA = *data++; - wordIndex++; - } while ((MSC->STATUS & MSC_STATUS_WDATAREADY) - && (wordIndex < numWords)); - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; -#endif - } - - /* Wait for the transaction to finish. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - /* Check for a timeout. */ - if (timeOut == 0) { - retval = mscReturnTimeOut; - break; - } -#if defined(_EFM32_GECKO_FAMILY) - MSC->ADDRB += 4; - MSC->WRITECMD = MSC_WRITECMD_LADDRIM; -#endif - } - } - /**** Write strategy: mscWriteFast ****/ - else { -#if defined(_EFM32_GECKO_FAMILY) - /* Gecko does not have auto-increment of ADDR. */ - EFM_ASSERT(false); -#else - /* Requires a system core clock at 14 MHz or higher. */ - EFM_ASSERT(SystemCoreClock >= 14000000); - - /* - * Protect from interrupts to be sure to satisfy the us timing - * needs of the MSC flash programming state machine. - */ - irqState = __get_PRIMASK(); - __disable_irq(); - - wordIndex = 0; - while (wordIndex < numWords) { - /* Wait for the MSC to be ready for the next word. */ - while (!(MSC->STATUS & MSC_STATUS_WDATAREADY)) { - /* If the write to MSC->WDATA below missed the 30 us timeout and the - following MSC_WRITECMD_WRITETRIG command arrived while - MSC_STATUS_BUSY is 1, the MSC_WRITECMD_WRITETRIG could be ignored by - the MSC. In this case, MSC_STATUS_WORDTIMEOUT is set to 1 - and MSC_STATUS_BUSY is 0. A new trigger is therefore needed to - complete write of data in MSC->WDATA. - If WDATAREADY became high since entering the loop, exit and continue - to the next WDATA write. - */ - if ((MSC->STATUS & (MSC_STATUS_WORDTIMEOUT - | MSC_STATUS_BUSY - | MSC_STATUS_WDATAREADY)) - == MSC_STATUS_WORDTIMEOUT) { - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; - } - } - - if (!useWDouble) { - MSC->WDATA = *data; - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; - data++; - wordIndex++; - } else { // useWDouble == true - /* Trigger double write according to flash properties. */ -#if defined(_SILICON_LABS_32B_SERIES_0) - MSC->WDATA = *data; - if (wordIndex & 0x1) { - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; - } - data++; - wordIndex++; - -#elif (_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) - do { - MSC->WDATA = *data++; - wordIndex++; - } while ((MSC->STATUS & MSC_STATUS_WDATAREADY) - && (wordIndex < numWords)); - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; -#endif - } - } - - if (irqState == 0) { - /* Restore the previous interrupt state. */ - __enable_irq(); - } - - /* Wait for the transaction to finish. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - /* Check for a timeout. */ - if (timeOut == 0) { - retval = mscReturnTimeOut; - } -#endif - } /* writeStrategy */ - } - -#if defined(_MSC_WRITECTRL_WDOUBLE_MASK) - /* Clear a double word option, which should not be left on when returning. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WDOUBLE; -#endif - - return retval; -} -MSC_RAMFUNC_DEFINITION_END - -/***************************************************************************//** - * @brief - * An internal flash write function with the select write strategy parameter. - * @param[in] address - * A write address. - * @param[in] data - * A pointer to the first data word to load. - * @param[in] numBytes - * A nsumber of data bytes to load, which must be a multiple of 4 bytes. - * @param[in] writeStrategy - * A wWrite strategy to apply. - * @return - * Returns the status of the data load operation. - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_WriteWordI(uint32_t *address, - void const *data, - uint32_t numBytes, - MSC_WriteStrategy_Typedef writeStrategy) -{ - uint32_t wordCount; - uint32_t numWords; - uint32_t pageWords; - uint32_t* pData; - MSC_Status_TypeDef retval = mscReturnOk; - - /* Check alignment (must be aligned to words). */ - EFM_ASSERT(((uint32_t) address & 0x3) == 0); - - /* Check a number of bytes. Must be divisible by four. */ - EFM_ASSERT((numBytes & 0x3) == 0); - -#if defined(_EMU_STATUS_VSCALE_MASK) - /* VSCALE must be done and flash write requires VSCALE2. */ - EFM_ASSERT(!(EMU->STATUS & _EMU_STATUS_VSCALEBUSY_MASK)); - EFM_ASSERT((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) == EMU_STATUS_VSCALE_VSCALE2); -#endif - - /* Enable writing to the MSC module. */ - MSC->WRITECTRL |= MSC_WRITECTRL_WREN; - - /* Convert bytes to words. */ - numWords = numBytes >> 2; - EFM_ASSERT(numWords > 0); - - /* The following loop splits the data into chunks corresponding to flash pages. - The address is loaded only once per page because the hardware automatically - increments the address internally for each data load inside a page. */ - for (wordCount = 0, pData = (uint32_t *)data; wordCount < numWords; ) { - /* First, the address is loaded. The address is auto-incremented within a page. - Therefore, the address phase is only needed once for each page. */ - retval = MSC_LoadVerifyAddress(address + wordCount); - if (mscReturnOk != retval) { - return retval; - } - /* Compute the number of words to write to the current page. */ - pageWords = - (FLASH_PAGE_SIZE - - (((uint32_t) (address + wordCount)) & (FLASH_PAGE_SIZE - 1))) - / sizeof(uint32_t); - if (pageWords > numWords - wordCount) { - pageWords = numWords - wordCount; - } - /* Write the data in the current page. */ - retval = MSC_LoadWriteData(pData, pageWords, writeStrategy); - if (mscReturnOk != retval) { - break; - } - wordCount += pageWords; - pData += pageWords; - } - -#if defined(ERRATA_FIX_FLASH_E201_EN) - /* Fix for errata FLASH_E201 - Potential program failure after Power On. - * - * Check if the first word was programmed correctly. If a failure is detected, - * retry programming of the first word. - * - * A full description of the errata is in the errata document. */ - pData = (uint32_t *) data; - if (*address != *pData) { - retval = MSC_LoadVerifyAddress(address); - if (mscReturnOk == retval) { - retval = MSC_LoadWriteData(pData, 1, writeStrategy); - } - } -#endif - - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - -#if defined(_MSC_WRITECTRL_WDOUBLE_MASK) -#if (WORDS_PER_DATA_PHASE == 2) - /* Turn off the double word write cycle support. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WDOUBLE; -#endif -#endif - - return retval; -} -MSC_RAMFUNC_DEFINITION_END - -/** @endcond */ - -/***************************************************************************//** - * @brief - * Erases a page in flash memory. - * @note - * It is recommended to run this code from RAM. On the Gecko family, it is required - * to run this function from RAM. - * - * For IAR IDE, Rowley IDE, SimplicityStudio IDE, Atollic IDE, and ARM GCC IDE, this is - * achieved automatically by using attributes in the function proctype. For Keil - * uVision IDE, define a section called "ram_code" and place this manually in - * the project's scatter file. - * - * @param[in] startAddress - * A pointer to the flash page to erase. Must be aligned to the beginning of the page - * boundary. - * @return - * Returns the status of erase operation, #MSC_Status_TypeDef - * @verbatim - * mscReturnOk - The operation completed successfully. - * mscReturnInvalidAddr - The operation tried to erase a non-flash area. - * mscReturnLocked - The operation tried to erase a locked area of the flash. - * mscReturnTimeOut - The operation timed out waiting for the flash operation - * to complete. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_ErasePage(uint32_t *startAddress) -{ - uint32_t timeOut = MSC_PROGRAM_TIMEOUT; - - /* An address must be aligned to pages. */ - EFM_ASSERT((((uint32_t) startAddress) & (FLASH_PAGE_SIZE - 1)) == 0); -#if defined(_EMU_STATUS_VSCALE_MASK) - /* VSCALE must be done and flash erase requires VSCALE2. */ - EFM_ASSERT(!(EMU->STATUS & _EMU_STATUS_VSCALEBUSY_MASK)); - EFM_ASSERT((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) == EMU_STATUS_VSCALE_VSCALE2); -#endif - - /* Enable writing to the MSC module. */ - MSC->WRITECTRL |= MSC_WRITECTRL_WREN; - - /* Load an address. */ - MSC->ADDRB = (uint32_t)startAddress; - MSC->WRITECMD = MSC_WRITECMD_LADDRIM; - - /* Check for an invalid address. */ - if (MSC->STATUS & MSC_STATUS_INVADDR) { - /* Disable writing to the MSC */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnInvalidAddr; - } - /* Check for write protected page. */ - if (MSC->STATUS & MSC_STATUS_LOCKED) { - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnLocked; - } - /* Send erase page command. */ - MSC->WRITECMD = MSC_WRITECMD_ERASEPAGE; - - /* Wait for the erase to complete. */ - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - if (timeOut == 0) { - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnTimeOut; - } - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnOk; -} -MSC_RAMFUNC_DEFINITION_END - -/***************************************************************************//** - * @brief - * Writes data to flash memory. This function is interrupt-safe, but slower than - * MSC_WriteWordFast(), which writes to flash with interrupts disabled. - * Write data must be aligned to words and contain a number of bytes that is - * divisible by four. - * @note - * It is recommended to erase the flash page before performing a write. - * - * It is recommended to run this code from RAM. On the Gecko family, it is required - * to run this function from RAM. - * - * For IAR IDE, Rowley IDE, SimplicityStudio IDE, Atollic IDE, and ARM GCC IDE, - * this is done automatically by using attributes in the function proctype. - * For Keil uVision IDE, define a section called "ram_code" and place it - * manually in the project's scatter file. - * - * This function requires a system core clock at 1 MHz or higher. - * - * @param[in] address - * A pointer to the flash word to write to. Must be aligned to words. - * @param[in] data - * Data to write to flash. - * @param[in] numBytes - * A number of bytes to write from flash. NB: Must be divisible by four. - * @return - * Returns the status of the write operation. - * @verbatim - * flashReturnOk - The operation completed successfully. - * flashReturnInvalidAddr - The operation tried to erase a non-flash area. - * flashReturnLocked - The operation tried to erase a locked area of the Flash. - * flashReturnTimeOut - The operation timed out waiting for the flash operation - * to complete, or the MSC module timed out waiting for the software to write - * the next word into the DWORD register. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_WriteWord(uint32_t *address, - void const *data, - uint32_t numBytes) -{ - return MSC_WriteWordI(address, data, numBytes, mscWriteIntSafe); -} -MSC_RAMFUNC_DEFINITION_END - -#if !defined(_EFM32_GECKO_FAMILY) -/***************************************************************************//** - * @brief - * Writes data to flash memory. This function is faster than MSC_WriteWord(), - * but it disables interrupts. Write data must be aligned to words and contain - * a number of bytes that is divisible by four. - * @note - * It is recommended to erase the flash page before performing a write. - * It is required to run this function from RAM on parts that include a - * flash write buffer. - * - * For IAR IDE, Rowley IDE, SimplicityStudio IDE, Atollic IDE, and ARM GCC IDE, - * this is done automatically by using attributes in the function proctype. - * For Keil uVision IDE, define a section called "ram_code" and place this manually - * in the project's scatter file. - * - * @param[in] address - * A pointer to the flash word to write to. Must be aligned to words. - * @param[in] data - * Data to write to flash. - * @param[in] numBytes - * A number of bytes to write from the Flash. NB: Must be divisible by four. - * @return - * Returns the status of the write operation. - * @verbatim - * flashReturnOk - The operation completed successfully. - * flashReturnInvalidAddr - The operation tried to erase a non-flash area. - * flashReturnLocked - The operation tried to erase a locked area of the flash. - * flashReturnTimeOut - The operation timed out waiting for flash operation - * to complete. Or the MSC timed out waiting for the software to write - * the next word into the DWORD register. - * @endverbatim - ******************************************************************************/ -#if !defined (EM_MSC_RUN_FROM_FLASH) || (_SILICON_LABS_GECKO_INTERNAL_SDID < 84) -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_WriteWordFast(uint32_t *address, - void const *data, - uint32_t numBytes) -{ - return MSC_WriteWordI(address, data, numBytes, mscWriteFast); -} -MSC_RAMFUNC_DEFINITION_END - -#endif -#endif - -#if defined(_MSC_MASSLOCK_MASK) -/***************************************************************************//** - * @brief - * Erase the entire Flash in one operation. - * - * @note - * This command will erase the entire contents of the device. - * Use with care, both a debug session and all contents of the flash will be - * lost. The lock bit, MLW will prevent this operation from executing and - * might prevent a successful mass erase. - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_MassErase(void) -{ - /* Enable writing to the MSC module. */ - MSC->WRITECTRL |= MSC_WRITECTRL_WREN; - - /* Unlock the device mass erase. */ - MSC->MASSLOCK = MSC_MASSLOCK_LOCKKEY_UNLOCK; - - /* Erase the first 512 K block. */ - MSC->WRITECMD = MSC_WRITECMD_ERASEMAIN0; - - /* Waiting for erase to complete. */ - while ((MSC->STATUS & MSC_STATUS_BUSY) != 0U) { - } - -#if ((FLASH_SIZE >= (512 * 1024)) && defined(_MSC_WRITECMD_ERASEMAIN1_MASK)) - /* Erase the second 512 K block. */ - MSC->WRITECMD = MSC_WRITECMD_ERASEMAIN1; - - /* Waiting for erase to complete. */ - while ((MSC->STATUS & MSC_STATUS_BUSY) != 0U) { - } -#endif - - /* Restore the mass erase lock. */ - MSC->MASSLOCK = MSC_MASSLOCK_LOCKKEY_LOCK; - - /* This will only successfully return if calling function is also in SRAM. */ - return mscReturnOk; -} -MSC_RAMFUNC_DEFINITION_END - -#endif - -/** @} (end addtogroup MSC) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(MSC_COUNT) && (MSC_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_system.c b/targets/efm32/emlib/em_system.c deleted file mode 100644 index 6877ac4..0000000 --- a/targets/efm32/emlib/em_system.c +++ /dev/null @@ -1,114 +0,0 @@ -/***************************************************************************//** - * @file em_system.c - * @brief System Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_system.h" -#include "em_assert.h" -#include - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup SYSTEM - * @{ - ******************************************************************************/ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Get chip major/minor revision. - * - * @param[out] rev - * Location to place chip revision info. - ******************************************************************************/ -void SYSTEM_ChipRevisionGet(SYSTEM_ChipRevision_TypeDef *rev) -{ - uint8_t tmp; - - EFM_ASSERT(rev); - - /* CHIP FAMILY bit [5:2] */ - tmp = (((ROMTABLE->PID1 & _ROMTABLE_PID1_FAMILYMSB_MASK) >> _ROMTABLE_PID1_FAMILYMSB_SHIFT) << 2); - /* CHIP FAMILY bit [1:0] */ - tmp |= ((ROMTABLE->PID0 & _ROMTABLE_PID0_FAMILYLSB_MASK) >> _ROMTABLE_PID0_FAMILYLSB_SHIFT); - rev->family = tmp; - - /* CHIP MAJOR bit [3:0] */ - rev->major = (ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) >> _ROMTABLE_PID0_REVMAJOR_SHIFT; - - /* CHIP MINOR bit [7:4] */ - tmp = (((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) << 4); - /* CHIP MINOR bit [3:0] */ - tmp |= ((ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) >> _ROMTABLE_PID3_REVMINORLSB_SHIFT); - rev->minor = tmp; -} - -/***************************************************************************//** - * @brief - * Get factory calibration value for a given peripheral register. - * - * @param[in] regAddress - * Peripheral calibration register address to get calibration value for. If - * a calibration value is found then this register is updated with the - * calibration value. - * - * @return - * True if a calibration value exists, false otherwise. - ******************************************************************************/ -bool SYSTEM_GetCalibrationValue(volatile uint32_t *regAddress) -{ - SYSTEM_CalAddrVal_TypeDef * p, * end; - - p = (SYSTEM_CalAddrVal_TypeDef *)(DEVINFO_BASE & 0xFFFFF000); - end = (SYSTEM_CalAddrVal_TypeDef *)DEVINFO_BASE; - - for (; p < end; p++) { - if (p->address == 0xFFFFFFFF) { - /* Found table terminator */ - return false; - } - if (p->address == (uint32_t)regAddress) { - *regAddress = p->calValue; - return true; - } - } - /* Nothing found for regAddress */ - return false; -} - -/** @} (end addtogroup SYSTEM) */ -/** @} (end addtogroup emlib) */ diff --git a/targets/efm32/emlib/em_timer.c b/targets/efm32/emlib/em_timer.c deleted file mode 100644 index 6999d6a..0000000 --- a/targets/efm32/emlib/em_timer.c +++ /dev/null @@ -1,253 +0,0 @@ -/***************************************************************************//** - * @file em_timer.c - * @brief Timer/counter (TIMER) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_timer.h" -#if defined(TIMER_COUNT) && (TIMER_COUNT > 0) - -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup TIMER - * @brief Timer/Counter (TIMER) Peripheral API - * @details - * The timer module consists of three main parts: - * @li General timer config and enable control. - * @li Compare/capture control. - * @li Dead time insertion control (may not be available for all timers). - * @{ - ******************************************************************************/ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Initialize TIMER. - * - * @details - * Notice that counter top must be configured separately with for instance - * TIMER_TopSet(). In addition, compare/capture and dead-time insertion - * init must be initialized separately if used. That should probably - * be done prior to the use of this function if configuring the TIMER to - * start when initialization is completed. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - * - * @param[in] init - * Pointer to TIMER initialization structure. - ******************************************************************************/ -void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init) -{ - EFM_ASSERT(TIMER_REF_VALID(timer)); - - /* Stop timer if specified to be disabled (dosn't hurt if already stopped) */ - if (!(init->enable)) { - timer->CMD = TIMER_CMD_STOP; - } - - /* Reset counter */ - timer->CNT = _TIMER_CNT_RESETVALUE; - - timer->CTRL = ((uint32_t)(init->prescale) << _TIMER_CTRL_PRESC_SHIFT) - | ((uint32_t)(init->clkSel) << _TIMER_CTRL_CLKSEL_SHIFT) - | ((uint32_t)(init->fallAction) << _TIMER_CTRL_FALLA_SHIFT) - | ((uint32_t)(init->riseAction) << _TIMER_CTRL_RISEA_SHIFT) - | ((uint32_t)(init->mode) << _TIMER_CTRL_MODE_SHIFT) - | (init->debugRun ? TIMER_CTRL_DEBUGRUN : 0) - | (init->dmaClrAct ? TIMER_CTRL_DMACLRACT : 0) - | (init->quadModeX4 ? TIMER_CTRL_QDM_X4 : 0) - | (init->oneShot ? TIMER_CTRL_OSMEN : 0) - -#if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI) - | (init->count2x ? TIMER_CTRL_X2CNT : 0) - | (init->ati ? TIMER_CTRL_ATI : 0) -#endif - | (init->sync ? TIMER_CTRL_SYNC : 0); - - /* Start timer if specified to be enabled (dosn't hurt if already started) */ - if (init->enable) { - timer->CMD = TIMER_CMD_START; - } -} - -/***************************************************************************//** - * @brief - * Initialize TIMER compare/capture channel. - * - * @details - * Notice that if operating channel in compare mode, the CCV and CCVB register - * must be set separately as required. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - * - * @param[in] ch - * Compare/capture channel to init for. - * - * @param[in] init - * Pointer to TIMER initialization structure. - ******************************************************************************/ -void TIMER_InitCC(TIMER_TypeDef *timer, - unsigned int ch, - const TIMER_InitCC_TypeDef *init) -{ - EFM_ASSERT(TIMER_REF_VALID(timer)); - EFM_ASSERT(TIMER_CH_VALID(ch)); - - timer->CC[ch].CTRL = - ((uint32_t)(init->eventCtrl) << _TIMER_CC_CTRL_ICEVCTRL_SHIFT) - | ((uint32_t)(init->edge) << _TIMER_CC_CTRL_ICEDGE_SHIFT) - | ((uint32_t)(init->prsSel) << _TIMER_CC_CTRL_PRSSEL_SHIFT) - | ((uint32_t)(init->cufoa) << _TIMER_CC_CTRL_CUFOA_SHIFT) - | ((uint32_t)(init->cofoa) << _TIMER_CC_CTRL_COFOA_SHIFT) - | ((uint32_t)(init->cmoa) << _TIMER_CC_CTRL_CMOA_SHIFT) - | ((uint32_t)(init->mode) << _TIMER_CC_CTRL_MODE_SHIFT) - | (init->filter ? TIMER_CC_CTRL_FILT_ENABLE : 0) - | (init->prsInput ? TIMER_CC_CTRL_INSEL_PRS : 0) - | (init->coist ? TIMER_CC_CTRL_COIST : 0) - | (init->outInvert ? TIMER_CC_CTRL_OUTINV : 0); -} - -#if defined(_TIMER_DTCTRL_MASK) -/***************************************************************************//** - * @brief - * Initialize the TIMER DTI unit. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - * - * @param[in] init - * Pointer to TIMER DTI initialization structure. - ******************************************************************************/ -void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init) -{ - EFM_ASSERT(TIMER0 == timer); - - /* Make sure the DTI unit is disabled while initializing. */ - TIMER_EnableDTI(timer, false); - - /* Setup the DTCTRL register. - The enable bit will be set at the end of the function if specified. */ - timer->DTCTRL = - (init->autoRestart ? TIMER_DTCTRL_DTDAS : 0) - | (init->activeLowOut ? TIMER_DTCTRL_DTIPOL : 0) - | (init->invertComplementaryOut ? TIMER_DTCTRL_DTCINV : 0) - | (init->enablePrsSource ? TIMER_DTCTRL_DTPRSEN : 0) - | ((uint32_t)(init->prsSel) << _TIMER_DTCTRL_DTPRSSEL_SHIFT); - - /* Setup the DTTIME register. */ - timer->DTTIME = - ((uint32_t)(init->prescale) << _TIMER_DTTIME_DTPRESC_SHIFT) - | ((uint32_t)(init->riseTime) << _TIMER_DTTIME_DTRISET_SHIFT) - | ((uint32_t)(init->fallTime) << _TIMER_DTTIME_DTFALLT_SHIFT); - - /* Setup the DTFC register. */ - timer->DTFC = - (init->enableFaultSourceCoreLockup ? TIMER_DTFC_DTLOCKUPFEN : 0) - | (init->enableFaultSourceDebugger ? TIMER_DTFC_DTDBGFEN : 0) - | (init->enableFaultSourcePrsSel0 ? TIMER_DTFC_DTPRS0FEN : 0) - | (init->enableFaultSourcePrsSel1 ? TIMER_DTFC_DTPRS1FEN : 0) - | ((uint32_t)(init->faultAction) << _TIMER_DTFC_DTFA_SHIFT) - | ((uint32_t)(init->faultSourcePrsSel0) << _TIMER_DTFC_DTPRS0FSEL_SHIFT) - | ((uint32_t)(init->faultSourcePrsSel1) << _TIMER_DTFC_DTPRS1FSEL_SHIFT); - - /* Setup the DTOGEN register. */ - timer->DTOGEN = init->outputsEnableMask; - - /* Clear any previous DTI faults. */ - TIMER_ClearDTIFault(timer, TIMER_GetDTIFault(timer)); - - /* Enable/disable before returning. */ - TIMER_EnableDTI(timer, init->enable); -} -#endif - -/***************************************************************************//** - * @brief - * Reset TIMER to same state as after a HW reset. - * - * @note - * The ROUTE register is NOT reset by this function, in order to allow for - * centralized setup of this feature. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - ******************************************************************************/ -void TIMER_Reset(TIMER_TypeDef *timer) -{ - int i; - - EFM_ASSERT(TIMER_REF_VALID(timer)); - - /* Make sure disabled first, before resetting other registers */ - timer->CMD = TIMER_CMD_STOP; - - timer->CTRL = _TIMER_CTRL_RESETVALUE; - timer->IEN = _TIMER_IEN_RESETVALUE; - timer->IFC = _TIMER_IFC_MASK; - timer->TOPB = _TIMER_TOPB_RESETVALUE; - /* Write TOP after TOPB to invalidate TOPB (clear TIMER_STATUS_TOPBV) */ - timer->TOP = _TIMER_TOP_RESETVALUE; - timer->CNT = _TIMER_CNT_RESETVALUE; - /* Do not reset route register, setting should be done independently */ - /* (Note: ROUTE register may be locked by DTLOCK register.) */ - - for (i = 0; TIMER_CH_VALID(i); i++) { - timer->CC[i].CTRL = _TIMER_CC_CTRL_RESETVALUE; - timer->CC[i].CCV = _TIMER_CC_CCV_RESETVALUE; - timer->CC[i].CCVB = _TIMER_CC_CCVB_RESETVALUE; - } - - /* Reset dead time insertion module, no effect on timers without DTI */ - -#if defined(TIMER_DTLOCK_LOCKKEY_UNLOCK) - /* Unlock DTI registers first in case locked */ - timer->DTLOCK = TIMER_DTLOCK_LOCKKEY_UNLOCK; - - timer->DTCTRL = _TIMER_DTCTRL_RESETVALUE; - timer->DTTIME = _TIMER_DTTIME_RESETVALUE; - timer->DTFC = _TIMER_DTFC_RESETVALUE; - timer->DTOGEN = _TIMER_DTOGEN_RESETVALUE; - timer->DTFAULTC = _TIMER_DTFAULTC_MASK; -#endif -} - -/** @} (end addtogroup TIMER) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(TIMER_COUNT) && (TIMER_COUNT > 0) */ diff --git a/targets/efm32/emlib/em_usart.c b/targets/efm32/emlib/em_usart.c deleted file mode 100644 index 3a5e65c..0000000 --- a/targets/efm32/emlib/em_usart.c +++ /dev/null @@ -1,1161 +0,0 @@ -/***************************************************************************//** - * @file em_usart.c - * @brief Universal synchronous/asynchronous receiver/transmitter (USART/UART) - * Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_usart.h" -#if defined(USART_COUNT) && (USART_COUNT > 0) - -#include "em_cmu.h" -#include "em_bus.h" -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup USART - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Validation of USART register block pointer reference for assert statements. */ -#if (USART_COUNT == 1) && defined(USART0) -#define USART_REF_VALID(ref) ((ref) == USART0) - -#elif (USART_COUNT == 1) && defined(USART1) -#define USART_REF_VALID(ref) ((ref) == USART1) - -#elif (USART_COUNT == 2) && defined(USART2) -#define USART_REF_VALID(ref) (((ref) == USART1) || ((ref) == USART2)) - -#elif (USART_COUNT == 2) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1)) - -#elif (USART_COUNT == 3) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2)) -#elif (USART_COUNT == 4) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2) || ((ref) == USART3)) -#elif (USART_COUNT == 5) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2) || ((ref) == USART3) \ - || ((ref) == USART4)) -#elif (USART_COUNT == 6) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2) || ((ref) == USART3) \ - || ((ref) == USART4) || ((ref) == USART5)) -#else -#error "Undefined number of USARTs." -#endif - -#if defined(USARTRF_COUNT) && (USARTRF_COUNT > 0) -#if (USARTRF_COUNT == 1) && defined(USARTRF0) -#define USARTRF_REF_VALID(ref) ((ref) == USARTRF0) -#elif (USARTRF_COUNT == 1) && defined(USARTRF1) -#define USARTRF_REF_VALID(ref) ((ref) == USARTRF1) -#else -#define USARTRF_REF_VALID(ref) (0) -#endif -#else -#define USARTRF_REF_VALID(ref) (0) -#endif - -#if defined(_EZR32_HAPPY_FAMILY) -#define USART_IRDA_VALID(ref) ((ref) == USART0) -#elif defined(_EFM32_HAPPY_FAMILY) -#define USART_IRDA_VALID(ref) (((ref) == USART0) || ((ref) == USART1)) -#elif defined(USART0) -#define USART_IRDA_VALID(ref) ((ref) == USART0) -#elif (USART_COUNT == 1) && defined(USART1) -#define USART_IRDA_VALID(ref) ((ref) == USART1) -#elif defined(USARTRF0) -#define USART_IRDA_VALID(ref) ((ref) == USARTRF0) -#else -#define USART_IRDA_VALID(ref) (0) -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) - #if defined(USART3) - #define USART_I2S_VALID(ref) (((ref) == USART1) || ((ref) == USART3)) - #else - #define USART_I2S_VALID(ref) ((ref) == USART1) - #endif -#elif defined(_SILICON_LABS_32B_SERIES_0) - #if defined(_EZR32_HAPPY_FAMILY) - #define USART_I2S_VALID(ref) ((ref) == USART0) - #elif defined(_EFM32_HAPPY_FAMILY) - #define USART_I2S_VALID(ref) (((ref) == USART0) || ((ref) == USART1)) - #elif defined(_EFM32_TINY_FAMILY) || defined(_EFM32_ZERO_FAMILY) - #define USART_I2S_VALID(ref) ((ref) == USART1) - #elif defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY) - #define USART_I2S_VALID(ref) (((ref) == USART1) || ((ref) == USART2)) -#endif -#endif - -#if (UART_COUNT == 1) -#define UART_REF_VALID(ref) ((ref) == UART0) -#elif (UART_COUNT == 2) -#define UART_REF_VALID(ref) (((ref) == UART0) || ((ref) == UART1)) -#else -#define UART_REF_VALID(ref) (0) -#endif - -#if defined(_USART_CLKDIV_DIVEXT_MASK) -#define CLKDIV_MASK (_USART_CLKDIV_DIV_MASK | _USART_CLKDIV_DIVEXT_MASK) -#else -#define CLKDIV_MASK _USART_CLKDIV_DIV_MASK -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Configure USART/UART operating in asynchronous mode to use a given - * baudrate (or as close as possible to specified baudrate). - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] refFreq - * USART/UART reference clock frequency in Hz that will be used. If set to 0, - * the currently configured reference clock is assumed. - * - * @param[in] baudrate - * Baudrate to try to achieve for USART/UART. - * - * @param[in] ovs - * Oversampling to be used. Normal is 16x oversampling, but lower oversampling - * may be used to achieve higher rates or better baudrate accuracy in some - * cases. Notice that lower oversampling frequency makes channel more - * vulnerable to bit faults during reception due to clock inaccuracies - * compared to link partner. - ******************************************************************************/ -void USART_BaudrateAsyncSet(USART_TypeDef *usart, - uint32_t refFreq, - uint32_t baudrate, - USART_OVS_TypeDef ovs) -{ - uint32_t clkdiv; - uint32_t oversample; - - /* Inhibit divide by 0 */ - EFM_ASSERT(baudrate); - - /* - * We want to use integer division to avoid forcing in float division - * utils, and yet keep rounding effect errors to a minimum. - * - * CLKDIV in asynchronous mode is given by: - * - * CLKDIV = 256 * (fHFPERCLK/(oversample * br) - 1) - * or - * CLKDIV = (256 * fHFPERCLK)/(oversample * br) - 256 - * - * The basic problem with integer division in the above formula is that - * the dividend (256 * fHFPERCLK) may become higher than max 32 bit - * integer. Yet, we want to evaluate dividend first before dividing in - * order to get as small rounding effects as possible. We do not want - * to make too harsh restrictions on max fHFPERCLK value either. - * - * One can possibly factorize 256 and oversample/br. However, - * since the last 6 or 3 bits of CLKDIV are don't care, we can base our - * integer arithmetic on the below formula - * - * CLKDIV / 64 = (4 * fHFPERCLK)/(oversample * br) - 4 (3 bits dont care) - * or - * CLKDIV / 8 = (32 * fHFPERCLK)/(oversample * br) - 32 (6 bits dont care) - * - * and calculate 1/64 of CLKDIV first. This allows for fHFPERCLK - * up to 1GHz without overflowing a 32 bit value! - */ - - /* HFPERCLK used to clock all USART/UART peripheral modules */ - if (!refFreq) { - refFreq = CMU_ClockFreqGet(cmuClock_HFPER); - } - - /* Map oversampling */ - switch (ovs) { - case usartOVS16: - EFM_ASSERT(baudrate <= (refFreq / 16)); - oversample = 16; - break; - - case usartOVS8: - EFM_ASSERT(baudrate <= (refFreq / 8)); - oversample = 8; - break; - - case usartOVS6: - EFM_ASSERT(baudrate <= (refFreq / 6)); - oversample = 6; - break; - - case usartOVS4: - EFM_ASSERT(baudrate <= (refFreq / 4)); - oversample = 4; - break; - - default: - /* Invalid input */ - EFM_ASSERT(0); - return; - } - - /* Calculate and set CLKDIV with fractional bits. - * The added (oversample*baudrate)/2 in the first line is to round the - * divisor to the nearest fractional divisor. */ -#if defined(_SILICON_LABS_32B_SERIES_0) && !defined(_EFM32_HAPPY_FAMILY) - /* Devices with 2 fractional bits. CLKDIV[7:6] */ - clkdiv = 4 * refFreq + (oversample * baudrate) / 2; - clkdiv /= (oversample * baudrate); - clkdiv -= 4; - clkdiv *= 64; -#else - /* Devices with 5 fractional bits. CLKDIV[7:3] */ - clkdiv = 32 * refFreq + (oversample * baudrate) / 2; - clkdiv /= (oversample * baudrate); - clkdiv -= 32; - clkdiv *= 8; -#endif - - /* Verify that resulting clock divider is within limits */ - EFM_ASSERT(clkdiv <= CLKDIV_MASK); - - /* Make sure we don't write to reserved bits */ - clkdiv &= CLKDIV_MASK; - - usart->CTRL &= ~_USART_CTRL_OVS_MASK; - usart->CTRL |= ovs; - usart->CLKDIV = clkdiv; -} - -/***************************************************************************//** - * @brief - * Calculate baudrate for USART/UART given reference frequency, clock division - * and oversampling rate (if async mode). - * - * @details - * This function returns the baudrate that a USART/UART module will use if - * configured with the given frequency, clock divisor and mode. Notice that - * this function will not use actual HW configuration. It can be used - * to determinate if a given configuration is sufficiently accurate for the - * application. - * - * @param[in] refFreq - * USART/UART HF peripheral frequency used. - * - * @param[in] clkdiv - * Clock division factor to be used. - * - * @param[in] syncmode - * @li true - synchronous mode operation. - * @li false - asynchronous mode operation. - * - * @param[in] ovs - * Oversampling used if asynchronous mode. Not used if @p syncmode is true. - * - * @return - * Baudrate with given settings. - ******************************************************************************/ -uint32_t USART_BaudrateCalc(uint32_t refFreq, - uint32_t clkdiv, - bool syncmode, - USART_OVS_TypeDef ovs) -{ - uint32_t oversample; - uint64_t divisor; - uint64_t factor; - uint64_t remainder; - uint64_t quotient; - uint32_t br; - - /* Out of bound clkdiv ? */ - EFM_ASSERT(clkdiv <= CLKDIV_MASK); - - /* Mask out unused bits */ - clkdiv &= CLKDIV_MASK; - - /* We want to use integer division to avoid forcing in float division */ - /* utils, and yet keep rounding effect errors to a minimum. */ - - /* Baudrate calculation depends on if synchronous or asynchronous mode */ - if (syncmode) { - /* - * Baudrate is given by: - * - * br = fHFPERCLK/(2 * (1 + (CLKDIV / 256))) - * - * which can be rewritten to - * - * br = (128 * fHFPERCLK)/(256 + CLKDIV) - */ - oversample = 1; /* Not used in sync mode, ie 1 */ - factor = 128; - } else { - /* - * Baudrate in asynchronous mode is given by: - * - * br = fHFPERCLK/(oversample * (1 + (CLKDIV / 256))) - * - * which can be rewritten to - * - * br = (256 * fHFPERCLK)/(oversample * (256 + CLKDIV)) - * - * First of all we can reduce the 256 factor of the dividend with - * (part of) oversample part of the divisor. - */ - - switch (ovs) { - case usartOVS16: - oversample = 1; - factor = 256 / 16; - break; - - case usartOVS8: - oversample = 1; - factor = 256 / 8; - break; - - case usartOVS6: - oversample = 3; - factor = 256 / 2; - break; - - default: - oversample = 1; - factor = 256 / 4; - break; - } - } - - /* - * The basic problem with integer division in the above formula is that - * the dividend (factor * fHFPERCLK) may become larger than a 32 bit - * integer. Yet we want to evaluate dividend first before dividing in - * order to get as small rounding effects as possible. We do not want - * to make too harsh restrictions on max fHFPERCLK value either. - * - * For division a/b, we can write - * - * a = qb + r - * - * where q is the quotient and r is the remainder, both integers. - * - * The orignal baudrate formula can be rewritten as - * - * br = xa / b = x(qb + r)/b = xq + xr/b - * - * where x is 'factor', a is 'refFreq' and b is 'divisor', referring to - * variable names. - */ - - /* - * Divisor will never exceed max 32 bit value since - * clkdiv <= _USART_CLKDIV_DIV_MASK (currently 0x1FFFC0 or 0x7FFFF8) - * and 'oversample' has been reduced to <= 3. - */ - divisor = oversample * (256 + clkdiv); - - quotient = refFreq / divisor; - remainder = refFreq % divisor; - - /* factor <= 128 and since divisor >= 256, the below cannot exceed max */ - /* 32 bit value. However, factor * remainder can become larger than 32-bit */ - /* because of the size of _USART_CLKDIV_DIV_MASK on some families. */ - br = (uint32_t)(factor * quotient); - - /* - * factor <= 128 and remainder < (oversample*(256 + clkdiv)), which - * means dividend (factor * remainder) worst case is - * 128 * (3 * (256 + _USART_CLKDIV_DIV_MASK)) = 0x1_8001_7400. - */ - br += (uint32_t)((factor * remainder) / divisor); - - return br; -} - -/***************************************************************************//** - * @brief - * Get current baudrate for USART/UART. - * - * @details - * This function returns the actual baudrate (not considering oscillator - * inaccuracies) used by a USART/UART peripheral. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Current baudrate. - ******************************************************************************/ -uint32_t USART_BaudrateGet(USART_TypeDef *usart) -{ - uint32_t freq; - USART_OVS_TypeDef ovs; - bool syncmode; - - if (usart->CTRL & USART_CTRL_SYNC) { - syncmode = true; - } else { - syncmode = false; - } - - /* HFPERCLK used to clock all USART/UART peripheral modules */ - freq = CMU_ClockFreqGet(cmuClock_HFPER); - ovs = (USART_OVS_TypeDef)(usart->CTRL & _USART_CTRL_OVS_MASK); - return USART_BaudrateCalc(freq, usart->CLKDIV, syncmode, ovs); -} - -/***************************************************************************//** - * @brief - * Configure USART operating in synchronous mode to use a given baudrate - * (or as close as possible to specified baudrate). - * - * @details - * The configuration will be set to use a baudrate <= the specified baudrate - * in order to ensure that the baudrate does not exceed the specified value. - * - * Fractional clock division is suppressed, although the HW design allows it. - * It could cause half clock cycles to exceed specified limit, and thus - * potentially violate specifications for the slave device. In some special - * situations fractional clock division may be useful even in synchronous - * mode, but in those cases it must be directly adjusted, possibly assisted - * by USART_BaudrateCalc(): - * - * @param[in] usart - * Pointer to USART peripheral register block. (Cannot be used on UART - * modules.) - * - * @param[in] refFreq - * USART reference clock frequency in Hz that will be used. If set to 0, - * the currently configured reference clock is assumed. - * - * @param[in] baudrate - * Baudrate to try to achieve for USART. - ******************************************************************************/ -void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate) -{ - uint32_t clkdiv; - - /* Inhibit divide by 0 */ - EFM_ASSERT(baudrate); - - /* - * CLKDIV in synchronous mode is given by: - * - * CLKDIV = 256 * (fHFPERCLK/(2 * br) - 1) - */ - - /* HFPERCLK used to clock all USART/UART peripheral modules */ - if (!refFreq) { - refFreq = CMU_ClockFreqGet(cmuClock_HFPER); - } - - clkdiv = (refFreq - 1) / (2 * baudrate); - clkdiv = clkdiv << 8; - - /* Verify that resulting clock divider is within limits */ - EFM_ASSERT(!(clkdiv & ~CLKDIV_MASK)); - - usart->CLKDIV = clkdiv; -} - -/***************************************************************************//** - * @brief - * Enable/disable USART/UART receiver and/or transmitter. - * - * @details - * Notice that this function does not do any configuration. Enabling should - * normally be done after initialization is done (if not enabled as part - * of init). - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] enable - * Select status for receiver/transmitter. - ******************************************************************************/ -void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable) -{ - uint32_t tmp; - - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) - || USARTRF_REF_VALID(usart) - || UART_REF_VALID(usart) ); - - /* Disable as specified */ - tmp = ~((uint32_t) (enable)); - tmp &= _USART_CMD_RXEN_MASK | _USART_CMD_TXEN_MASK; - usart->CMD = tmp << 1; - - /* Enable as specified */ - usart->CMD = (uint32_t) (enable); -} - -/***************************************************************************//** - * @brief - * Init USART/UART for normal asynchronous mode. - * - * @details - * This function will configure basic settings in order to operate in normal - * asynchronous mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL register. - * - * Notice that pins used by the USART/UART module must be properly configured - * by the user explicitly, in order for the USART/UART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] init - * Pointer to initialization structure used to configure basic async setup. - ******************************************************************************/ -void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init) -{ - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) - || USARTRF_REF_VALID(usart) - || UART_REF_VALID(usart) ); - - /* Init USART registers to HW reset state. */ - USART_Reset(usart); - -#if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS) - /* Disable majority vote if specified. */ - if (init->mvdis) { - usart->CTRL |= USART_CTRL_MVDIS; - } - - /* Configure PRS input mode. */ - if (init->prsRxEnable) { - usart->INPUT = (uint32_t) init->prsRxCh | USART_INPUT_RXPRS; - } -#endif - - /* Configure databits, stopbits and parity */ - usart->FRAME = (uint32_t)init->databits - | (uint32_t)init->stopbits - | (uint32_t)init->parity; - - /* Configure baudrate */ - USART_BaudrateAsyncSet(usart, init->refFreq, init->baudrate, init->oversampling); - -#if defined(_USART_TIMING_CSHOLD_MASK) - usart->TIMING = ((init->autoCsHold << _USART_TIMING_CSHOLD_SHIFT) - & _USART_TIMING_CSHOLD_MASK) - | ((init->autoCsSetup << _USART_TIMING_CSSETUP_SHIFT) - & _USART_TIMING_CSSETUP_MASK); - if (init->autoCsEnable) { - usart->CTRL |= USART_CTRL_AUTOCS; - } -#endif - /* Finally enable (as specified) */ - usart->CMD = (uint32_t)init->enable; -} - -/***************************************************************************//** - * @brief - * Init USART for synchronous mode. - * - * @details - * This function will configure basic settings in order to operate in - * synchronous mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL register. - * - * Notice that pins used by the USART module must be properly configured - * by the user explicitly, in order for the USART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART peripheral register block. (UART does not support this - * mode.) - * - * @param[in] init - * Pointer to initialization structure used to configure basic async setup. - ******************************************************************************/ -void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init) -{ - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) || USARTRF_REF_VALID(usart) ); - - /* Init USART registers to HW reset state. */ - USART_Reset(usart); - - /* Set bits for synchronous mode */ - usart->CTRL |= (USART_CTRL_SYNC) - | (uint32_t)init->clockMode - | (init->msbf ? USART_CTRL_MSBF : 0); - -#if defined(_USART_CTRL_AUTOTX_MASK) - usart->CTRL |= init->autoTx ? USART_CTRL_AUTOTX : 0; -#endif - -#if defined(_USART_INPUT_RXPRS_MASK) - /* Configure PRS input mode. */ - if (init->prsRxEnable) { - usart->INPUT = (uint32_t)init->prsRxCh | USART_INPUT_RXPRS; - } -#endif - - /* Configure databits, leave stopbits and parity at reset default (not used) */ - usart->FRAME = (uint32_t)init->databits - | USART_FRAME_STOPBITS_DEFAULT - | USART_FRAME_PARITY_DEFAULT; - - /* Configure baudrate */ - USART_BaudrateSyncSet(usart, init->refFreq, init->baudrate); - - /* Finally enable (as specified) */ - if (init->master) { - usart->CMD = USART_CMD_MASTEREN; - } - -#if defined(_USART_TIMING_CSHOLD_MASK) - usart->TIMING = ((init->autoCsHold << _USART_TIMING_CSHOLD_SHIFT) - & _USART_TIMING_CSHOLD_MASK) - | ((init->autoCsSetup << _USART_TIMING_CSSETUP_SHIFT) - & _USART_TIMING_CSSETUP_MASK); - if (init->autoCsEnable) { - usart->CTRL |= USART_CTRL_AUTOCS; - } -#endif - - usart->CMD = (uint32_t)init->enable; -} - -/***************************************************************************//** - * @brief - * Init USART for asynchronous IrDA mode. - * - * @details - * This function will configure basic settings in order to operate in - * asynchronous IrDA mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL and IRCTRL - * registers. - * - * Notice that pins used by the USART/UART module must be properly configured - * by the user explicitly, in order for the USART/UART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART peripheral register block. - * - * @param[in] init - * Pointer to initialization structure used to configure async IrDA setup. - * - * @note - * Not all USART instances support IrDA. See the datasheet for your device. - * - ******************************************************************************/ -void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init) -{ - EFM_ASSERT(USART_IRDA_VALID(usart)); - - /* Init USART as async device */ - USART_InitAsync(usart, &(init->async)); - - /* Set IrDA modulation to RZI (return-to-zero-inverted) */ - usart->CTRL |= USART_CTRL_TXINV; - - /* Invert Rx signal before demodulator if enabled */ - if (init->irRxInv) { - usart->CTRL |= USART_CTRL_RXINV; - } - - /* Configure IrDA */ - usart->IRCTRL |= (uint32_t)init->irPw - | (uint32_t)init->irPrsSel - | ((uint32_t)init->irFilt << _USART_IRCTRL_IRFILT_SHIFT) - | ((uint32_t)init->irPrsEn << _USART_IRCTRL_IRPRSEN_SHIFT); - - /* Enable IrDA */ - usart->IRCTRL |= USART_IRCTRL_IREN; -} - -#if defined(_USART_I2SCTRL_MASK) -/***************************************************************************//** - * @brief - * Init USART for I2S mode. - * - * @details - * This function will configure basic settings in order to operate in I2S - * mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL and I2SCTRL - * registers. - * - * Notice that pins used by the USART module must be properly configured - * by the user explicitly, in order for the USART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART peripheral register block. (UART does not support this - * mode.) - * - * @param[in] init - * Pointer to initialization structure used to configure basic I2S setup. - * - * @note - * This function does not apply to all USART's. Refer to chip manuals. - * - ******************************************************************************/ -void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init) -{ - USART_Enable_TypeDef enable; - - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_I2S_VALID(usart)); - - /* Override the enable setting. */ - enable = init->sync.enable; - init->sync.enable = usartDisable; - - /* Init USART as a sync device. */ - USART_InitSync(usart, &init->sync); - - /* Configure and enable I2CCTRL register acording to selected mode. */ - usart->I2SCTRL = (uint32_t)init->format - | (uint32_t)init->justify - | (init->delay ? USART_I2SCTRL_DELAY : 0) - | (init->dmaSplit ? USART_I2SCTRL_DMASPLIT : 0) - | (init->mono ? USART_I2SCTRL_MONO : 0) - | USART_I2SCTRL_EN; - - if (enable != usartDisable) { - USART_Enable(usart, enable); - } -} -#endif - -/***************************************************************************//** - * @brief - * Initialize automatic transmissions using PRS channel as trigger - * @note - * Initialize USART with USART_Init() before setting up PRS configuration - * - * @param[in] usart Pointer to USART to configure - * @param[in] init Pointer to initialization structure - ******************************************************************************/ -void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init) -{ - uint32_t trigctrl; - - /* Clear values that will be reconfigured */ - trigctrl = usart->TRIGCTRL & ~(_USART_TRIGCTRL_RXTEN_MASK - | _USART_TRIGCTRL_TXTEN_MASK -#if defined(USART_TRIGCTRL_AUTOTXTEN) - | _USART_TRIGCTRL_AUTOTXTEN_MASK -#endif - | _USART_TRIGCTRL_TSEL_MASK); - -#if defined(USART_TRIGCTRL_AUTOTXTEN) - if (init->autoTxTriggerEnable) { - trigctrl |= USART_TRIGCTRL_AUTOTXTEN; - } -#endif - if (init->txTriggerEnable) { - trigctrl |= USART_TRIGCTRL_TXTEN; - } - if (init->rxTriggerEnable) { - trigctrl |= USART_TRIGCTRL_RXTEN; - } - trigctrl |= init->prsTriggerChannel; - - /* Enable new configuration */ - usart->TRIGCTRL = trigctrl; -} - -/***************************************************************************//** - * @brief - * Reset USART/UART to same state as after a HW reset. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - ******************************************************************************/ -void USART_Reset(USART_TypeDef *usart) -{ - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) - || USARTRF_REF_VALID(usart) - || UART_REF_VALID(usart) ); - - /* Make sure disabled first, before resetting other registers */ - usart->CMD = USART_CMD_RXDIS | USART_CMD_TXDIS | USART_CMD_MASTERDIS - | USART_CMD_RXBLOCKDIS | USART_CMD_TXTRIDIS | USART_CMD_CLEARTX - | USART_CMD_CLEARRX; - usart->CTRL = _USART_CTRL_RESETVALUE; - usart->FRAME = _USART_FRAME_RESETVALUE; - usart->TRIGCTRL = _USART_TRIGCTRL_RESETVALUE; - usart->CLKDIV = _USART_CLKDIV_RESETVALUE; - usart->IEN = _USART_IEN_RESETVALUE; - usart->IFC = _USART_IFC_MASK; -#if defined(_USART_ROUTEPEN_MASK) || defined(_UART_ROUTEPEN_MASK) - usart->ROUTEPEN = _USART_ROUTEPEN_RESETVALUE; - usart->ROUTELOC0 = _USART_ROUTELOC0_RESETVALUE; - usart->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE; -#else - usart->ROUTE = _USART_ROUTE_RESETVALUE; -#endif - - if (USART_IRDA_VALID(usart)) { - usart->IRCTRL = _USART_IRCTRL_RESETVALUE; - } - -#if defined(_USART_INPUT_RESETVALUE) - usart->INPUT = _USART_INPUT_RESETVALUE; -#endif - -#if defined(_USART_I2SCTRL_RESETVALUE) - if (USART_I2S_VALID(usart)) { - usart->I2SCTRL = _USART_I2SCTRL_RESETVALUE; - } -#endif -} - -/***************************************************************************//** - * @brief - * Receive one 4-8 bit frame, (or part of 10-16 bit frame). - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 4-8 bits. Please refer to @ref USART_RxExt() for reception of - * 9 bit frames. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if the buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDataGet() to read the RXDATA - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint8_t USART_Rx(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXDATAV)) - ; - - return (uint8_t)usart->RXDATA; -} - -/***************************************************************************//** - * @brief - * Receive two 4-8 bit frames, or one 10-16 bit frame. - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 10-16 bits. Please refer to @ref USART_RxDoubleExt() for - * reception of two 9 bit frames. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDoubleGet() to read the RXDOUBLE - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint16_t USART_RxDouble(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXFULL)) - ; - - return (uint16_t)usart->RXDOUBLE; -} - -/***************************************************************************//** - * @brief - * Receive two 4-9 bit frames, or one 10-16 bit frame with extended - * information. - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 10-16 bits and additional RX status information is required. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDoubleXGet() to read the RXDOUBLEX - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint32_t USART_RxDoubleExt(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXFULL)) - ; - - return usart->RXDOUBLEX; -} - -/***************************************************************************//** - * @brief - * Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended - * information. - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 4-9 bits and additional RX status information is required. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDataXGet() to read the RXDATAX - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint16_t USART_RxExt(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXDATAV)) - ; - - return (uint16_t)usart->RXDATAX; -} - -/***************************************************************************//** - * @brief - * Perform one 8 bit frame SPI transfer. - * - * @note - * This function will stall if the transmit buffer is full. When a transmit - * buffer becomes available, data is written and the function will wait until - * the data is fully transmitted. The SPI return value is then read out and - * returned. - * - * @param[in] usart - * Pointer to USART peripheral register block. - * - * @param[in] data - * Data to transmit. - * - * @return - * Data received. - ******************************************************************************/ -uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data) -{ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDATA = (uint32_t)data; - while (!(usart->STATUS & USART_STATUS_TXC)) - ; - return (uint8_t)usart->RXDATA; -} - -/***************************************************************************//** - * @brief - * Transmit one 4-9 bit frame. - * - * @details - * Depending on frame length configuration, 4-8 (least significant) bits from - * @p data are transmitted. If frame length is 9, 8 bits are transmitted from - * @p data and one bit as specified by CTRL register, BIT8DV field. Please - * refer to USART_TxExt() for transmitting 9 bit frame with full control of - * all 9 bits. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit. See details above for further info. - ******************************************************************************/ -void USART_Tx(USART_TypeDef *usart, uint8_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDATA = (uint32_t)data; -} - -/***************************************************************************//** - * @brief - * Transmit two 4-9 bit frames, or one 10-16 bit frame. - * - * @details - * Depending on frame length configuration, 4-8 (least significant) bits from - * each byte in @p data are transmitted. If frame length is 9, 8 bits are - * transmitted from each byte in @p data adding one bit as specified by CTRL - * register, BIT8DV field, to each byte. Please refer to USART_TxDoubleExt() - * for transmitting two 9 bit frames with full control of all 9 bits. - * - * If frame length is 10-16, 10-16 (least significant) bits from @p data - * are transmitted. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit, the least significant byte holds the frame transmitted - * first. See details above for further info. - ******************************************************************************/ -void USART_TxDouble(USART_TypeDef *usart, uint16_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDOUBLE = (uint32_t)data; -} - -/***************************************************************************//** - * @brief - * Transmit two 4-9 bit frames, or one 10-16 bit frame with extended control. - * - * @details - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit with extended control. Contains two 16 bit words - * concatenated. Least significant word holds frame transitted first. If frame - * length is 4-9, two frames with 4-9 least significant bits from each 16 bit - * word are transmitted. - * @par - * If frame length is 10-16 bits, 8 data bits are taken from the least - * significant 16 bit word, and the remaining bits from the other 16 bit word. - * @par - * Additional control bits are available as documented in the reference - * manual (set to 0 if not used). For 10-16 bit frame length, these control - * bits are taken from the most significant 16 bit word. - ******************************************************************************/ -void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDOUBLEX = data; -} - -/***************************************************************************//** - * @brief - * Transmit one 4-9 bit frame with extended control. - * - * @details - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit with extended control. Least significant bits contains - * frame bits, and additional control bits are available as documented in - * the reference manual (set to 0 if not used). - ******************************************************************************/ -void USART_TxExt(USART_TypeDef *usart, uint16_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDATAX = (uint32_t)data; -} - -/** @} (end addtogroup USART) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(USART_COUNT) && (USART_COUNT > 0) */ diff --git a/targets/efm32/inc/InitDevice.h b/targets/efm32/inc/InitDevice.h deleted file mode 100644 index 31af980..0000000 --- a/targets/efm32/inc/InitDevice.h +++ /dev/null @@ -1,48 +0,0 @@ -//========================================================= -// inc/InitDevice.h: generated by Hardware Configurator -// -// This file will be regenerated when saving a document. -// leave the sections inside the "$[...]" comment tags alone -// or they will be overwritten! -//========================================================= -#ifndef __INIT_DEVICE_H__ -#define __INIT_DEVICE_H__ - -// USER CONSTANTS -// USER PROTOTYPES - -// $[Mode Transition Prototypes] -extern void enter_DefaultMode_from_RESET(void); -// [Mode Transition Prototypes]$ - -// $[Config(Per-Module Mode)Transition Prototypes] -extern void EMU_enter_DefaultMode_from_RESET(void); -extern void LFXO_enter_DefaultMode_from_RESET(void); -extern void CMU_enter_DefaultMode_from_RESET(void); -extern void ADC0_enter_DefaultMode_from_RESET(void); -extern void ACMP0_enter_DefaultMode_from_RESET(void); -extern void ACMP1_enter_DefaultMode_from_RESET(void); -extern void IDAC0_enter_DefaultMode_from_RESET(void); -extern void RTCC_enter_DefaultMode_from_RESET(void); -extern void USART0_enter_DefaultMode_from_RESET(void); -extern void USART1_enter_DefaultMode_from_RESET(void); -extern void LEUART0_enter_DefaultMode_from_RESET(void); -extern void WDOG0_enter_DefaultMode_from_RESET(void); -extern void I2C0_enter_DefaultMode_from_RESET(void); -extern void GPCRC_enter_DefaultMode_from_RESET(void); -extern void LDMA_enter_DefaultMode_from_RESET(void); -extern void TIMER0_enter_DefaultMode_from_RESET(void); -extern void TIMER1_enter_DefaultMode_from_RESET(void); -extern void LETIMER0_enter_DefaultMode_from_RESET(void); -extern void CRYOTIMER_enter_DefaultMode_from_RESET(void); -extern void PCNT0_enter_DefaultMode_from_RESET(void); -extern void PRS_enter_DefaultMode_from_RESET(void); -extern void PORTIO_enter_DefaultMode_from_RESET(void); -// [Config(Per-Module Mode)Transition Prototypes]$ - -// $[User-defined pin name abstraction] - -// [User-defined pin name abstraction]$ - -#endif - diff --git a/targets/efm32/inc/app.h b/targets/efm32/inc/app.h deleted file mode 100644 index 87aed9a..0000000 --- a/targets/efm32/inc/app.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * app.h - * - * Created on: Jun 26, 2018 - * Author: conor - */ - -#ifndef SRC_APP_H_ -#define SRC_APP_H_ - -#define DEBUG_LEVEL 1 - -//#define PRINTING_USE_VCOM - -//#define USING_DEV_BOARD - -//#define ENABLE_U2F_EXTENSIONS - -#define ENABLE_U2F - -//#define DISABLE_CTAPHID_PING -//#define DISABLE_CTAPHID_WINK -//#define DISABLE_CTAPHID_CBOR - -void printing_init(); - -//#define TEST -//#define TEST_POWER - -// GPIO assignments -#define NFC_DEV_SS gpioPortF,2 - -#define LED_INIT_VALUE 0x001000 - -#endif /* SRC_APP_H_ */ diff --git a/targets/efm32/inc/crypto-config.h b/targets/efm32/inc/crypto-config.h deleted file mode 100644 index 315d36b..0000000 --- a/targets/efm32/inc/crypto-config.h +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Configuration for enabling CRYPTO hardware acceleration in all mbedtls - * modules when running on SiliconLabs devices. - * - * Copyright (C) 2016, Silicon Labs, http://www.silabs.com - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * @defgroup sl_crypto_config Silicon Labs CRYPTO Hardware Acceleration Configuration - * @addtogroup sl_crypto_config - * - * @brief - * mbed TLS configuration for Silicon Labs CRYPTO hardware acceleration - * - * @details - * mbed TLS configuration is composed of settings in this Silicon Labs specific CRYPTO hardware acceleration file located in mbedtls/configs and the mbed TLS configuration file in mbedtls/include/mbedtls/config.h. - * This configuration can be used as a starting point to evaluate hardware acceleration available on Silicon Labs devices. - * - * @{ - */ - -#ifndef MBEDTLS_CONFIG_SL_CRYPTO_ALL_ACCELERATION_H -#define MBEDTLS_CONFIG_SL_CRYPTO_ALL_ACCELERATION_H - -#include "em_device.h" - -#if !defined(NO_CRYPTO_ACCELERATION) -/** - * @name SECTION: Silicon Labs Acceleration settings - * - * This section sets Silicon Labs Acceleration settings. - * @{ - - */ - -/** - * \def MBEDTLS_AES_ALT - * - * Enable hardware acceleration for the AES block cipher - * - * Module: sl_crypto/src/crypto_aes.c for devices with CRYPTO - * sl_crypto/src/aes_aes.c for devices with AES - * - * See MBEDTLS_AES_C for more information. - */ -#define MBEDTLS_AES_ALT -#define MBEDTLS_ECP_ALT -/** - * \def MBEDTLS_ECP_INTERNAL_ALT - * \def ECP_SHORTWEIERSTRASS - * \def MBEDTLS_ECP_ADD_MIXED_ALT - * \def MBEDTLS_ECP_DOUBLE_JAC_ALT - * \def MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT - * \def MBEDTLS_ECP_NORMALIZE_JAC_ALT - * - * Enable hardware acceleration for the elliptic curve over GF(p) library. - * - * Module: sl_crypto/src/crypto_ecp.c - * Caller: library/ecp.c - * - * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_ECP_C and at least one - * MBEDTLS_ECP_DP_XXX_ENABLED and (CRYPTO_COUNT > 0) - */ -#if defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0) -#define MBEDTLS_ECP_INTERNAL_ALT -#define ECP_SHORTWEIERSTRASS -#define MBEDTLS_ECP_ADD_MIXED_ALT -#define MBEDTLS_ECP_DOUBLE_JAC_ALT -#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT -#define MBEDTLS_ECP_NORMALIZE_JAC_ALT -#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT -#endif - -/** - * \def MBEDTLS_SHA1_ALT - * - * Enable hardware acceleration for the SHA1 cryptographic hash algorithm. - * - * Module: sl_crypto/src/crypto_sha.c - * Caller: library/mbedtls_md.c - * library/ssl_cli.c - * library/ssl_srv.c - * library/ssl_tls.c - * library/x509write_crt.c - * - * Requires: MBEDTLS_SHA1_C and (CRYPTO_COUNT > 0) - * See MBEDTLS_SHA1_C for more information. - */ -#if defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0) -#define MBEDTLS_SHA1_ALT -#endif - -/** - * \def MBEDTLS_SHA256_ALT - * - * Enable hardware acceleration for the SHA-224 and SHA-256 cryptographic - * hash algorithms. - * - * Module: sl_crypto/src/crypto_sha.c - * Caller: library/entropy.c - * library/mbedtls_md.c - * library/ssl_cli.c - * library/ssl_srv.c - * library/ssl_tls.c - * - * Requires: MBEDTLS_SHA256_C and (CRYPTO_COUNT > 0) - * See MBEDTLS_SHA256_C for more information. - */ -#if defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0) -#define MBEDTLS_SHA256_ALT -#endif - -#endif /* #if !defined(NO_CRYPTO_ACCELERATION) */ - -/** - * \def MBEDTLS_TRNG_C - * - * Enable software support for the True Random Number Generator (TRNG) - * incorporated from Series 1 Configuration 2 devices (EFR32MG12, etc.) - * from Silicon Labs. - * - * TRNG is not supported by software for EFR32XG13 (SDID_89) and - * EFR32XG14 (SDID_95). - * - * Requires TRNG_PRESENT && - * !(_SILICON_LABS_GECKO_INTERNAL_SDID_89 || - * _SILICON_LABS_GECKO_INTERNAL_SDID_95) - */ -#if defined(TRNG_PRESENT) && \ - !(defined(_SILICON_LABS_GECKO_INTERNAL_SDID_89) || \ - defined(_SILICON_LABS_GECKO_INTERNAL_SDID_95)) -#define MBEDTLS_TRNG_C -#endif - -/** - * \def MBEDTLS_ENTROPY_ADC_C - * - * Enable software support for the retrieving entropy data from the ADC - * incorporated on devices from Silicon Labs. - * - * Requires ADC_PRESENT && _ADC_SINGLECTRLX_VREFSEL_VENTROPY - */ -#if defined(ADC_PRESENT) && defined(_ADC_SINGLECTRLX_VREFSEL_VENTROPY) -#define MBEDTLS_ENTROPY_ADC_C -#endif - -/** - * \def MBEDTLS_ENTROPY_ADC_INSTANCE - * - * Specify which ADC instance shall be used as entropy source. - * - * Requires MBEDTLS_ENTROPY_ADC_C - */ -#if defined(MBEDTLS_ENTROPY_ADC_C) -#define MBEDTLS_ENTROPY_ADC_INSTANCE (0) -#endif - -/** - * \def MBEDTLS_ENTROPY_RAIL_C - * - * Enable software support for the retrieving entropy data from the RAIL - * incorporated on devices from Silicon Labs. - * - * Requires _EFR_DEVICE - */ -#if defined(_EFR_DEVICE) -#define MBEDTLS_ENTROPY_RAIL_C -#endif - -/** - * \def MBEDTLS_ENTROPY_HARDWARE_ALT_RAIL - * - * Use the radio (RAIL) as default hardware entropy source. - * - * Requires MBEDTLS_ENTROPY_RAIL_C && _EFR_DEVICE && !MBEDTLS_TRNG_C - */ -#if defined(MBEDTLS_ENTROPY_RAIL_C) && \ - defined(_EFR_DEVICE) && !defined(MBEDTLS_TRNG_C) -#define MBEDTLS_ENTROPY_HARDWARE_ALT_RAIL -#endif - -/** - * \def MBEDTLS_ENTROPY_HARDWARE_ALT - * - * Integrate the provided default entropy source into the mbed - * TLS entropy infrastructure. - * - * Requires MBEDTLS_TRNG_C || MBEDTLS_ENTROPY_HARDWARE_ALT_RAIL - */ -#if defined(MBEDTLS_TRNG_C) || defined(MBEDTLS_ENTROPY_HARDWARE_ALT_RAIL) -#define MBEDTLS_ENTROPY_HARDWARE_ALT -#endif - -/* Default ECC configuration for Silicon Labs devices: */ - -/* ECC curves supported by CRYPTO hardware module: */ -#define MBEDTLS_ECP_DP_SECP192R1_ENABLED -#define MBEDTLS_ECP_DP_SECP224R1_ENABLED -#define MBEDTLS_ECP_DP_SECP256R1_ENABLED - -/* Save RAM by adjusting to our exact needs */ -#define MBEDTLS_ECP_MAX_BITS 256 -#ifndef MBEDTLS_MPI_MAX_SIZE -#define MBEDTLS_MPI_MAX_SIZE 32 // 384 bits is 48 bytes -#endif - -/* - Set MBEDTLS_ECP_WINDOW_SIZE to configure - ECC point multiplication window size, see ecp.h: - 2 = Save RAM at the expense of speed - 3 = Improve speed at the expense of RAM - 4 = Optimize speed at the expense of RAM -*/ -#define MBEDTLS_ECP_WINDOW_SIZE 3 -#define MBEDTLS_ECP_FIXED_POINT_OPTIM 0 - -/* Significant speed benefit at the expense of some ROM */ -#define MBEDTLS_ECP_NIST_OPTIM - -/* Include the default mbed TLS config file */ -#include "mbedtls/config.h" - -#undef MBEDTLS_TIMING_C -#undef MBEDTLS_FS_IO -#undef MBEDTLS_SHA512_C -#undef MBEDTLS_ENTROPY_SHA512_ACCUMULATOR - -#undef MBEDTLS_NET_C - -#define MBEDTLS_ECP_NORMALIZE_JAC_ALT -#define MBEDTLS_ECP_DEVICE_ALT -#define MBEDTLS_MPI_MODULAR_DIVISION_ALT - -#define MBEDTLS_ECP_INTERNAL_ALT -#define ECP_SHORTWEIERSTRASS -#define MBEDTLS_ECP_ADD_MIXED_ALT -#define MBEDTLS_ECP_DOUBLE_JAC_ALT -#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT -#define MBEDTLS_ECP_NORMALIZE_JAC_ALT -#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT -#define MBEDTLS_ECP_DEVICE_ADD_MIXED_ALT - -//#define MBEDTLS_ENTROPY_ALT - -//#define MBEDTLS_MPI_MUL_MPI_ALT // doesnt seem to be implemented -//#define MBEDTLS_MPI_MUL_INT_ALT // makes no difference or slightly slower - -#define MBEDTLS_NO_PLATFORM_ENTROPY -/* Hardware entropy source is not yet supported. Uncomment this macro to - provide your own implementation of an entropy collector. */ -//#define MBEDTLS_ENTROPY_HARDWARE_ALT - -/* Exclude and/or change default config here. E.g.: */ -//#undef MBEDTLS_ECP_DP_SECP384R1_ENABLED -//#undef MBEDTLS_ECP_DP_SECP521R1_ENABLED -//#undef MBEDTLS_ECP_DP_BP384R1_ENABLED -//#undef MBEDTLS_ECP_DP_BP512R1_ENABLED -//#undef MBEDTLS_SHA512_C - -#include "mbedtls/check_config.h" - -/** @} (end section sl_crypto_config) */ -/** @} (end addtogroup sl_crypto_config) */ - -#endif /* MBEDTLS_CONFIG_SL_CRYPTO_ALL_ACCELERATION_H */ diff --git a/targets/efm32/inc/nfc.h b/targets/efm32/inc/nfc.h deleted file mode 100644 index 2c2507b..0000000 --- a/targets/efm32/inc/nfc.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * nfc.h - * - * Created on: Jul 22, 2018 - * Author: conor - */ - -#ifndef INC_NFC_H_ -#define INC_NFC_H_ - -void nfc_test(); - -#endif /* INC_NFC_H_ */ diff --git a/targets/efm32/src/InitDevice.c b/targets/efm32/src/InitDevice.c deleted file mode 100644 index bd654cc..0000000 --- a/targets/efm32/src/InitDevice.c +++ /dev/null @@ -1,752 +0,0 @@ -//========================================================= -// src/InitDevice.c: generated by Hardware Configurator -// -// This file will be regenerated when saving a document. -// leave the sections inside the "$[...]" comment tags alone -// or they will be overwritten! -//========================================================= - -// USER INCLUDES -#include "InitDevice.h" - -// USER PROTOTYPES -// USER FUNCTIONS - -// $[Library includes] -#include "em_system.h" -#include "em_emu.h" -#include "em_cmu.h" -#include "em_device.h" -#include "em_chip.h" -#include "em_assert.h" -#include "em_adc.h" -#include "em_cryotimer.h" -#include "em_crypto.h" -#include "em_gpio.h" -#include "em_timer.h" -#include "em_usart.h" -// [Library includes]$ - -//============================================================================== -// enter_DefaultMode_from_RESET -//============================================================================== -extern void enter_DefaultMode_from_RESET(void) { - // $[Config Calls] - CHIP_Init(); - - EMU_enter_DefaultMode_from_RESET(); - CMU_enter_DefaultMode_from_RESET(); - ADC0_enter_DefaultMode_from_RESET(); - USART0_enter_DefaultMode_from_RESET(); - USART1_enter_DefaultMode_from_RESET(); - TIMER0_enter_DefaultMode_from_RESET(); - CRYOTIMER_enter_DefaultMode_from_RESET(); - PORTIO_enter_DefaultMode_from_RESET(); - // [Config Calls]$ - -} - -//================================================================================ -// EMU_enter_DefaultMode_from_RESET -//================================================================================ -extern void EMU_enter_DefaultMode_from_RESET(void) { - - // $[EMU Initialization] - /* External power circuit not wired for DCDC; shut down regulator */ - EMU_DCDCPowerOff(); - /* Initialize EM2/EM3 mode */ - EMU_EM23Init_TypeDef em23Init = EMU_EM23INIT_DEFAULT; - - em23Init.em23VregFullEn = 0; - - EMU_EM23Init(&em23Init); - /* Initialize EM4H/S mode */ - EMU_EM4Init_TypeDef em4Init = EMU_EM4INIT_DEFAULT; - - em4Init.retainLfrco = 0; - em4Init.retainLfxo = 0; - em4Init.retainUlfrco = 0; - em4Init.em4State = emuEM4Shutoff; - em4Init.pinRetentionMode = emuPinRetentionDisable; - - EMU_EM4Init(&em4Init); - // [EMU Initialization]$ - -} - -//================================================================================ -// LFXO_enter_DefaultMode_from_RESET -//================================================================================ -extern void LFXO_enter_DefaultMode_from_RESET(void) { - -} - -//================================================================================ -// CMU_enter_DefaultMode_from_RESET -//================================================================================ -extern void CMU_enter_DefaultMode_from_RESET(void) { - - // $[High Frequency Clock Setup] - /* Initializing HFXO */ - CMU_HFXOInit_TypeDef hfxoInit = CMU_HFXOINIT_DEFAULT; - - CMU_HFXOInit(&hfxoInit); - - /* Setting system HFRCO frequency */ - CMU_HFRCOFreqSet (cmuHFRCOFreq_38M0Hz); - - /* Using HFRCO as high frequency clock, HFCLK */ - CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFRCO); - // [High Frequency Clock Setup]$ - - // $[LE clocks enable] - /* Enable ULFRCO oscillator, and wait for it to be stable */ - CMU_OscillatorEnable(cmuOsc_ULFRCO, true, true); - - // [LE clocks enable]$ - - // $[LFACLK Setup] - /* LFACLK is disabled */ - // [LFACLK Setup]$ - // $[LFBCLK Setup] - /* LFBCLK is disabled */ - // [LFBCLK Setup]$ - // $[LFECLK Setup] - /* LFECLK is disabled */ - // [LFECLK Setup]$ - // $[Peripheral Clock enables] - /* Enable clock for HF peripherals */ - CMU_ClockEnable(cmuClock_HFPER, true); - - /* Enable clock for ADC0 */ - CMU_ClockEnable(cmuClock_ADC0, true); - - /* Enable clock for CRYOTIMER */ - CMU_ClockEnable(cmuClock_CRYOTIMER, true); - - /* Enable clock for TIMER0 */ - CMU_ClockEnable(cmuClock_TIMER0, true); - - /* Enable clock for USART0 */ - CMU_ClockEnable(cmuClock_USART0, true); - - /* Enable clock for USART1 */ - CMU_ClockEnable(cmuClock_USART1, true); - - /* Enable clock for GPIO by default */ - CMU_ClockEnable(cmuClock_GPIO, true); - - // [Peripheral Clock enables]$ - - // $[Clock output] - /* Disable CLKOUT0 output */ - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_CLKOUTSEL0_MASK) - | CMU_CTRL_CLKOUTSEL0_DISABLED; - /* Disable CLKOUT1 output */ - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_CLKOUTSEL1_MASK) - | CMU_CTRL_CLKOUTSEL1_DISABLED; - - // [Clock output]$ - - // $[CMU_IO] - /* Disable CLKOUT0 pin */ - CMU->ROUTEPEN &= ~CMU_ROUTEPEN_CLKOUT0PEN; - - /* Disable CLKOUT1 pin */ - CMU->ROUTEPEN &= ~CMU_ROUTEPEN_CLKOUT1PEN; - - // [CMU_IO]$ - -} - -//================================================================================ -// ADC0_enter_DefaultMode_from_RESET -//================================================================================ -extern void ADC0_enter_DefaultMode_from_RESET(void) { - - // $[ADC0_Init] - ADC_Init_TypeDef ADC0_init = ADC_INIT_DEFAULT; - - ADC0_init.ovsRateSel = adcOvsRateSel2; - ADC0_init.warmUpMode = adcWarmupNormal; - ADC0_init.timebase = ADC_TimebaseCalc(0); - ADC0_init.prescale = ADC_PrescaleCalc(7000000, 0); - ADC0_init.tailgate = 0; - ADC0_init.em2ClockConfig = adcEm2Disabled; - - ADC_Init(ADC0, &ADC0_init); - // [ADC0_Init]$ - - // $[ADC0_InputConfiguration] - // [ADC0_InputConfiguration]$ - -} - -//================================================================================ -// ACMP0_enter_DefaultMode_from_RESET -//================================================================================ -extern void ACMP0_enter_DefaultMode_from_RESET(void) { - - // $[ACMP0_Init] - // [ACMP0_Init]$ - - // $[ACMP0_IO] - // [ACMP0_IO]$ - -} - -//================================================================================ -// ACMP1_enter_DefaultMode_from_RESET -//================================================================================ -extern void ACMP1_enter_DefaultMode_from_RESET(void) { - - // $[ACMP1_Init] - // [ACMP1_Init]$ - - // $[ACMP1_IO] - // [ACMP1_IO]$ - -} - -//================================================================================ -// IDAC0_enter_DefaultMode_from_RESET -//================================================================================ -extern void IDAC0_enter_DefaultMode_from_RESET(void) { - -} - -//================================================================================ -// RTCC_enter_DefaultMode_from_RESET -//================================================================================ -extern void RTCC_enter_DefaultMode_from_RESET(void) { - - // $[Compare/Capture Channel 0 init] - // [Compare/Capture Channel 0 init]$ - - // $[Compare/Capture Channel 1 init] - // [Compare/Capture Channel 1 init]$ - - // $[Compare/Capture Channel 2 init] - // [Compare/Capture Channel 2 init]$ - - // $[RTCC init] - // [RTCC init]$ - -} - -//================================================================================ -// USART0_enter_DefaultMode_from_RESET -//================================================================================ -extern void USART0_enter_DefaultMode_from_RESET(void) { - - // $[USART_InitAsync] - USART_InitAsync_TypeDef initasync = USART_INITASYNC_DEFAULT; - - initasync.enable = usartDisable; - initasync.baudrate = 115200; - initasync.databits = usartDatabits8; - initasync.parity = usartNoParity; - initasync.stopbits = usartStopbits1; - initasync.oversampling = usartOVS16; -#if defined( USART_INPUT_RXPRS ) && defined( USART_CTRL_MVDIS ) - initasync.mvdis = 0; - initasync.prsRxEnable = 0; - initasync.prsRxCh = 0; -#endif - - USART_InitAsync(USART0, &initasync); - // [USART_InitAsync]$ - - // $[USART_InitSync] - // [USART_InitSync]$ - - // $[USART_InitPrsTrigger] - USART_PrsTriggerInit_TypeDef initprs = USART_INITPRSTRIGGER_DEFAULT; - - initprs.rxTriggerEnable = 0; - initprs.txTriggerEnable = 0; - initprs.prsTriggerChannel = usartPrsTriggerCh0; - - USART_InitPrsTrigger(USART0, &initprs); - // [USART_InitPrsTrigger]$ - - // $[USART_InitIO] - /* Disable CLK pin */ - USART0->ROUTELOC0 = (USART0->ROUTELOC0 & (~_USART_ROUTELOC0_CLKLOC_MASK)) - | USART_ROUTELOC0_CLKLOC_LOC4; - USART0->ROUTEPEN = USART0->ROUTEPEN & (~USART_ROUTEPEN_CLKPEN); - - /* Disable CS pin */ - USART0->ROUTELOC0 = (USART0->ROUTELOC0 & (~_USART_ROUTELOC0_CSLOC_MASK)) - | USART_ROUTELOC0_CSLOC_LOC3; - USART0->ROUTEPEN = USART0->ROUTEPEN & (~USART_ROUTEPEN_CSPEN); - - /* Disable CTS pin */ - USART0->ROUTELOC1 = (USART0->ROUTELOC1 & (~_USART_ROUTELOC1_CTSLOC_MASK)) - | USART_ROUTELOC1_CTSLOC_LOC2; - USART0->ROUTEPEN = USART0->ROUTEPEN & (~USART_ROUTEPEN_CTSPEN); - - /* Disable RTS pin */ - USART0->ROUTELOC1 = (USART0->ROUTELOC1 & (~_USART_ROUTELOC1_RTSLOC_MASK)) - | USART_ROUTELOC1_RTSLOC_LOC1; - USART0->ROUTEPEN = USART0->ROUTEPEN & (~USART_ROUTEPEN_RTSPEN); - - /* Set up RX pin */ - USART0->ROUTELOC0 = (USART0->ROUTELOC0 & (~_USART_ROUTELOC0_RXLOC_MASK)) - | USART_ROUTELOC0_RXLOC_LOC0; - USART0->ROUTEPEN = USART0->ROUTEPEN | USART_ROUTEPEN_RXPEN; - - /* Set up TX pin */ - USART0->ROUTELOC0 = (USART0->ROUTELOC0 & (~_USART_ROUTELOC0_TXLOC_MASK)) - | USART_ROUTELOC0_TXLOC_LOC20; - USART0->ROUTEPEN = USART0->ROUTEPEN | USART_ROUTEPEN_TXPEN; - - // [USART_InitIO]$ - - // $[USART_Misc] - /* Disable CTS */ - USART0->CTRLX = USART0->CTRLX & (~USART_CTRLX_CTSEN); - /* Set CTS active low */ - USART0->CTRLX = USART0->CTRLX & (~USART_CTRLX_CTSINV); - /* Set RTS active low */ - USART0->CTRLX = USART0->CTRLX & (~USART_CTRLX_RTSINV); - /* Set CS active low */ - USART0->CTRL = USART0->CTRL & (~USART_CTRL_CSINV); - /* Set TX active high */ - USART0->CTRL = USART0->CTRL & (~USART_CTRL_TXINV); - /* Set RX active high */ - USART0->CTRL = USART0->CTRL & (~USART_CTRL_RXINV); - // [USART_Misc]$ - - // $[USART_Enable] - - /* Enable USART if opted by user */ - USART_Enable(USART0, usartEnable); - // [USART_Enable]$ - -} - -//================================================================================ -// USART1_enter_DefaultMode_from_RESET -//================================================================================ -extern void USART1_enter_DefaultMode_from_RESET(void) { - - // $[USART_InitAsync] - // [USART_InitAsync]$ - - // $[USART_InitSync] - USART_InitSync_TypeDef initsync = USART_INITSYNC_DEFAULT; - - initsync.enable = usartDisable; - initsync.baudrate = 130000; - initsync.databits = usartDatabits8; - initsync.master = 1; - initsync.msbf = 1; - initsync.clockMode = usartClockMode0; -#if defined( USART_INPUT_RXPRS ) && defined( USART_TRIGCTRL_AUTOTXTEN ) - initsync.prsRxEnable = 0; - initsync.prsRxCh = 0; - initsync.autoTx = 0; -#endif - - USART_InitSync(USART1, &initsync); - // [USART_InitSync]$ - - // $[USART_InitPrsTrigger] - USART_PrsTriggerInit_TypeDef initprs = USART_INITPRSTRIGGER_DEFAULT; - - initprs.rxTriggerEnable = 0; - initprs.txTriggerEnable = 0; - initprs.prsTriggerChannel = usartPrsTriggerCh0; - - USART_InitPrsTrigger(USART1, &initprs); - // [USART_InitPrsTrigger]$ - - // $[USART_InitIO] - /* Set up CLK pin */ - USART1->ROUTELOC0 = (USART1->ROUTELOC0 & (~_USART_ROUTELOC0_CLKLOC_MASK)) - | USART_ROUTELOC0_CLKLOC_LOC4; - USART1->ROUTEPEN = USART1->ROUTEPEN | USART_ROUTEPEN_CLKPEN; - - /* Disable CS pin */ - USART1->ROUTELOC0 = (USART1->ROUTELOC0 & (~_USART_ROUTELOC0_CSLOC_MASK)) - | USART_ROUTELOC0_CSLOC_LOC3; - USART1->ROUTEPEN = USART1->ROUTEPEN & (~USART_ROUTEPEN_CSPEN); - - /* Disable CTS pin */ - USART1->ROUTELOC1 = (USART1->ROUTELOC1 & (~_USART_ROUTELOC1_CTSLOC_MASK)) - | USART_ROUTELOC1_CTSLOC_LOC2; - USART1->ROUTEPEN = USART1->ROUTEPEN & (~USART_ROUTEPEN_CTSPEN); - - /* Disable RTS pin */ - USART1->ROUTELOC1 = (USART1->ROUTELOC1 & (~_USART_ROUTELOC1_RTSLOC_MASK)) - | USART_ROUTELOC1_RTSLOC_LOC1; - USART1->ROUTEPEN = USART1->ROUTEPEN & (~USART_ROUTEPEN_RTSPEN); - - /* Set up RX pin */ - USART1->ROUTELOC0 = (USART1->ROUTELOC0 & (~_USART_ROUTELOC0_RXLOC_MASK)) - | USART_ROUTELOC0_RXLOC_LOC6; - USART1->ROUTEPEN = USART1->ROUTEPEN | USART_ROUTEPEN_RXPEN; - - /* Set up TX pin */ - USART1->ROUTELOC0 = (USART1->ROUTELOC0 & (~_USART_ROUTELOC0_TXLOC_MASK)) - | USART_ROUTELOC0_TXLOC_LOC8; - USART1->ROUTEPEN = USART1->ROUTEPEN | USART_ROUTEPEN_TXPEN; - - // [USART_InitIO]$ - - // $[USART_Misc] - /* Disable CTS */ - USART1->CTRLX = USART1->CTRLX & (~USART_CTRLX_CTSEN); - /* Set CTS active low */ - USART1->CTRLX = USART1->CTRLX & (~USART_CTRLX_CTSINV); - /* Set RTS active low */ - USART1->CTRLX = USART1->CTRLX & (~USART_CTRLX_RTSINV); - /* Set CS active low */ - USART1->CTRL = USART1->CTRL & (~USART_CTRL_CSINV); - /* Set TX active high */ - USART1->CTRL = USART1->CTRL & (~USART_CTRL_TXINV); - /* Set RX active high */ - USART1->CTRL = USART1->CTRL & (~USART_CTRL_RXINV); - // [USART_Misc]$ - - // $[USART_Enable] - - /* Enable USART if opted by user */ - USART_Enable(USART1, usartEnable); - // [USART_Enable]$ - -} - -//================================================================================ -// LEUART0_enter_DefaultMode_from_RESET -//================================================================================ -extern void LEUART0_enter_DefaultMode_from_RESET(void) { - - // $[LEUART0 initialization] - // [LEUART0 initialization]$ - -} - -//================================================================================ -// WDOG0_enter_DefaultMode_from_RESET -//================================================================================ -extern void WDOG0_enter_DefaultMode_from_RESET(void) { - - // $[WDOG Initialization] - // [WDOG Initialization]$ - -} - -//================================================================================ -// I2C0_enter_DefaultMode_from_RESET -//================================================================================ -extern void I2C0_enter_DefaultMode_from_RESET(void) { - - // $[I2C0 I/O setup] - // [I2C0 I/O setup]$ - - // $[I2C0 initialization] - // [I2C0 initialization]$ - -} - -//================================================================================ -// GPCRC_enter_DefaultMode_from_RESET -//================================================================================ -extern void GPCRC_enter_DefaultMode_from_RESET(void) { - -} - -//================================================================================ -// LDMA_enter_DefaultMode_from_RESET -//================================================================================ -extern void LDMA_enter_DefaultMode_from_RESET(void) { - -} - -//================================================================================ -// TIMER0_enter_DefaultMode_from_RESET -//================================================================================ -extern void TIMER0_enter_DefaultMode_from_RESET(void) { - - // $[TIMER0 I/O setup] - /* Set up CC0 */ - TIMER0->ROUTELOC0 = (TIMER0->ROUTELOC0 & (~_TIMER_ROUTELOC0_CC0LOC_MASK)) - | TIMER_ROUTELOC0_CC0LOC_LOC18; - TIMER0->ROUTEPEN = TIMER0->ROUTEPEN | TIMER_ROUTEPEN_CC0PEN; - /* Set up CC1 */ - TIMER0->ROUTELOC0 = (TIMER0->ROUTELOC0 & (~_TIMER_ROUTELOC0_CC1LOC_MASK)) - | TIMER_ROUTELOC0_CC1LOC_LOC16; - TIMER0->ROUTEPEN = TIMER0->ROUTEPEN | TIMER_ROUTEPEN_CC1PEN; - /* Set up CC2 */ - TIMER0->ROUTELOC0 = (TIMER0->ROUTELOC0 & (~_TIMER_ROUTELOC0_CC2LOC_MASK)) - | TIMER_ROUTELOC0_CC2LOC_LOC20; - TIMER0->ROUTEPEN = TIMER0->ROUTEPEN | TIMER_ROUTEPEN_CC2PEN; - /* Set up CDTI0 */ - TIMER0->ROUTELOC2 = (TIMER0->ROUTELOC2 & (~_TIMER_ROUTELOC2_CDTI0LOC_MASK)) - | TIMER_ROUTELOC2_CDTI0LOC_LOC3; - TIMER0->ROUTEPEN = TIMER0->ROUTEPEN & (~TIMER_ROUTEPEN_CDTI0PEN); - /* Set up CDTI1 */ - TIMER0->ROUTELOC2 = (TIMER0->ROUTELOC2 & (~_TIMER_ROUTELOC2_CDTI1LOC_MASK)) - | TIMER_ROUTELOC2_CDTI1LOC_LOC2; - TIMER0->ROUTEPEN = TIMER0->ROUTEPEN & (~TIMER_ROUTEPEN_CDTI1PEN); - /* Set up CDTI2 */ - TIMER0->ROUTELOC2 = (TIMER0->ROUTELOC2 & (~_TIMER_ROUTELOC2_CDTI2LOC_MASK)) - | TIMER_ROUTELOC2_CDTI2LOC_LOC1; - TIMER0->ROUTEPEN = TIMER0->ROUTEPEN & (~TIMER_ROUTEPEN_CDTI2PEN); - // [TIMER0 I/O setup]$ - - // $[TIMER0 initialization] - TIMER_Init_TypeDef init = TIMER_INIT_DEFAULT; - - init.enable = 1; - init.debugRun = 0; - init.dmaClrAct = 0; - init.sync = 0; - init.clkSel = timerClkSelHFPerClk; - init.prescale = timerPrescale512; - init.fallAction = timerInputActionNone; - init.riseAction = timerInputActionNone; - init.mode = timerModeUp; - init.quadModeX4 = 0; - init.oneShot = 0; - init.count2x = 0; - init.ati = 0; - TIMER_Init(TIMER0, &init); - // [TIMER0 initialization]$ - - // $[TIMER0 CC0 init] - TIMER_InitCC_TypeDef initCC0 = TIMER_INITCC_DEFAULT; - - initCC0.prsInput = false; - initCC0.prsSel = timerPRSSELCh0; - initCC0.edge = timerEdgeRising; - initCC0.mode = timerCCModePWM; - initCC0.eventCtrl = timerEventEveryEdge; - initCC0.filter = 0; - initCC0.cofoa = timerOutputActionNone; - initCC0.cufoa = timerOutputActionNone; - initCC0.cmoa = timerOutputActionToggle; - initCC0.coist = 0; - initCC0.outInvert = 0; - TIMER_InitCC(TIMER0, 0, &initCC0); - // [TIMER0 CC0 init]$ - - // $[TIMER0 CC1 init] - TIMER_InitCC_TypeDef initCC1 = TIMER_INITCC_DEFAULT; - - initCC1.prsInput = false; - initCC1.prsSel = timerPRSSELCh0; - initCC1.edge = timerEdgeRising; - initCC1.mode = timerCCModePWM; - initCC1.eventCtrl = timerEventEveryEdge; - initCC1.filter = 0; - initCC1.cofoa = timerOutputActionNone; - initCC1.cufoa = timerOutputActionNone; - initCC1.cmoa = timerOutputActionToggle; - initCC1.coist = 0; - initCC1.outInvert = 0; - TIMER_InitCC(TIMER0, 1, &initCC1); - // [TIMER0 CC1 init]$ - - // $[TIMER0 CC2 init] - TIMER_InitCC_TypeDef initCC2 = TIMER_INITCC_DEFAULT; - - initCC2.prsInput = false; - initCC2.prsSel = timerPRSSELCh0; - initCC2.edge = timerEdgeRising; - initCC2.mode = timerCCModePWM; - initCC2.eventCtrl = timerEventEveryEdge; - initCC2.filter = 0; - initCC2.cofoa = timerOutputActionNone; - initCC2.cufoa = timerOutputActionNone; - initCC2.cmoa = timerOutputActionToggle; - initCC2.coist = 0; - initCC2.outInvert = 0; - TIMER_InitCC(TIMER0, 2, &initCC2); - // [TIMER0 CC2 init]$ - - // $[TIMER0 DTI init] - TIMER_InitDTI_TypeDef initDTI = TIMER_INITDTI_DEFAULT; - - initDTI.enable = 0; - initDTI.activeLowOut = 0; - initDTI.invertComplementaryOut = 0; - initDTI.autoRestart = 0; - initDTI.enablePrsSource = 0; - initDTI.prsSel = timerPRSSELCh0; - initDTI.prescale = timerPrescale1; - initDTI.riseTime = 1; - initDTI.fallTime = 1; - initDTI.enableFaultSourceCoreLockup = 1; - initDTI.enableFaultSourceDebugger = 1; - initDTI.faultSourcePrsSel0 = 0; - initDTI.faultSourcePrsSel0 = timerPRSSELCh0; - initDTI.faultSourcePrsSel1 = 0; - initDTI.faultSourcePrsSel1 = timerPRSSELCh0; - initDTI.faultAction = timerDtiFaultActionInactive; - initDTI.outputsEnableMask = 0 | TIMER_DTOGEN_DTOGCC0EN - | TIMER_DTOGEN_DTOGCC1EN | TIMER_DTOGEN_DTOGCC2EN; - TIMER_InitDTI(TIMER0, &initDTI); - // [TIMER0 DTI init]$ - -} - -//================================================================================ -// TIMER1_enter_DefaultMode_from_RESET -//================================================================================ -extern void TIMER1_enter_DefaultMode_from_RESET(void) { - - // $[TIMER1 I/O setup] - // [TIMER1 I/O setup]$ - - // $[TIMER1 initialization] - // [TIMER1 initialization]$ - - // $[TIMER1 CC0 init] - // [TIMER1 CC0 init]$ - - // $[TIMER1 CC1 init] - // [TIMER1 CC1 init]$ - - // $[TIMER1 CC2 init] - // [TIMER1 CC2 init]$ - - // $[TIMER1 CC3 init] - // [TIMER1 CC3 init]$ - -} - -//================================================================================ -// LETIMER0_enter_DefaultMode_from_RESET -//================================================================================ -extern void LETIMER0_enter_DefaultMode_from_RESET(void) { - - // $[LETIMER0 Compare Values] - // [LETIMER0 Compare Values]$ - - // $[LETIMER0 Repeat Values] - // [LETIMER0 Repeat Values]$ - - // $[LETIMER0 Initialization] - // [LETIMER0 Initialization]$ - - // $[LETIMER0 PRS Input Triggers] - // [LETIMER0 PRS Input Triggers]$ - - // $[LETIMER0 I/O setup] - // [LETIMER0 I/O setup]$ - -} - -//================================================================================ -// CRYOTIMER_enter_DefaultMode_from_RESET -//================================================================================ -extern void CRYOTIMER_enter_DefaultMode_from_RESET(void) { - - // $[CRYOTIMER_Init] - CRYOTIMER_Init_TypeDef cryoInit = CRYOTIMER_INIT_DEFAULT; - - /* General settings */ - cryoInit.enable = 1; - cryoInit.debugRun = 0; - cryoInit.em4Wakeup = 0; - - /* Clocking settings */ - /* With a frequency of 1000Hz on ULFRCO, this will result in a 1.00 ms timeout */ - cryoInit.osc = cryotimerOscULFRCO; - cryoInit.presc = cryotimerPresc_1; - cryoInit.period = cryotimerPeriod_1; - CRYOTIMER_Init(&cryoInit); - // [CRYOTIMER_Init]$ - -} - -//================================================================================ -// PCNT0_enter_DefaultMode_from_RESET -//================================================================================ -extern void PCNT0_enter_DefaultMode_from_RESET(void) { - - // $[PCNT0 I/O setup] - // [PCNT0 I/O setup]$ - - // $[PCNT0 initialization] - // [PCNT0 initialization]$ - -} - -//================================================================================ -// PRS_enter_DefaultMode_from_RESET -//================================================================================ -extern void PRS_enter_DefaultMode_from_RESET(void) { - - // $[PRS initialization] - // [PRS initialization]$ - -} - -//================================================================================ -// PORTIO_enter_DefaultMode_from_RESET -//================================================================================ -extern void PORTIO_enter_DefaultMode_from_RESET(void) { - - // $[Port A Configuration] - - /* Pin PA0 is configured to Input enabled */ - GPIO_PinModeSet(gpioPortA, 0, gpioModeInput, 0); - - /* Pin PA1 is configured to Input enabled */ - GPIO_PinModeSet(gpioPortA, 1, gpioModeInput, 0); - // [Port A Configuration]$ - - // $[Port B Configuration] - - /* Pin PB11 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortB, 11, gpioModePushPull, 1); - - /* Pin PB12 is configured to Input enabled with pull-up */ - GPIO_PinModeSet(gpioPortB, 12, gpioModeInputPull, 1); - - /* Pin PB13 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortB, 13, gpioModePushPull, 1); - - /* Pin PB15 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1); - // [Port B Configuration]$ - - // $[Port C Configuration] - // [Port C Configuration]$ - - // $[Port D Configuration] - - /* Pin PD9 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortD, 9, gpioModePushPull, 1); - - /* Pin PD10 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortD, 10, gpioModePushPull, 1); - - /* Pin PD11 is configured to Input enabled with pull-up */ - GPIO_PinModeSet(gpioPortD, 11, gpioModeInputPull, 1); - - /* Pin PD12 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortD, 12, gpioModePushPull, 1); - - /* Pin PD13 is configured to Input enabled with pull-up */ - GPIO_PinModeSet(gpioPortD, 13, gpioModeInputPull, 1); - - /* Pin PD14 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortD, 14, gpioModePushPull, 1); - - /* Pin PD15 is configured to Push-pull */ - GPIO_PinModeSet(gpioPortD, 15, gpioModePushPull, 1); - // [Port D Configuration]$ - - // $[Port E Configuration] - // [Port E Configuration]$ - - // $[Port F Configuration] - // [Port F Configuration]$ - -} - diff --git a/targets/efm32/src/crypto.c b/targets/efm32/src/crypto.c deleted file mode 100644 index 1e88b38..0000000 --- a/targets/efm32/src/crypto.c +++ /dev/null @@ -1,689 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * Wrapper for crypto implementation on device - * - * */ -#include -#include -#include - -#include "em_adc.h" - -#include "util.h" -#include "crypto.h" -#include "device.h" - - -#include "sha256.h" -#include "uECC.h" -#include "aes.h" -#include "ctap.h" -#include "log.h" - -#include MBEDTLS_CONFIG_FILE -#include "sha256_alt.h" -#include "mbedtls/ctr_drbg.h" -#include "mbedtls/ecdsa.h" - -const uint8_t attestation_cert_der[]; -const uint16_t attestation_cert_der_size; -const uint8_t attestation_key[]; -const uint16_t attestation_key_size; - - -static mbedtls_sha256_context embed_sha256_ctx; -static mbedtls_ctr_drbg_context ctr_drbg; - -static const struct uECC_Curve_t * _es256_curve = NULL; -static const uint8_t * _signing_key = NULL; -static int _key_len = 0; - -// Secrets for testing only -static uint8_t master_secret[32] = "\x00\x11\x22\x33\x44\x55\x66\x77\x88\x99\xaa\xbb\xcc\xdd\xee\xff" - "\xff\xee\xdd\xcc\xbb\xaa\x99\x88\x77\x66\x55\x44\x33\x22\x11\x00"; - -static uint8_t transport_secret[32] = "\x10\x01\x22\x33\x44\x55\x66\x77\x87\x90\x0a\xbb\x3c\xd8\xee\xff" - "\xff\xee\x8d\x1c\x3b\xfa\x99\x88\x77\x86\x55\x44\xd3\xff\x33\x00"; - - - -void crypto_sha256_init() -{ - mbedtls_sha256_init( &embed_sha256_ctx ); - mbedtls_sha256_starts(&embed_sha256_ctx,0); -// sha256_init(&sha256_ctx); -} - -void crypto_reset_master_secret() -{ - ctap_generate_rng(master_secret, 32); -} - - -void crypto_sha256_update(uint8_t * data, size_t len) -{ - mbedtls_sha256_update(&embed_sha256_ctx,data,len); -// sha256_update(&sha256_ctx, data, len); -} - -void crypto_sha256_update_secret() -{ - mbedtls_sha256_update(&embed_sha256_ctx,master_secret,32); -// sha256_update(&sha256_ctx, master_secret, 32); -} - -void crypto_sha256_final(uint8_t * hash) -{ - mbedtls_sha256_finish( &embed_sha256_ctx, hash ); -// sha256_final(&sha256_ctx, hash); -} - -void crypto_sha256_hmac_init(uint8_t * key, uint32_t klen, uint8_t * hmac) -{ - uint8_t buf[64]; - int i; - memset(buf, 0, sizeof(buf)); - - if (key == CRYPTO_MASTER_KEY) - { - key = master_secret; - klen = sizeof(master_secret); - } - - if(klen > 64) - { - printf2(TAG_ERR,"Error, key size must be <= 64\n"); - exit(1); - } - - memmove(buf, key, klen); - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = buf[i] ^ 0x36; - } - - crypto_sha256_init(); - crypto_sha256_update(buf, 64); -} - -void crypto_sha256_hmac_final(uint8_t * key, uint32_t klen, uint8_t * hmac) -{ - uint8_t buf[64]; - int i; - crypto_sha256_final(hmac); - memset(buf, 0, sizeof(buf)); - if (key == CRYPTO_MASTER_KEY) - { - key = master_secret; - klen = sizeof(master_secret); - } - - - if(klen > 64) - { - printf2(TAG_ERR,"Error, key size must be <= 64\n"); - exit(1); - } - memmove(buf, key, klen); - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = buf[i] ^ 0x5c; - } - - crypto_sha256_init(); - crypto_sha256_update(buf, 64); - crypto_sha256_update(hmac, 32); - crypto_sha256_final(hmac); -} - - - - -uint8_t adc_rng(void) -{ - int i; - uint8_t random = 0; - - /* Random number generation */ - for (i=0; i<3; i++) - { - ADC_Start(ADC0, adcStartSingle); - while ((ADC0->IF & ADC_IF_SINGLE) == 0); - random |= ((ADC_DataSingleGet(ADC0) & 0x07) << (i * 3)); - } - - return random; -} - -// Generate @num bytes of random numbers to @dest -// return 1 if success, error otherwise -int ctap_generate_rng(uint8_t * dst, size_t num) -{ - return mbedtls_ctr_drbg_random(&ctr_drbg,dst,num) == 0; -} - -int adc_entropy_func( void *data, unsigned char *output, size_t len ) -{ - while(len--) - *output++ = adc_rng(); - return 0; -} - -void crypto_ecc256_init() -{ - uECC_set_rng((uECC_RNG_Function)ctap_generate_rng); - _es256_curve = uECC_secp256r1(); - mbedtls_ctr_drbg_init(&ctr_drbg); - - if ( mbedtls_ctr_drbg_seed(&ctr_drbg, adc_entropy_func, NULL, - master_secret,32 ) != 0 ) { - printf2(TAG_ERR, "mbedtls_ctr_drbg_seed failed\n"); - exit(1); - } - -} - - -void crypto_load_external_key(uint8_t * key, int len) -{ - _signing_key = key; - _key_len = len; -} -void crypto_ecc256_load_attestation_key() -{ - _signing_key = attestation_key; - _key_len = 32; -} - - - -/** - * \brief Import a point from unsigned binary data - * - * \param grp Group to which the point should belong - * \param P Point to import - * \param buf Input buffer - * \param ilen Actual length of input - * - * \return 0 if successful, - * MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid, - * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed, - * MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format - * is not implemented. - * - * \note This function does NOT check that the point actually - * belongs to the given group, see mbedtls_ecp_check_pubkey() for - * that. - */ -//int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P, -// const unsigned char *buf, size_t ilen ); - -/** - * \brief Import X from unsigned binary data, big endian - * - * \param X Destination MPI - * \param buf Input buffer - * \param buflen Input buffer size - * - * \return 0 if successful, - * MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed - */ -//int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf, size_t buflen ); - -/* - * Set context from an mbedtls_ecp_keypair - */ -//int mbedtls_ecdsa_from_keypair( mbedtls_ecdsa_context *ctx, const mbedtls_ecp_keypair *key ); - - - -void crypto_ecc256_sign(uint8_t * data, int len, uint8_t * sig) -{ - mbedtls_ecp_group grp; /*!< Elliptic curve and base point */ - mbedtls_mpi d; /*!< our secret value */ -//#define CRYPTO_ENABLE CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_CRYPTO; \ -// CRYPTO->IFC = _CRYPTO_IFC_MASK; \ -// CRYPTO->CMD = CRYPTO_CMD_SEQSTOP; \ -// CRYPTO->CTRL = CRYPTO_CTRL_DMA0RSEL_DDATA0; \ -// CRYPTO->SEQCTRL = 0; \ -// CRYPTO->SEQCTRLB = 0 -// -//#define CRYPTO_DISABLE \ -// CRYPTO->IEN = 0; \ -// CMU->HFBUSCLKEN0 &= ~CMU_HFBUSCLKEN0_CRYPTO; -// CRYPTO_DISABLE; -// CRYPTO_ENABLE; -// mbedtls_ecp_group_init( &grp ); -// mbedtls_mpi_init( &d ); -// mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_DP_SECP256R1); -// mbedtls_mpi_read_binary(&d, _signing_key, 32); -// -// mbedtls_mpi r,s; -// mbedtls_mpi_init(&r); -// mbedtls_mpi_init(&s); -// -// printf("signing..\n"); -// dump_hex(data,len); -// mbedtls_ecdsa_sign_det( &grp, &r, &s, &d, -// data, 32, MBEDTLS_MD_SHA256 );// Issue: this will freeze on 13th iteration.. -// printf("signed\n"); -// -// mbedtls_mpi_write_binary(&r,sig,32); -// mbedtls_mpi_write_binary(&s,sig+32,32); - - if ( uECC_sign(_signing_key, data, len, sig, _es256_curve) == 0) - { - printf2(TAG_ERR,"error, uECC failed\n"); - exit(1); - } - -} - -#if 1 -void crypto_ecdsa_sign(uint8_t * data, int len, uint8_t * sig, int MBEDTLS_ECP_ID) -{ - - const struct uECC_Curve_t * curve = NULL; - - switch(MBEDTLS_ECP_ID) - { - case MBEDTLS_ECP_DP_SECP192R1: - curve = uECC_secp192r1(); - if (_key_len != 24) goto fail; - break; - case MBEDTLS_ECP_DP_SECP224R1: - curve = uECC_secp224r1(); - if (_key_len != 28) goto fail; - break; - case MBEDTLS_ECP_DP_SECP256R1: - curve = uECC_secp256r1(); - if (_key_len != 32) goto fail; - break; - case MBEDTLS_ECP_DP_SECP256K1: - curve = uECC_secp256k1(); - if (_key_len != 32) goto fail; - break; - default: - printf2(TAG_ERR,"error, invalid ECDSA alg specifier\n"); - exit(1); - } - - if ( uECC_sign(_signing_key, data, len, sig, curve) == 0) - { - printf2(TAG_ERR,"error, uECC failed\n"); - exit(1); - } - return; - -fail: - printf2(TAG_ERR,"error, invalid key length: %d\n", _key_len); - exit(1); -} - -#else -void crypto_ecdsa_sign(uint8_t * data, int len, uint8_t * sig, int MBEDTLS_ECP_ID) -{ - mbedtls_ecp_group grp; /*!< Elliptic curve and base point */ - mbedtls_mpi d; /*!< our secret value */ - - mbedtls_ecp_group_init( &grp ); - mbedtls_mpi_init( &d ); - mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_ID); - mbedtls_mpi_read_binary(&d, _signing_key, 32); - - mbedtls_mpi r,s; - mbedtls_mpi_init(&r); - mbedtls_mpi_init(&s); - - printf("signing..\n"); - dump_hex(data,len); - mbedtls_ecdsa_sign_det( &grp, &r, &s, &d, - data, 32, MBEDTLS_MD_SHA256 );// Issue: this will freeze on 13th iteration.. - printf("signed\n"); - - mbedtls_mpi_write_binary(&r,sig,32); - mbedtls_mpi_write_binary(&s,sig+32,32); -} - - - -#endif -/* - * Generate a keypair with configurable base point - */ -// mbedtls_ecp_gen_keypair( &ctx->grp, &ctx->d, &ctx->Q, f_rng, p_rng ) -// mbedtls_ecp_gen_keypair_base( grp, &grp->G, d, Q, f_rng, p_rng ) -/* - * Curve types: internal for now, might be exposed later - */ -typedef enum -{ - ECP_TYPE_NONE = 0, - ECP_TYPE_SHORT_WEIERSTRASS, /* y^2 = x^3 + a x + b */ - ECP_TYPE_MONTGOMERY, /* y^2 = x^3 + a x^2 + x */ -} ecp_curve_type; -/* - * Get the type of a curve - */ -static inline ecp_curve_type ecp_get_type( const mbedtls_ecp_group *grp ) -{ - if( grp->G.X.p == NULL ) - return( ECP_TYPE_NONE ); - - if( grp->G.Y.p == NULL ) - return( ECP_TYPE_MONTGOMERY ); - else - return( ECP_TYPE_SHORT_WEIERSTRASS ); -} -static int mbedtls_ecp_gen_privkey( mbedtls_ecp_group *grp, - const mbedtls_ecp_point *G, - mbedtls_mpi *d, mbedtls_ecp_point *Q, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) -{ - int ret; - size_t n_size = ( grp->nbits + 7 ) / 8; - -#if defined(ECP_MONTGOMERY) - if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY ) - { - /* [M225] page 5 */ - size_t b; - - MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( d, n_size, f_rng, p_rng ) ); - - /* Make sure the most significant bit is nbits */ - b = mbedtls_mpi_bitlen( d ) - 1; /* mbedtls_mpi_bitlen is one-based */ - if( b > grp->nbits ) - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, b - grp->nbits ) ); - else - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, grp->nbits, 1 ) ); - - /* Make sure the last three bits are unset */ - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 0, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 1, 0 ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 2, 0 ) ); - } - else -#endif /* ECP_MONTGOMERY */ -#if defined(ECP_SHORTWEIERSTRASS) - if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS ) - { - /* SEC1 3.2.1: Generate d such that 1 <= n < N */ - int count = 0; - unsigned char rnd[MBEDTLS_ECP_MAX_BYTES]; - - /* - * Match the procedure given in RFC 6979 (deterministic ECDSA): - * - use the same byte ordering; - * - keep the leftmost nbits bits of the generated octet string; - * - try until result is in the desired range. - * This also avoids any biais, which is especially important for ECDSA. - */ - do - { - MBEDTLS_MPI_CHK( f_rng( p_rng, rnd, n_size ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( d, rnd, n_size ) ); - MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, 8 * n_size - grp->nbits ) ); - - /* - * Each try has at worst a probability 1/2 of failing (the msb has - * a probability 1/2 of being 0, and then the result will be < N), - * so after 30 tries failure probability is a most 2**(-30). - * - * For most curves, 1 try is enough with overwhelming probability, - * since N starts with a lot of 1s in binary, but some curves - * such as secp224k1 are actually very close to the worst case. - */ - if( ++count > 30 ) - return( MBEDTLS_ERR_ECP_RANDOM_FAILED ); - } - while( mbedtls_mpi_cmp_int( d, 1 ) < 0 || - mbedtls_mpi_cmp_mpi( d, &grp->N ) >= 0 ); - } - else -#endif /* ECP_SHORTWEIERSTRASS */ - return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA ); - -cleanup: - if( ret != 0 ) - return( ret ); - - return 0; -} - -static int mbedtls_ecp_derive_pubkey( mbedtls_ecp_group *grp, - const mbedtls_ecp_point *G, - mbedtls_mpi *d, mbedtls_ecp_point *Q, - int (*f_rng)(void *, unsigned char *, size_t), - void *p_rng ) -{ - return( mbedtls_ecp_mul( grp, Q, d, G, f_rng, p_rng ) ); -} - - -static int hmac_vector_func(uint8_t * hmac, uint8_t * dst, int len) -{ - static int hmac_ptr = 0; - if (hmac==NULL) - { - hmac_ptr = 0; - return 0; - } - int i; - while(len--) - { - *dst++ = hmac[hmac_ptr++ % 32]; - } - return 0; -} - -void generate_private_key(uint8_t * data, int len, uint8_t * data2, int len2, uint8_t * privkey) -{ - crypto_sha256_hmac_init(CRYPTO_MASTER_KEY, 0, privkey); - crypto_sha256_update(data, len); - crypto_sha256_update(data2, len2); - crypto_sha256_update(master_secret, 32); - crypto_sha256_hmac_final(CRYPTO_MASTER_KEY, 0, privkey); - -// mbedtls_ecp_group grp; /*!< Elliptic curve and base point */ -// mbedtls_mpi d; /*!< our secret value */ -// mbedtls_ecp_point Q; -// -// mbedtls_ecp_group_init( &grp ); -// mbedtls_mpi_init( &d ); -// mbedtls_ecp_point_init(&Q); -// -// mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_DP_SECP256R1); -// -//// mbedtls_mpi_read_binary(&d, _signing_key, 32); -// hmac_vector_func(NULL, NULL, 0); -// mbedtls_ecp_gen_privkey(&grp, &grp.G, &d, &Q, hmac_vector_func, privkey); -// mbedtls_mpi_write_binary(&d,privkey,32); -} - - -/*int uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, uECC_Curve curve);*/ -void crypto_ecc256_derive_public_key(uint8_t * data, int len, uint8_t * x, uint8_t * y) -{ - int ret; - uint8_t privkey[32]; - uint8_t pubkey[64]; - -// generate_private_key(data,len,NULL,0,privkey); - - crypto_sha256_hmac_init(CRYPTO_MASTER_KEY, 0, privkey); - crypto_sha256_update(data, len); - crypto_sha256_update(NULL, 0); - crypto_sha256_update(master_secret, 32); - crypto_sha256_hmac_final(CRYPTO_MASTER_KEY, 0, privkey); - -// mbedtls_ecp_group grp; /*!< Elliptic curve and base point */ -// mbedtls_mpi d; /*!< our secret value */ -// mbedtls_ecp_point Q; -// -// mbedtls_ecp_group_init( &grp ); -// mbedtls_mpi_init( &d ); -// mbedtls_ecp_point_init(&Q); -// -// mbedtls_ecp_group_load(&grp, MBEDTLS_ECP_DP_SECP256R1); -// -//// mbedtls_mpi_read_binary(&d, _signing_key, 32); -// hmac_vector_func(NULL, NULL, 0); -// ret= mbedtls_ecp_gen_privkey(&grp, &grp.G, &d, &Q, hmac_vector_func, privkey); -// if (ret != 0) -// { -// printf("error with priv key -0x04%x\n", -ret); -// } -//// mbedtls_mpi_write_binary(&d,privkey,32); -// -// memset(pubkey,0,sizeof(pubkey)); -// -// ret = mbedtls_ecp_derive_pubkey( &grp, &grp.G, -// &d, &Q, hmac_vector_func, privkey); -// -// if (ret != 0) -// { -// printf("error with public key\n"); -// } -// -// mbedtls_mpi_write_binary(&Q.X,x,32); -// mbedtls_mpi_write_binary(&Q.Y,y,32); - - uECC_compute_public_key(privkey, pubkey, _es256_curve); - memmove(x,pubkey,32); - memmove(y,pubkey+32,32); -} - -void crypto_ecc256_load_key(uint8_t * data, int len, uint8_t * data2, int len2) -{ - static uint8_t privkey[32]; - generate_private_key(data,len,data2,len2,privkey); - _signing_key = privkey; - _key_len = 32; -} - -void crypto_ecc256_make_key_pair(uint8_t * pubkey, uint8_t * privkey) -{ - if (uECC_make_key(pubkey, privkey, _es256_curve) != 1) - { - printf2(TAG_ERR,"Error, uECC_make_key failed\n"); - exit(1); - } -} - -void crypto_ecc256_shared_secret(const uint8_t * pubkey, const uint8_t * privkey, uint8_t * shared_secret) -{ - if (uECC_shared_secret(pubkey, privkey, shared_secret, _es256_curve) != 1) - { - printf2(TAG_ERR,"Error, uECC_shared_secret failed\n"); - exit(1); - } - -} - -struct AES_ctx aes_ctx; -void crypto_aes256_init(uint8_t * key, uint8_t * nonce) -{ - if (key == CRYPTO_TRANSPORT_KEY) - { - AES_init_ctx(&aes_ctx, transport_secret); - } - else - { - AES_init_ctx(&aes_ctx, key); - } - if (nonce == NULL) - { - memset(aes_ctx.Iv, 0, 16); - } - else - { - memmove(aes_ctx.Iv, nonce, 16); - } -} - -// prevent round key recomputation -void crypto_aes256_reset_iv(uint8_t * nonce) -{ - if (nonce == NULL) - { - memset(aes_ctx.Iv, 0, 16); - } - else - { - memmove(aes_ctx.Iv, nonce, 16); - } -} - -void crypto_aes256_decrypt(uint8_t * buf, int length) -{ - AES_CBC_decrypt_buffer(&aes_ctx, buf, length); -} - -void crypto_aes256_encrypt(uint8_t * buf, int length) -{ - AES_CBC_encrypt_buffer(&aes_ctx, buf, length); -} - - - -const uint8_t attestation_cert_der[] = -"\x30\x82\x01\xfb\x30\x82\x01\xa1\xa0\x03\x02\x01\x02\x02\x01\x00\x30\x0a\x06\x08" -"\x2a\x86\x48\xce\x3d\x04\x03\x02\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13" -"\x02\x55\x53\x31\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x10\x30\x0e" -"\x06\x03\x55\x04\x0a\x0c\x07\x54\x45\x53\x54\x20\x43\x41\x30\x20\x17\x0d\x31\x38" -"\x30\x35\x31\x30\x30\x33\x30\x36\x32\x30\x5a\x18\x0f\x32\x30\x36\x38\x30\x34\x32" -"\x37\x30\x33\x30\x36\x32\x30\x5a\x30\x7c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13" -"\x02\x55\x53\x31\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x0f\x30\x0d" -"\x06\x03\x55\x04\x07\x0c\x06\x4c\x61\x75\x72\x65\x6c\x31\x15\x30\x13\x06\x03\x55" -"\x04\x0a\x0c\x0c\x54\x45\x53\x54\x20\x43\x4f\x4d\x50\x41\x4e\x59\x31\x22\x30\x20" -"\x06\x03\x55\x04\x0b\x0c\x19\x41\x75\x74\x68\x65\x6e\x74\x69\x63\x61\x74\x6f\x72" -"\x20\x41\x74\x74\x65\x73\x74\x61\x74\x69\x6f\x6e\x31\x14\x30\x12\x06\x03\x55\x04" -"\x03\x0c\x0b\x63\x6f\x6e\x6f\x72\x70\x70\x2e\x63\x6f\x6d\x30\x59\x30\x13\x06\x07" -"\x2a\x86\x48\xce\x3d\x02\x01\x06\x08\x2a\x86\x48\xce\x3d\x03\x01\x07\x03\x42\x00" -"\x04\x45\xa9\x02\xc1\x2e\x9c\x0a\x33\xfa\x3e\x84\x50\x4a\xb8\x02\xdc\x4d\xb9\xaf" -"\x15\xb1\xb6\x3a\xea\x8d\x3f\x03\x03\x55\x65\x7d\x70\x3f\xb4\x02\xa4\x97\xf4\x83" -"\xb8\xa6\xf9\x3c\xd0\x18\xad\x92\x0c\xb7\x8a\x5a\x3e\x14\x48\x92\xef\x08\xf8\xca" -"\xea\xfb\x32\xab\x20\xa3\x62\x30\x60\x30\x46\x06\x03\x55\x1d\x23\x04\x3f\x30\x3d" -"\xa1\x30\xa4\x2e\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13\x02\x55\x53\x31" -"\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x10\x30\x0e\x06\x03\x55\x04" -"\x0a\x0c\x07\x54\x45\x53\x54\x20\x43\x41\x82\x09\x00\xf7\xc9\xec\x89\xf2\x63\x94" -"\xd9\x30\x09\x06\x03\x55\x1d\x13\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04" -"\x04\x03\x02\x04\xf0\x30\x0a\x06\x08\x2a\x86\x48\xce\x3d\x04\x03\x02\x03\x48\x00" -"\x30\x45\x02\x20\x18\x38\xb0\x45\x03\x69\xaa\xa7\xb7\x38\x62\x01\xaf\x24\x97\x5e" -"\x7e\x74\x64\x1b\xa3\x7b\xf7\xe6\xd3\xaf\x79\x28\xdb\xdc\xa5\x88\x02\x21\x00\xcd" -"\x06\xf1\xe3\xab\x16\x21\x8e\xd8\xc0\x14\xaf\x09\x4f\x5b\x73\xef\x5e\x9e\x4b\xe7" -"\x35\xeb\xdd\x9b\x6d\x8f\x7d\xf3\xc4\x3a\xd7"; - - -const uint16_t attestation_cert_der_size = sizeof(attestation_cert_der)-1; - - -const uint8_t attestation_key[] = "\xcd\x67\xaa\x31\x0d\x09\x1e\xd1\x6e\x7e\x98\x92\xaa\x07\x0e\x19\x94\xfc\xd7\x14\xae\x7c\x40\x8f\xb9\x46\xb7\x2e\x5f\xe7\x5d\x30"; -const uint16_t attestation_key_size = sizeof(attestation_key)-1; - - - diff --git a/targets/efm32/src/device.c b/targets/efm32/src/device.c deleted file mode 100644 index b510291..0000000 --- a/targets/efm32/src/device.c +++ /dev/null @@ -1,713 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * device.c - * - * Created on: Jun 27, 2018 - * Author: conor - */ -#include -#include -#include - -#include "em_chip.h" -#include "em_gpio.h" -#include "em_usart.h" -#include "em_adc.h" -#include "em_cmu.h" -#include "em_msc.h" -#include "em_i2c.h" -#include "em_timer.h" - -#include "InitDevice.h" -#include "cbor.h" -#include "log.h" -#include "ctaphid.h" -#include "util.h" -#include "app.h" -#include "uECC.h" -#include "crypto.h" -#include "nfc.h" - -#ifdef USING_DEV_BOARD - -#define MSG_AVAIL_PIN gpioPortC,9 -#define RDY_PIN gpioPortC,10 -#define RW_PIN gpioPortD,11 -#define RESET_PIN gpioPortB,13 -#define LED_RED_PIN gpioPortF,4 -#define LED_GREEN_PIN gpioPortF,5 - -#else - -#define MSG_AVAIL_PIN gpioPortA,1 -#define RDY_PIN gpioPortA,0 -#define RW_PIN gpioPortD,15 -#define RESET_PIN gpioPortB,15 -#define LED_RED_PIN gpioPortD,10 -#define LED_GREEN_PIN gpioPortD,14 -#define LED_BLUE_PIN gpioPortD,9 -#define BUTTON_PIN gpioPortD,13 - -#define RED_CHANNEL 0 -#define GREEN_CHANNEL 2 -#define BLUE_CHANNEL 1 - -#endif - -#define PAGE_SIZE 2048 -#define PAGES 64 -#define COUNTER_PAGE (PAGES - 3) -#define STATE1_PAGE (PAGES - 2) -#define STATE2_PAGE (PAGES - 1) - -#define APPLICATION_START_ADDR 0x4000 -#define APPLICATION_START_PAGE (0x4000/PAGE_SIZE) - -#define APPLICATION_END_ADDR (PAGE_SIZE*(PAGES - 3)-4) // NOT included in application -#define APPLICATION_END_PAGE ((PAGES - 3)) // 125 is NOT included in application - -#define AUTH_WORD_ADDR (PAGE_SIZE*(PAGES - 3)-4) - - - -static void init_atomic_counter() -{ - int offset = 0; - uint32_t count; - uint32_t one = 1; - uint32_t * ptr = PAGE_SIZE * COUNTER_PAGE; - - for (offset = 0; offset < PAGE_SIZE/4; offset += 1) - { - count = *(ptr+offset); - if (count != 0xffffffff) - { - return; - } - } - MSC_WriteWordFast(ptr,&one,4); -} - - -uint32_t ctap_atomic_count(int sel) -{ - int offset = 0; - uint32_t count; - uint32_t zero = 0; - uint32_t * ptr = PAGE_SIZE * COUNTER_PAGE; - - if (sel != 0) - { - printf2(TAG_ERR,"counter2 not imple\n"); - exit(1); - } - - for (offset = 0; offset < PAGE_SIZE/4; offset += 1) // wear-level the flash - { - count = *(ptr+offset); - if (count != 0) - { - count++; - offset++; - if (offset == PAGE_SIZE/4) - { - offset = 0; - MSC_ErasePage(ptr); - /*printf("RESET page counter\n");*/ - } - else - { - MSC_WriteWordFast(ptr+offset-1,&zero,4); - } - MSC_WriteWordFast(ptr+offset,&count,4); - - break; - } - } - - return count; -} - -static uint32_t _color; -uint32_t get_RBG() -{ - return _color; -} - -void RGB(uint32_t hex) -{ - uint16_t r = 256 - ((hex & 0xff0000) >> 16); - uint16_t g = 256 - ((hex & 0xff00) >> 8); - uint16_t b = 256 - ((hex & 0xff) >> 0); - - TIMER_CompareBufSet(TIMER0, GREEN_CHANNEL, g); // green - TIMER_CompareBufSet(TIMER0, RED_CHANNEL, r); // red - TIMER_CompareBufSet(TIMER0, BLUE_CHANNEL, b); // blue - _color = hex; -} - - -#define IS_BUTTON_PRESSED() (GPIO_PinInGet(BUTTON_PIN) == 0) - -// Verify the user -// return 1 if user is verified, 0 if not -int ctap_user_verification(uint8_t arg) -{ - return 1; -} - -// Test for user presence -// Return 1 for user is present, 0 user not present -int ctap_user_presence_test() -{ -#ifdef SKIP_BUTTON_CHECK - return 1; -#endif - - - uint32_t t1 = millis(); - RGB(0x304010); - -#ifdef USE_BUTTON_DELAY - delay(3000); - RGB(0x001040); - delay(50); - return 1; -#endif - while (IS_BUTTON_PRESSED()) - { - if (t1 + 5000 < millis()) - { - printf1(TAG_GEN,"Button not pressed\n"); - return 0; - } - } - - t1 = millis(); - - do - { - if (t1 + 5000 < millis()) - { - return 0; - } - if (! IS_BUTTON_PRESSED()) - continue; - delay(1); - } - while (! IS_BUTTON_PRESSED()); - - RGB(0x001040); - - delay(50); - - return 1; -} - -// Must be implemented by application -// data is HID_MESSAGE_SIZE long in bytes -#ifndef TEST_POWER -void ctaphid_write_block(uint8_t * data) -{ - printf1(TAG_DUMP,"<< "); dump_hex1(TAG_DUMP, data, HID_MESSAGE_SIZE); - usbhid_send(data); -} -#endif - -#ifdef IS_BOOTLOADER // two different colors between bootloader and app -void heartbeat() -{ - static int state = 0; - static uint32_t val = (LED_INIT_VALUE >> 8) & 0xff; - int but = IS_BUTTON_PRESSED(); - - - if (state) - { - val--; - } - else - { - val++; - } - - if (val > 30 || val < 1) - { - state = !state; - } - - // if (but) RGB(val * 2); - // else - RGB((val << 16) | (val*2 << 8)); - -} -#else -void heartbeat() -{ - static int state = 0; - static uint32_t val = (LED_INIT_VALUE >> 8) & 0xff; - int but = IS_BUTTON_PRESSED(); - - - -#if 0 - RGB(0x100000); // bright ass light - return; -#endif - - if (state) - { - val--; - } - else - { - val++; - } - - if (val >120/3 || val < 1) - { - state = !state; - } - - if (but) RGB(val * 2); - else RGB(val*3 | ((val*3) << 8) | (val << 16) ); -// else RGB((val*3) << 8); - -} -#endif -uint32_t millis() -{ - return CRYOTIMER->CNT; -} - - -void usbhid_init() -{ - -} - -static int msgs_to_recv = 0; - -static void wait_for_efm8_ready() -{ - // Wait for efm8 to be ready - while (GPIO_PinInGet(RDY_PIN) == 0) - ; -} - -static void wait_for_efm8_busy() -{ - // Wait for efm8 to be ready - while (GPIO_PinInGet(RDY_PIN) != 0) - ; -} - -#ifndef TEST_POWER -int usbhid_recv(uint8_t * msg) -{ - int i; - - if (GPIO_PinInGet(MSG_AVAIL_PIN) == 0) - { - GPIO_PinOutClear(RW_PIN); // Drive low to indicate READ - wait_for_efm8_ready(); - - - for (i = 0; i < 64; i++) - { - msg[i] = USART_SpiTransfer(USART1, 'A'); - // delay(1); - } - - GPIO_PinOutSet(RW_PIN); - - wait_for_efm8_busy(); - - - // // msgs_to_recv--; - // printf(">> "); - // dump_hex(msg,64); - return 64; - } - - return 0; -} - -#endif - -void usbhid_send(uint8_t * msg) -{ - int i; - // uint32_t t1 = millis(); - USART_SpiTransfer(USART1, *msg++); // Send 1 byte - wait_for_efm8_ready(); - - for (i = 1; i < HID_MESSAGE_SIZE; i++) - { - USART_SpiTransfer(USART1, *msg++); - } - wait_for_efm8_busy(); - - delay(10); - // uint32_t t2 = millis(); - // printf("wait time: %u\n", (uint32_t)(t2-t1)); - -} - -void usbhid_close() -{ -} - -void main_loop_delay() -{ -} - -void delay(int ms) -{ - int t1 = millis(); - while(millis() - t1 < ms) - ; -} - -void GPIO_ODD_IRQHandler() -{ - uint32_t flag = GPIO->IF; - GPIO->IFC = flag; - if (flag & (1<<9)) - { - // printf("pin 9 interrupt\r\n"); - msgs_to_recv++; - } - else - { - printf1(TAG_ERR,"wrong pin int %x\r\n",flag); - } - - -} - -void init_adc() -{ - /* Enable ADC Clock */ - CMU_ClockEnable(cmuClock_ADC0, true); - ADC_Init_TypeDef init = ADC_INIT_DEFAULT; - ADC_InitSingle_TypeDef singleInit = ADC_INITSINGLE_DEFAULT; - - /* Initialize the ADC with the required values */ - init.timebase = ADC_TimebaseCalc(0); - init.prescale = ADC_PrescaleCalc(7000000, 0); - ADC_Init(ADC0, &init); - - /* Initialize for single conversion specific to RNG */ - singleInit.reference = adcRefVEntropy; - singleInit.diff = true; - singleInit.posSel = adcPosSelVSS; - singleInit.negSel = adcNegSelVSS; - ADC_InitSingle(ADC0, &singleInit); - - /* Set VINATT to maximum value and clear FIFO */ - ADC0->SINGLECTRLX |= _ADC_SINGLECTRLX_VINATT_MASK; - ADC0->SINGLEFIFOCLEAR = ADC_SINGLEFIFOCLEAR_SINGLEFIFOCLEAR; -} - - - -void authenticator_read_state(AuthenticatorState * state) -{ - uint32_t * ptr = PAGE_SIZE*STATE1_PAGE; - memmove(state,ptr,sizeof(AuthenticatorState)); -} - -void authenticator_read_backup_state(AuthenticatorState * state ) -{ - uint32_t * ptr = PAGE_SIZE*STATE2_PAGE; - memmove(state,ptr,sizeof(AuthenticatorState)); -} - -void authenticator_write_state(AuthenticatorState * state, int backup) -{ - uint32_t * ptr; - if (! backup) - { - ptr = PAGE_SIZE*STATE1_PAGE; - MSC_ErasePage(ptr); - // for (i = 0; i < sizeof(AuthenticatorState)/4; i++ ) - MSC_WriteWordFast(ptr,state,sizeof(AuthenticatorState) + (sizeof(AuthenticatorState)%4)); - } - else - { - ptr = PAGE_SIZE*STATE2_PAGE; - MSC_ErasePage(ptr); - // for (i = 0; i < sizeof(AuthenticatorState)/4; i++ ) - MSC_WriteWordFast(ptr,state,sizeof(AuthenticatorState) + (sizeof(AuthenticatorState)%4)); - } -} - -// Return 1 yes backup is init'd, else 0 -int authenticator_is_backup_initialized() -{ - uint8_t header[16]; - uint32_t * ptr = PAGE_SIZE*STATE2_PAGE; - memmove(header,ptr,16); - AuthenticatorState * state = (AuthenticatorState*)header; - return state->is_initialized == INITIALIZED_MARKER; -} - - -uint8_t adc_rng(void); - -void reset_efm8() -{ - // Reset EFM8 - GPIO_PinOutClear(RESET_PIN); - delay(2); - GPIO_PinOutSet(RESET_PIN); -} - -void bootloader_init(void) -{ - /* Chip errata */ - - // Reset EFM8 - GPIO_PinModeSet(RESET_PIN, gpioModePushPull, 1); - - // status LEDS - GPIO_PinModeSet(LED_RED_PIN, - gpioModePushPull, - 1); // red - - GPIO_PinModeSet(LED_GREEN_PIN, - gpioModePushPull, - 1); // green - GPIO_PinModeSet(LED_BLUE_PIN, - gpioModePushPull, - 1); // blue - - // EFM8 RDY/BUSY - GPIO_PinModeSet(RDY_PIN, gpioModeInput, 0); - - // EFM8 MSG Available - GPIO_PinModeSet(MSG_AVAIL_PIN, gpioModeInput, 0); - - // SPI R/w Indicator - GPIO_PinModeSet(RW_PIN, gpioModePushPull, 1); - - - printing_init(); - - - MSC_Init(); - -} - - - -void device_init(void) -{ - /* Chip errata */ - - CHIP_Init(); - enter_DefaultMode_from_RESET(); - - // status LEDS - GPIO_PinModeSet(LED_RED_PIN, - gpioModePushPull, - 1); // red - - GPIO_PinModeSet(LED_GREEN_PIN, - gpioModePushPull, - 1); // green - GPIO_PinModeSet(LED_BLUE_PIN, - gpioModePushPull, - 1); // blue - - // EFM8 RDY/BUSY - GPIO_PinModeSet(RDY_PIN, gpioModeInput, 0); - - // EFM8 MSG Available - GPIO_PinModeSet(MSG_AVAIL_PIN, gpioModeInput, 0); - - // SPI R/w Indicator - GPIO_PinModeSet(RW_PIN, gpioModePushPull, 1); - - // Reset EFM8 - GPIO_PinModeSet(RESET_PIN, gpioModePushPull, 1); - - TIMER_TopSet(TIMER0, 255); - - RGB(LED_INIT_VALUE); - - printing_init(); - - init_adc(); - - MSC_Init(); - - init_atomic_counter(); - if (sizeof(AuthenticatorState) > PAGE_SIZE) - { - printf2(TAG_ERR, "not enough room in page\n"); - exit(1); - } - - CborEncoder test; - uint8_t buf[64]; - cbor_encoder_init(&test, buf, 20, 0); - - reset_efm8(); - - printf1(TAG_GEN,"Device init\r\n"); - int i=0; - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = adc_rng(); - } - -} -#ifdef IS_BOOTLOADER -typedef enum -{ - BootWrite = 0x40, - BootDone = 0x41, - BootCheck = 0x42, - BootErase = 0x43, -} WalletOperation; - - -typedef struct { - uint8_t op; - uint8_t addr[3]; - uint8_t tag[4]; - uint8_t len; - uint8_t payload[255 - 9]; -} __attribute__((packed)) BootloaderReq; - -//#define APPLICATION_START_ADDR 0x8000 -//#define APPLICATION_START_PAGE (0x8000/PAGE_SIZE) - -//#define APPLICATION_END_ADDR (PAGE_SIZE*125-4) // NOT included in application - -static void erase_application() -{ - int page; - uint32_t * ptrpage; - for(page = APPLICATION_START_PAGE; page < APPLICATION_END_PAGE; page++) - { - ptrpage = page * PAGE_SIZE; - MSC_ErasePage(ptrpage); - } -} - -static void authorize_application() -{ - uint32_t zero = 0; - uint32_t * ptr; - ptr = AUTH_WORD_ADDR; - MSC_WriteWordFast(ptr,&zero, 4); -} -int bootloader_bridge(uint8_t klen, uint8_t * keyh) -{ - static int has_erased = 0; - BootloaderReq * req = (BootloaderReq * )keyh; - uint8_t payload[256]; - uint8_t hash[32]; - uint8_t * pubkey = (uint8_t*)"\x57\xe6\x80\x39\x56\x46\x2f\x0c\x95\xac\x72\x71\xf0\xbc\xe8\x2d\x67\xd0\x59\x29\x2e\x15\x22\x89\x6a\xbd\x3f\x7f\x27\xf3\xc0\xc6\xe2\xd7\x7d\x8a\x9f\xcc\x53\xc5\x91\xb2\x0c\x9c\x3b\x4e\xa4\x87\x31\x67\xb4\xa9\x4b\x0e\x8d\x06\x67\xd8\xc5\xef\x2c\x50\x4a\x55"; - const struct uECC_Curve_t * curve = NULL; - - /*printf("bootloader_bridge\n");*/ - if (req->len > 255-9) - { - return CTAP1_ERR_INVALID_LENGTH; - } - - memset(payload, 0xff, sizeof(payload)); - memmove(payload, req->payload, req->len); - - uint32_t addr = (*((uint32_t*)req->addr)) & 0xffffff; - - uint32_t * ptr = addr; - - switch(req->op){ - case BootWrite: - /*printf("BootWrite 0x%08x\n", addr);*/ - if (ptr < APPLICATION_START_ADDR || ptr >= APPLICATION_END_ADDR) - { - return CTAP2_ERR_NOT_ALLOWED; - } - - if (!has_erased) - { - erase_application(); - has_erased = 1; - } - if (is_authorized_to_boot()) - { - printf2(TAG_ERR, "Error, boot check bypassed\n"); - exit(1); - } - MSC_WriteWordFast(ptr,payload, req->len + (req->len%4)); - break; - case BootDone: - // printf("BootDone\n"); - ptr = APPLICATION_START_ADDR; - crypto_sha256_init(); - crypto_sha256_update(ptr, APPLICATION_END_ADDR-APPLICATION_START_ADDR); - crypto_sha256_final(hash); - // printf("hash: "); dump_hex(hash, 32); - // printf("sig: "); dump_hex(payload, 64); - curve = uECC_secp256r1(); - - if (! uECC_verify(pubkey, - hash, - 32, - payload, - curve)) - { - return CTAP2_ERR_OPERATION_DENIED; - } - authorize_application(); - REBOOT_FLAG = 1; - break; - case BootCheck: - /*printf("BootCheck\n");*/ - return 0; - break; - case BootErase: - /*printf("BootErase\n");*/ - erase_application(); - return 0; - break; - default: - return CTAP1_ERR_INVALID_COMMAND; - } - return 0; -} - -int is_authorized_to_boot() -{ - uint32_t * auth = AUTH_WORD_ADDR; - return *auth == 0; -} - -#endif diff --git a/targets/efm32/src/main.c b/targets/efm32/src/main.c deleted file mode 100644 index 6270dbc..0000000 --- a/targets/efm32/src/main.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include -#include - -#include "em_chip.h" -#include "em_cmu.h" -#include "em_emu.h" -#include "em_core.h" -#include "em_gpio.h" - -#include "InitDevice.h" - -#include "app.h" -#include "cbor.h" diff --git a/targets/efm32/src/nfc.c b/targets/efm32/src/nfc.c deleted file mode 100644 index a2aff79..0000000 --- a/targets/efm32/src/nfc.c +++ /dev/null @@ -1,382 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * nfc.c - * - * Created on: Jul 22, 2018 - * Author: conor - */ - -#include -#include -#include - -#include "em_chip.h" -#include "em_gpio.h" -#include "em_i2c.h" - -#include "log.h" -#include "util.h" -#include "nfc.h" -#include "app.h" - -#define NFC_DEV_ADDR (0xa0|(0x0<<1)) -#define NFC_DEV_USART USART1 -#ifndef IS_BOOTLOADER -I2C_TransferReturn_TypeDef I2CSPM_Transfer(I2C_TypeDef *i2c, I2C_TransferSeq_TypeDef *seq) -{ - I2C_TransferReturn_TypeDef ret; - uint32_t timeout = 10000; - /* Do a polled transfer */ - ret = I2C_TransferInit(i2c, seq); - - while (ret == i2cTransferInProgress && timeout--) - { - ret = I2C_Transfer(i2c); - } - return ret; -} - -// data must be 16 bytes -void read_block(uint8_t block, uint8_t * data) -{ - uint8_t addr = NFC_DEV_ADDR; - I2C_TransferSeq_TypeDef seq; - I2C_TransferReturn_TypeDef ret; - uint8_t i2c_read_data[16]; - uint8_t i2c_write_data[1]; - - seq.addr = addr; - seq.flags = I2C_FLAG_WRITE_READ; - /* Select command to issue */ - i2c_write_data[0] = block; - seq.buf[0].data = i2c_write_data; - seq.buf[0].len = 1; - /* Select location/length of data to be read */ - seq.buf[1].data = i2c_read_data; - seq.buf[1].len = 16; - - ret = I2CSPM_Transfer(I2C0, &seq); - - if (ret != i2cTransferDone) { - printf("I2C fail %04x\r\n",ret); - exit(1); - } - memmove(data, i2c_read_data, 16); -} - -// data must be 16 bytes -void write_block(uint8_t block, uint8_t * data) -{ - uint8_t addr = NFC_DEV_ADDR; - I2C_TransferSeq_TypeDef seq; - I2C_TransferReturn_TypeDef ret; - uint8_t i2c_write_data[1 + 16]; - - seq.addr = addr; - seq.flags = I2C_FLAG_WRITE; - /* Select command to issue */ - i2c_write_data[0] = block; - memmove(i2c_write_data + 1, data, 16); - seq.buf[0].data = i2c_write_data; - seq.buf[0].len = 17; - /* Select location/length of data to be read */ - seq.buf[1].data = NULL; - seq.buf[1].len = 0; - - ret = I2CSPM_Transfer(I2C0, &seq); - - if (ret != i2cTransferDone) { - printf("I2C fail %04x\r\n",ret); - exit(1); - } -} - -void write_reg_flash(uint8_t reg_addr, uint8_t mask,uint8_t data) -{ - uint8_t addr = NFC_DEV_ADDR; - I2C_TransferSeq_TypeDef seq; - I2C_TransferReturn_TypeDef ret; - uint8_t i2c_write_data[4]; - - seq.addr = addr; - seq.flags = I2C_FLAG_WRITE; - i2c_write_data[0] = 0x3a; - i2c_write_data[1] = reg_addr; - i2c_write_data[2] = mask; - i2c_write_data[3] = data; - - seq.buf[0].data = i2c_write_data; - seq.buf[0].len = 4; - seq.buf[1].data = NULL; - seq.buf[1].len = 0; - - ret = I2CSPM_Transfer(I2C0, &seq); - - if (ret != i2cTransferDone) { - printf("I2C fail %04x\r\n",ret); - exit(1); - } -} - -void write_reg(uint8_t reg_addr, uint8_t data) -{ - - uint8_t mode = 0x00 | (reg_addr & 0x1f); -// delay(10); - -// delay(10); - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - mode = USART_SpiTransfer(NFC_DEV_USART, data); - GPIO_PinOutSet(NFC_DEV_SS); -} - -void write_command(uint8_t cmd) -{ - - uint8_t mode = cmd; -// delay(10); - -// delay(10); - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - GPIO_PinOutSet(NFC_DEV_SS); - GPIO_PinOutClear(NFC_DEV_SS); - -} - -void write_eeprom(uint8_t block, uint8_t * data) -{ - - uint8_t mode = 0x40; -// delay(10); - -// delay(10); - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - mode = block << 1; - USART_SpiTransfer(NFC_DEV_USART, mode); - USART_SpiTransfer(NFC_DEV_USART, *data++); - USART_SpiTransfer(NFC_DEV_USART, *data++); - USART_SpiTransfer(NFC_DEV_USART, *data++); - USART_SpiTransfer(NFC_DEV_USART, *data++); - - GPIO_PinOutSet(NFC_DEV_SS); - GPIO_PinOutClear(NFC_DEV_SS); - -} - -void read_eeprom(uint8_t block, uint8_t * data) -{ - - uint8_t mode = 0x7f; -// delay(10); - -// delay(10); - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - mode = block << 1; - USART_SpiTransfer(NFC_DEV_USART, mode); - *data++ = USART_SpiTransfer(NFC_DEV_USART, 0); - *data++ = USART_SpiTransfer(NFC_DEV_USART, 0); - *data++ = USART_SpiTransfer(NFC_DEV_USART, 0); - *data++ = USART_SpiTransfer(NFC_DEV_USART, 0); - - - GPIO_PinOutSet(NFC_DEV_SS); - GPIO_PinOutClear(NFC_DEV_SS); - -} - -uint8_t read_reg(uint8_t reg_addr) -{ - - uint8_t mode = 0x20 | (reg_addr & 0x1f); -// delay(10); - -// delay(10); - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - mode = USART_SpiTransfer(NFC_DEV_USART, 0); - GPIO_PinOutSet(NFC_DEV_SS); - - GPIO_PinOutClear(NFC_DEV_SS); - -// printf("%02x: %x\n",(reg_addr),(int)mode); - return mode; -} - -void read_buffer(uint8_t * data, int len) -{ - - uint8_t mode = 0xC0; - int i; - if (len > 32) - { - printf("warning, max len is 32\n"); - len = 32; - } - - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - for(i = 0; i < len; i++) - { - *data++ = USART_SpiTransfer(NFC_DEV_USART, 0); - } - GPIO_PinOutSet(NFC_DEV_SS); - - GPIO_PinOutClear(NFC_DEV_SS); - -} - -// data must be 14 bytes long -void read_reg_block(uint8_t * data) -{ - int i; - uint8_t mode = 0x20 | (0 & 0x1f); - GPIO_PinOutClear(NFC_DEV_SS); - delay(1); - USART_SpiTransfer(NFC_DEV_USART, mode); - for (i = 0; i < 0x20; i++) - { - mode = USART_SpiTransfer(NFC_DEV_USART, 0); - if (i < 6 || (i >=8 && i < 0x0f) || (i >= 0x1e)) - { - *data = mode; - data++; - } - } - - GPIO_PinOutSet(NFC_DEV_SS); - GPIO_PinOutClear(NFC_DEV_SS); -} - - - -typedef struct { - uint8_t header; - uint8_t tlen; - uint8_t plen; - uint8_t ilen; - uint8_t rtype; -} NDEF; - -typedef struct { - uint8_t io; - uint8_t conf0; - uint8_t conf1; - uint8_t conf2; - uint8_t rfid_status; - uint8_t ic_status; - uint8_t mask0; - uint8_t mask1; - uint8_t int0; - uint8_t int1; - uint8_t buf_status2; - uint8_t buf_status1; - uint8_t last_nfc_address; - uint8_t maj; - uint8_t minor; -} __attribute__((packed)) AMS_REGS; - -void nfc_test() -{ - uint8_t data[32]; - uint8_t ns_reg; - uint8_t last_ns_reg; - // magic-number, - uint8_t cc[] = {0xE1,0x10,0x08, 0x00}; - - uint8_t ndef[32] = "\x03\x11\xD1\x01\x0D\x55\x01adafruit.com"; - - AMS_REGS * regs; - - return ; - - - - delay(10); - GPIO_PinOutSet(NFC_DEV_SS); - delay(10); - GPIO_PinOutClear(NFC_DEV_SS); - delay(10); - -// uint8_t reg = read_reg(0); - write_command(0xC2); // Set to default state - write_command(0xC4); // Clear buffer - - write_reg(0x3, 0x80 | 0x40); // enable tunneling mode and RF configuration - - - - read_reg_block(data); - - printf("regs: "); dump_hex(data,15); - - delay(100); - - - read_reg_block(data); - - printf("regs: "); dump_hex(data,15); - - - - if (0) - { - read_eeprom(0x7F, data); - printf("initial config: "); dump_hex(data,4); - - data[0] = (1<<2) | 0x03; // save cfg1 setting for energy harvesting - data[1] = 0x80 | 0x40; // save cfg2 setting for tunneling - write_eeprom(0x7F, data); - - printf("updated config: "); dump_hex(data,4); - } - - while (1) - { -// delay(100); -// read_reg_block(data); -// regs = (AMS_REGS *)data; -// -// if ((regs->buf_status2 & 0x3f) && !(regs->buf_status2 & 0x80)) -// { -// read_buffer(data, regs->buf_status2 & 0x3f); -// printf("data: "); -// -// dump_hex(data, regs->buf_status2 & 0x3f); -// } - -// dump_hex(data,15); - } - -} - -#endif diff --git a/targets/efm32/src/printing.c b/targets/efm32/src/printing.c deleted file mode 100644 index 16bed70..0000000 --- a/targets/efm32/src/printing.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include "em_chip.h" -#include "em_cmu.h" -#include "em_emu.h" -#include "em_core.h" -#include "em_usart.h" -#include "em_gpio.h" -#include -#include - -#include "app.h" -#ifndef PRINTING_USE_VCOM -int RETARGET_WriteChar(char c) -{ - return ITM_SendChar(c); -} - -int RETARGET_ReadChar(void) -{ - return 0; -} - -void setupSWOForPrint(void) -{ - /* Enable GPIO clock. */ - CMU_ClockEnable(cmuClock_GPIO, true); - - /* Enable Serial wire output pin */ - GPIO->ROUTEPEN |= GPIO_ROUTEPEN_SWVPEN; - - /* Set location 0 */ - GPIO->ROUTELOC0 = GPIO_ROUTELOC0_SWVLOC_LOC0; - - /* Enable output on pin - GPIO Port F, Pin 2 */ - GPIO->P[5].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK); - GPIO->P[5].MODEL |= GPIO_P_MODEL_MODE2_PUSHPULL; - - /* Enable debug clock AUXHFRCO */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN; - - /* Wait until clock is ready */ - while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)); - - /* Enable trace in core debug */ - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - ITM->LAR = 0xC5ACCE55; - ITM->TER = 0x0; - ITM->TCR = 0x0; - TPI->SPPR = 2; - TPI->ACPR = 0x15; // changed from 0x0F on Giant, etc. to account for 19 MHz default AUXHFRCO frequency - ITM->TPR = 0x0; - DWT->CTRL = 0x400003FE; - ITM->TCR = 0x0001000D; - TPI->FFCR = 0x00000100; - ITM->TER = 0x1; -} - - -void printing_init() -{ - setupSWOForPrint(); -} -#else - -int RETARGET_WriteChar(char c) -{ - USART_Tx(USART0,c); - return 0; -} - -int RETARGET_ReadChar(void) -{ - return 0; -} - - -void printing_init() -{ -#ifdef USING_DEV_BOARD -// GPIO_PinModeSet(gpioPortA,5,gpioModePushPull,1); // VCOM enable -#endif -} - -#endif diff --git a/targets/efm32/src/retargetio.c b/targets/efm32/src/retargetio.c deleted file mode 100644 index 05e0143..0000000 --- a/targets/efm32/src/retargetio.c +++ /dev/null @@ -1,475 +0,0 @@ -/***************************************************************************//** - * @file - * @brief Provide stdio retargeting for all supported toolchains. - * @version 5.5.0 - ******************************************************************************* - * # License - * Copyright 2015 Silicon Labs, Inc. http://www.silabs.com - ******************************************************************************* - * - * This file is licensed under the Silabs License Agreement. See the file - * "Silabs_License_Agreement.txt" for details. Before using this software for - * any purpose, you must agree to the terms of that agreement. - * - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup RetargetIo - * @{ This module provide low-level stubs for retargetting stdio for all - * supported toolchains. - * The stubs are minimal yet sufficient implementations. - * Refer to chapter 12 in the reference manual for newlib 1.17.0 - * for details on implementing newlib stubs. - ******************************************************************************/ - -extern int RETARGET_ReadChar(void); -extern int RETARGET_WriteChar(char c); - -#if !defined(__CROSSWORKS_ARM) && defined(__GNUC__) - -#include -#include -#include -#include -#include "em_device.h" - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -int fileno(FILE *); -/** @endcond */ - -int _close(int file); -int _fstat(int file, struct stat *st); -int _isatty(int file); -int _lseek(int file, int ptr, int dir); -int _read(int file, char *ptr, int len); -caddr_t _sbrk(int incr); -int _write(int file, const char *ptr, int len); - -extern char _end; /**< Defined by the linker */ - -/**************************************************************************//** - * @brief - * Close a file. - * - * @param[in] file - * File you want to close. - * - * @return - * Returns 0 when the file is closed. - *****************************************************************************/ -int _close(int file) -{ - (void) file; - return 0; -} - -/**************************************************************************//** - * @brief Exit the program. - * @param[in] status The value to return to the parent process as the - * exit status (not used). - *****************************************************************************/ -void _exit(int status) -{ - (void) status; - while (1) { - } /* Hang here forever... */ -} - -/**************************************************************************//** - * @brief - * Status of an open file. - * - * @param[in] file - * Check status for this file. - * - * @param[in] st - * Status information. - * - * @return - * Returns 0 when st_mode is set to character special. - *****************************************************************************/ -int _fstat(int file, struct stat *st) -{ - (void) file; - st->st_mode = S_IFCHR; - return 0; -} - -/**************************************************************************//** - * @brief Get process ID. - *****************************************************************************/ -int _getpid(void) -{ - return 1; -} - -/**************************************************************************//** - * @brief - * Query whether output stream is a terminal. - * - * @param[in] file - * Descriptor for the file. - * - * @return - * Returns 1 when query is done. - *****************************************************************************/ -int _isatty(int file) -{ - (void) file; - return 1; -} - -/**************************************************************************//** - * @brief Send signal to process. - * @param[in] pid Process id (not used). - * @param[in] sig Signal to send (not used). - *****************************************************************************/ -int _kill(int pid, int sig) -{ - (void)pid; - (void)sig; - return -1; -} - -/**************************************************************************//** - * @brief - * Set position in a file. - * - * @param[in] file - * Descriptor for the file. - * - * @param[in] ptr - * Poiter to the argument offset. - * - * @param[in] dir - * Directory whence. - * - * @return - * Returns 0 when position is set. - *****************************************************************************/ -int _lseek(int file, int ptr, int dir) -{ - (void) file; - (void) ptr; - (void) dir; - return 0; -} - -/**************************************************************************//** - * @brief - * Read from a file. - * - * @param[in] file - * Descriptor for the file you want to read from. - * - * @param[in] ptr - * Pointer to the chacaters that are beeing read. - * - * @param[in] len - * Number of characters to be read. - * - * @return - * Number of characters that have been read. - *****************************************************************************/ -int _read(int file, char *ptr, int len) -{ - int c, rxCount = 0; - - (void) file; - - while (len--) { - if ((c = RETARGET_ReadChar()) != -1) { - *ptr++ = c; - rxCount++; - } else { - break; - } - } - - if (rxCount <= 0) { - return -1; /* Error exit */ - } - - return rxCount; -} - -/**************************************************************************//** - * @brief - * Increase heap. - * - * @param[in] incr - * Number of bytes you want increment the program's data space. - * - * @return - * Rsturns a pointer to the start of the new area. - *****************************************************************************/ -caddr_t _sbrk(int incr) -{ - static char *heap_end; - char *prev_heap_end; - - if (heap_end == 0) { - heap_end = &_end; - } - - prev_heap_end = heap_end; - heap_end += incr; - - return (caddr_t) prev_heap_end; -} - -/**************************************************************************//** - * @brief - * Write to a file. - * - * @param[in] file - * Descriptor for the file you want to write to. - * - * @param[in] ptr - * Pointer to the text you want to write - * - * @param[in] len - * Number of characters to be written. - * - * @return - * Number of characters that have been written. - *****************************************************************************/ -int _write(int file, const char *ptr, int len) -{ - int txCount; - - (void) file; - - for (txCount = 0; txCount < len; txCount++) { - RETARGET_WriteChar(*ptr++); - } - - return len; -} -#endif /* !defined( __CROSSWORKS_ARM ) && defined( __GNUC__ ) */ - -#if defined(__ICCARM__) -/******************* - * - * Copyright 1998-2003 IAR Systems. All rights reserved. - * - * $Revision: 38614 $ - * - * This is a template implementation of the "__write" function used by - * the standard library. Replace it with a system-specific - * implementation. - * - * The "__write" function should output "size" number of bytes from - * "buffer" in some application-specific way. It should return the - * number of characters written, or _LLIO_ERROR on failure. - * - * If "buffer" is zero then __write should perform flushing of - * internal buffers, if any. In this case "handle" can be -1 to - * indicate that all handles should be flushed. - * - * The template implementation below assumes that the application - * provides the function "MyLowLevelPutchar". It should return the - * character written, or -1 on failure. - * - ********************/ - -#include -#include -#include "em_common.h" - -_STD_BEGIN - -/**************************************************************************//** - * @brief Transmit buffer to USART1 - * @param buffer Array of characters to send - * @param nbytes Number of bytes to transmit - * @return Number of bytes sent - *****************************************************************************/ -static int TxBuf(uint8_t *buffer, int nbytes) -{ - int i; - - for (i = 0; i < nbytes; i++) { - RETARGET_WriteChar(*buffer++); - } - return nbytes; -} - -/* - * If the __write implementation uses internal buffering, uncomment - * the following line to ensure that we are called with "buffer" as 0 - * (i.e. flush) when the application terminates. - */ -size_t __write(int handle, const unsigned char * buffer, size_t size) -{ - /* Remove the #if #endif pair to enable the implementation */ - - size_t nChars = 0; - - if (buffer == 0) { - /* - * This means that we should flush internal buffers. Since we - * don't we just return. (Remember, "handle" == -1 means that all - * handles should be flushed.) - */ - return 0; - } - - /* This template only writes to "standard out" and "standard err", - * for all other file handles it returns failure. */ - if (handle != _LLIO_STDOUT && handle != _LLIO_STDERR) { - return _LLIO_ERROR; - } - - /* Hook into USART1 transmit function here */ - if (TxBuf((uint8_t *) buffer, size) != size) { - return _LLIO_ERROR; - } else { - nChars = size; - } - - return nChars; -} - -size_t __read(int handle, unsigned char * buffer, size_t size) -{ - /* Remove the #if #endif pair to enable the implementation */ - int nChars = 0; - - /* This template only reads from "standard in", for all other file - * handles it returns failure. */ - if (handle != _LLIO_STDIN) { - return _LLIO_ERROR; - } - - for (/* Empty */; size > 0; --size) { - int c = RETARGET_ReadChar(); - if (c < 0) { - break; - } - - *buffer++ = c; - ++nChars; - } - - return nChars; -} - -_STD_END - -#endif /* defined( __ICCARM__ ) */ - -#if defined(__CROSSWORKS_ARM) - -/* Pass each of these function straight to the USART */ -int __putchar(int ch) -{ - return(RETARGET_WriteChar(ch)); -} - -int __getchar(void) -{ - return(RETARGET_ReadChar()); -} - -#endif /* defined( __CROSSWORKS_ARM ) */ - -#if defined(__CC_ARM) -/******************************************************************************/ -/* RETARGET.C: 'Retarget' layer for target-dependent low level functions */ -/******************************************************************************/ -/* This file is part of the uVision/ARM development tools. */ -/* Copyright (c) 2005-2006 Keil Software. All rights reserved. */ -/* This software may only be used under the terms of a valid, current, */ -/* end user licence from KEIL for a compatible version of KEIL software */ -/* development tools. Nothing else gives you the right to use this software. */ -/******************************************************************************/ - -#include - -/* #pragma import(__use_no_semihosting_swi) */ - -struct __FILE{ - int handle; -}; - -/**Standard output stream*/ -FILE __stdout; - -/**************************************************************************//** - * @brief - * Writes character to file - * - * @param[in] f - * File - * - * @param[in] ch - * Character - * - * @return - * Written character - *****************************************************************************/ -int fputc(int ch, FILE *f) -{ - return(RETARGET_WriteChar(ch)); -} - -/**************************************************************************//** - * @brief - * Reads character from file - * - * @param[in] f - * File - * - * @return - * Character - *****************************************************************************/ -int fgetc(FILE *f) -{ - return(RETARGET_ReadChar()); -} - -/**************************************************************************//** - * @brief - * Tests the error indicator for the stream pointed - * to by file - * - * @param[in] f - * File - * - * @return - * Returns non-zero if it is set - *****************************************************************************/ -int ferror(FILE *f) -{ - /* Your implementation of ferror */ - return EOF; -} - -/**************************************************************************//** - * @brief - * Writes a character to the console - * - * @param[in] ch - * Character - *****************************************************************************/ -void _ttywrch(int ch) -{ - RETARGET_WriteChar(ch); -} - -/**************************************************************************//** - * @brief - * Library exit function. This function is called if stack - * overflow occurs. - * - * @param[in] return_code - * Return code - *****************************************************************************/ -void _sys_exit(int return_code) -{ - label: goto label;/* endless loop */ -} -#endif /* defined( __CC_ARM ) */ - -/** @} (end group RetargetIo) */ diff --git a/targets/efm32boot/.cproject b/targets/efm32boot/.cproject deleted file mode 100644 index b87fa56..0000000 --- a/targets/efm32boot/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/targets/efm32boot/.project b/targets/efm32boot/.project deleted file mode 100644 index 8c10efc..0000000 --- a/targets/efm32boot/.project +++ /dev/null @@ -1,47 +0,0 @@ - - - efm32boot - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - - org.eclipse.cdt.core.cnature - com.silabs.ss.framework.ide.project.sls.core.SLSProjectNature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - - - - crypto - 2 - PARENT-2-PROJECT_LOC/crypto - - - efm32 - 2 - $%7BPARENT-1-PROJECT_LOC%7D/efm32 - - - fido2 - 2 - PARENT-2-PROJECT_LOC/fido2 - - - CMSIS/EFM32JG1B/startup_gcc_efm32jg1b.s - 1 - STUDIO_SDK_LOC/platform/Device/SiliconLabs/EFM32JG1B/Source/GCC/startup_efm32jg1b.S - - - CMSIS/EFM32JG1B/system_efm32jg1b.c - 1 - STUDIO_SDK_LOC/platform/Device/SiliconLabs/EFM32JG1B/Source/system_efm32jg1b.c - - - diff --git a/targets/efm32boot/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs b/targets/efm32boot/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs deleted file mode 100644 index b4554b4..0000000 --- a/targets/efm32boot/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs +++ /dev/null @@ -1,2 +0,0 @@ -copiedFilesOriginState={} -eclipse.preferences.version=1 diff --git a/targets/efm32boot/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s b/targets/efm32boot/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s deleted file mode 100644 index 2a683c7..0000000 --- a/targets/efm32boot/CMSIS/EFM32PG1B/startup_gcc_efm32pg1b.s +++ /dev/null @@ -1,317 +0,0 @@ -/* @file startup_efm32pg1b.S - * @brief startup file for Silicon Labs EFM32PG1B devices. - * For use with GCC for ARM Embedded Processors - * @version 5.2.2 - * Date: 12 June 2014 - * - */ -/* Copyright (c) 2011 - 2014 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - .syntax unified - .arch armv7-m - .section .stack - .align 3 -#ifdef __STACK_SIZE - .equ Stack_Size, __STACK_SIZE -#else - .equ Stack_Size, 0x00000400 -#endif - .globl __StackTop - .globl __StackLimit -__StackLimit: - .space Stack_Size - .size __StackLimit, . - __StackLimit -__StackTop: - .size __StackTop, . - __StackTop - - .section .heap - .align 3 -#ifdef __HEAP_SIZE - .equ Heap_Size, __HEAP_SIZE -#else - .equ Heap_Size, 0x00000C00 -#endif - .globl __HeapBase - .globl __HeapLimit -__HeapBase: - .if Heap_Size - .space Heap_Size - .endif - .size __HeapBase, . - __HeapBase -__HeapLimit: - .size __HeapLimit, . - __HeapLimit - - .section .vectors - .align 2 - .globl __Vectors -__Vectors: - .long __StackTop /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long MemManage_Handler /* MPU Fault Handler */ - .long BusFault_Handler /* Bus Fault Handler */ - .long UsageFault_Handler /* Usage Fault Handler */ - .long Default_Handler /* Reserved */ - .long Default_Handler /* Reserved */ - .long Default_Handler /* Reserved */ - .long Default_Handler /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long DebugMon_Handler /* Debug Monitor Handler */ - .long Default_Handler /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* External interrupts */ - .long EMU_IRQHandler /* 0 - EMU */ - .long Default_Handler /* 1 - Reserved */ - .long WDOG0_IRQHandler /* 2 - WDOG0 */ - .long Default_Handler /* 3 - Reserved */ - .long Default_Handler /* 4 - Reserved */ - .long Default_Handler /* 5 - Reserved */ - .long Default_Handler /* 6 - Reserved */ - .long Default_Handler /* 7 - Reserved */ - .long LDMA_IRQHandler /* 8 - LDMA */ - .long GPIO_EVEN_IRQHandler /* 9 - GPIO_EVEN */ - .long TIMER0_IRQHandler /* 10 - TIMER0 */ - .long USART0_RX_IRQHandler /* 11 - USART0_RX */ - .long USART0_TX_IRQHandler /* 12 - USART0_TX */ - .long ACMP0_IRQHandler /* 13 - ACMP0 */ - .long ADC0_IRQHandler /* 14 - ADC0 */ - .long IDAC0_IRQHandler /* 15 - IDAC0 */ - .long I2C0_IRQHandler /* 16 - I2C0 */ - .long GPIO_ODD_IRQHandler /* 17 - GPIO_ODD */ - .long TIMER1_IRQHandler /* 18 - TIMER1 */ - .long USART1_RX_IRQHandler /* 19 - USART1_RX */ - .long USART1_TX_IRQHandler /* 20 - USART1_TX */ - .long LEUART0_IRQHandler /* 21 - LEUART0 */ - .long PCNT0_IRQHandler /* 22 - PCNT0 */ - .long CMU_IRQHandler /* 23 - CMU */ - .long MSC_IRQHandler /* 24 - MSC */ - .long CRYPTO_IRQHandler /* 25 - CRYPTO */ - .long LETIMER0_IRQHandler /* 26 - LETIMER0 */ - .long Default_Handler /* 27 - Reserved */ - .long Default_Handler /* 28 - Reserved */ - .long RTCC_IRQHandler /* 29 - RTCC */ - .long Default_Handler /* 30 - Reserved */ - .long CRYOTIMER_IRQHandler /* 31 - CRYOTIMER */ - .long Default_Handler /* 32 - Reserved */ - .long FPUEH_IRQHandler /* 33 - FPUEH */ - - - .size __Vectors, . - __Vectors - - .text - .thumb - .thumb_func - .align 2 - .globl Reset_Handler - .type Reset_Handler, %function -Reset_Handler: -#ifndef __NO_SYSTEM_INIT - ldr r0, =SystemInit - blx r0 -#endif - -/* Firstly it copies data from read only memory to RAM. There are two schemes - * to copy. One can copy more than one sections. Another can only copy - * one section. The former scheme needs more instructions and read-only - * data to implement than the latter. - * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */ - -#ifdef __STARTUP_COPY_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of triplets, each of which specify: - * offset 0: LMA of start of a section to copy from - * offset 4: VMA of start of a section to copy to - * offset 8: size of the section to copy. Must be multiply of 4 - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - ittt ge - ldrge r0, [r1, r3] - strge r0, [r2, r3] - bge .L_loop0_0 - - adds r4, #12 - b .L_loop0 - -.L_loop0_done: -#else -/* Single section scheme. - * - * The ranges of copy from/to are specified by following symbols - * __etext: LMA of start of the section to copy from. Usually end of text - * __data_start__: VMA of start of the section to copy to - * __data_end__: VMA of end of the section to copy to - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__etext - ldr r2, =__data_start__ - ldr r3, =__data_end__ - -.L_loop1: - cmp r2, r3 - ittt lt - ldrlt r0, [r1], #4 - strlt r0, [r2], #4 - blt .L_loop1 -#endif /*__STARTUP_COPY_MULTIPLE */ - -/* This part of work usually is done in C library startup code. Otherwise, - * define this macro to enable it in this startup. - * - * There are two schemes too. One can clear multiple BSS sections. Another - * can only clear one section. The former is more size expensive than the - * latter. - * - * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. - * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later. - */ -#ifdef __STARTUP_CLEAR_BSS_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __zero_table_start__ and __zero_table_end__, - * there are array of tuples specifying: - * offset 0: Start of a BSS section - * offset 4: Size of this BSS section. Must be multiply of 4 - */ - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - itt ge - strge r0, [r1, r2] - bge .L_loop2_0 - adds r3, #8 - b .L_loop2 -.L_loop2_done: -#elif defined (__STARTUP_CLEAR_BSS) -/* Single BSS section scheme. - * - * The BSS section is specified by following symbols - * __bss_start__: start of the BSS section. - * __bss_end__: end of the BSS section. - * - * Both addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__bss_start__ - ldr r2, =__bss_end__ - - movs r0, 0 -.L_loop3: - cmp r1, r2 - itt lt - strlt r0, [r1], #4 - blt .L_loop3 -#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ - -#ifndef __START -#define __START _start -#endif - bl __START - - .pool - .size Reset_Handler, . - Reset_Handler - - .align 1 - .thumb_func - .weak Default_Handler - .type Default_Handler, %function -Default_Handler: - b . - .size Default_Handler, . - Default_Handler - -/* Macro to define default handlers. Default handler - * will be weak symbol and just dead loops. They can be - * overwritten by other handlers */ - .macro def_irq_handler handler_name - .weak \handler_name - .set \handler_name, Default_Handler - .endm - - def_irq_handler NMI_Handler - def_irq_handler HardFault_Handler - def_irq_handler MemManage_Handler - def_irq_handler BusFault_Handler - def_irq_handler UsageFault_Handler - def_irq_handler SVC_Handler - def_irq_handler DebugMon_Handler - def_irq_handler PendSV_Handler - def_irq_handler SysTick_Handler - - - def_irq_handler EMU_IRQHandler - def_irq_handler WDOG0_IRQHandler - def_irq_handler LDMA_IRQHandler - def_irq_handler GPIO_EVEN_IRQHandler - def_irq_handler TIMER0_IRQHandler - def_irq_handler USART0_RX_IRQHandler - def_irq_handler USART0_TX_IRQHandler - def_irq_handler ACMP0_IRQHandler - def_irq_handler ADC0_IRQHandler - def_irq_handler IDAC0_IRQHandler - def_irq_handler I2C0_IRQHandler - def_irq_handler GPIO_ODD_IRQHandler - def_irq_handler TIMER1_IRQHandler - def_irq_handler USART1_RX_IRQHandler - def_irq_handler USART1_TX_IRQHandler - def_irq_handler LEUART0_IRQHandler - def_irq_handler PCNT0_IRQHandler - def_irq_handler CMU_IRQHandler - def_irq_handler MSC_IRQHandler - def_irq_handler CRYPTO_IRQHandler - def_irq_handler LETIMER0_IRQHandler - def_irq_handler RTCC_IRQHandler - def_irq_handler CRYOTIMER_IRQHandler - def_irq_handler FPUEH_IRQHandler - - .end diff --git a/targets/efm32boot/CMSIS/EFM32PG1B/system_efm32pg1b.c b/targets/efm32boot/CMSIS/EFM32PG1B/system_efm32pg1b.c deleted file mode 100644 index c52e3e1..0000000 --- a/targets/efm32boot/CMSIS/EFM32PG1B/system_efm32pg1b.c +++ /dev/null @@ -1,389 +0,0 @@ -/***************************************************************************//** - * @file system_efm32pg1b.c - * @brief CMSIS Cortex-M3/M4 System Layer for EFM32 devices. - * @version 5.2.2 - ****************************************************************************** - * # License - * Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com - ****************************************************************************** - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software.@n - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software.@n - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. - * has no obligation to support this Software. Silicon Laboratories, Inc. is - * providing the Software "AS IS", with no express or implied warranties of any - * kind, including, but not limited to, any implied warranties of - * merchantability or fitness for any particular purpose or warranties against - * infringement of any proprietary rights of a third party. - * - * Silicon Laboratories, Inc. will not be liable for any consequential, - * incidental, or special damages, or any other relief, or for any claim by - * any third party, arising from your use of this Software. - * - *****************************************************************************/ - -#include -#include "em_device.h" - -/******************************************************************************* - ****************************** DEFINES ************************************ - ******************************************************************************/ - -/** LFRCO frequency, tuned to below frequency during manufacturing. */ -#define EFM32_LFRCO_FREQ (32768UL) -/** ULFRCO frequency */ -#define EFM32_ULFRCO_FREQ (1000UL) - -/******************************************************************************* - ************************** LOCAL VARIABLES ******************************** - ******************************************************************************/ - -/* System oscillator frequencies. These frequencies are normally constant */ -/* for a target, but they are made configurable in order to allow run-time */ -/* handling of different boards. The crystal oscillator clocks can be set */ -/* compile time to a non-default value by defining respective EFM_nFXO_FREQ */ -/* values according to board design. By defining the EFM_nFXO_FREQ to 0, */ -/* one indicates that the oscillator is not present, in order to save some */ -/* SW footprint. */ - -#ifndef EFM32_HFRCO_MAX_FREQ -/** Maximum HFRCO frequency */ -#define EFM32_HFRCO_MAX_FREQ (38000000UL) -#endif - -#ifndef EFM32_HFXO_FREQ -/** HFXO frequency */ -#define EFM32_HFXO_FREQ (40000000UL) -#endif - -#ifndef EFM32_HFRCO_STARTUP_FREQ -/** HFRCO startup frequency */ -#define EFM32_HFRCO_STARTUP_FREQ (19000000UL) -#endif - - -/* Do not define variable if HF crystal oscillator not present */ -#if (EFM32_HFXO_FREQ > 0UL) -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -/** System HFXO clock. */ -static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ; -/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */ -#endif - -#ifndef EFM32_LFXO_FREQ -/** LFXO frequency */ -#define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ) -#endif -/* Do not define variable if LF crystal oscillator not present */ -#if (EFM32_LFXO_FREQ > 0UL) -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -/** System LFXO clock. */ -static uint32_t SystemLFXOClock = 32768UL; -/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */ -#endif - - -/******************************************************************************* - ************************** GLOBAL VARIABLES ******************************* - ******************************************************************************/ - -/** - * @brief - * System System Clock Frequency (Core Clock). - * - * @details - * Required CMSIS global variable that must be kept up-to-date. - */ -uint32_t SystemCoreClock = EFM32_HFRCO_STARTUP_FREQ; - - -/** - * @brief - * System HFRCO frequency - * - * @note - * This is an EFM32 proprietary variable, not part of the CMSIS definition. - * - * @details - * Frequency of the system HFRCO oscillator - */ -uint32_t SystemHfrcoFreq = EFM32_HFRCO_STARTUP_FREQ; - - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Get the current core clock frequency. - * - * @details - * Calculate and get the current core clock frequency based on the current - * configuration. Assuming that the SystemCoreClock global variable is - * maintained, the core clock frequency is stored in that variable as well. - * This function will however calculate the core clock based on actual HW - * configuration. It will also update the SystemCoreClock global variable. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * The current core clock frequency in Hz. - ******************************************************************************/ -uint32_t SystemCoreClockGet(void) -{ - uint32_t ret; - uint32_t presc; - - ret = SystemHFClockGet(); - presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) >> - _CMU_HFCOREPRESC_PRESC_SHIFT; - ret /= (presc + 1); - - /* Keep CMSIS system clock variable up-to-date */ - SystemCoreClock = ret; - - return ret; -} - - -/***************************************************************************//** - * @brief - * Get the maximum core clock frequency. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * The maximum core clock frequency in Hz. - ******************************************************************************/ -uint32_t SystemMaxCoreClockGet(void) -{ - return (EFM32_HFRCO_MAX_FREQ > EFM32_HFXO_FREQ ? \ - EFM32_HFRCO_MAX_FREQ : EFM32_HFXO_FREQ); -} - - -/***************************************************************************//** - * @brief - * Get the current HFCLK frequency. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * The current HFCLK frequency in Hz. - ******************************************************************************/ -uint32_t SystemHFClockGet(void) -{ - uint32_t ret; - - switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) - { - case CMU_HFCLKSTATUS_SELECTED_LFXO: -#if (EFM32_LFXO_FREQ > 0) - ret = SystemLFXOClock; -#else - /* We should not get here, since core should not be clocked. May */ - /* be caused by a misconfiguration though. */ - ret = 0; -#endif - break; - - case CMU_HFCLKSTATUS_SELECTED_LFRCO: - ret = EFM32_LFRCO_FREQ; - break; - - case CMU_HFCLKSTATUS_SELECTED_HFXO: -#if (EFM32_HFXO_FREQ > 0) - ret = SystemHFXOClock; -#else - /* We should not get here, since core should not be clocked. May */ - /* be caused by a misconfiguration though. */ - ret = 0; -#endif - break; - - default: /* CMU_HFCLKSTATUS_SELECTED_HFRCO */ - ret = SystemHfrcoFreq; - break; - } - - return ret / (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT)); -} - - -/**************************************************************************//** - * @brief - * Get high frequency crystal oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * HFXO frequency in Hz. - *****************************************************************************/ -uint32_t SystemHFXOClockGet(void) -{ - /* External crystal oscillator present? */ -#if (EFM32_HFXO_FREQ > 0) - return SystemHFXOClock; -#else - return 0; -#endif -} - - -/**************************************************************************//** - * @brief - * Set high frequency crystal oscillator clock frequency for target system. - * - * @note - * This function is mainly provided for being able to handle target systems - * with different HF crystal oscillator frequencies run-time. If used, it - * should probably only be used once during system startup. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @param[in] freq - * HFXO frequency in Hz used for target. - *****************************************************************************/ -void SystemHFXOClockSet(uint32_t freq) -{ - /* External crystal oscillator present? */ -#if (EFM32_HFXO_FREQ > 0) - SystemHFXOClock = freq; - - /* Update core clock frequency if HFXO is used to clock core */ - if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) == CMU_HFCLKSTATUS_SELECTED_HFXO) - { - /* The function will update the global variable */ - SystemCoreClockGet(); - } -#else - (void)freq; /* Unused parameter */ -#endif -} - - -/**************************************************************************//** - * @brief - * Initialize the system. - * - * @details - * Do required generic HW system init. - * - * @note - * This function is invoked during system init, before the main() routine - * and any data has been initialized. For this reason, it cannot do any - * initialization of variables etc. - *****************************************************************************/ -void SystemInit(void) -{ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - /* Set floating point coprosessor access mode. */ - SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ - (3UL << 11*2) ); /* set CP11 Full Access */ -#endif -} - - -/**************************************************************************//** - * @brief - * Get low frequency RC oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * LFRCO frequency in Hz. - *****************************************************************************/ -uint32_t SystemLFRCOClockGet(void) -{ - /* Currently we assume that this frequency is properly tuned during */ - /* manufacturing and is not changed after reset. If future requirements */ - /* for re-tuning by user, we can add support for that. */ - return EFM32_LFRCO_FREQ; -} - - -/**************************************************************************//** - * @brief - * Get ultra low frequency RC oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * ULFRCO frequency in Hz. - *****************************************************************************/ -uint32_t SystemULFRCOClockGet(void) -{ - /* The ULFRCO frequency is not tuned, and can be very inaccurate */ - return EFM32_ULFRCO_FREQ; -} - - -/**************************************************************************//** - * @brief - * Get low frequency crystal oscillator clock frequency for target system. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @return - * LFXO frequency in Hz. - *****************************************************************************/ -uint32_t SystemLFXOClockGet(void) -{ - /* External crystal oscillator present? */ -#if (EFM32_LFXO_FREQ > 0) - return SystemLFXOClock; -#else - return 0; -#endif -} - - -/**************************************************************************//** - * @brief - * Set low frequency crystal oscillator clock frequency for target system. - * - * @note - * This function is mainly provided for being able to handle target systems - * with different HF crystal oscillator frequencies run-time. If used, it - * should probably only be used once during system startup. - * - * @note - * This is an EFM32 proprietary function, not part of the CMSIS definition. - * - * @param[in] freq - * LFXO frequency in Hz used for target. - *****************************************************************************/ -void SystemLFXOClockSet(uint32_t freq) -{ - /* External crystal oscillator present? */ -#if (EFM32_LFXO_FREQ > 0) - SystemLFXOClock = freq; - - /* Update core clock frequency if LFXO is used to clock core */ - if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) == CMU_HFCLKSTATUS_SELECTED_LFXO) - { - /* The function will update the global variable */ - SystemCoreClockGet(); - } -#else - (void)freq; /* Unused parameter */ -#endif -} diff --git a/targets/efm32boot/efm32boot.hwconf b/targets/efm32boot/efm32boot.hwconf deleted file mode 100644 index ec25abf..0000000 --- a/targets/efm32boot/efm32boot.hwconf +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - - diff --git a/targets/efm32boot/emlib/em_assert.c b/targets/efm32boot/emlib/em_assert.c deleted file mode 100644 index 71225e0..0000000 --- a/targets/efm32boot/emlib/em_assert.c +++ /dev/null @@ -1,81 +0,0 @@ -/***************************************************************************//** - * @file em_assert.c - * @brief Assert API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_assert.h" -#include - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup ASSERT - * @{ - ******************************************************************************/ - -#if defined(DEBUG_EFM) -/***************************************************************************//** - * @brief - * EFM internal assert handling. - * - * This function is invoked through EFM_ASSERT() macro usage only, it should - * not be used explicitly. - * - * This implementation simply enters an indefinite loop, allowing - * the use of a debugger to determine cause of failure. By defining - * DEBUG_EFM_USER to the preprocessor for all files, a user defined version - * of this function must be defined and will be invoked instead, possibly - * providing output of assertion location. - * - * @note - * This function is not used unless @ref DEBUG_EFM is defined - * during preprocessing of EFM_ASSERT() usage. - * - * @param[in] file - * Name of source file where assertion failed. - * - * @param[in] line - * Line number in source file where assertion failed. - ******************************************************************************/ -void assertEFM(const char *file, int line) -{ - (void)file; /* Unused parameter */ - (void)line; /* Unused parameter */ - - while (true) { - } -} -#endif /* DEBUG_EFM */ - -/** @} (end addtogroup ASSERT) */ -/** @} (end addtogroup emlib) */ diff --git a/targets/efm32boot/emlib/em_cmu.c b/targets/efm32boot/emlib/em_cmu.c deleted file mode 100644 index 96316ff..0000000 --- a/targets/efm32boot/emlib/em_cmu.c +++ /dev/null @@ -1,5310 +0,0 @@ -/***************************************************************************//** - * @file em_cmu.c - * @brief Clock management unit (CMU) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_cmu.h" -#if defined(CMU_PRESENT) - -#include -#include -#include "em_assert.h" -#include "em_bus.h" -#include "em_emu.h" -#include "em_cmu.h" -#include "em_system.h" -#include "em_common.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup CMU - * @brief Clock management unit (CMU) Peripheral API - * @details - * This module contains functions to control the CMU peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The CMU controls oscillators and clocks. - * @{ - ******************************************************************************/ - -/******************************************************************************* - ****************************** DEFINES ************************************ - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(_SILICON_LABS_32B_SERIES_1) -/** Maximum allowed core frequency when using 0 wait-states on flash access. */ -#define CMU_MAX_FREQ_0WS 26000000 -/** Maximum allowed core frequency when using 1 wait-states on flash access */ -#define CMU_MAX_FREQ_1WS 40000000 -/** Maximum allowed core frequency when using 2 wait-states on flash access */ -#define CMU_MAX_FREQ_2WS 54000000 -/** Maximum allowed core frequency when using 3 wait-states on flash access */ -#define CMU_MAX_FREQ_3WS 72000000 -#elif defined(_SILICON_LABS_32B_SERIES_0) -/** Maximum allowed core frequency when using 0 wait-states on flash access. */ -#define CMU_MAX_FREQ_0WS 16000000 -/** Maximum allowed core frequency when using 1 wait-states on flash access */ -#define CMU_MAX_FREQ_1WS 32000000 -#else -#error "Max Flash wait-state frequencies are not defined for this platform." -#endif - -/** Maximum frequency for HFLE interface */ -#if defined(CMU_CTRL_HFLE) -/** Maximum HFLE frequency for series 0 EFM32 and EZR32 Wonder Gecko. */ -#if defined(_SILICON_LABS_32B_SERIES_0) \ - && (defined(_EFM32_WONDER_FAMILY) \ - || defined(_EZR32_WONDER_FAMILY)) -#define CMU_MAX_FREQ_HFLE 24000000 -/** Maximum HFLE frequency for other series 0 parts with maximum core clock - higher than 32MHz. */ -#elif defined(_SILICON_LABS_32B_SERIES_0) \ - && (defined(_EFM32_GIANT_FAMILY) \ - || defined(_EZR32_LEOPARD_FAMILY)) -#define CMU_MAX_FREQ_HFLE maxFreqHfle() -#endif -#elif defined(CMU_CTRL_WSHFLE) -/** Maximum HFLE frequency for series 1 parts */ -#define CMU_MAX_FREQ_HFLE 32000000 -#endif - -#if defined(CMU_STATUS_HFXOSHUNTOPTRDY) -#define HFXO_TUNING_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY | CMU_STATUS_HFXOSHUNTOPTRDY) -#define HFXO_TUNING_MODE_AUTO (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD) -#define HFXO_TUNING_MODE_CMD (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD) -#elif defined(CMU_STATUS_HFXOPEAKDETRDY) -#define HFXO_TUNING_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY) -#define HFXO_TUNING_MODE_AUTO (_CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD) -#define HFXO_TUNING_MODE_CMD (_CMU_HFXOCTRL_PEAKDETMODE_CMD) -#endif - -#if defined(CMU_HFXOCTRL_MODE_EXTCLK) -/** HFXO external clock mode is renamed from EXTCLK to DIGEXTCLK. */ -#define CMU_HFXOCTRL_MODE_DIGEXTCLK CMU_HFXOCTRL_MODE_EXTCLK -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -#define VSCALE_DEFAULT (EMU_VScaleGet()) -#else -#define VSCALE_DEFAULT 0 -#endif - -/******************************************************************************* - ************************** LOCAL VARIABLES ******************************** - ******************************************************************************/ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -static CMU_AUXHFRCOFreq_TypeDef auxHfrcoFreq = cmuAUXHFRCOFreq_19M0Hz; -#endif -#if defined(_CMU_STATUS_HFXOSHUNTOPTRDY_MASK) -#define HFXO_INVALID_TRIM (~_CMU_HFXOTRIMSTATUS_MASK) -#endif - -#if defined(CMU_OSCENCMD_DPLLEN) -/** Table of HFRCOCTRL values and their associated min/max frequencies and - optional band enumerator. */ -static const struct hfrcoCtrlTableElement{ - uint32_t minFreq; - uint32_t maxFreq; - uint32_t value; - CMU_HFRCOFreq_TypeDef band; -} hfrcoCtrlTable[] = -{ - // minFreq maxFreq HFRCOCTRL value band - { 860000, 1050000, 0xBC601F00, cmuHFRCOFreq_1M0Hz }, - { 1050000, 1280000, 0xBC611F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 1280000, 1480000, 0xBCA21F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 1480000, 1800000, 0xAD231F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 1800000, 2110000, 0xBA601F00, cmuHFRCOFreq_2M0Hz }, - { 2110000, 2560000, 0xBA611F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 2560000, 2970000, 0xBAA21F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 2970000, 3600000, 0xAB231F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 3600000, 4220000, 0xB8601F00, cmuHFRCOFreq_4M0Hz }, - { 4220000, 5120000, 0xB8611F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 5120000, 5930000, 0xB8A21F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 5930000, 7520000, 0xA9231F00, cmuHFRCOFreq_7M0Hz }, - { 7520000, 9520000, 0x99241F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 9520000, 11800000, 0x99251F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 11800000, 14400000, 0x99261F00, cmuHFRCOFreq_13M0Hz }, - { 14400000, 17200000, 0x99271F00, cmuHFRCOFreq_16M0Hz }, - { 17200000, 19700000, 0x99481F00, cmuHFRCOFreq_19M0Hz }, - { 19700000, 23800000, 0x99491F35, (CMU_HFRCOFreq_TypeDef)0 }, - { 23800000, 28700000, 0x994A1F00, cmuHFRCOFreq_26M0Hz }, - { 28700000, 34800000, 0x996B1F00, cmuHFRCOFreq_32M0Hz }, -#if defined(_DEVINFO_HFRCOCAL16_MASK) - { 34800000, 42800000, 0x996C1F00, cmuHFRCOFreq_38M0Hz }, - { 42800000, 51600000, 0x996D1F00, cmuHFRCOFreq_48M0Hz }, - { 51600000, 60500000, 0x998E1F00, cmuHFRCOFreq_56M0Hz }, - { 60500000, 72000000, 0xA98F1F00, cmuHFRCOFreq_64M0Hz } -#else - { 34800000, 40000000, 0x996C1F00, cmuHFRCOFreq_38M0Hz } -#endif -}; - -#define HFRCOCTRLTABLE_ENTRIES (sizeof(hfrcoCtrlTable) \ - / sizeof(struct hfrcoCtrlTableElement)) -#endif // CMU_OSCENCMD_DPLLEN - -#if defined(_SILICON_LABS_32B_SERIES_1) && defined(_EMU_STATUS_VSCALE_MASK) -/* Devices with Voltage Scaling needs extra handling of wait states. */ -static const struct flashWsTableElement{ - uint32_t maxFreq; - uint8_t vscale; - uint8_t ws; -} flashWsTable[] = -{ -#if (_SILICON_LABS_GECKO_INTERNAL_SDID == 100) - { 18000000, 0, 0 }, /* 0 wait states at max frequency 18 MHz and 1.2V */ - { 36000000, 0, 1 }, /* 1 wait states at max frequency 36 MHz and 1.2V */ - { 54000000, 0, 2 }, /* 2 wait states at max frequency 54 MHz and 1.2V */ - { 72000000, 0, 3 }, /* 3 wait states at max frequency 72 MHz and 1.2V */ - { 7000000, 2, 0 }, /* 0 wait states at max frequency 7 MHz and 1.0V */ - { 14000000, 2, 1 }, /* 1 wait states at max frequency 14 MHz and 1.0V */ - { 21000000, 2, 2 }, /* 2 wait states at max frequency 21 MHz and 1.0V */ -#else - { 25000000, 0, 0 }, /* 0 wait states at max frequency 25 MHz and 1.2V */ - { 40000000, 0, 1 }, /* 1 wait states at max frequency 40 MHz and 1.2V */ - { 7000000, 2, 0 }, /* 0 wait states at max frequency 7 MHz and 1.0V */ - { 14000000, 2, 1 }, /* 1 wait states at max frequency 14 MHz and 1.0V */ - { 21000000, 2, 2 }, /* 2 wait states at max frequency 21 MHz and 1.0V */ -#endif -}; - -#define FLASH_WS_TABLE_ENTRIES (sizeof(flashWsTable) / sizeof(flashWsTable[0])) -#endif - -#if defined(_CMU_USHFRCOCTRL_FREQRANGE_MASK) \ - || defined(_CMU_USHFRCOTUNE_MASK) -#ifndef EFM32_USHFRCO_STARTUP_FREQ -#define EFM32_USHFRCO_STARTUP_FREQ (48000000UL) -#endif - -static uint32_t ushfrcoFreq = EFM32_USHFRCO_STARTUP_FREQ; -#endif - -/******************************************************************************* - ************************** LOCAL PROTOTYPES ******************************* - ******************************************************************************/ -#if defined(_CMU_HFRCOCTRL_FREQRANGE_MASK) -static uint32_t CMU_HFRCODevinfoGet(CMU_HFRCOFreq_TypeDef freq); -#endif - -#if defined(_CMU_USHFRCOCTRL_FREQRANGE_MASK) -static uint32_t CMU_USHFRCODevinfoGet(CMU_USHFRCOFreq_TypeDef freq); -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** LOCAL FUNCTIONS ******************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(_SILICON_LABS_32B_SERIES_0) \ - && (defined(_EFM32_GIANT_FAMILY) \ - || defined(_EZR32_LEOPARD_FAMILY)) -/***************************************************************************//** - * @brief - * Return max allowed frequency for low energy peripherals. - ******************************************************************************/ -static uint32_t maxFreqHfle(void) -{ - uint16_t majorMinorRev; - - switch (SYSTEM_GetFamily()) { - case systemPartFamilyEfm32Leopard: - case systemPartFamilyEzr32Leopard: - /* CHIP MAJOR bit [5:0] */ - majorMinorRev = (((ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) - >> _ROMTABLE_PID0_REVMAJOR_SHIFT) << 8); - /* CHIP MINOR bit [7:4] */ - majorMinorRev |= (((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) - >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) << 4); - /* CHIP MINOR bit [3:0] */ - majorMinorRev |= ((ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) - >> _ROMTABLE_PID3_REVMINORLSB_SHIFT); - - if (majorMinorRev >= 0x0204) { - return 24000000; - } else { - return 32000000; - } - - case systemPartFamilyEfm32Giant: - return 32000000; - - default: - /* Invalid device family. */ - EFM_ASSERT(false); - return 0; - } -} -#endif - -#if defined(CMU_MAX_FREQ_HFLE) - -/* Unified definitions for HFLE wait-state and prescaler fields. */ -#if defined(CMU_CTRL_HFLE) -#define _GENERIC_HFLE_WS_MASK _CMU_CTRL_HFLE_MASK -#define _GENERIC_HFLE_WS_SHIFT _CMU_CTRL_HFLE_SHIFT -#define GENERIC_HFLE_PRESC_REG CMU->HFCORECLKDIV -#define _GENERIC_HFLE_PRESC_MASK _CMU_HFCORECLKDIV_HFCORECLKLEDIV_MASK -#define _GENERIC_HFLE_PRESC_SHIFT _CMU_HFCORECLKDIV_HFCORECLKLEDIV_SHIFT -#elif defined(CMU_CTRL_WSHFLE) -#define _GENERIC_HFLE_WS_MASK _CMU_CTRL_WSHFLE_MASK -#define _GENERIC_HFLE_WS_SHIFT _CMU_CTRL_WSHFLE_SHIFT -#define GENERIC_HFLE_PRESC_REG CMU->HFPRESC -#define _GENERIC_HFLE_PRESC_MASK _CMU_HFPRESC_HFCLKLEPRESC_MASK -#define _GENERIC_HFLE_PRESC_SHIFT _CMU_HFPRESC_HFCLKLEPRESC_SHIFT -#endif - -/***************************************************************************//** - * @brief - * Set HFLE wait-states and HFCLKLE prescaler. - * - * @param[in] maxLeFreq - * Max LE frequency - ******************************************************************************/ -static void setHfLeConfig(uint32_t hfFreq) -{ - unsigned int hfleWs; - uint32_t hflePresc; - - /* Check for 1 bit fields. BUS_RegBitWrite() below are going to fail if the - fields are changed to more than 1 bit. */ - EFM_ASSERT((_GENERIC_HFLE_WS_MASK >> _GENERIC_HFLE_WS_SHIFT) == 0x1); - - /* - Enable HFLE wait-state if to allow access to LE peripherals when HFBUSCLK is - above maxLeFreq. - - Set HFLE prescaler. Allowed HFLE clock frequency is maxLeFreq. */ - - hfleWs = 1; - if (hfFreq <= CMU_MAX_FREQ_HFLE) { - hfleWs = 0; - hflePresc = 0; - } else if (hfFreq <= (2 * CMU_MAX_FREQ_HFLE)) { - hflePresc = 1; - } else { - hflePresc = 2; - } - BUS_RegBitWrite(&CMU->CTRL, _GENERIC_HFLE_WS_SHIFT, hfleWs); - GENERIC_HFLE_PRESC_REG = (GENERIC_HFLE_PRESC_REG & ~_GENERIC_HFLE_PRESC_MASK) - | (hflePresc << _GENERIC_HFLE_PRESC_SHIFT); -} - -#if defined(_CMU_CTRL_HFLE_MASK) -/***************************************************************************//** - * @brief - * Get HFLE wait-state configuration. - * - * @return - * Current wait-state configuration. - ******************************************************************************/ -static uint32_t getHfLeConfig(void) -{ - uint32_t ws = BUS_RegBitRead(&CMU->CTRL, _GENERIC_HFLE_WS_SHIFT); - return ws; -} -#endif -#endif - -/***************************************************************************//** - * @brief - * Get the AUX clock frequency. Used by MSC flash programming and LESENSE, - * by default also as debug clock. - * - * @return - * AUX Frequency in Hz - ******************************************************************************/ -static uint32_t auxClkGet(void) -{ - uint32_t ret; - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) - ret = auxHfrcoFreq; - -#elif defined(_CMU_AUXHFRCOCTRL_BAND_MASK) - /* All series 0 families except EFM32G */ - switch (CMU->AUXHFRCOCTRL & _CMU_AUXHFRCOCTRL_BAND_MASK) { - case CMU_AUXHFRCOCTRL_BAND_1MHZ: - if ( SYSTEM_GetProdRev() >= 19 ) { - ret = 1200000; - } else { - ret = 1000000; - } - break; - - case CMU_AUXHFRCOCTRL_BAND_7MHZ: - if ( SYSTEM_GetProdRev() >= 19 ) { - ret = 6600000; - } else { - ret = 7000000; - } - break; - - case CMU_AUXHFRCOCTRL_BAND_11MHZ: - ret = 11000000; - break; - - case CMU_AUXHFRCOCTRL_BAND_14MHZ: - ret = 14000000; - break; - - case CMU_AUXHFRCOCTRL_BAND_21MHZ: - ret = 21000000; - break; - -#if defined(_CMU_AUXHFRCOCTRL_BAND_28MHZ) - case CMU_AUXHFRCOCTRL_BAND_28MHZ: - ret = 28000000; - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - -#else - /* Gecko has a fixed 14Mhz AUXHFRCO clock */ - ret = 14000000; - -#endif - - return ret; -} - -#if defined (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK) \ - || defined (_CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK) -/***************************************************************************//** - * @brief - * Get the HFSRCCLK frequency. - * - * @return - * HFSRCCLK Frequency in Hz - ******************************************************************************/ -static uint32_t hfSrcClkGet(void) -{ - uint32_t ret; - - ret = SystemHFClockGet(); - return ret * (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT)); -} -#endif - -/***************************************************************************//** - * @brief - * Get the Debug Trace clock frequency - * - * @return - * Debug Trace frequency in Hz - ******************************************************************************/ -static uint32_t dbgClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - clk = CMU_ClockSelectGet(cmuClock_DBG); - - switch (clk) { - case cmuSelect_HFCLK: - ret = SystemHFClockGet(); - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} - -#if defined(_CMU_ADCCTRL_MASK) -/***************************************************************************//** - * @brief - * Get the ADC n asynchronous clock frequency - * - * @return - * ADC n asynchronous frequency in Hz - ******************************************************************************/ -static uint32_t adcAsyncClkGet(uint32_t adc) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - switch (adc) { - case 0: - clk = CMU_ClockSelectGet(cmuClock_ADC0ASYNC); - break; - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case 1: - clk = CMU_ClockSelectGet(cmuClock_ADC1ASYNC); - break; -#endif - - default: - EFM_ASSERT(0); - return 0; - } - - switch (clk) { - case cmuSelect_Disabled: - ret = 0; - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_HFSRCCLK: - ret = hfSrcClkGet(); - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -#if defined(_CMU_SDIOCTRL_MASK) -/***************************************************************************//** - * @brief - * Get the SDIO reference clock frequency - * - * @return - * SDIO reference clock frequency in Hz - ******************************************************************************/ -static uint32_t sdioRefClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - clk = CMU_ClockSelectGet(cmuClock_SDIOREF); - - switch (clk) { - case cmuSelect_HFRCO: - ret = SystemHfrcoFreq; - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -#if defined(_CMU_QSPICTRL_MASK) -/***************************************************************************//** - * @brief - * Get the QSPI n reference clock frequency - * - * @return - * QSPI n reference clock frequency in Hz - ******************************************************************************/ -static uint32_t qspiRefClkGet(uint32_t qspi) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - switch (qspi) { - case 0: - clk = CMU_ClockSelectGet(cmuClock_QSPI0REF); - break; - - default: - EFM_ASSERT(0); - return 0; - } - - switch (clk) { - case cmuSelect_HFRCO: - ret = SystemHfrcoFreq; - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_AUXHFRCO: - ret = auxClkGet(); - break; - - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -#if defined(USBR_CLOCK_PRESENT) -/***************************************************************************//** - * @brief - * Get the USB rate clock frequency - * - * @return - * USB rate clock frequency in Hz - ******************************************************************************/ -static uint32_t usbRateClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - clk = CMU_ClockSelectGet(cmuClock_USBR); - - switch (clk) { - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; - - case cmuSelect_HFXO: - ret = SystemHFXOClockGet(); - break; - - case cmuSelect_HFXOX2: - ret = 2u * SystemHFXOClockGet(); - break; - - case cmuSelect_HFRCO: - ret = SystemHfrcoFreq; - break; - - case cmuSelect_LFXO: - ret = SystemLFXOClockGet(); - break; - - case cmuSelect_LFRCO: - ret = SystemLFRCOClockGet(); - break; - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - return ret; -} -#endif - -/***************************************************************************//** - * @brief - * Configure flash access wait states in order to support given core clock - * frequency. - * - * @param[in] coreFreq - * Core clock frequency to configure flash wait-states for - * - * @param[in] vscale - * Voltage Scale level. Supported levels are 0 and 2 where 0 is the default. - ******************************************************************************/ -static void flashWaitStateControl(uint32_t coreFreq, int vscale) -{ - uint32_t mode; - bool mscLocked; -#if defined(MSC_READCTRL_MODE_WS0SCBTP) - bool scbtpEn; /* Suppressed Conditional Branch Target Prefetch setting. */ -#endif - (void) vscale; /* vscale parameter is only used on some devices */ - - /* Make sure the MSC is unlocked */ - mscLocked = MSC->LOCK; - MSC->LOCK = MSC_UNLOCK_CODE; - - /* Get mode and SCBTP enable */ - mode = MSC->READCTRL & _MSC_READCTRL_MODE_MASK; -#if defined(MSC_READCTRL_MODE_WS0SCBTP) - /* Devices with MODE and SCBTP in same register field */ - switch (mode) { - case MSC_READCTRL_MODE_WS0: - case MSC_READCTRL_MODE_WS1: -#if defined(MSC_READCTRL_MODE_WS2) - case MSC_READCTRL_MODE_WS2: -#endif - scbtpEn = false; - break; - - default: /* WSxSCBTP */ - scbtpEn = true; - break; - } - - /* Set mode based on the core clock frequency and SCBTP enable */ - if (false) { - } -#if defined(MSC_READCTRL_MODE_WS2) - else if (coreFreq > CMU_MAX_FREQ_1WS) { - mode = (scbtpEn ? MSC_READCTRL_MODE_WS2SCBTP : MSC_READCTRL_MODE_WS2); - } -#endif - else if ((coreFreq <= CMU_MAX_FREQ_1WS) && (coreFreq > CMU_MAX_FREQ_0WS)) { - mode = (scbtpEn ? MSC_READCTRL_MODE_WS1SCBTP : MSC_READCTRL_MODE_WS1); - } else { - mode = (scbtpEn ? MSC_READCTRL_MODE_WS0SCBTP : MSC_READCTRL_MODE_WS0); - } - -#elif defined(_SILICON_LABS_32B_SERIES_1) && defined(_EMU_STATUS_VSCALE_MASK) - - /* These devices have specific requirements on the supported flash wait state - * depending on frequency and voltage scale level. */ - uint32_t i; - for (i = 0; i < FLASH_WS_TABLE_ENTRIES; i++) { - if ((flashWsTable[i].vscale == vscale) - && (coreFreq <= flashWsTable[i].maxFreq)) { - break; // found matching entry - } - } - - if (i == FLASH_WS_TABLE_ENTRIES) { - EFM_ASSERT(false); - mode = 3; // worst case flash wait state for unsupported cases - } else { - mode = flashWsTable[i].ws; - } - mode = mode << _MSC_READCTRL_MODE_SHIFT; - -#else - /* Devices where MODE and SCBTP are in separate fields and where the device - * either does not support voltage scale or where the voltage scale does - * not impact flash wait state configuration. */ - if (coreFreq <= CMU_MAX_FREQ_0WS) { - mode = 0; - } else if (coreFreq <= CMU_MAX_FREQ_1WS) { - mode = 1; - } -#if defined(MSC_READCTRL_MODE_WS2) - else if (coreFreq <= CMU_MAX_FREQ_2WS) { - mode = 2; - } -#endif -#if defined(MSC_READCTRL_MODE_WS3) - else if (coreFreq <= CMU_MAX_FREQ_3WS) { - mode = 3; - } -#endif - mode = mode << _MSC_READCTRL_MODE_SHIFT; - -#endif - - /* BUS_RegMaskedWrite cannot be used here as it would temporarily set the - mode field to WS0 */ - MSC->READCTRL = (MSC->READCTRL & ~_MSC_READCTRL_MODE_MASK) | mode; - - if (mscLocked) { - MSC->LOCK = 0; - } -} - -/***************************************************************************//** - * @brief - * Configure flash access wait states to most conservative setting for - * this target. Retain SCBTP (Suppressed Conditional Branch Target Prefetch) - * setting. - ******************************************************************************/ -static void flashWaitStateMax(void) -{ - flashWaitStateControl(SystemMaxCoreClockGet(), 0); -} - -#if defined(_MSC_RAMCTRL_RAMWSEN_MASK) -/***************************************************************************//** - * @brief - * Configure RAM access wait states in order to support given core clock - * frequency. - * - * @param[in] coreFreq - * Core clock frequency to configure RAM wait-states for - * - * @param[in] vscale - * Voltage Scale level. Supported levels are 0 and 2 where 0 is the default. - ******************************************************************************/ -static void setRamWaitState(uint32_t coreFreq, int vscale) -{ - uint32_t limit = 38000000; - if (vscale == 2) { - limit = 16000000; - } - - if (coreFreq > limit) { - BUS_RegMaskedSet(&MSC->RAMCTRL, (MSC_RAMCTRL_RAMWSEN - | MSC_RAMCTRL_RAM1WSEN - | MSC_RAMCTRL_RAM2WSEN)); - } else { - BUS_RegMaskedClear(&MSC->RAMCTRL, (MSC_RAMCTRL_RAMWSEN - | MSC_RAMCTRL_RAM1WSEN - | MSC_RAMCTRL_RAM2WSEN)); - } -} -#endif - -#if defined(_MSC_CTRL_WAITMODE_MASK) -/***************************************************************************//** - * @brief - * Configure wait state for peripheral accesses over the bus to support - * given bus clock frequency. - * - * @param[in] busFreq - * peripheral bus clock frequency to configure wait-states for - * - * @param[in] vscale - * The voltage scale to configure wait-states for. Expected values are - * 0 or 2. - * - * @li 0 = 1.2 V (VSCALE2) - * @li 2 = 1.0 V (VSCALE0) - * ******************************************************************************/ -static void setBusWaitState(uint32_t busFreq, int vscale) -{ - if ((busFreq > 50000000) && (vscale == 0)) { - BUS_RegMaskedSet(&MSC->CTRL, MSC_CTRL_WAITMODE_WS1); - } else { - BUS_RegMaskedClear(&MSC->CTRL, MSC_CTRL_WAITMODE_WS1); - } -} -#endif - -/***************************************************************************//** - * @brief - * Configure various wait states necessary to switch to a certain frequency - * and a certain voltage scale. - * - * @details - * This function will setup the necessary flash, bus and RAM wait states. - * Updating the wait state configuration must be done before - * increasing the clock frequency, and it must be done after decreasing the - * clock frequency. Updating the wait state configuration must be done before - * core voltage is decreased, and it must be done after a core voltage is - * increased. - * - * @param[in] coreFreq - * Core clock frequency to configure wait-states for. - * - * @param[in] vscale - * The voltage scale to configure wait-states for. Expected values are - * 0 or 2, higher number is lower voltage. - * - * @li 0 = 1.2 V (VSCALE2) - * @li 2 = 1.0 V (VSCALE0) - * - ******************************************************************************/ -void CMU_UpdateWaitStates(uint32_t freq, int vscale) -{ - flashWaitStateControl(freq, vscale); -#if defined(_MSC_RAMCTRL_RAMWSEN_MASK) - setRamWaitState(freq, vscale); -#endif -#if defined(_MSC_CTRL_WAITMODE_MASK) - setBusWaitState(freq, vscale); -#endif -} - -#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK) -/***************************************************************************//** - * @brief - * Return upper value for CMU_HFXOSTEADYSTATECTRL_REGISH - ******************************************************************************/ -static uint32_t getRegIshUpperVal(uint32_t steadyStateRegIsh) -{ - uint32_t regIshUpper; - const uint32_t upperMax = _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK - >> _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_SHIFT; - /* Add 3 as specified in register description for CMU_HFXOSTEADYSTATECTRL_REGISHUPPER. */ - regIshUpper = SL_MIN(steadyStateRegIsh + 3, upperMax); - regIshUpper <<= _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_SHIFT; - return regIshUpper; -} -#endif - -#if defined(_CMU_HFXOCTRL_MASK) -/***************************************************************************//** - * @brief - * Get the HFXO tuning mode - * - * @return - * The current HFXO tuning mode from the HFXOCTRL register. - ******************************************************************************/ -__STATIC_INLINE uint32_t getHfxoTuningMode(void) -{ -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - return (CMU->HFXOCTRL & _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK); -#else - return (CMU->HFXOCTRL & _CMU_HFXOCTRL_PEAKDETMODE_MASK); -#endif -} - -/***************************************************************************//** - * @brief - * Set the HFXO tuning mode - * - * @param[in] mode - * the new HFXO tuning mode, this can be HFXO_TUNING_MODE_AUTO or - * HFXO_TUNING_MODE_CMD. - ******************************************************************************/ -__STATIC_INLINE void setHfxoTuningMode(uint32_t mode) -{ -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) | mode; -#else - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETMODE_MASK) | mode; -#endif -} -#endif - -/***************************************************************************//** - * @brief - * Get the LFnCLK frequency based on current configuration. - * - * @param[in] lfClkBranch - * Selected LF branch - * - * @return - * The LFnCLK frequency in Hz. If no LFnCLK is selected (disabled), 0 is - * returned. - ******************************************************************************/ -static uint32_t lfClkGet(CMU_Clock_TypeDef lfClkBranch) -{ - uint32_t sel; - uint32_t ret = 0; - - switch (lfClkBranch) { - case cmuClock_LFA: - case cmuClock_LFB: -#if defined(_CMU_LFCCLKEN0_MASK) - case cmuClock_LFC: -#endif -#if defined(_CMU_LFECLKSEL_MASK) - case cmuClock_LFE: -#endif - break; - - default: - EFM_ASSERT(0); - break; - } - - sel = CMU_ClockSelectGet(lfClkBranch); - - /* Get clock select field */ - switch (lfClkBranch) { - case cmuClock_LFA: -#if defined(_CMU_LFCLKSEL_MASK) - sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFA_MASK) >> _CMU_LFCLKSEL_LFA_SHIFT; -#elif defined(_CMU_LFACLKSEL_MASK) - sel = (CMU->LFACLKSEL & _CMU_LFACLKSEL_LFA_MASK) >> _CMU_LFACLKSEL_LFA_SHIFT; -#else - EFM_ASSERT(0); -#endif - break; - - case cmuClock_LFB: -#if defined(_CMU_LFCLKSEL_MASK) - sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFB_MASK) >> _CMU_LFCLKSEL_LFB_SHIFT; -#elif defined(_CMU_LFBCLKSEL_MASK) - sel = (CMU->LFBCLKSEL & _CMU_LFBCLKSEL_LFB_MASK) >> _CMU_LFBCLKSEL_LFB_SHIFT; -#else - EFM_ASSERT(0); -#endif - break; - -#if defined(_CMU_LFCCLKEN0_MASK) - case cmuClock_LFC: -#if defined(_CMU_LFCLKSEL_LFC_MASK) - sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFC_MASK) >> _CMU_LFCLKSEL_LFC_SHIFT; -#elif defined(_CMU_LFCCLKSEL_LFC_MASK) - sel = (CMU->LFCCLKSEL & _CMU_LFCCLKSEL_LFC_MASK) >> _CMU_LFCCLKSEL_LFC_SHIFT; -#else - EFM_ASSERT(0); -#endif - break; -#endif - -#if defined(_CMU_LFECLKSEL_MASK) - case cmuClock_LFE: - sel = (CMU->LFECLKSEL & _CMU_LFECLKSEL_LFE_MASK) >> _CMU_LFECLKSEL_LFE_SHIFT; - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - - /* Get clock frequency */ -#if defined(_CMU_LFCLKSEL_MASK) - switch (sel) { - case _CMU_LFCLKSEL_LFA_LFRCO: - ret = SystemLFRCOClockGet(); - break; - - case _CMU_LFCLKSEL_LFA_LFXO: - ret = SystemLFXOClockGet(); - break; - -#if defined(_CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2) - case _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2: -#if defined(CMU_MAX_FREQ_HFLE) - /* HFLE bit is or'ed by hardware with HFCORECLKLEDIV to reduce the - * frequency of CMU_HFCORECLKLEDIV2. */ - ret = SystemCoreClockGet() / (1U << (getHfLeConfig() + 1)); -#else - ret = SystemCoreClockGet() / 2U; -#endif - break; -#endif - - case _CMU_LFCLKSEL_LFA_DISABLED: - ret = 0; -#if defined(CMU_LFCLKSEL_LFAE) - /* Check LF Extended bit setting for LFA or LFB ULFRCO clock */ - if ((lfClkBranch == cmuClock_LFA) || (lfClkBranch == cmuClock_LFB)) { - if (CMU->LFCLKSEL >> (lfClkBranch == cmuClock_LFA - ? _CMU_LFCLKSEL_LFAE_SHIFT - : _CMU_LFCLKSEL_LFBE_SHIFT)) { - ret = SystemULFRCOClockGet(); - } - } -#endif - break; - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } -#endif /* _CMU_LFCLKSEL_MASK */ - -#if defined(_CMU_LFACLKSEL_MASK) - switch (sel) { - case _CMU_LFACLKSEL_LFA_LFRCO: - ret = SystemLFRCOClockGet(); - break; - - case _CMU_LFACLKSEL_LFA_LFXO: - ret = SystemLFXOClockGet(); - break; - - case _CMU_LFACLKSEL_LFA_ULFRCO: - ret = SystemULFRCOClockGet(); - break; - -#if defined(CMU_LFACLKSEL_LFA_PLFRCO) - case _CMU_LFACLKSEL_LFA_PLFRCO: - ret = SystemLFRCOClockGet(); - break; -#endif - -#if defined(_CMU_LFACLKSEL_LFA_HFCLKLE) - case _CMU_LFACLKSEL_LFA_HFCLKLE: - ret = SystemCoreClockGet() - / CMU_Log2ToDiv(((CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) - >> _CMU_HFPRESC_HFCLKLEPRESC_SHIFT) + 1); - break; -#elif defined(_CMU_LFBCLKSEL_LFB_HFCLKLE) - case _CMU_LFBCLKSEL_LFB_HFCLKLE: - ret = SystemCoreClockGet() - / CMU_Log2ToDiv(((CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) - >> _CMU_HFPRESC_HFCLKLEPRESC_SHIFT) + 1); - break; -#endif - - case _CMU_LFACLKSEL_LFA_DISABLED: - ret = 0; - break; - } -#endif - - return ret; -} - -/***************************************************************************//** - * @brief - * Wait for ongoing sync of register(s) to low frequency domain to complete. - * - * @param[in] mask - * Bitmask corresponding to SYNCBUSY register defined bits, indicating - * registers that must complete any ongoing synchronization. - ******************************************************************************/ -__STATIC_INLINE void syncReg(uint32_t mask) -{ - /* Avoid deadlock if modifying the same register twice when freeze mode is */ - /* activated. */ - if (CMU->FREEZE & CMU_FREEZE_REGFREEZE) { - return; - } - - /* Wait for any pending previous write operation to have been completed */ - /* in low frequency domain */ - while (CMU->SYNCBUSY & mask) { - } -} - -#if defined(USBC_CLOCK_PRESENT) -/***************************************************************************//** - * @brief - * Get the USBC frequency - * - * @return - * USBC frequency in Hz - ******************************************************************************/ -static uint32_t usbCClkGet(void) -{ - uint32_t ret; - CMU_Select_TypeDef clk; - - /* Get selected clock source */ - clk = CMU_ClockSelectGet(cmuClock_USBC); - - switch (clk) { - case cmuSelect_LFXO: - ret = SystemLFXOClockGet(); - break; - case cmuSelect_LFRCO: - ret = SystemLFRCOClockGet(); - break; -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuSelect_USHFRCO: - ret = ushfrcoFreq; - break; -#endif - case cmuSelect_HFCLK: - ret = SystemHFClockGet(); - break; - default: - /* Clock is not enabled */ - ret = 0; - break; - } - return ret; -} -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -#if defined(_CMU_AUXHFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Get AUXHFRCO band in use. - * - * @return - * AUXHFRCO band in use. - ******************************************************************************/ -CMU_AUXHFRCOBand_TypeDef CMU_AUXHFRCOBandGet(void) -{ - return (CMU_AUXHFRCOBand_TypeDef)((CMU->AUXHFRCOCTRL - & _CMU_AUXHFRCOCTRL_BAND_MASK) - >> _CMU_AUXHFRCOCTRL_BAND_SHIFT); -} -#endif /* _CMU_AUXHFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Set AUXHFRCO band and the tuning value based on the value in the - * calibration table made during production. - * - * @param[in] band - * AUXHFRCO band to activate. - ******************************************************************************/ -void CMU_AUXHFRCOBandSet(CMU_AUXHFRCOBand_TypeDef band) -{ - uint32_t tuning; - - /* Read tuning value from calibration table */ - switch (band) { - case cmuAUXHFRCOBand_1MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND1_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND1_SHIFT; - break; - - case cmuAUXHFRCOBand_7MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND7_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND7_SHIFT; - break; - - case cmuAUXHFRCOBand_11MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND11_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND11_SHIFT; - break; - - case cmuAUXHFRCOBand_14MHz: - tuning = (DEVINFO->AUXHFRCOCAL0 & _DEVINFO_AUXHFRCOCAL0_BAND14_MASK) - >> _DEVINFO_AUXHFRCOCAL0_BAND14_SHIFT; - break; - - case cmuAUXHFRCOBand_21MHz: - tuning = (DEVINFO->AUXHFRCOCAL1 & _DEVINFO_AUXHFRCOCAL1_BAND21_MASK) - >> _DEVINFO_AUXHFRCOCAL1_BAND21_SHIFT; - break; - -#if defined(_CMU_AUXHFRCOCTRL_BAND_28MHZ) - case cmuAUXHFRCOBand_28MHz: - tuning = (DEVINFO->AUXHFRCOCAL1 & _DEVINFO_AUXHFRCOCAL1_BAND28_MASK) - >> _DEVINFO_AUXHFRCOCAL1_BAND28_SHIFT; - break; -#endif - - default: - EFM_ASSERT(0); - return; - } - - /* Set band/tuning */ - CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL - & ~(_CMU_AUXHFRCOCTRL_BAND_MASK - | _CMU_AUXHFRCOCTRL_TUNING_MASK)) - | (band << _CMU_AUXHFRCOCTRL_BAND_SHIFT) - | (tuning << _CMU_AUXHFRCOCTRL_TUNING_SHIFT); -} -#endif /* _CMU_AUXHFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -/**************************************************************************//** - * @brief - * Get the AUXHFRCO frequency calibration word in DEVINFO - * - * @param[in] freq - * Frequency in Hz - * - * @return - * AUXHFRCO calibration word for a given frequency - *****************************************************************************/ -static uint32_t CMU_AUXHFRCODevinfoGet(CMU_AUXHFRCOFreq_TypeDef freq) -{ - switch (freq) { - /* 1, 2 and 4MHz share the same calibration word */ - case cmuAUXHFRCOFreq_1M0Hz: - case cmuAUXHFRCOFreq_2M0Hz: - case cmuAUXHFRCOFreq_4M0Hz: - return DEVINFO->AUXHFRCOCAL0; - - case cmuAUXHFRCOFreq_7M0Hz: - return DEVINFO->AUXHFRCOCAL3; - - case cmuAUXHFRCOFreq_13M0Hz: - return DEVINFO->AUXHFRCOCAL6; - - case cmuAUXHFRCOFreq_16M0Hz: - return DEVINFO->AUXHFRCOCAL7; - - case cmuAUXHFRCOFreq_19M0Hz: - return DEVINFO->AUXHFRCOCAL8; - - case cmuAUXHFRCOFreq_26M0Hz: - return DEVINFO->AUXHFRCOCAL10; - - case cmuAUXHFRCOFreq_32M0Hz: - return DEVINFO->AUXHFRCOCAL11; - - case cmuAUXHFRCOFreq_38M0Hz: - return DEVINFO->AUXHFRCOCAL12; - -#if defined(DEVINFO_AUXHFRCOCAL14) - case cmuAUXHFRCOFreq_48M0Hz: - return DEVINFO->AUXHFRCOCAL13; - - case cmuAUXHFRCOFreq_50M0Hz: - return DEVINFO->AUXHFRCOCAL14; -#endif - - default: /* cmuAUXHFRCOFreq_UserDefined */ - return 0; - } -} -#endif /* _CMU_AUXHFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -/***************************************************************************//** - * @brief - * Get current AUXHFRCO frequency. - * - * @return - * AUXHFRCO frequency - ******************************************************************************/ -CMU_AUXHFRCOFreq_TypeDef CMU_AUXHFRCOBandGet(void) -{ - return auxHfrcoFreq; -} -#endif /* _CMU_AUXHFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_AUXHFRCOCTRL_FREQRANGE_MASK) -/***************************************************************************//** - * @brief - * Set AUXHFRCO calibration for the selected target frequency. - * - * @param[in] setFreq - * AUXHFRCO frequency to set - ******************************************************************************/ -void CMU_AUXHFRCOBandSet(CMU_AUXHFRCOFreq_TypeDef setFreq) -{ - uint32_t freqCal; - - /* Get DEVINFO index, set global auxHfrcoFreq */ - freqCal = CMU_AUXHFRCODevinfoGet(setFreq); - EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); - auxHfrcoFreq = setFreq; - - /* Wait for any previous sync to complete, and then set calibration data - for the selected frequency. */ - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT)) ; - - /* Set divider in AUXHFRCOCTRL for 1, 2 and 4MHz */ - switch (setFreq) { - case cmuAUXHFRCOFreq_1M0Hz: - freqCal = (freqCal & ~_CMU_AUXHFRCOCTRL_CLKDIV_MASK) - | CMU_AUXHFRCOCTRL_CLKDIV_DIV4; - break; - - case cmuAUXHFRCOFreq_2M0Hz: - freqCal = (freqCal & ~_CMU_AUXHFRCOCTRL_CLKDIV_MASK) - | CMU_AUXHFRCOCTRL_CLKDIV_DIV2; - break; - - case cmuAUXHFRCOFreq_4M0Hz: - freqCal = (freqCal & ~_CMU_AUXHFRCOCTRL_CLKDIV_MASK) - | CMU_AUXHFRCOCTRL_CLKDIV_DIV1; - break; - - default: - break; - } - CMU->AUXHFRCOCTRL = freqCal; -} -#endif /* _CMU_AUXHFRCOCTRL_FREQRANGE_MASK */ - -/***************************************************************************//** - * @brief - * Calibrate clock. - * - * @details - * Run a calibration for HFCLK against a selectable reference clock. Please - * refer to the reference manual, CMU chapter, for further details. - * - * @note - * This function will not return until calibration measurement is completed. - * - * @param[in] HFCycles - * The number of HFCLK cycles to run calibration. Increasing this number - * increases precision, but the calibration will take more time. - * - * @param[in] ref - * The reference clock used to compare HFCLK with. - * - * @return - * The number of ticks the reference clock after HFCycles ticks on the HF - * clock. - ******************************************************************************/ -uint32_t CMU_Calibrate(uint32_t HFCycles, CMU_Osc_TypeDef ref) -{ - EFM_ASSERT(HFCycles <= (_CMU_CALCNT_CALCNT_MASK >> _CMU_CALCNT_CALCNT_SHIFT)); - - /* Set reference clock source */ - switch (ref) { - case cmuOsc_LFXO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_LFXO; - break; - - case cmuOsc_LFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_LFRCO; - break; - - case cmuOsc_HFXO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_HFXO; - break; - - case cmuOsc_HFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_HFRCO; - break; - - case cmuOsc_AUXHFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_AUXHFRCO; - break; - -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuOsc_USHFRCO: - CMU->CALCTRL = CMU_CALCTRL_UPSEL_USHFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - return 0; - } - - /* Set top value */ - CMU->CALCNT = HFCycles; - - /* Start calibration */ - CMU->CMD = CMU_CMD_CALSTART; - -#if defined(CMU_STATUS_CALRDY) - /* Wait until calibration completes */ - while (!BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALRDY_SHIFT)) { - } -#else - /* Wait until calibration completes */ - while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT)) { - } -#endif - - return CMU->CALCNT; -} - -#if defined(_CMU_CALCTRL_UPSEL_MASK) && defined(_CMU_CALCTRL_DOWNSEL_MASK) -/***************************************************************************//** - * @brief - * Configure clock calibration - * - * @details - * Configure a calibration for a selectable clock source against another - * selectable reference clock. - * Refer to the reference manual, CMU chapter, for further details. - * - * @note - * After configuration, a call to CMU_CalibrateStart() is required, and - * the resulting calibration value can be read out with the - * CMU_CalibrateCountGet() function call. - * - * @param[in] downCycles - * The number of downSel clock cycles to run calibration. Increasing this - * number increases precision, but the calibration will take more time. - * - * @param[in] downSel - * The clock which will be counted down downCycles - * - * @param[in] upSel - * The reference clock, the number of cycles generated by this clock will - * be counted and added up, the result can be given with the - * CMU_CalibrateCountGet() function call. - ******************************************************************************/ -void CMU_CalibrateConfig(uint32_t downCycles, CMU_Osc_TypeDef downSel, - CMU_Osc_TypeDef upSel) -{ - /* Keep untouched configuration settings */ - uint32_t calCtrl = CMU->CALCTRL - & ~(_CMU_CALCTRL_UPSEL_MASK | _CMU_CALCTRL_DOWNSEL_MASK); - - /* 20 bits of precision to calibration count register */ - EFM_ASSERT(downCycles <= (_CMU_CALCNT_CALCNT_MASK >> _CMU_CALCNT_CALCNT_SHIFT)); - - /* Set down counting clock source - down counter */ - switch (downSel) { - case cmuOsc_LFXO: - calCtrl |= CMU_CALCTRL_DOWNSEL_LFXO; - break; - - case cmuOsc_LFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_LFRCO; - break; - - case cmuOsc_HFXO: - calCtrl |= CMU_CALCTRL_DOWNSEL_HFXO; - break; - - case cmuOsc_HFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_HFRCO; - break; - - case cmuOsc_AUXHFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_AUXHFRCO; - break; - -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuOsc_USHFRCO: - calCtrl |= CMU_CALCTRL_DOWNSEL_USHFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - - /* Set top value to be counted down by the downSel clock */ - CMU->CALCNT = downCycles; - - /* Set reference clock source - up counter */ - switch (upSel) { - case cmuOsc_LFXO: - calCtrl |= CMU_CALCTRL_UPSEL_LFXO; - break; - - case cmuOsc_LFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_LFRCO; - break; - - case cmuOsc_HFXO: - calCtrl |= CMU_CALCTRL_UPSEL_HFXO; - break; - - case cmuOsc_HFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_HFRCO; - break; - - case cmuOsc_AUXHFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_AUXHFRCO; - break; - -#if defined (_CMU_USHFRCOCTRL_MASK) - case cmuOsc_USHFRCO: - calCtrl |= CMU_CALCTRL_UPSEL_USHFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - - CMU->CALCTRL = calCtrl; -} -#endif - -/***************************************************************************//** - * @brief - * Get calibration count register - * @note - * If continuous calibrartion mode is active, calibration busy will almost - * always be off, and we just need to read the value, where the normal case - * would be that this function call has been triggered by the CALRDY - * interrupt flag. - * @return - * Calibration count, the number of UPSEL clocks (see CMU_CalibrateConfig) - * in the period of DOWNSEL oscillator clock cycles configured by a previous - * write operation to CMU->CALCNT - ******************************************************************************/ -uint32_t CMU_CalibrateCountGet(void) -{ - /* Wait until calibration completes, UNLESS continuous calibration mode is */ - /* active */ -#if defined(CMU_CALCTRL_CONT) - if (!BUS_RegBitRead(&CMU->CALCTRL, _CMU_CALCTRL_CONT_SHIFT)) { -#if defined(CMU_STATUS_CALRDY) - /* Wait until calibration completes */ - while (!BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALRDY_SHIFT)) { - } -#else - /* Wait until calibration completes */ - while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT)) { - } -#endif - } -#else - while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT)) { - } -#endif - return CMU->CALCNT; -} - -/***************************************************************************//** - * @brief - * Get clock divisor/prescaler. - * - * @param[in] clock - * Clock point to get divisor/prescaler for. Notice that not all clock points - * have a divisor/prescaler. Please refer to CMU overview in reference manual. - * - * @return - * The current clock point divisor/prescaler. 1 is returned - * if @p clock specifies a clock point without a divisor/prescaler. - ******************************************************************************/ -CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) -{ -#if defined(_SILICON_LABS_32B_SERIES_1) - return 1 + (uint32_t)CMU_ClockPrescGet(clock); - -#elif defined(_SILICON_LABS_32B_SERIES_0) - uint32_t divReg; - CMU_ClkDiv_TypeDef ret; - - /* Get divisor reg id */ - divReg = (clock >> CMU_DIV_REG_POS) & CMU_DIV_REG_MASK; - - switch (divReg) { -#if defined(_CMU_CTRL_HFCLKDIV_MASK) - case CMU_HFCLKDIV_REG: - ret = 1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK) - >> _CMU_CTRL_HFCLKDIV_SHIFT); - break; -#endif - - case CMU_HFPERCLKDIV_REG: - ret = (CMU_ClkDiv_TypeDef)((CMU->HFPERCLKDIV - & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - >> _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; - - case CMU_HFCORECLKDIV_REG: - ret = (CMU_ClkDiv_TypeDef)((CMU->HFCORECLKDIV - & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) - >> _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { - case cmuClock_RTC: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) - >> _CMU_LFAPRESC0_RTC_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; - -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LCD_MASK) - case cmuClock_LCDpre: - ret = (CMU_ClkDiv_TypeDef)(((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT) - + CMU_DivToLog2(cmuClkDiv_16)); - ret = CMU_Log2ToDiv(ret); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LESENSE_MASK) - case cmuClock_LESENSE: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) - >> _CMU_LFAPRESC0_LESENSE_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - - default: - EFM_ASSERT(0); - ret = cmuClkDiv_1; - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - ret = (CMU_ClkDiv_TypeDef)((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT); - ret = CMU_Log2ToDiv(ret); - break; -#endif - - default: - EFM_ASSERT(0); - ret = cmuClkDiv_1; - break; - } - break; - - default: - EFM_ASSERT(0); - ret = cmuClkDiv_1; - break; - } - - return ret; -#endif -} - -/***************************************************************************//** - * @brief - * Set clock divisor/prescaler. - * - * @note - * If setting a LF clock prescaler, synchronization into the low frequency - * domain is required. If the same register is modified before a previous - * update has completed, this function will stall until the previous - * synchronization has completed. Please refer to CMU_FreezeEnable() for - * a suggestion on how to reduce stalling time in some use cases. - * - * @param[in] clock - * Clock point to set divisor/prescaler for. Notice that not all clock points - * have a divisor/prescaler, please refer to CMU overview in the reference - * manual. - * - * @param[in] div - * The clock divisor to use (<= cmuClkDiv_512). - ******************************************************************************/ -void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) -{ -#if defined(_SILICON_LABS_32B_SERIES_1) - CMU_ClockPrescSet(clock, (CMU_ClkPresc_TypeDef)(div - 1)); - -#elif defined(_SILICON_LABS_32B_SERIES_0) - uint32_t freq; - uint32_t divReg; - - /* Get divisor reg id */ - divReg = (clock >> CMU_DIV_REG_POS) & CMU_DIV_REG_MASK; - - switch (divReg) { -#if defined(_CMU_CTRL_HFCLKDIV_MASK) - case CMU_HFCLKDIV_REG: - EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_8)); - - /* Configure worst case wait states for flash access before setting divisor */ - flashWaitStateMax(); - - /* Set divider */ - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFCLKDIV_MASK) - | ((div - 1) << _CMU_CTRL_HFCLKDIV_SHIFT); - - /* Update CMSIS core clock variable */ - /* (The function will update the global variable) */ - freq = SystemCoreClockGet(); - - /* Optimize flash access wait state setting for current core clk */ - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - break; -#endif - - case CMU_HFPERCLKDIV_REG: - EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - CMU->HFPERCLKDIV = (CMU->HFPERCLKDIV & ~_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - | (div << _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT); - break; - - case CMU_HFCORECLKDIV_REG: - EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); - - /* Configure worst case wait states for flash access before setting divisor */ - flashWaitStateMax(); - -#if defined(CMU_MAX_FREQ_HFLE) - setHfLeConfig(SystemHFClockGet() / div); -#endif - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->HFCORECLKDIV = (CMU->HFCORECLKDIV - & ~_CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) - | (div << _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT); - - /* Update CMSIS core clock variable */ - /* (The function will update the global variable) */ - freq = SystemCoreClockGet(); - - /* Optimize wait state setting for current core clk */ - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { - case cmuClock_RTC: - EFM_ASSERT(div <= cmuClkDiv_32768); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTC_MASK) - | (div << _CMU_LFAPRESC0_RTC_SHIFT); - break; - -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - EFM_ASSERT(div <= cmuClkDiv_32768); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER0_MASK) - | (div << _CMU_LFAPRESC0_LETIMER0_SHIFT); - break; -#endif - -#if defined(LCD_PRESENT) - case cmuClock_LCDpre: - EFM_ASSERT((div >= cmuClkDiv_16) && (div <= cmuClkDiv_128)); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LCD_MASK) - | ((div - CMU_DivToLog2(cmuClkDiv_16)) - << _CMU_LFAPRESC0_LCD_SHIFT); - break; -#endif /* defined(LCD_PRESENT) */ - -#if defined(LESENSE_PRESENT) - case cmuClock_LESENSE: - EFM_ASSERT(div <= cmuClkDiv_8); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LESENSE_MASK) - | (div << _CMU_LFAPRESC0_LESENSE_SHIFT); - break; -#endif /* defined(LESENSE_PRESENT) */ - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - EFM_ASSERT(div <= cmuClkDiv_8); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART0_MASK) - | (((uint32_t)div) << _CMU_LFBPRESC0_LEUART0_SHIFT); - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - EFM_ASSERT(div <= cmuClkDiv_8); - - /* LF register about to be modified require sync. busy check */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - /* Convert to correct scale */ - div = CMU_DivToLog2(div); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART1_MASK) - | (((uint32_t)div) << _CMU_LFBPRESC0_LEUART1_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - default: - EFM_ASSERT(0); - break; - } -#endif -} - -/***************************************************************************//** - * @brief - * Enable/disable a clock. - * - * @details - * In general, module clocking is disabled after a reset. If a module - * clock is disabled, the registers of that module are not accessible and - * reading from such registers may return undefined values. Writing to - * registers of clock disabled modules have no effect. One should normally - * avoid accessing module registers of a module with a disabled clock. - * - * @note - * If enabling/disabling a LF clock, synchronization into the low frequency - * domain is required. If the same register is modified before a previous - * update has completed, this function will stall until the previous - * synchronization has completed. Please refer to CMU_FreezeEnable() for - * a suggestion on how to reduce stalling time in some use cases. - * - * @param[in] clock - * The clock to enable/disable. Notice that not all defined clock - * points have separate enable/disable control, please refer to CMU overview - * in reference manual. - * - * @param[in] enable - * @li true - enable specified clock. - * @li false - disable specified clock. - ******************************************************************************/ -void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) -{ - volatile uint32_t *reg; - uint32_t bit; - uint32_t sync = 0; - - /* Identify enable register */ - switch ((clock >> CMU_EN_REG_POS) & CMU_EN_REG_MASK) { -#if defined(_CMU_CTRL_HFPERCLKEN_MASK) - case CMU_CTRL_EN_REG: - reg = &CMU->CTRL; - break; -#endif - -#if defined(_CMU_HFCORECLKEN0_MASK) - case CMU_HFCORECLKEN0_EN_REG: - reg = &CMU->HFCORECLKEN0; -#if defined(CMU_MAX_FREQ_HFLE) - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); -#endif - break; -#endif - -#if defined(_CMU_HFBUSCLKEN0_MASK) - case CMU_HFBUSCLKEN0_EN_REG: - reg = &CMU->HFBUSCLKEN0; - break; -#endif - -#if defined(_CMU_HFPERCLKDIV_MASK) - case CMU_HFPERCLKDIV_EN_REG: - reg = &CMU->HFPERCLKDIV; - break; -#endif - - case CMU_HFPERCLKEN0_EN_REG: - reg = &CMU->HFPERCLKEN0; - break; - -#if defined(_CMU_HFPERCLKEN1_MASK) - case CMU_HFPERCLKEN1_EN_REG: - reg = &CMU->HFPERCLKEN1; - break; -#endif - - case CMU_LFACLKEN0_EN_REG: - reg = &CMU->LFACLKEN0; - sync = CMU_SYNCBUSY_LFACLKEN0; - break; - - case CMU_LFBCLKEN0_EN_REG: - reg = &CMU->LFBCLKEN0; - sync = CMU_SYNCBUSY_LFBCLKEN0; - break; - -#if defined(_CMU_LFCCLKEN0_MASK) - case CMU_LFCCLKEN0_EN_REG: - reg = &CMU->LFCCLKEN0; - sync = CMU_SYNCBUSY_LFCCLKEN0; - break; -#endif - -#if defined(_CMU_LFECLKEN0_MASK) - case CMU_LFECLKEN0_EN_REG: - reg = &CMU->LFECLKEN0; - sync = CMU_SYNCBUSY_LFECLKEN0; - break; -#endif - -#if defined(_CMU_SDIOCTRL_MASK) - case CMU_SDIOREF_EN_REG: - reg = &CMU->SDIOCTRL; - enable = !enable; - break; -#endif - -#if defined(_CMU_QSPICTRL_MASK) - case CMU_QSPI0REF_EN_REG: - reg = &CMU->QSPICTRL; - enable = !enable; - break; -#endif -#if defined(_CMU_USBCTRL_MASK) - case CMU_USBRCLK_EN_REG: - reg = &CMU->USBCTRL; - break; -#endif - - case CMU_PCNT_EN_REG: - reg = &CMU->PCNTCTRL; - break; - - default: /* Cannot enable/disable clock point */ - EFM_ASSERT(0); - return; - } - - /* Get bit position used to enable/disable */ - bit = (clock >> CMU_EN_BIT_POS) & CMU_EN_BIT_MASK; - - /* LF synchronization required? */ - if (sync) { - syncReg(sync); - } - - /* Set/clear bit as requested */ - BUS_RegBitWrite(reg, bit, enable); -} - -/***************************************************************************//** - * @brief - * Get clock frequency for a clock point. - * - * @param[in] clock - * Clock point to fetch frequency for. - * - * @return - * The current frequency in Hz. - ******************************************************************************/ -uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock) -{ - uint32_t ret; - - switch (clock & (CMU_CLK_BRANCH_MASK << CMU_CLK_BRANCH_POS)) { - case (CMU_HF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - break; - - case (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - /* Calculate frequency after HFPER divider. */ -#if defined(_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - ret >>= (CMU->HFPERCLKDIV & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) - >> _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT; -#endif -#if defined(_CMU_HFPERPRESC_PRESC_MASK) - ret /= 1U + ((CMU->HFPERPRESC & _CMU_HFPERPRESC_PRESC_MASK) - >> _CMU_HFPERPRESC_PRESC_SHIFT); -#endif - break; - -#if defined(_SILICON_LABS_32B_SERIES_1) -#if defined(CRYPTO_PRESENT) \ - || defined(LDMA_PRESENT) \ - || defined(GPCRC_PRESENT) \ - || defined(PRS_PRESENT) \ - || defined(GPIO_PRESENT) - case (CMU_HFBUS_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - break; -#endif - - case (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - ret /= 1U + ((CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) - >> _CMU_HFCOREPRESC_PRESC_SHIFT); - break; - - case (CMU_HFEXP_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = SystemHFClockGet(); - ret /= 1U + ((CMU->HFEXPPRESC & _CMU_HFEXPPRESC_PRESC_MASK) - >> _CMU_HFEXPPRESC_PRESC_SHIFT); - break; -#endif - -#if defined(_SILICON_LABS_32B_SERIES_0) -#if defined(AES_PRESENT) \ - || defined(DMA_PRESENT) \ - || defined(EBI_PRESENT) \ - || defined(USB_PRESENT) - case (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - { - ret = SystemCoreClockGet(); - } break; -#endif -#endif - - case (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - break; - -#if defined(_CMU_LFACLKEN0_RTC_MASK) - case (CMU_RTC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) - >> _CMU_LFAPRESC0_RTC_SHIFT; - break; -#endif - -#if defined(_CMU_LFECLKEN0_RTCC_MASK) - case (CMU_RTCC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFE); - break; -#endif - -#if defined(_CMU_LFACLKEN0_LETIMER0_MASK) - case (CMU_LETIMER0_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT; -#else - ret /= CMU_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFACLKEN0_LCD_MASK) - case (CMU_LCDPRE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= ((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT) - + CMU_DivToLog2(cmuClkDiv_16); -#else - ret /= CMU_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT); -#endif - break; - -#if defined(_CMU_LCDCTRL_MASK) - case (CMU_LCD_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT; - ret /= 1U + ((CMU->LCDCTRL & _CMU_LCDCTRL_FDIV_MASK) - >> _CMU_LCDCTRL_FDIV_SHIFT); - break; -#endif -#endif - -#if defined(_CMU_LFACLKEN0_LESENSE_MASK) - case (CMU_LESENSE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFA); - ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) - >> _CMU_LFAPRESC0_LESENSE_SHIFT; - break; -#endif - - case (CMU_LFB_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); - break; - -#if defined(_CMU_LFBCLKEN0_LEUART0_MASK) - case (CMU_LEUART0_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT; -#else - ret /= CMU_Log2ToDiv((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFBCLKEN0_LEUART1_MASK) - case (CMU_LEUART1_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); -#if defined(_SILICON_LABS_32B_SERIES_0) - ret >>= (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT; -#else - ret /= CMU_Log2ToDiv((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFBCLKEN0_CSEN_MASK) - case (CMU_CSEN_LF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFB); - ret /= CMU_Log2ToDiv(((CMU->LFBPRESC0 & _CMU_LFBPRESC0_CSEN_MASK) - >> _CMU_LFBPRESC0_CSEN_SHIFT) + 4); - break; -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) - case (CMU_LFE_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = lfClkGet(cmuClock_LFE); - break; -#endif - - case (CMU_DBG_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = dbgClkGet(); - break; - - case (CMU_AUX_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = auxClkGet(); - break; - -#if defined(USBC_CLOCK_PRESENT) - case (CMU_USBC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = usbCClkGet(); - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC0CLKSEL_MASK) - case (CMU_ADC0ASYNC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = adcAsyncClkGet(0); -#if defined(_CMU_ADCCTRL_ADC0CLKDIV_MASK) - ret /= 1U + ((CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC0CLKDIV_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case (CMU_ADC1ASYNC_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = adcAsyncClkGet(1); -#if defined(_CMU_ADCCTRL_ADC1CLKDIV_MASK) - ret /= 1U + ((CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC1CLKDIV_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - case (CMU_SDIOREF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = sdioRefClkGet(); - break; -#endif - -#if defined(_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - case (CMU_QSPI0REF_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = qspiRefClkGet(0); - break; -#endif - -#if defined(USBR_CLOCK_PRESENT) - case (CMU_USBR_CLK_BRANCH << CMU_CLK_BRANCH_POS): - ret = usbRateClkGet(); - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - - return ret; -} - -#if defined(_SILICON_LABS_32B_SERIES_1) -/***************************************************************************//** - * @brief - * Get clock prescaler. - * - * @param[in] clock - * Clock point to get the prescaler for. Notice that not all clock points - * have a prescaler. Please refer to CMU overview in reference manual. - * - * @return - * The prescaler value of the current clock point. 0 is returned - * if @p clock specifies a clock point without a prescaler. - ******************************************************************************/ -uint32_t CMU_ClockPrescGet(CMU_Clock_TypeDef clock) -{ - uint32_t prescReg; - uint32_t ret; - - /* Get prescaler register id. */ - prescReg = (clock >> CMU_PRESC_REG_POS) & CMU_PRESC_REG_MASK; - - switch (prescReg) { - case CMU_HFPRESC_REG: - ret = (CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT; - break; - - case CMU_HFEXPPRESC_REG: - ret = (CMU->HFEXPPRESC & _CMU_HFEXPPRESC_PRESC_MASK) - >> _CMU_HFEXPPRESC_PRESC_SHIFT; - break; - - case CMU_HFCLKLEPRESC_REG: - ret = (CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) - >> _CMU_HFPRESC_HFCLKLEPRESC_SHIFT; - break; - - case CMU_HFPERPRESC_REG: - ret = (CMU->HFPERPRESC & _CMU_HFPERPRESC_PRESC_MASK) - >> _CMU_HFPERPRESC_PRESC_SHIFT; - break; - - case CMU_HFCOREPRESC_REG: - ret = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) - >> _CMU_HFCOREPRESC_PRESC_SHIFT; - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) - >> _CMU_LFAPRESC0_LETIMER0_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_LESENSE_MASK) - case cmuClock_LESENSE: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) - >> _CMU_LFAPRESC0_LESENSE_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_LETIMER1_MASK) - case cmuClock_LETIMER1: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER1_MASK) - >> _CMU_LFAPRESC0_LETIMER1_SHIFT; - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_LCD_MASK) - case cmuClock_LCD: - case cmuClock_LCDpre: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) - >> _CMU_LFAPRESC0_LCD_SHIFT; - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFAPRESC0_RTC_MASK) - case cmuClock_RTC: - ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) - >> _CMU_LFAPRESC0_RTC_SHIFT; - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) - >> _CMU_LFBPRESC0_LEUART0_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) - >> _CMU_LFBPRESC0_LEUART1_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret) - 1U; - break; -#endif - -#if defined(_CMU_LFBPRESC0_CSEN_MASK) - case cmuClock_CSEN_LF: - ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_CSEN_MASK) - >> _CMU_LFBPRESC0_CSEN_SHIFT; - /* Convert the exponent to prescaler value. */ - ret = CMU_Log2ToDiv(ret + 4) - 1U; - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - break; - - case CMU_LFEPRESC0_REG: - switch (clock) { -#if defined(RTCC_PRESENT) - case cmuClock_RTCC: - /* No need to compute with LFEPRESC0_RTCC - DIV1 is the only */ - /* allowed value. Convert the exponent to prescaler value. */ - ret = _CMU_LFEPRESC0_RTCC_DIV1; - break; - - default: - EFM_ASSERT(0); - ret = 0U; - break; -#endif - } - break; - - case CMU_ADCASYNCDIV_REG: - switch (clock) { -#if defined(_CMU_ADCCTRL_ADC0CLKDIV_MASK) - case cmuClock_ADC0ASYNC: - ret = (CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC0CLKDIV_SHIFT; - break; -#endif -#if defined(_CMU_ADCCTRL_ADC1CLKDIV_MASK) - case cmuClock_ADC1ASYNC: - ret = (CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKDIV_MASK) - >> _CMU_ADCCTRL_ADC1CLKDIV_SHIFT; - break; -#endif - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - break; - - default: - EFM_ASSERT(0); - ret = 0U; - break; - } - - return ret; -} -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) -/***************************************************************************//** - * @brief - * Set clock prescaler. - * - * @note - * If setting a LF clock prescaler, synchronization into the low frequency - * domain is required. If the same register is modified before a previous - * update has completed, this function will stall until the previous - * synchronization has completed. Please refer to CMU_FreezeEnable() for - * a suggestion on how to reduce stalling time in some use cases. - * - * @param[in] clock - * Clock point to set prescaler for. Notice that not all clock points - * have a prescaler, please refer to CMU overview in the reference manual. - * - * @param[in] presc - * The clock prescaler to use. - ******************************************************************************/ -void CMU_ClockPrescSet(CMU_Clock_TypeDef clock, CMU_ClkPresc_TypeDef presc) -{ - uint32_t freq; - uint32_t prescReg; - - /* Get divisor reg id */ - prescReg = (clock >> CMU_PRESC_REG_POS) & CMU_PRESC_REG_MASK; - - switch (prescReg) { - case CMU_HFPRESC_REG: - EFM_ASSERT(presc < 32U); - - /* Configure worst case wait-states for flash and HFLE. */ - flashWaitStateMax(); - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); - - CMU->HFPRESC = (CMU->HFPRESC & ~_CMU_HFPRESC_PRESC_MASK) - | (presc << _CMU_HFPRESC_PRESC_SHIFT); - - /* Update CMSIS core clock variable (this function updates the global variable). - Optimize flash and HFLE wait states. */ - freq = SystemCoreClockGet(); - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - break; - - case CMU_HFEXPPRESC_REG: - EFM_ASSERT(presc < 32U); - - CMU->HFEXPPRESC = (CMU->HFEXPPRESC & ~_CMU_HFEXPPRESC_PRESC_MASK) - | (presc << _CMU_HFEXPPRESC_PRESC_SHIFT); - break; - - case CMU_HFCLKLEPRESC_REG: -#if defined (CMU_HFPRESC_HFCLKLEPRESC_DIV8) - EFM_ASSERT(presc < 3U); -#else - EFM_ASSERT(presc < 2U); -#endif - - /* Specifies the clock divider for HFCLKLE. This clock divider must be set - * high enough for the divided clock frequency to be at or below the max - * frequency allowed for the HFCLKLE clock. */ - CMU->HFPRESC = (CMU->HFPRESC & ~_CMU_HFPRESC_HFCLKLEPRESC_MASK) - | (presc << _CMU_HFPRESC_HFCLKLEPRESC_SHIFT); - break; - - case CMU_HFPERPRESC_REG: - EFM_ASSERT(presc < 512U); - - CMU->HFPERPRESC = (CMU->HFPERPRESC & ~_CMU_HFPERPRESC_PRESC_MASK) - | (presc << _CMU_HFPERPRESC_PRESC_SHIFT); - break; - - case CMU_HFCOREPRESC_REG: - EFM_ASSERT(presc < 512U); - - /* Configure worst case wait-states for flash and HFLE. */ - flashWaitStateMax(); - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); - - CMU->HFCOREPRESC = (CMU->HFCOREPRESC & ~_CMU_HFCOREPRESC_PRESC_MASK) - | (presc << _CMU_HFCOREPRESC_PRESC_SHIFT); - - /* Update CMSIS core clock variable (this function updates the global variable). - Optimize flash and HFLE wait states. */ - freq = SystemCoreClockGet(); - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - break; - - case CMU_LFAPRESC0_REG: - switch (clock) { -#if defined(RTC_PRESENT) - case cmuClock_RTC: - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTC_MASK) - | (presc << _CMU_LFAPRESC0_RTC_SHIFT); - break; -#endif - -#if defined(RTCC_PRESENT) - case cmuClock_RTCC: -#if defined(_CMU_LFEPRESC0_RTCC_MASK) - /* DIV1 is the only accepted value. */ - EFM_ASSERT(presc <= 0U); - - /* LF register about to be modified require sync. Busy check.. */ - syncReg(CMU_SYNCBUSY_LFEPRESC0); - - CMU->LFEPRESC0 = (CMU->LFEPRESC0 & ~_CMU_LFEPRESC0_RTCC_MASK) - | (presc << _CMU_LFEPRESC0_RTCC_SHIFT); -#else - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTCC_MASK) - | (presc << _CMU_LFAPRESC0_RTCC_SHIFT); -#endif - break; -#endif - -#if defined(_CMU_LFAPRESC0_LETIMER0_MASK) - case cmuClock_LETIMER0: - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER0_MASK) - | (presc << _CMU_LFAPRESC0_LETIMER0_SHIFT); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LESENSE_MASK) - case cmuClock_LESENSE: - EFM_ASSERT(presc <= 8); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LESENSE_MASK) - | (presc << _CMU_LFAPRESC0_LESENSE_SHIFT); - break; -#endif - -#if defined(_CMU_LFAPRESC0_LCD_MASK) - case cmuClock_LCDpre: - case cmuClock_LCD: - { - EFM_ASSERT(presc <= 32768U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFAPRESC0); - - CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LCD_MASK) - | (presc << _CMU_LFAPRESC0_LCD_SHIFT); - } break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_LFBPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFBPRESC0_LEUART0_MASK) - case cmuClock_LEUART0: - EFM_ASSERT(presc <= 8U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART0_MASK) - | (presc << _CMU_LFBPRESC0_LEUART0_SHIFT); - break; -#endif - -#if defined(_CMU_LFBPRESC0_LEUART1_MASK) - case cmuClock_LEUART1: - EFM_ASSERT(presc <= 8U); - - /* Convert prescaler value to DIV exponent scale. */ - presc = CMU_PrescToLog2(presc); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART1_MASK) - | (presc << _CMU_LFBPRESC0_LEUART1_SHIFT); - break; -#endif - -#if defined(_CMU_LFBPRESC0_CSEN_MASK) - case cmuClock_CSEN_LF: - EFM_ASSERT((presc <= 127U) && (presc >= 15U)); - - /* Convert prescaler value to DIV exponent scale. - * DIV16 is the lowest supported prescaler. */ - presc = CMU_PrescToLog2(presc) - 4; - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFBPRESC0); - - CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_CSEN_MASK) - | (presc << _CMU_LFBPRESC0_CSEN_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_LFEPRESC0_REG: - switch (clock) { -#if defined(_CMU_LFEPRESC0_RTCC_MASK) - case cmuClock_RTCC: - EFM_ASSERT(presc <= 0U); - - /* LF register about to be modified require sync. Busy check. */ - syncReg(CMU_SYNCBUSY_LFEPRESC0); - - CMU->LFEPRESC0 = (CMU->LFEPRESC0 & ~_CMU_LFEPRESC0_RTCC_MASK) - | (presc << _CMU_LFEPRESC0_RTCC_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } - break; - - case CMU_ADCASYNCDIV_REG: - switch (clock) { -#if defined(_CMU_ADCCTRL_ADC0CLKDIV_MASK) - case cmuClock_ADC0ASYNC: - EFM_ASSERT(presc <= 3); - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC0CLKDIV_MASK) - | (presc << _CMU_ADCCTRL_ADC0CLKDIV_SHIFT); - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKDIV_MASK) - case cmuClock_ADC1ASYNC: - EFM_ASSERT(presc <= 3); - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC1CLKDIV_MASK) - | (presc << _CMU_ADCCTRL_ADC1CLKDIV_SHIFT); - break; -#endif - default: - EFM_ASSERT(0); - break; - } - break; - - default: - EFM_ASSERT(0); - break; - } -} -#endif - -/***************************************************************************//** - * @brief - * Get currently selected reference clock used for a clock branch. - * - * @param[in] clock - * Clock branch to fetch selected ref. clock for. One of: - * @li #cmuClock_HF - * @li #cmuClock_LFA - * @li #cmuClock_LFB @if _CMU_LFCLKSEL_LFAE_ULFRCO - * @li #cmuClock_LFC - * @endif @if _SILICON_LABS_32B_SERIES_1 - * @li #cmuClock_LFE - * @endif - * @li #cmuClock_DBG @if DOXYDOC_USB_PRESENT - * @li #cmuClock_USBC - * @endif - * - * @return - * Reference clock used for clocking selected branch, #cmuSelect_Error if - * invalid @p clock provided. - ******************************************************************************/ -CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock) -{ - CMU_Select_TypeDef ret = cmuSelect_Disabled; - uint32_t selReg; - - selReg = (clock >> CMU_SEL_REG_POS) & CMU_SEL_REG_MASK; - - switch (selReg) { - case CMU_HFCLKSEL_REG: -#if defined(_CMU_HFCLKSTATUS_MASK) - switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { - case CMU_HFCLKSTATUS_SELECTED_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_HFCLKSTATUS_SELECTED_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_HFCLKSTATUS_SELECTED_HFXO: - ret = cmuSelect_HFXO; - break; - - default: - ret = cmuSelect_HFRCO; - break; - } -#else - switch (CMU->STATUS - & (CMU_STATUS_HFRCOSEL - | CMU_STATUS_HFXOSEL - | CMU_STATUS_LFRCOSEL -#if defined(CMU_STATUS_USHFRCODIV2SEL) - | CMU_STATUS_USHFRCODIV2SEL -#endif - | CMU_STATUS_LFXOSEL)) { - case CMU_STATUS_LFXOSEL: - ret = cmuSelect_LFXO; - break; - - case CMU_STATUS_LFRCOSEL: - ret = cmuSelect_LFRCO; - break; - - case CMU_STATUS_HFXOSEL: - ret = cmuSelect_HFXO; - break; - -#if defined(CMU_STATUS_USHFRCODIV2SEL) - case CMU_STATUS_USHFRCODIV2SEL: - ret = cmuSelect_USHFRCODIV2; - break; -#endif - - default: - ret = cmuSelect_HFRCO; - break; - } -#endif - break; - -#if defined(_CMU_LFCLKSEL_MASK) || defined(_CMU_LFACLKSEL_MASK) - case CMU_LFACLKSEL_REG: -#if defined(_CMU_LFCLKSEL_MASK) - switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFA_MASK) { - case CMU_LFCLKSEL_LFA_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFCLKSEL_LFA_LFXO: - ret = cmuSelect_LFXO; - break; - -#if defined(CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2) - case CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2: - ret = cmuSelect_HFCLKLE; - break; -#endif - - default: -#if defined(CMU_LFCLKSEL_LFAE) - if (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFAE_MASK) { - ret = cmuSelect_ULFRCO; - break; - } -#else - ret = cmuSelect_Disabled; -#endif - break; - } - -#elif defined(_CMU_LFACLKSEL_MASK) - switch (CMU->LFACLKSEL & _CMU_LFACLKSEL_LFA_MASK) { - case CMU_LFACLKSEL_LFA_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFACLKSEL_LFA_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_LFACLKSEL_LFA_ULFRCO: - ret = cmuSelect_ULFRCO; - break; - -#if defined(_CMU_LFACLKSEL_LFA_HFCLKLE) - case CMU_LFACLKSEL_LFA_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; -#endif - -#if defined(CMU_LFACLKSEL_LFA_PLFRCO) - case CMU_LFACLKSEL_LFA_PLFRCO: - ret = cmuSelect_PLFRCO; - break; -#endif - - default: - ret = cmuSelect_Disabled; - break; - } -#endif - break; -#endif /* _CMU_LFCLKSEL_MASK || _CMU_LFACLKSEL_MASK */ - -#if defined(_CMU_LFCLKSEL_MASK) || defined(_CMU_LFBCLKSEL_MASK) - case CMU_LFBCLKSEL_REG: -#if defined(_CMU_LFCLKSEL_MASK) - switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFB_MASK) { - case CMU_LFCLKSEL_LFB_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFCLKSEL_LFB_LFXO: - ret = cmuSelect_LFXO; - break; - -#if defined(CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2) - case CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2: - ret = cmuSelect_HFCLKLE; - break; -#endif - -#if defined(CMU_LFCLKSEL_LFB_HFCLKLE) - case CMU_LFCLKSEL_LFB_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; -#endif - - default: -#if defined(CMU_LFCLKSEL_LFBE) - if (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFBE_MASK) { - ret = cmuSelect_ULFRCO; - break; - } -#else - ret = cmuSelect_Disabled; -#endif - break; - } - -#elif defined(_CMU_LFBCLKSEL_MASK) - switch (CMU->LFBCLKSEL & _CMU_LFBCLKSEL_LFB_MASK) { - case CMU_LFBCLKSEL_LFB_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFBCLKSEL_LFB_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_LFBCLKSEL_LFB_ULFRCO: - ret = cmuSelect_ULFRCO; - break; - - case CMU_LFBCLKSEL_LFB_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; - -#if defined(CMU_LFBCLKSEL_LFB_PLFRCO) - case CMU_LFBCLKSEL_LFB_PLFRCO: - ret = cmuSelect_PLFRCO; - break; -#endif - - default: - ret = cmuSelect_Disabled; - break; - } -#endif - break; -#endif /* _CMU_LFCLKSEL_MASK || _CMU_LFBCLKSEL_MASK */ - -#if defined(_CMU_LFCLKSEL_LFC_MASK) - case CMU_LFCCLKSEL_REG: - switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFC_MASK) { - case CMU_LFCLKSEL_LFC_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFCLKSEL_LFC_LFXO: - ret = cmuSelect_LFXO; - break; - - default: - ret = cmuSelect_Disabled; - break; - } - break; -#endif - -#if defined(_CMU_LFECLKSEL_LFE_MASK) - case CMU_LFECLKSEL_REG: - switch (CMU->LFECLKSEL & _CMU_LFECLKSEL_LFE_MASK) { - case CMU_LFECLKSEL_LFE_LFRCO: - ret = cmuSelect_LFRCO; - break; - - case CMU_LFECLKSEL_LFE_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_LFECLKSEL_LFE_ULFRCO: - ret = cmuSelect_ULFRCO; - break; - -#if defined (_CMU_LFECLKSEL_LFE_HFCLKLE) - case CMU_LFECLKSEL_LFE_HFCLKLE: - ret = cmuSelect_HFCLKLE; - break; -#endif - -#if defined(CMU_LFECLKSEL_LFE_PLFRCO) - case CMU_LFECLKSEL_LFE_PLFRCO: - ret = cmuSelect_PLFRCO; - break; -#endif - - default: - ret = cmuSelect_Disabled; - break; - } - break; -#endif /* CMU_LFECLKSEL_REG */ - - case CMU_DBGCLKSEL_REG: -#if defined(_CMU_DBGCLKSEL_DBG_MASK) - switch (CMU->DBGCLKSEL & _CMU_DBGCLKSEL_DBG_MASK) { - case CMU_DBGCLKSEL_DBG_HFCLK: - ret = cmuSelect_HFCLK; - break; - - case CMU_DBGCLKSEL_DBG_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - } - -#elif defined(_CMU_CTRL_DBGCLK_MASK) - switch (CMU->CTRL & _CMU_CTRL_DBGCLK_MASK) { - case CMU_CTRL_DBGCLK_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_CTRL_DBGCLK_HFCLK: - ret = cmuSelect_HFCLK; - break; - } -#else - ret = cmuSelect_AUXHFRCO; -#endif - break; - -#if defined(USBC_CLOCK_PRESENT) - case CMU_USBCCLKSEL_REG: - switch (CMU->STATUS - & (CMU_STATUS_USBCLFXOSEL -#if defined(_CMU_STATUS_USBCHFCLKSEL_MASK) - | CMU_STATUS_USBCHFCLKSEL -#endif -#if defined(_CMU_STATUS_USBCUSHFRCOSEL_MASK) - | CMU_STATUS_USBCUSHFRCOSEL -#endif - | CMU_STATUS_USBCLFRCOSEL)) { -#if defined(_CMU_STATUS_USBCHFCLKSEL_MASK) - case CMU_STATUS_USBCHFCLKSEL: - ret = cmuSelect_HFCLK; - break; -#endif - -#if defined(_CMU_STATUS_USBCUSHFRCOSEL_MASK) - case CMU_STATUS_USBCUSHFRCOSEL: - ret = cmuSelect_USHFRCO; - break; -#endif - - case CMU_STATUS_USBCLFXOSEL: - ret = cmuSelect_LFXO; - break; - - case CMU_STATUS_USBCLFRCOSEL: - ret = cmuSelect_LFRCO; - break; - - default: - ret = cmuSelect_Disabled; - break; - } - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC0CLKSEL_MASK) - case CMU_ADC0ASYNCSEL_REG: - switch (CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKSEL_MASK) { - case CMU_ADCCTRL_ADC0CLKSEL_DISABLED: - ret = cmuSelect_Disabled; - break; - - case CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_ADCCTRL_ADC0CLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK: - ret = cmuSelect_HFSRCCLK; - break; - } - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case CMU_ADC1ASYNCSEL_REG: - switch (CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKSEL_MASK) { - case CMU_ADCCTRL_ADC1CLKSEL_DISABLED: - ret = cmuSelect_Disabled; - break; - - case CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_ADCCTRL_ADC1CLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK: - ret = cmuSelect_HFSRCCLK; - break; - } - break; -#endif - -#if defined(_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - case CMU_SDIOREFSEL_REG: - switch (CMU->SDIOCTRL & _CMU_SDIOCTRL_SDIOCLKSEL_MASK) { - case CMU_SDIOCTRL_SDIOCLKSEL_HFRCO: - ret = cmuSelect_HFRCO; - break; - - case CMU_SDIOCTRL_SDIOCLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO: - ret = cmuSelect_USHFRCO; - break; - } - break; -#endif - -#if defined(_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - case CMU_QSPI0REFSEL_REG: - switch (CMU->QSPICTRL & _CMU_QSPICTRL_QSPI0CLKSEL_MASK) { - case CMU_QSPICTRL_QSPI0CLKSEL_HFRCO: - ret = cmuSelect_HFRCO; - break; - - case CMU_QSPICTRL_QSPI0CLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO: - ret = cmuSelect_AUXHFRCO; - break; - - case CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO: - ret = cmuSelect_USHFRCO; - break; - } - break; -#endif - -#if defined(_CMU_USBCTRL_USBCLKSEL_MASK) - case CMU_USBRCLKSEL_REG: - switch (CMU->USBCTRL & _CMU_USBCTRL_USBCLKSEL_MASK) { - case CMU_USBCTRL_USBCLKSEL_USHFRCO: - ret = cmuSelect_USHFRCO; - break; - - case CMU_USBCTRL_USBCLKSEL_HFXO: - ret = cmuSelect_HFXO; - break; - - case CMU_USBCTRL_USBCLKSEL_HFXOX2: - ret = cmuSelect_HFXOX2; - break; - - case CMU_USBCTRL_USBCLKSEL_HFRCO: - ret = cmuSelect_HFRCO; - break; - - case CMU_USBCTRL_USBCLKSEL_LFXO: - ret = cmuSelect_LFXO; - break; - - case CMU_USBCTRL_USBCLKSEL_LFRCO: - ret = cmuSelect_LFRCO; - break; - } - break; -#endif - - default: - EFM_ASSERT(0); - ret = cmuSelect_Error; - break; - } - - return ret; -} - -/***************************************************************************//** - * @brief - * Select reference clock/oscillator used for a clock branch. - * - * @details - * Notice that if a selected reference is not enabled prior to selecting its - * use, it will be enabled, and this function will wait for the selected - * oscillator to be stable. It will however NOT be disabled if another - * reference clock is selected later. - * - * This feature is particularly important if selecting a new reference - * clock for the clock branch clocking the core, otherwise the system - * may halt. - * - * @param[in] clock - * Clock branch to select reference clock for. One of: - * @li #cmuClock_HF - * @li #cmuClock_LFA - * @li #cmuClock_LFB - * @if _CMU_LFCCLKEN0_MASK - * @li #cmuClock_LFC - * @endif - * @if _CMU_LFECLKEN0_MASK - * @li #cmuClock_LFE - * @endif - * @li #cmuClock_DBG - * @if _CMU_CMD_USBCLKSEL_MASK - * @li #cmuClock_USBC - * @endif - * @if _CMU_USBCTRL_MASK - * @li #cmuClock_USBR - * @endif - * - * @param[in] ref - * Reference selected for clocking, please refer to reference manual for - * for details on which reference is available for a specific clock branch. - * @li #cmuSelect_HFRCO - * @li #cmuSelect_LFRCO - * @li #cmuSelect_HFXO - * @if _CMU_HFXOCTRL_HFXOX2EN_MASK - * @li #cmuSelect_HFXOX2 - * @endif - * @li #cmuSelect_LFXO - * @li #cmuSelect_HFCLKLE - * @li #cmuSelect_AUXHFRCO - * @if _CMU_USHFRCOCTRL_MASK - * @li #cmuSelect_USHFRCO - * @endif - * @li #cmuSelect_HFCLK - * @ifnot DOXYDOC_EFM32_GECKO_FAMILY - * @li #cmuSelect_ULFRCO - * @li #cmuSelect_PLFRCO - * @endif - ******************************************************************************/ -void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref) -{ - uint32_t select = cmuOsc_HFRCO; - CMU_Osc_TypeDef osc = cmuOsc_HFRCO; - uint32_t freq; - uint32_t tmp; - uint32_t selRegId; -#if defined(_SILICON_LABS_32B_SERIES_1) - volatile uint32_t *selReg = NULL; -#endif -#if defined(CMU_LFCLKSEL_LFAE_ULFRCO) - uint32_t lfExtended = 0; -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - uint32_t vScaleFrequency = 0; /* Use default */ - - /* Start voltage upscaling before clock is set. */ - if (clock == cmuClock_HF) { - if (ref == cmuSelect_HFXO) { - vScaleFrequency = SystemHFXOClockGet(); - } else if ((ref == cmuSelect_HFRCO) - && (CMU_HFRCOBandGet() > CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX)) { - vScaleFrequency = CMU_HFRCOBandGet(); - } - if (vScaleFrequency != 0) { - EMU_VScaleEM01ByClock(vScaleFrequency, false); - } - } -#endif - - selRegId = (clock >> CMU_SEL_REG_POS) & CMU_SEL_REG_MASK; - - switch (selRegId) { - case CMU_HFCLKSEL_REG: - switch (ref) { - case cmuSelect_LFXO: -#if defined(_SILICON_LABS_32B_SERIES_1) - select = CMU_HFCLKSEL_HF_LFXO; -#elif defined(_SILICON_LABS_32B_SERIES_0) - select = CMU_CMD_HFCLKSEL_LFXO; -#endif - osc = cmuOsc_LFXO; - break; - - case cmuSelect_LFRCO: -#if defined(_SILICON_LABS_32B_SERIES_1) - select = CMU_HFCLKSEL_HF_LFRCO; -#elif defined(_SILICON_LABS_32B_SERIES_0) - select = CMU_CMD_HFCLKSEL_LFRCO; -#endif - osc = cmuOsc_LFRCO; - break; - - case cmuSelect_HFXO: -#if defined(CMU_HFCLKSEL_HF_HFXO) - select = CMU_HFCLKSEL_HF_HFXO; -#elif defined(CMU_CMD_HFCLKSEL_HFXO) - select = CMU_CMD_HFCLKSEL_HFXO; -#endif - osc = cmuOsc_HFXO; -#if defined(CMU_MAX_FREQ_HFLE) - /* Set 1 HFLE wait-state until the new HFCLKLE frequency is known. - This is known after 'select' is written below. */ - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); -#endif -#if defined(CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ) - /* Adjust HFXO buffer current for frequencies above 32MHz */ - if (SystemHFXOClockGet() > 32000000) { - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) - | CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ; - } else { - CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) - | CMU_CTRL_HFXOBUFCUR_BOOSTUPTO32MHZ; - } -#endif - break; - - case cmuSelect_HFRCO: -#if defined(_SILICON_LABS_32B_SERIES_1) - select = CMU_HFCLKSEL_HF_HFRCO; -#elif defined(_SILICON_LABS_32B_SERIES_0) - select = CMU_CMD_HFCLKSEL_HFRCO; -#endif - osc = cmuOsc_HFRCO; -#if defined(CMU_MAX_FREQ_HFLE) - /* Set 1 HFLE wait-state until the new HFCLKLE frequency is known. - This is known after 'select' is written below. */ - setHfLeConfig(CMU_MAX_FREQ_HFLE + 1); -#endif - break; - -#if defined(CMU_CMD_HFCLKSEL_USHFRCODIV2) - case cmuSelect_USHFRCODIV2: - select = CMU_CMD_HFCLKSEL_USHFRCODIV2; - osc = cmuOsc_USHFRCO; - break; -#endif - -#if defined(CMU_LFCLKSEL_LFAE_ULFRCO) || defined(CMU_LFACLKSEL_LFA_ULFRCO) - case cmuSelect_ULFRCO: - /* ULFRCO cannot be used as HFCLK */ - EFM_ASSERT(0); - return; -#endif - - default: - EFM_ASSERT(0); - return; - } - - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(osc, true, true); - - /* Configure worst case wait states for flash access before selecting */ - flashWaitStateMax(); - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Wait for voltage upscaling to complete before clock is set. */ - if (vScaleFrequency != 0) { - EMU_VScaleWait(); - } -#endif - - /* Switch to selected oscillator */ -#if defined(_CMU_HFCLKSEL_MASK) - CMU->HFCLKSEL = select; -#else - CMU->CMD = select; -#endif -#if defined(CMU_MAX_FREQ_HFLE) - /* Update HFLE configuration after 'select' is set. - Note that the HFCLKLE clock is connected differently on planform 1 and 2 */ - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); -#endif - - /* Update CMSIS core clock variable */ - /* (The function will update the global variable) */ - freq = SystemCoreClockGet(); - - /* Optimize flash access wait state setting for currently selected core clk */ - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Keep EMU module informed on source HF clock frequency. This will apply voltage - downscaling after clock is set if downscaling is configured. */ - if (vScaleFrequency == 0) { - EMU_VScaleEM01ByClock(0, true); - } -#endif - break; - -#if defined(_SILICON_LABS_32B_SERIES_1) - case CMU_LFACLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFACLKSEL : selReg; -#if !defined(_CMU_LFACLKSEL_LFA_HFCLKLE) - /* HFCLKCLE can not be used as LFACLK */ - EFM_ASSERT(ref != cmuSelect_HFCLKLE); -#endif - /* Fall through and select clock source */ - -#if defined(_CMU_LFCCLKSEL_MASK) - case CMU_LFCCLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFCCLKSEL : selReg; -#if !defined(_CMU_LFCCLKSEL_LFC_HFCLKLE) - /* HFCLKCLE can not be used as LFCCLK */ - EFM_ASSERT(ref != cmuSelect_HFCLKLE); -#endif -#endif - /* Fall through and select clock source */ - - case CMU_LFECLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFECLKSEL : selReg; -#if !defined(_CMU_LFECLKSEL_LFE_HFCLKLE) - /* HFCLKCLE can not be used as LFECLK */ - EFM_ASSERT(ref != cmuSelect_HFCLKLE); -#endif - /* Fall through and select clock source */ - - case CMU_LFBCLKSEL_REG: - selReg = (selReg == NULL) ? &CMU->LFBCLKSEL : selReg; - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_LFACLKSEL_LFA_DISABLED; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_LFACLKSEL_LFA_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_LFACLKSEL_LFA_LFRCO; - break; - - case cmuSelect_HFCLKLE: - /* Ensure correct HFLE wait-states and enable HFCLK to LE */ - setHfLeConfig(SystemCoreClockGet()); - BUS_RegBitWrite(&CMU->HFBUSCLKEN0, _CMU_HFBUSCLKEN0_LE_SHIFT, 1); - tmp = _CMU_LFBCLKSEL_LFB_HFCLKLE; - break; - - case cmuSelect_ULFRCO: - /* ULFRCO is always on, there is no need to enable it. */ - tmp = _CMU_LFACLKSEL_LFA_ULFRCO; - break; - -#if defined(_CMU_STATUS_PLFRCOENS_MASK) - case cmuSelect_PLFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_PLFRCO, true, true); - tmp = _CMU_LFACLKSEL_LFA_PLFRCO; - break; -#endif - - default: - EFM_ASSERT(0); - return; - } - *selReg = tmp; - break; - -#elif defined(_SILICON_LABS_32B_SERIES_0) - case CMU_LFACLKSEL_REG: - case CMU_LFBCLKSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_LFCLKSEL_LFA_DISABLED; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_LFCLKSEL_LFA_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_LFCLKSEL_LFA_LFRCO; - break; - - case cmuSelect_HFCLKLE: -#if defined(CMU_MAX_FREQ_HFLE) - /* Set HFLE wait-state and divider */ - freq = SystemCoreClockGet(); - setHfLeConfig(freq); -#endif - /* Ensure HFCORE to LE clocking is enabled */ - BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); - tmp = _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2; - break; - -#if defined(CMU_LFCLKSEL_LFAE_ULFRCO) - case cmuSelect_ULFRCO: - /* ULFRCO is always enabled */ - tmp = _CMU_LFCLKSEL_LFA_DISABLED; - lfExtended = 1; - break; -#endif - - default: - /* Illegal clock source for LFA/LFB selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - if (selRegId == CMU_LFACLKSEL_REG) { -#if defined(_CMU_LFCLKSEL_LFAE_MASK) - CMU->LFCLKSEL = (CMU->LFCLKSEL - & ~(_CMU_LFCLKSEL_LFA_MASK | _CMU_LFCLKSEL_LFAE_MASK)) - | (tmp << _CMU_LFCLKSEL_LFA_SHIFT) - | (lfExtended << _CMU_LFCLKSEL_LFAE_SHIFT); -#else - CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFA_MASK) - | (tmp << _CMU_LFCLKSEL_LFA_SHIFT); -#endif - } else { -#if defined(_CMU_LFCLKSEL_LFBE_MASK) - CMU->LFCLKSEL = (CMU->LFCLKSEL - & ~(_CMU_LFCLKSEL_LFB_MASK | _CMU_LFCLKSEL_LFBE_MASK)) - | (tmp << _CMU_LFCLKSEL_LFB_SHIFT) - | (lfExtended << _CMU_LFCLKSEL_LFBE_SHIFT); -#else - CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFB_MASK) - | (tmp << _CMU_LFCLKSEL_LFB_SHIFT); -#endif - } - break; - -#if defined(_CMU_LFCLKSEL_LFC_MASK) - case CMU_LFCCLKSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_LFCLKSEL_LFA_DISABLED; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_LFCLKSEL_LFC_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_LFCLKSEL_LFC_LFRCO; - break; - - default: - /* Illegal clock source for LFC selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFC_MASK) - | (tmp << _CMU_LFCLKSEL_LFC_SHIFT); - break; -#endif -#endif - -#if defined(_CMU_DBGCLKSEL_DBG_MASK) || defined(CMU_CTRL_DBGCLK) - case CMU_DBGCLKSEL_REG: - switch (ref) { -#if defined(_CMU_DBGCLKSEL_DBG_MASK) - case cmuSelect_AUXHFRCO: - /* Select AUXHFRCO as debug clock */ - CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_AUXHFRCO; - break; - - case cmuSelect_HFCLK: - /* Select divided HFCLK as debug clock */ - CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_HFCLK; - break; -#endif - -#if defined(CMU_CTRL_DBGCLK) - case cmuSelect_AUXHFRCO: - /* Select AUXHFRCO as debug clock */ - CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_DBGCLK_MASK)) - | CMU_CTRL_DBGCLK_AUXHFRCO; - break; - - case cmuSelect_HFCLK: - /* Select divided HFCLK as debug clock */ - CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_DBGCLK_MASK)) - | CMU_CTRL_DBGCLK_HFCLK; - break; -#endif - - default: - /* Illegal clock source for debug selected */ - EFM_ASSERT(0); - return; - } - break; -#endif - -#if defined(USBC_CLOCK_PRESENT) - case CMU_USBCCLKSEL_REG: - switch (ref) { - case cmuSelect_LFXO: - /* Select LFXO as clock source for USB, can only be used in sleep mode */ - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - - /* Switch oscillator */ - CMU->CMD = CMU_CMD_USBCCLKSEL_LFXO; - - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCLFXOSEL) == 0) { - } - break; - - case cmuSelect_LFRCO: - /* Select LFRCO as clock source for USB, can only be used in sleep mode */ - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - - /* Switch oscillator */ - CMU->CMD = CMU_CMD_USBCCLKSEL_LFRCO; - - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCLFRCOSEL) == 0) { - } - break; - -#if defined(CMU_STATUS_USBCHFCLKSEL) - case cmuSelect_HFCLK: - /* Select undivided HFCLK as clock source for USB */ - /* Oscillator must already be enabled to avoid a core lockup */ - CMU->CMD = CMU_CMD_USBCCLKSEL_HFCLKNODIV; - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCHFCLKSEL) == 0) { - } - break; -#endif - -#if defined(CMU_CMD_USBCCLKSEL_USHFRCO) - case cmuSelect_USHFRCO: - /* Select USHFRCO as clock source for USB */ - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - - /* Switch oscillator */ - CMU->CMD = CMU_CMD_USBCCLKSEL_USHFRCO; - - /* Wait until clock is activated */ - while ((CMU->STATUS & CMU_STATUS_USBCUSHFRCOSEL) == 0) { - } - break; -#endif - - default: - /* Illegal clock source for USB */ - EFM_ASSERT(0); - return; - } - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC0CLKSEL_MASK) - case CMU_ADC0ASYNCSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_ADCCTRL_ADC0CLKSEL_DISABLED; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_ADCCTRL_ADC0CLKSEL_HFXO; - break; - - case cmuSelect_HFSRCCLK: - tmp = _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK; - break; - - default: - /* Illegal clock source for ADC0ASYNC selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC0CLKSEL_MASK) - | (tmp << _CMU_ADCCTRL_ADC0CLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_ADCCTRL_ADC1CLKSEL_MASK) - case CMU_ADC1ASYNCSEL_REG: - switch (ref) { - case cmuSelect_Disabled: - tmp = _CMU_ADCCTRL_ADC1CLKSEL_DISABLED; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_ADCCTRL_ADC1CLKSEL_HFXO; - break; - - case cmuSelect_HFSRCCLK: - tmp = _CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK; - break; - - default: - /* Illegal clock source for ADC1ASYNC selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC1CLKSEL_MASK) - | (tmp << _CMU_ADCCTRL_ADC1CLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - case CMU_SDIOREFSEL_REG: - switch (ref) { - case cmuSelect_HFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFRCO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_HFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_HFXO; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO; - break; - - case cmuSelect_USHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - tmp = _CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO; - break; - - default: - /* Illegal clock source for SDIOREF selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->SDIOCTRL = (CMU->SDIOCTRL & ~_CMU_SDIOCTRL_SDIOCLKSEL_MASK) - | (tmp << _CMU_SDIOCTRL_SDIOCLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - case CMU_QSPI0REFSEL_REG: - switch (ref) { - case cmuSelect_HFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFRCO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_HFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_HFXO; - break; - - case cmuSelect_AUXHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_AUXHFRCO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO; - break; - - case cmuSelect_USHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - tmp = _CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO; - break; - - default: - /* Illegal clock source for QSPI0REF selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->QSPICTRL = (CMU->QSPICTRL & ~_CMU_QSPICTRL_QSPI0CLKSEL_MASK) - | (tmp << _CMU_QSPICTRL_QSPI0CLKSEL_SHIFT); - break; -#endif - -#if defined(_CMU_USBCTRL_USBCLKSEL_MASK) - case CMU_USBRCLKSEL_REG: - switch (ref) { - case cmuSelect_USHFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_USHFRCO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_USHFRCO; - break; - - case cmuSelect_HFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_HFXO; - break; - - case cmuSelect_HFXOX2: - /* Only allowed for HFXO frequencies up to 25 MHz */ - EFM_ASSERT(SystemHFXOClockGet() <= 25000000u); - - /* Enable HFXO X2 */ - CMU->HFXOCTRL |= CMU_HFXOCTRL_HFXOX2EN; - - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFXO, true, true); - - tmp = _CMU_USBCTRL_USBCLKSEL_HFXOX2; - break; - - case cmuSelect_HFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_HFRCO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_HFRCO; - break; - - case cmuSelect_LFXO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFXO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_LFXO; - break; - - case cmuSelect_LFRCO: - /* Ensure selected oscillator is enabled, waiting for it to stabilize */ - CMU_OscillatorEnable(cmuOsc_LFRCO, true, true); - tmp = _CMU_USBCTRL_USBCLKSEL_LFRCO; - break; - - default: - /* Illegal clock source for USBR selected */ - EFM_ASSERT(0); - return; - } - - /* Apply select */ - CMU->USBCTRL = (CMU->USBCTRL & ~_CMU_USBCTRL_USBCLKSEL_MASK) - | (tmp << _CMU_USBCTRL_USBCLKSEL_SHIFT); - break; -#endif - - default: - EFM_ASSERT(0); - break; - } -} - -#if defined(CMU_OSCENCMD_DPLLEN) -/**************************************************************************//** - * @brief - * Lock the DPLL to a given frequency. - * - * The frequency is given by: Fout = Fref * (N+1) / (M+1). - * - * @note - * This function does not check if the given N & M values will actually - * produce the desired target frequency. - * Any peripheral running off HFRCO should be switched to HFRCODIV2 prior to - * calling this function to avoid over-clocking. - * - * @param[in] init - * DPLL setup parameters. - * - * @return - * Returns false on invalid target frequency or DPLL locking error. - *****************************************************************************/ -bool CMU_DPLLLock(CMU_DPLLInit_TypeDef *init) -{ - int index = 0; - unsigned int i; - bool hfrcoDiv2 = false; - uint32_t hfrcoCtrlVal, lockStatus, sysFreq; - - EFM_ASSERT(init->frequency >= hfrcoCtrlTable[0].minFreq); - EFM_ASSERT(init->frequency - <= hfrcoCtrlTable[HFRCOCTRLTABLE_ENTRIES - 1].maxFreq); - EFM_ASSERT(init->n >= 32); - EFM_ASSERT(init->n <= (_CMU_DPLLCTRL1_N_MASK >> _CMU_DPLLCTRL1_N_SHIFT)); - EFM_ASSERT(init->m <= (_CMU_DPLLCTRL1_M_MASK >> _CMU_DPLLCTRL1_M_SHIFT)); - EFM_ASSERT(init->ssInterval <= (_CMU_HFRCOSS_SSINV_MASK - >> _CMU_HFRCOSS_SSINV_SHIFT)); - EFM_ASSERT(init->ssAmplitude <= (_CMU_HFRCOSS_SSAMP_MASK - >> _CMU_HFRCOSS_SSAMP_SHIFT)); - -#if defined(_EMU_STATUS_VSCALE_MASK) - if ((EMU_VScaleGet() == emuVScaleEM01_LowPower) - && (init->frequency > CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX)) { - EFM_ASSERT(false); - return false; - } -#endif - - // Find correct HFRCO band, and retrieve a HFRCOCTRL value. - for (i = 0; i < HFRCOCTRLTABLE_ENTRIES; i++) { - if ((init->frequency >= hfrcoCtrlTable[i].minFreq) - && (init->frequency <= hfrcoCtrlTable[i].maxFreq)) { - index = i; // Correct band found - break; - } - } - if (index == HFRCOCTRLTABLE_ENTRIES) { - EFM_ASSERT(false); - return false; // Target frequency out of spec. - } - hfrcoCtrlVal = hfrcoCtrlTable[index].value; - - // Check if we have a calibrated HFRCOCTRL.TUNING value in device DI page. - if (hfrcoCtrlTable[index].band != (CMU_HFRCOFreq_TypeDef)0) { - uint32_t tuning; - - tuning = (CMU_HFRCODevinfoGet(hfrcoCtrlTable[index].band) - & _CMU_HFRCOCTRL_TUNING_MASK) - >> _CMU_HFRCOCTRL_TUNING_SHIFT; - - // When HFRCOCTRL.FINETUNINGEN is enabled, the center frequency - // of the band shifts down by 5.8%. We subtract 9 to compensate. - if (tuning > 9) { - tuning -= 9; - } else { - tuning = 0; - } - - hfrcoCtrlVal |= tuning << _CMU_HFRCOCTRL_TUNING_SHIFT; - } - - // Update CMSIS frequency SystemHfrcoFreq value. - SystemHfrcoFreq = init->frequency; - - // Set max wait-states while changing core clock. - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - flashWaitStateMax(); - } - - // Update HFLE configuration before updating HFRCO, use new DPLL frequency. - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - setHfLeConfig(init->frequency); - - // Switch to HFRCO/2 before setting DPLL to avoid over-clocking. - hfrcoDiv2 = (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) - == CMU_HFCLKSTATUS_SELECTED_HFRCODIV2; - CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCODIV2; - } - - CMU->OSCENCMD = CMU_OSCENCMD_DPLLDIS; - while ((CMU->STATUS & (CMU_STATUS_DPLLENS | CMU_STATUS_DPLLRDY)) != 0) ; - CMU->IFC = CMU_IFC_DPLLRDY | CMU_IFC_DPLLLOCKFAILLOW - | CMU_IFC_DPLLLOCKFAILHIGH; - CMU->DPLLCTRL1 = (init->n << _CMU_DPLLCTRL1_N_SHIFT) - | (init->m << _CMU_DPLLCTRL1_M_SHIFT); - CMU->HFRCOCTRL = hfrcoCtrlVal; - CMU->DPLLCTRL = (init->refClk << _CMU_DPLLCTRL_REFSEL_SHIFT) - | (init->autoRecover << _CMU_DPLLCTRL_AUTORECOVER_SHIFT) - | (init->edgeSel << _CMU_DPLLCTRL_EDGESEL_SHIFT) - | (init->lockMode << _CMU_DPLLCTRL_MODE_SHIFT); - CMU->OSCENCMD = CMU_OSCENCMD_DPLLEN; - while ((lockStatus = (CMU->IF & (CMU_IF_DPLLRDY - | CMU_IF_DPLLLOCKFAILLOW - | CMU_IF_DPLLLOCKFAILHIGH))) == 0) ; - - if ((CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) - && (hfrcoDiv2 == false)) { - CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCO; - } - - // If HFRCO is selected as HF clock, optimize flash access wait-state - // configuration for this frequency and update CMSIS core clock variable. - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - // Call SystemCoreClockGet() to update CMSIS core clock variable. - sysFreq = SystemCoreClockGet(); - EFM_ASSERT(sysFreq <= init->frequency); - EFM_ASSERT(sysFreq <= SystemHfrcoFreq); - EFM_ASSERT(init->frequency == SystemHfrcoFreq); - CMU_UpdateWaitStates(sysFreq, VSCALE_DEFAULT); - } - - // Reduce HFLE frequency if possible. - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - // Update voltage scaling. - EMU_VScaleEM01ByClock(0, true); -#endif - - if (lockStatus == CMU_IF_DPLLRDY) { - return true; - } - return false; -} -#endif // CMU_OSCENCMD_DPLLEN - -/**************************************************************************//** - * @brief - * CMU low frequency register synchronization freeze control. - * - * @details - * Some CMU registers requires synchronization into the low frequency (LF) - * domain. The freeze feature allows for several such registers to be - * modified before passing them to the LF domain simultaneously (which - * takes place when the freeze mode is disabled). - * - * Another usage scenario of this feature, is when using an API (such - * as the CMU API) for modifying several bit fields consecutively in the - * same register. If freeze mode is enabled during this sequence, stalling - * can be avoided. - * - * @note - * When enabling freeze mode, this function will wait for all current - * ongoing CMU synchronization to LF domain to complete (Normally - * synchronization will not be in progress.) However for this reason, when - * using freeze mode, modifications of registers requiring LF synchronization - * should be done within one freeze enable/disable block to avoid unecessary - * stalling. - * - * @param[in] enable - * @li true - enable freeze, modified registers are not propagated to the - * LF domain - * @li false - disable freeze, modified registers are propagated to LF - * domain - *****************************************************************************/ -void CMU_FreezeEnable(bool enable) -{ - if (enable) { - /* Wait for any ongoing LF synchronization to complete. This is just to */ - /* protect against the rare case when a user */ - /* - modifies a register requiring LF sync */ - /* - then enables freeze before LF sync completed */ - /* - then modifies the same register again */ - /* since modifying a register while it is in sync progress should be */ - /* avoided. */ - while (CMU->SYNCBUSY) { - } - - CMU->FREEZE = CMU_FREEZE_REGFREEZE; - } else { - CMU->FREEZE = 0; - } -} - -#if defined(_CMU_HFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Get HFRCO band in use. - * - * @return - * HFRCO band in use. - ******************************************************************************/ -CMU_HFRCOBand_TypeDef CMU_HFRCOBandGet(void) -{ - return (CMU_HFRCOBand_TypeDef)((CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) - >> _CMU_HFRCOCTRL_BAND_SHIFT); -} -#endif /* _CMU_HFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_HFRCOCTRL_BAND_MASK) -/***************************************************************************//** - * @brief - * Set HFRCO band and the tuning value based on the value in the calibration - * table made during production. - * - * @param[in] band - * HFRCO band to activate. - ******************************************************************************/ -void CMU_HFRCOBandSet(CMU_HFRCOBand_TypeDef band) -{ - uint32_t tuning; - uint32_t freq; - CMU_Select_TypeDef osc; - - /* Read tuning value from calibration table */ - switch (band) { - case cmuHFRCOBand_1MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND1_MASK) - >> _DEVINFO_HFRCOCAL0_BAND1_SHIFT; - break; - - case cmuHFRCOBand_7MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND7_MASK) - >> _DEVINFO_HFRCOCAL0_BAND7_SHIFT; - break; - - case cmuHFRCOBand_11MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND11_MASK) - >> _DEVINFO_HFRCOCAL0_BAND11_SHIFT; - break; - - case cmuHFRCOBand_14MHz: - tuning = (DEVINFO->HFRCOCAL0 & _DEVINFO_HFRCOCAL0_BAND14_MASK) - >> _DEVINFO_HFRCOCAL0_BAND14_SHIFT; - break; - - case cmuHFRCOBand_21MHz: - tuning = (DEVINFO->HFRCOCAL1 & _DEVINFO_HFRCOCAL1_BAND21_MASK) - >> _DEVINFO_HFRCOCAL1_BAND21_SHIFT; - break; - -#if defined(_CMU_HFRCOCTRL_BAND_28MHZ) - case cmuHFRCOBand_28MHz: - tuning = (DEVINFO->HFRCOCAL1 & _DEVINFO_HFRCOCAL1_BAND28_MASK) - >> _DEVINFO_HFRCOCAL1_BAND28_SHIFT; - break; -#endif - - default: - EFM_ASSERT(0); - return; - } - - /* If HFRCO is used for core clock, we have to consider flash access WS. */ - osc = CMU_ClockSelectGet(cmuClock_HF); - if (osc == cmuSelect_HFRCO) { - /* Configure worst case wait states for flash access before setting divider */ - flashWaitStateMax(); - } - - /* Set band/tuning */ - CMU->HFRCOCTRL = (CMU->HFRCOCTRL - & ~(_CMU_HFRCOCTRL_BAND_MASK | _CMU_HFRCOCTRL_TUNING_MASK)) - | (band << _CMU_HFRCOCTRL_BAND_SHIFT) - | (tuning << _CMU_HFRCOCTRL_TUNING_SHIFT); - - /* If HFRCO is used for core clock, optimize flash WS */ - if (osc == cmuSelect_HFRCO) { - /* Call SystemCoreClockGet() to update CMSIS core clock variable. */ - freq = SystemCoreClockGet(); - CMU_UpdateWaitStates(freq, VSCALE_DEFAULT); - } - -#if defined(CMU_MAX_FREQ_HFLE) - /* Reduce HFLE frequency if possible. */ - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); -#endif -} -#endif /* _CMU_HFRCOCTRL_BAND_MASK */ - -#if defined(_CMU_HFRCOCTRL_FREQRANGE_MASK) -/**************************************************************************//** - * @brief - * Get the HFRCO frequency calibration word in DEVINFO - * - * @param[in] freq - * Frequency in Hz - * - * @return - * HFRCO calibration word for a given frequency - *****************************************************************************/ -static uint32_t CMU_HFRCODevinfoGet(CMU_HFRCOFreq_TypeDef freq) -{ - switch (freq) { - /* 1, 2 and 4MHz share the same calibration word */ - case cmuHFRCOFreq_1M0Hz: - case cmuHFRCOFreq_2M0Hz: - case cmuHFRCOFreq_4M0Hz: - return DEVINFO->HFRCOCAL0; - - case cmuHFRCOFreq_7M0Hz: - return DEVINFO->HFRCOCAL3; - - case cmuHFRCOFreq_13M0Hz: - return DEVINFO->HFRCOCAL6; - - case cmuHFRCOFreq_16M0Hz: - return DEVINFO->HFRCOCAL7; - - case cmuHFRCOFreq_19M0Hz: - return DEVINFO->HFRCOCAL8; - - case cmuHFRCOFreq_26M0Hz: - return DEVINFO->HFRCOCAL10; - - case cmuHFRCOFreq_32M0Hz: - return DEVINFO->HFRCOCAL11; - - case cmuHFRCOFreq_38M0Hz: - return DEVINFO->HFRCOCAL12; - -#if defined(_DEVINFO_HFRCOCAL16_MASK) - case cmuHFRCOFreq_48M0Hz: - return DEVINFO->HFRCOCAL13; - - case cmuHFRCOFreq_56M0Hz: - return DEVINFO->HFRCOCAL14; - - case cmuHFRCOFreq_64M0Hz: - return DEVINFO->HFRCOCAL15; - - case cmuHFRCOFreq_72M0Hz: - return DEVINFO->HFRCOCAL16; -#endif - - default: /* cmuHFRCOFreq_UserDefined */ - return 0; - } -} - -/***************************************************************************//** - * @brief - * Get current HFRCO frequency. - * - * @return - * HFRCO frequency - ******************************************************************************/ -CMU_HFRCOFreq_TypeDef CMU_HFRCOBandGet(void) -{ - return (CMU_HFRCOFreq_TypeDef)SystemHfrcoFreq; -} - -/***************************************************************************//** - * @brief - * Set HFRCO calibration for the selected target frequency. - * - * @param[in] setFreq - * HFRCO frequency to set - ******************************************************************************/ -void CMU_HFRCOBandSet(CMU_HFRCOFreq_TypeDef setFreq) -{ - uint32_t freqCal; - uint32_t sysFreq; - uint32_t prevFreq; - - /* Get DEVINFO index, set CMSIS frequency SystemHfrcoFreq */ - freqCal = CMU_HFRCODevinfoGet(setFreq); - EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); - prevFreq = SystemHfrcoFreq; - SystemHfrcoFreq = (uint32_t)setFreq; - - /* Set max wait-states while changing core clock */ - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - flashWaitStateMax(); - } - - /* Wait for any previous sync to complete, and then set calibration data - for the selected frequency. */ - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT)) ; - - /* Check for valid calibration data */ - EFM_ASSERT(freqCal != UINT_MAX); - - /* Set divider in HFRCOCTRL for 1, 2 and 4MHz */ - switch (setFreq) { - case cmuHFRCOFreq_1M0Hz: - freqCal = (freqCal & ~_CMU_HFRCOCTRL_CLKDIV_MASK) - | CMU_HFRCOCTRL_CLKDIV_DIV4; - break; - - case cmuHFRCOFreq_2M0Hz: - freqCal = (freqCal & ~_CMU_HFRCOCTRL_CLKDIV_MASK) - | CMU_HFRCOCTRL_CLKDIV_DIV2; - break; - - case cmuHFRCOFreq_4M0Hz: - freqCal = (freqCal & ~_CMU_HFRCOCTRL_CLKDIV_MASK) - | CMU_HFRCOCTRL_CLKDIV_DIV1; - break; - - default: - break; - } - - /* Update HFLE configuration before updating HFRCO. - Use the new set frequency. */ - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - /* setFreq is worst-case as dividers may reduce the HFLE frequency. */ - setHfLeConfig(setFreq); - } - - if (setFreq > prevFreq) { -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* When increasing frequency we need to voltage scale before the change */ - EMU_VScaleEM01ByClock(setFreq, true); -#endif - } - - CMU->HFRCOCTRL = freqCal; - - /* If HFRCO is selected as HF clock, optimize flash access wait-state configuration - for this frequency and update CMSIS core clock variable. */ - if (CMU_ClockSelectGet(cmuClock_HF) == cmuSelect_HFRCO) { - /* Call SystemCoreClockGet() to update CMSIS core clock variable. */ - sysFreq = SystemCoreClockGet(); - EFM_ASSERT(sysFreq <= (uint32_t)setFreq); - EFM_ASSERT(sysFreq <= SystemHfrcoFreq); - EFM_ASSERT(setFreq == SystemHfrcoFreq); - CMU_UpdateWaitStates(sysFreq, VSCALE_DEFAULT); - } - - /* Reduce HFLE frequency if possible. */ - setHfLeConfig(CMU_ClockFreqGet(cmuClock_HFLE)); - - if (setFreq <= prevFreq) { -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* When decreasing frequency we need to voltage scale after the change */ - EMU_VScaleEM01ByClock(0, true); -#endif - } -} -#endif /* _CMU_HFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_HFRCOCTRL_SUDELAY_MASK) -/***************************************************************************//** - * @brief - * Get the HFRCO startup delay. - * - * @details - * Please refer to the reference manual for further details. - * - * @return - * The startup delay in use. - ******************************************************************************/ -uint32_t CMU_HFRCOStartupDelayGet(void) -{ - return (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_SUDELAY_MASK) - >> _CMU_HFRCOCTRL_SUDELAY_SHIFT; -} - -/***************************************************************************//** - * @brief - * Set the HFRCO startup delay. - * - * @details - * Please refer to the reference manual for further details. - * - * @param[in] delay - * The startup delay to set (<= 31). - ******************************************************************************/ -void CMU_HFRCOStartupDelaySet(uint32_t delay) -{ - EFM_ASSERT(delay <= 31); - - delay &= _CMU_HFRCOCTRL_SUDELAY_MASK >> _CMU_HFRCOCTRL_SUDELAY_SHIFT; - CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_SUDELAY_MASK)) - | (delay << _CMU_HFRCOCTRL_SUDELAY_SHIFT); -} -#endif - -#if defined(_CMU_USHFRCOCTRL_FREQRANGE_MASK) -/**************************************************************************//** - * @brief - * Get the USHFRCO frequency calibration word in DEVINFO - * - * @param[in] freq - * Frequency in Hz - * - * @return - * USHFRCO calibration word for a given frequency - *****************************************************************************/ -static uint32_t CMU_USHFRCODevinfoGet(CMU_USHFRCOFreq_TypeDef freq) -{ - switch (freq) { - case cmuUSHFRCOFreq_16M0Hz: - return DEVINFO->USHFRCOCAL7; - - case cmuUSHFRCOFreq_32M0Hz: - return DEVINFO->USHFRCOCAL11; - - case cmuUSHFRCOFreq_48M0Hz: - return DEVINFO->USHFRCOCAL13; - - case cmuUSHFRCOFreq_50M0Hz: - return DEVINFO->USHFRCOCAL14; - - default: /* cmuUSHFRCOFreq_UserDefined */ - return 0; - } -} - -/***************************************************************************//** - * @brief - * Get current USHFRCO frequency. - * - * @return - * HFRCO frequency - ******************************************************************************/ -CMU_USHFRCOFreq_TypeDef CMU_USHFRCOBandGet(void) -{ - return (CMU_USHFRCOFreq_TypeDef) ushfrcoFreq; -} - -/***************************************************************************//** - * @brief - * Set USHFRCO calibration for the selected target frequency. - * - * @param[in] setFreq - * USHFRCO frequency to set - ******************************************************************************/ -void CMU_USHFRCOBandSet(CMU_USHFRCOFreq_TypeDef setFreq) -{ - uint32_t freqCal; - - /* Get DEVINFO calibration values */ - freqCal = CMU_USHFRCODevinfoGet(setFreq); - EFM_ASSERT((freqCal != 0) && (freqCal != UINT_MAX)); - ushfrcoFreq = (uint32_t)setFreq; - - /* Wait for any previous sync to complete, and then set calibration data - for the selected frequency. */ - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) ; - - CMU->USHFRCOCTRL = freqCal; -} -#endif /* _CMU_USHFRCOCTRL_FREQRANGE_MASK */ - -#if defined(_CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK) -/***************************************************************************//** - * @brief - * Enable or disable HFXO autostart - * - * @param[in] userSel - * Additional user specified enable bit. - * - * @param[in] enEM0EM1Start - * If true, HFXO is automatically started upon entering EM0/EM1 entry from - * EM2/EM3. HFXO selection has to be handled by the user. - * If false, HFXO is not started automatically when entering EM0/EM1. - * - * @param[in] enEM0EM1StartSel - * If true, HFXO is automatically started and immediately selected upon - * entering EM0/EM1 entry from EM2/EM3. Note that this option stalls the use of - * HFSRCCLK until HFXO becomes ready. - * If false, HFXO is not started or selected automatically when entering - * EM0/EM1. - ******************************************************************************/ -void CMU_HFXOAutostartEnable(uint32_t userSel, - bool enEM0EM1Start, - bool enEM0EM1StartSel) -{ - uint32_t hfxoFreq; - uint32_t hfxoCtrl; - - /* Mask supported enable bits. */ -#if defined(_CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_MASK) - userSel &= _CMU_HFXOCTRL_AUTOSTARTRDYSELRAC_MASK; -#else - userSel = 0; -#endif - - hfxoCtrl = CMU->HFXOCTRL & ~(userSel - | _CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK - | _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK); - - hfxoCtrl |= userSel - | (enEM0EM1Start ? CMU_HFXOCTRL_AUTOSTARTEM0EM1 : 0) - | (enEM0EM1StartSel ? CMU_HFXOCTRL_AUTOSTARTSELEM0EM1 : 0); - - /* Set wait-states for HFXO if automatic start and select is configured. */ - if (userSel || enEM0EM1StartSel) { - hfxoFreq = SystemHFXOClockGet(); - CMU_UpdateWaitStates(hfxoFreq, VSCALE_DEFAULT); - setHfLeConfig(hfxoFreq); - } - - /* Update HFXOCTRL after wait-states are updated as HF may automatically switch - to HFXO when automatic select is enabled . */ - CMU->HFXOCTRL = hfxoCtrl; -} -#endif - -/**************************************************************************//** - * @brief - * Set HFXO control registers - * - * @note - * HFXO configuration should be obtained from a configuration tool, - * app note or xtal datasheet. This function disables the HFXO to ensure - * a valid state before update. - * - * @param[in] hfxoInit - * HFXO setup parameters - *****************************************************************************/ -void CMU_HFXOInit(const CMU_HFXOInit_TypeDef *hfxoInit) -{ - /* Do not disable HFXO if it is currently selected as HF/Core clock */ - EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_HFXO); - - /* HFXO must be disabled before reconfiguration */ - CMU_OscillatorEnable(cmuOsc_HFXO, false, true); - -#if defined(_SILICON_LABS_32B_SERIES_1) && (_SILICON_LABS_GECKO_INTERNAL_SDID >= 100) - uint32_t tmp = CMU_HFXOCTRL_MODE_XTAL; - - switch (hfxoInit->mode) { - case cmuOscMode_Crystal: - tmp = CMU_HFXOCTRL_MODE_XTAL; - break; - case cmuOscMode_External: - tmp = CMU_HFXOCTRL_MODE_DIGEXTCLK; - break; - case cmuOscMode_AcCoupled: - tmp = CMU_HFXOCTRL_MODE_ACBUFEXTCLK; - break; - default: - EFM_ASSERT(false); /* Unsupported configuration */ - } - - /* HFXO Doubler can only be enabled on crystals up to max 25 MHz */ - if (SystemHFXOClockGet() <= 25000000) { - tmp |= CMU_HFXOCTRL_HFXOX2EN; - } - - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~(_CMU_HFXOCTRL_MODE_MASK - | _CMU_HFXOCTRL_HFXOX2EN_MASK)) - | tmp; - - /* Set tuning for startup and steady state */ - CMU->HFXOSTARTUPCTRL = (hfxoInit->ctuneStartup << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimStartup << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT); - - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK - | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)) - | (hfxoInit->ctuneSteadyState << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimSteadyState << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT); - - /* Set timeouts */ - CMU->HFXOTIMEOUTCTRL = (hfxoInit->timeoutPeakDetect << _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT) - | (hfxoInit->timeoutSteady << _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT) - | (hfxoInit->timeoutStartup << _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT); - -#elif defined(_CMU_HFXOCTRL_MASK) - /* Verify that the deprecated autostart fields are not used, - * @ref CMU_HFXOAutostartEnable must be used instead. */ - EFM_ASSERT(!(hfxoInit->autoStartEm01 - || hfxoInit->autoSelEm01 - || hfxoInit->autoStartSelOnRacWakeup)); - - uint32_t tmp = CMU_HFXOCTRL_MODE_XTAL; - - /* AC coupled external clock not supported */ - EFM_ASSERT(hfxoInit->mode != cmuOscMode_AcCoupled); - if (hfxoInit->mode == cmuOscMode_External) { - tmp = CMU_HFXOCTRL_MODE_DIGEXTCLK; - } - - /* Apply control settings */ - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_MODE_MASK) - | tmp; - BUS_RegBitWrite(&CMU->HFXOCTRL, _CMU_HFXOCTRL_LOWPOWER_SHIFT, hfxoInit->lowPowerMode); - - /* Set XTAL tuning parameters */ - -#if defined(_CMU_HFXOCTRL1_PEAKDETTHR_MASK) - /* Set peak detection threshold */ - CMU->HFXOCTRL1 = (CMU->HFXOCTRL1 & ~_CMU_HFXOCTRL1_PEAKDETTHR_MASK) - | (hfxoInit->thresholdPeakDetect << _CMU_HFXOCTRL1_PEAKDETTHR_SHIFT); -#endif - /* Set tuning for startup and steady state */ - CMU->HFXOSTARTUPCTRL = (hfxoInit->ctuneStartup << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimStartup << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT); - - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK - | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK)) - | (hfxoInit->ctuneSteadyState << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) - | (hfxoInit->xoCoreBiasTrimSteadyState << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT) - | (hfxoInit->regIshSteadyState << _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT) - | getRegIshUpperVal(hfxoInit->regIshSteadyState); - - /* Set timeouts */ - CMU->HFXOTIMEOUTCTRL = (hfxoInit->timeoutPeakDetect << _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT) - | (hfxoInit->timeoutSteady << _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT) - | (hfxoInit->timeoutStartup << _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT) - | (hfxoInit->timeoutShuntOptimization << _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_SHIFT); - -#else - CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_HFXOTIMEOUT_MASK - | _CMU_CTRL_HFXOBOOST_MASK - | _CMU_CTRL_HFXOMODE_MASK - | _CMU_CTRL_HFXOGLITCHDETEN_MASK)) - | (hfxoInit->timeout << _CMU_CTRL_HFXOTIMEOUT_SHIFT) - | (hfxoInit->boost << _CMU_CTRL_HFXOBOOST_SHIFT) - | (hfxoInit->mode << _CMU_CTRL_HFXOMODE_SHIFT) - | (hfxoInit->glitchDetector ? CMU_CTRL_HFXOGLITCHDETEN : 0); -#endif -} - -/***************************************************************************//** - * @brief - * Get the LCD framerate divisor (FDIV) setting. - * - * @return - * The LCD framerate divisor. - ******************************************************************************/ -uint32_t CMU_LCDClkFDIVGet(void) -{ -#if defined(LCD_PRESENT) && defined(_CMU_LCDCTRL_MASK) - return (CMU->LCDCTRL & _CMU_LCDCTRL_FDIV_MASK) >> _CMU_LCDCTRL_FDIV_SHIFT; -#else - return 0; -#endif /* defined(LCD_PRESENT) */ -} - -/***************************************************************************//** - * @brief - * Set the LCD framerate divisor (FDIV) setting. - * - * @note - * The FDIV field (CMU LCDCTRL register) should only be modified while the - * LCD module is clock disabled (CMU LFACLKEN0.LCD bit is 0). This function - * will NOT modify FDIV if the LCD module clock is enabled. Please refer to - * CMU_ClockEnable() for disabling/enabling LCD clock. - * - * @param[in] div - * The FDIV setting to use. - ******************************************************************************/ -void CMU_LCDClkFDIVSet(uint32_t div) -{ -#if defined(LCD_PRESENT) && defined(_CMU_LCDCTRL_MASK) - EFM_ASSERT(div <= cmuClkDiv_128); - - /* Do not allow modification if LCD clock enabled */ - if (CMU->LFACLKEN0 & CMU_LFACLKEN0_LCD) { - return; - } - - div <<= _CMU_LCDCTRL_FDIV_SHIFT; - div &= _CMU_LCDCTRL_FDIV_MASK; - CMU->LCDCTRL = (CMU->LCDCTRL & ~_CMU_LCDCTRL_FDIV_MASK) | div; -#else - (void)div; /* Unused parameter */ -#endif /* defined(LCD_PRESENT) */ -} - -/**************************************************************************//** - * @brief - * Set LFXO control registers - * - * @note - * LFXO configuration should be obtained from a configuration tool, - * app note or xtal datasheet. This function disables the LFXO to ensure - * a valid state before update. - * - * @param[in] lfxoInit - * LFXO setup parameters - *****************************************************************************/ -void CMU_LFXOInit(const CMU_LFXOInit_TypeDef *lfxoInit) -{ - /* Do not disable LFXO if it is currently selected as HF/Core clock */ - EFM_ASSERT(CMU_ClockSelectGet(cmuClock_HF) != cmuSelect_LFXO); - - /* LFXO must be disabled before reconfiguration */ - CMU_OscillatorEnable(cmuOsc_LFXO, false, false); - -#if defined(_CMU_LFXOCTRL_MASK) - BUS_RegMaskedWrite(&CMU->LFXOCTRL, - _CMU_LFXOCTRL_TUNING_MASK - | _CMU_LFXOCTRL_GAIN_MASK - | _CMU_LFXOCTRL_TIMEOUT_MASK - | _CMU_LFXOCTRL_MODE_MASK, - (lfxoInit->ctune << _CMU_LFXOCTRL_TUNING_SHIFT) - | (lfxoInit->gain << _CMU_LFXOCTRL_GAIN_SHIFT) - | (lfxoInit->timeout << _CMU_LFXOCTRL_TIMEOUT_SHIFT) - | (lfxoInit->mode << _CMU_LFXOCTRL_MODE_SHIFT)); -#else - bool cmuBoost = (lfxoInit->boost & 0x2); - BUS_RegMaskedWrite(&CMU->CTRL, - _CMU_CTRL_LFXOTIMEOUT_MASK - | _CMU_CTRL_LFXOBOOST_MASK - | _CMU_CTRL_LFXOMODE_MASK, - (lfxoInit->timeout << _CMU_CTRL_LFXOTIMEOUT_SHIFT) - | ((cmuBoost ? 1 : 0) << _CMU_CTRL_LFXOBOOST_SHIFT) - | (lfxoInit->mode << _CMU_CTRL_LFXOMODE_SHIFT)); -#endif - -#if defined(_EMU_AUXCTRL_REDLFXOBOOST_MASK) - bool emuReduce = (lfxoInit->boost & 0x1); - BUS_RegBitWrite(&EMU->AUXCTRL, _EMU_AUXCTRL_REDLFXOBOOST_SHIFT, emuReduce ? 1 : 0); -#endif -} - -/***************************************************************************//** - * @brief - * Enable/disable oscillator. - * - * @note - * WARNING: When this function is called to disable either cmuOsc_LFXO or - * cmuOsc_HFXO the LFXOMODE or HFXOMODE fields of the CMU_CTRL register - * are reset to the reset value. I.e. if external clock sources are selected - * in either LFXOMODE or HFXOMODE fields, the configuration will be cleared - * and needs to be reconfigured if needed later. - * - * @param[in] osc - * The oscillator to enable/disable. - * - * @param[in] enable - * @li true - enable specified oscillator. - * @li false - disable specified oscillator. - * - * @param[in] wait - * Only used if @p enable is true. - * @li true - wait for oscillator start-up time to timeout before returning. - * @li false - do not wait for oscillator start-up time to timeout before - * returning. - ******************************************************************************/ -void CMU_OscillatorEnable(CMU_Osc_TypeDef osc, bool enable, bool wait) -{ - uint32_t rdyBitPos; -#if defined(_SILICON_LABS_32B_SERIES_1) - uint32_t ensBitPos; -#endif -#if defined(_CMU_STATUS_HFXOPEAKDETRDY_MASK) - uint32_t hfxoTrimStatus; -#endif - - uint32_t enBit; - uint32_t disBit; - - switch (osc) { - case cmuOsc_HFRCO: - enBit = CMU_OSCENCMD_HFRCOEN; - disBit = CMU_OSCENCMD_HFRCODIS; - rdyBitPos = _CMU_STATUS_HFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_HFRCOENS_SHIFT; -#endif - break; - - case cmuOsc_HFXO: - enBit = CMU_OSCENCMD_HFXOEN; - disBit = CMU_OSCENCMD_HFXODIS; - rdyBitPos = _CMU_STATUS_HFXORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_HFXOENS_SHIFT; -#endif - break; - - case cmuOsc_AUXHFRCO: - enBit = CMU_OSCENCMD_AUXHFRCOEN; - disBit = CMU_OSCENCMD_AUXHFRCODIS; - rdyBitPos = _CMU_STATUS_AUXHFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_AUXHFRCOENS_SHIFT; -#endif - break; - - case cmuOsc_LFRCO: - enBit = CMU_OSCENCMD_LFRCOEN; - disBit = CMU_OSCENCMD_LFRCODIS; - rdyBitPos = _CMU_STATUS_LFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_LFRCOENS_SHIFT; -#endif - break; - - case cmuOsc_LFXO: - enBit = CMU_OSCENCMD_LFXOEN; - disBit = CMU_OSCENCMD_LFXODIS; - rdyBitPos = _CMU_STATUS_LFXORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_LFXOENS_SHIFT; -#endif - break; - -#if defined(_CMU_STATUS_USHFRCOENS_MASK) - case cmuOsc_USHFRCO: - enBit = CMU_OSCENCMD_USHFRCOEN; - disBit = CMU_OSCENCMD_USHFRCODIS; - rdyBitPos = _CMU_STATUS_USHFRCORDY_SHIFT; -#if defined(_SILICON_LABS_32B_SERIES_1) - ensBitPos = _CMU_STATUS_USHFRCOENS_SHIFT; -#endif - break; -#endif - -#if defined(_CMU_STATUS_PLFRCOENS_MASK) - case cmuOsc_PLFRCO: - enBit = CMU_OSCENCMD_PLFRCOEN; - disBit = CMU_OSCENCMD_PLFRCODIS; - rdyBitPos = _CMU_STATUS_PLFRCORDY_SHIFT; - ensBitPos = _CMU_STATUS_PLFRCOENS_SHIFT; - break; -#endif - - default: - /* Undefined clock source or cmuOsc_ULFRCO. ULFRCO is always enabled, - and cannot be disabled. Ie. the definition of cmuOsc_ULFRCO is primarely - intended for information: the ULFRCO is always on. */ - EFM_ASSERT(0); - return; - } - - if (enable) { - #if defined(_CMU_HFXOCTRL_MASK) - bool firstHfxoEnable = false; - - /* Enabling the HFXO for the first time requires special handling. We use the - * PEAKDETSHUTOPTMODE field of the HFXOCTRL register to see if this is the - * first time the HFXO is enabled. */ - if ((osc == cmuOsc_HFXO) && (getHfxoTuningMode() == HFXO_TUNING_MODE_AUTO)) { - /* REGPWRSEL must be set to DVDD before the HFXO can be enabled. */ -#if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) - EFM_ASSERT(EMU->PWRCTRL & EMU_PWRCTRL_REGPWRSEL_DVDD); -#endif - - firstHfxoEnable = true; - /* First time we enable an external clock we should switch to CMD mode to make sure that - * we only do SCO and not PDA tuning. */ - if ((CMU->HFXOCTRL & (_CMU_HFXOCTRL_MODE_MASK)) == CMU_HFXOCTRL_MODE_DIGEXTCLK) { - setHfxoTuningMode(HFXO_TUNING_MODE_CMD); - } - } -#endif - CMU->OSCENCMD = enBit; - -#if defined(_SILICON_LABS_32B_SERIES_1) - /* Always wait for ENS to go high */ - while (!BUS_RegBitRead(&CMU->STATUS, ensBitPos)) { - } -#endif - - /* Wait for clock to become ready after enable */ - if (wait) { - while (!BUS_RegBitRead(&CMU->STATUS, rdyBitPos)) ; -#if defined(_SILICON_LABS_32B_SERIES_1) - if ((osc == cmuOsc_HFXO) && firstHfxoEnable) { - if ((CMU->HFXOCTRL & _CMU_HFXOCTRL_MODE_MASK) == CMU_HFXOCTRL_MODE_DIGEXTCLK) { -#if defined(CMU_CMD_HFXOSHUNTOPTSTART) - /* External clock mode should only do shunt current optimization. */ - CMU_OscillatorTuningOptimize(cmuOsc_HFXO, cmuHFXOTuningMode_ShuntCommand, true); -#endif - } else { - /* Wait for peak detection and shunt current optimization to complete. */ - CMU_OscillatorTuningWait(cmuOsc_HFXO, cmuHFXOTuningMode_Auto); - } - - /* Disable the HFXO again to apply the trims. Apply trim from HFXOTRIMSTATUS - when disabled. */ - hfxoTrimStatus = CMU_OscillatorTuningGet(cmuOsc_HFXO); - CMU_OscillatorEnable(cmuOsc_HFXO, false, true); - CMU_OscillatorTuningSet(cmuOsc_HFXO, hfxoTrimStatus); - - /* Restart in CMD mode. */ - CMU->OSCENCMD = enBit; - while (!BUS_RegBitRead(&CMU->STATUS, rdyBitPos)) ; - } -#endif - } - } else { - CMU->OSCENCMD = disBit; - -#if defined(_SILICON_LABS_32B_SERIES_1) - /* Always wait for ENS to go low */ - while (BUS_RegBitRead(&CMU->STATUS, ensBitPos)) { - } -#endif - } -} - -/***************************************************************************//** - * @brief - * Get oscillator frequency tuning setting. - * - * @param[in] osc - * Oscillator to get tuning value for, one of: - * @li #cmuOsc_LFRCO - * @li #cmuOsc_HFRCO @if _CMU_USHFRCOCTRL_TUNING_MASK - * @li #cmuOsc_USHFRCO - * @endif - * @li #cmuOsc_AUXHFRCO - * @li #cmuOsc_HFXO if CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE is defined - * - * @return - * The oscillator frequency tuning setting in use. - ******************************************************************************/ -uint32_t CMU_OscillatorTuningGet(CMU_Osc_TypeDef osc) -{ - uint32_t ret; - - switch (osc) { - case cmuOsc_LFRCO: - ret = (CMU->LFRCOCTRL & _CMU_LFRCOCTRL_TUNING_MASK) - >> _CMU_LFRCOCTRL_TUNING_SHIFT; - break; - - case cmuOsc_HFRCO: - ret = (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_TUNING_MASK) - >> _CMU_HFRCOCTRL_TUNING_SHIFT; - break; - -#if defined (_CMU_USHFRCOCTRL_TUNING_MASK) - case cmuOsc_USHFRCO: - ret = (CMU->USHFRCOCTRL & _CMU_USHFRCOCTRL_TUNING_MASK) - >> _CMU_USHFRCOCTRL_TUNING_SHIFT; - break; -#endif - - case cmuOsc_AUXHFRCO: - ret = (CMU->AUXHFRCOCTRL & _CMU_AUXHFRCOCTRL_TUNING_MASK) - >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT; - break; - -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - case cmuOsc_HFXO: - ret = CMU->HFXOTRIMSTATUS & (_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK -#if defined(_CMU_HFXOTRIMSTATUS_REGISH_MASK) - | _CMU_HFXOTRIMSTATUS_REGISH_MASK -#endif - ); - break; -#endif - - default: - EFM_ASSERT(0); - ret = 0; - break; - } - - return ret; -} - -/***************************************************************************//** - * @brief - * Set the oscillator frequency tuning control. - * - * @note - * Oscillator tuning is done during production, and the tuning value is - * automatically loaded after a reset. Changing the tuning value from the - * calibrated value is for more advanced use. Certain oscillators also have - * build-in tuning optimization. - * - * @param[in] osc - * Oscillator to set tuning value for, one of: - * @li #cmuOsc_LFRCO - * @li #cmuOsc_HFRCO @if _CMU_USHFRCOCTRL_TUNING_MASK - * @li #cmuOsc_USHFRCO - * @endif - * @li #cmuOsc_AUXHFRCO - * @li #cmuOsc_HFXO if PEAKDETSHUNTOPTMODE is available. Note that CMD mode is set. - * - * @param[in] val - * The oscillator frequency tuning setting to use. - ******************************************************************************/ -void CMU_OscillatorTuningSet(CMU_Osc_TypeDef osc, uint32_t val) -{ -#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK) - uint32_t regIshUpper; -#endif - - switch (osc) { - case cmuOsc_LFRCO: - EFM_ASSERT(val <= (_CMU_LFRCOCTRL_TUNING_MASK - >> _CMU_LFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_LFRCOCTRL_TUNING_MASK >> _CMU_LFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_LFRCOBSY_SHIFT)) ; -#endif - CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~(_CMU_LFRCOCTRL_TUNING_MASK)) - | (val << _CMU_LFRCOCTRL_TUNING_SHIFT); - break; - - case cmuOsc_HFRCO: - EFM_ASSERT(val <= (_CMU_HFRCOCTRL_TUNING_MASK - >> _CMU_HFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_HFRCOCTRL_TUNING_MASK >> _CMU_HFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT)) { - } -#endif - CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_TUNING_MASK)) - | (val << _CMU_HFRCOCTRL_TUNING_SHIFT); - break; - -#if defined (_CMU_USHFRCOCTRL_TUNING_MASK) - case cmuOsc_USHFRCO: - EFM_ASSERT(val <= (_CMU_USHFRCOCTRL_TUNING_MASK - >> _CMU_USHFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_USHFRCOCTRL_TUNING_MASK >> _CMU_USHFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) { - } -#endif - CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~(_CMU_USHFRCOCTRL_TUNING_MASK)) - | (val << _CMU_USHFRCOCTRL_TUNING_SHIFT); - break; -#endif - - case cmuOsc_AUXHFRCO: - EFM_ASSERT(val <= (_CMU_AUXHFRCOCTRL_TUNING_MASK - >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT)); - val &= (_CMU_AUXHFRCOCTRL_TUNING_MASK >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT); -#if defined(_SILICON_LABS_32B_SERIES_1) - while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT)) { - } -#endif - CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL & ~(_CMU_AUXHFRCOCTRL_TUNING_MASK)) - | (val << _CMU_AUXHFRCOCTRL_TUNING_SHIFT); - break; - -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - case cmuOsc_HFXO: - - /* Do set PEAKDETSHUNTOPTMODE or HFXOSTEADYSTATECTRL if HFXO is enabled */ - EFM_ASSERT(!(CMU->STATUS & CMU_STATUS_HFXOENS)); - - /* Switch to command mode. Automatic SCO and PDA calibration is not done - at the next enable. Set user REGISH, REGISHUPPER and IBTRIMXOCORE. */ - CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) - | CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD; - -#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK) - regIshUpper = getRegIshUpperVal((val & _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK) - >> _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT); - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL - & ~(_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK - | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK)) - | val - | regIshUpper; -#else - CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL - & ~_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK) - | val; -#endif - - break; -#endif - - default: - EFM_ASSERT(0); - break; - } -} - -#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) || defined(_CMU_HFXOCTRL_PEAKDETMODE_MASK) -/***************************************************************************//** - * @brief - * Wait for oscillator tuning optimization. - * - * @param[in] osc - * Oscillator to set tuning value for, one of: - * @li #cmuOsc_HFXO - * - * @param[in] mode - * Tuning optimization mode. - * - * @return - * Returns false on invalid parameters or oscillator error status. - ******************************************************************************/ -bool CMU_OscillatorTuningWait(CMU_Osc_TypeDef osc, - CMU_HFXOTuningMode_TypeDef mode) -{ - uint32_t waitFlags; - EFM_ASSERT(osc == cmuOsc_HFXO); - - /* Currently implemented for HFXO with PEAKDETSHUNTOPTMODE only */ - (void)osc; - - if (getHfxoTuningMode() == HFXO_TUNING_MODE_AUTO) { - waitFlags = HFXO_TUNING_READY_FLAGS; - } else { - /* Set wait flags for each command and wait */ - switch (mode) { -#if defined(_CMU_STATUS_HFXOSHUNTOPTRDY_MASK) - case cmuHFXOTuningMode_ShuntCommand: - waitFlags = CMU_STATUS_HFXOSHUNTOPTRDY; - break; -#endif - case cmuHFXOTuningMode_Auto: - waitFlags = HFXO_TUNING_READY_FLAGS; - break; - -#if defined(CMU_CMD_HFXOSHUNTOPTSTART) - case cmuHFXOTuningMode_PeakShuntCommand: - waitFlags = HFXO_TUNING_READY_FLAGS; - break; -#endif - - default: - waitFlags = _CMU_STATUS_MASK; - EFM_ASSERT(false); - } - } - while ((CMU->STATUS & waitFlags) != waitFlags) ; - -#if defined(CMU_IF_HFXOPEAKDETERR) - /* Check error flags */ - if (waitFlags & CMU_STATUS_HFXOPEAKDETRDY) { - return (CMU->IF & CMU_IF_HFXOPEAKDETERR ? true : false); - } -#endif - return true; -} - -/***************************************************************************//** - * @brief - * Start and optionally wait for oscillator tuning optimization. - * - * @param[in] osc - * Oscillator to set tuning value for, one of: - * @li #cmuOsc_HFXO - * - * @param[in] mode - * Tuning optimization mode. - * - * @param[in] wait - * Wait for tuning optimization to complete. - * true - wait for tuning optimization to complete. - * false - return without waiting. - * - * @return - * Returns false on invalid parameters or oscillator error status. - ******************************************************************************/ -bool CMU_OscillatorTuningOptimize(CMU_Osc_TypeDef osc, - CMU_HFXOTuningMode_TypeDef mode, - bool wait) -{ - switch (osc) { - case cmuOsc_HFXO: - if (mode) { -#if defined(CMU_IF_HFXOPEAKDETERR) - /* Clear error flag before command write */ - CMU->IFC = CMU_IFC_HFXOPEAKDETERR; -#endif - CMU->CMD = mode; - } - if (wait) { - return CMU_OscillatorTuningWait(osc, mode); - } - break; - - default: - EFM_ASSERT(false); - } - return true; -} -#endif - -/**************************************************************************//** - * @brief - * Determine if currently selected PCNTn clock used is external or LFBCLK. - * - * @param[in] instance - * PCNT instance number to get currently selected clock source for. - * - * @return - * @li true - selected clock is external clock. - * @li false - selected clock is LFBCLK. - *****************************************************************************/ -bool CMU_PCNTClockExternalGet(unsigned int instance) -{ - uint32_t setting; - - switch (instance) { -#if defined(_CMU_PCNTCTRL_PCNT0CLKEN_MASK) - case 0: - setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0; - break; - -#if defined(_CMU_PCNTCTRL_PCNT1CLKEN_MASK) - case 1: - setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0; - break; - -#if defined(_CMU_PCNTCTRL_PCNT2CLKEN_MASK) - case 2: - setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0; - break; -#endif -#endif -#endif - - default: - setting = 0; - break; - } - return (setting ? true : false); -} - -/**************************************************************************//** - * @brief - * Select PCNTn clock. - * - * @param[in] instance - * PCNT instance number to set selected clock source for. - * - * @param[in] external - * Set to true to select external clock, false to select LFBCLK. - *****************************************************************************/ -void CMU_PCNTClockExternalSet(unsigned int instance, bool external) -{ -#if defined(PCNT_PRESENT) - uint32_t setting = 0; - - EFM_ASSERT(instance < PCNT_COUNT); - - if (external) { - setting = 1; - } - - BUS_RegBitWrite(&(CMU->PCNTCTRL), (instance * 2) + 1, setting); - -#else - (void)instance; /* Unused parameter */ - (void)external; /* Unused parameter */ -#endif -} - -#if defined(_CMU_USHFRCOCONF_BAND_MASK) -/***************************************************************************//** - * @brief - * Get USHFRCO band in use. - * - * @return - * USHFRCO band in use. - ******************************************************************************/ -CMU_USHFRCOBand_TypeDef CMU_USHFRCOBandGet(void) -{ - return (CMU_USHFRCOBand_TypeDef)((CMU->USHFRCOCONF - & _CMU_USHFRCOCONF_BAND_MASK) - >> _CMU_USHFRCOCONF_BAND_SHIFT); -} -#endif - -#if defined(_CMU_USHFRCOCONF_BAND_MASK) -/***************************************************************************//** - * @brief - * Set USHFRCO band to use. - * - * @param[in] band - * USHFRCO band to activate. - ******************************************************************************/ -void CMU_USHFRCOBandSet(CMU_USHFRCOBand_TypeDef band) -{ - uint32_t tuning; - uint32_t fineTuning; - CMU_Select_TypeDef osc; - - /* Cannot switch band if USHFRCO is already selected as HF clock. */ - osc = CMU_ClockSelectGet(cmuClock_HF); - EFM_ASSERT((CMU_USHFRCOBandGet() != band) && (osc != cmuSelect_USHFRCO)); - - /* Read tuning value from calibration table */ - switch (band) { - case cmuUSHFRCOBand_24MHz: - tuning = (DEVINFO->USHFRCOCAL0 & _DEVINFO_USHFRCOCAL0_BAND24_TUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND24_TUNING_SHIFT; - fineTuning = (DEVINFO->USHFRCOCAL0 - & _DEVINFO_USHFRCOCAL0_BAND24_FINETUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND24_FINETUNING_SHIFT; - ushfrcoFreq = 24000000UL; - break; - - case cmuUSHFRCOBand_48MHz: - tuning = (DEVINFO->USHFRCOCAL0 & _DEVINFO_USHFRCOCAL0_BAND48_TUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND48_TUNING_SHIFT; - fineTuning = (DEVINFO->USHFRCOCAL0 - & _DEVINFO_USHFRCOCAL0_BAND48_FINETUNING_MASK) - >> _DEVINFO_USHFRCOCAL0_BAND48_FINETUNING_SHIFT; - /* Enable the clock divider before switching the band from 24 to 48MHz */ - BUS_RegBitWrite(&CMU->USHFRCOCONF, _CMU_USHFRCOCONF_USHFRCODIV2DIS_SHIFT, 0); - ushfrcoFreq = 48000000UL; - break; - - default: - EFM_ASSERT(0); - return; - } - - /* Set band and tuning */ - CMU->USHFRCOCONF = (CMU->USHFRCOCONF & ~_CMU_USHFRCOCONF_BAND_MASK) - | (band << _CMU_USHFRCOCONF_BAND_SHIFT); - CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~_CMU_USHFRCOCTRL_TUNING_MASK) - | (tuning << _CMU_USHFRCOCTRL_TUNING_SHIFT); - CMU->USHFRCOTUNE = (CMU->USHFRCOTUNE & ~_CMU_USHFRCOTUNE_FINETUNING_MASK) - | (fineTuning << _CMU_USHFRCOTUNE_FINETUNING_SHIFT); - - /* Disable the clock divider after switching the band from 48 to 24MHz */ - if (band == cmuUSHFRCOBand_24MHz) { - BUS_RegBitWrite(&CMU->USHFRCOCONF, _CMU_USHFRCOCONF_USHFRCODIV2DIS_SHIFT, 1); - } -} -#endif - -/** @} (end addtogroup CMU) */ -/** @} (end addtogroup emlib) */ -#endif /* __EM_CMU_H */ diff --git a/targets/efm32boot/emlib/em_cryotimer.c b/targets/efm32boot/emlib/em_cryotimer.c deleted file mode 100644 index 66f4ac5..0000000 --- a/targets/efm32boot/emlib/em_cryotimer.c +++ /dev/null @@ -1,61 +0,0 @@ -/***************************************************************************//** - * @file em_cryotimer.c - * @brief Ultra Low Energy Timer/Counter (CRYOTIMER) peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software.@n - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software.@n - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_cryotimer.h" -#include "em_bus.h" - -#if defined(CRYOTIMER_PRESENT) && (CRYOTIMER_COUNT == 1) - -/***************************************************************************//** - * @brief - * Initialize the CRYOTIMER. - * - * @details - * Use this function to initialize the CRYOTIMER. - * Select prescaler setting and select low frequency oscillator. - * Refer to the configuration structure @ref CRYOTIMER_Init_TypeDef for more - * details. - * - * @param[in] init - * Pointer to initialization structure. - ******************************************************************************/ -void CRYOTIMER_Init(const CRYOTIMER_Init_TypeDef *init) -{ - CRYOTIMER->PERIODSEL = (uint32_t)init->period & _CRYOTIMER_PERIODSEL_MASK; - CRYOTIMER->CTRL = ((uint32_t)init->enable << _CRYOTIMER_CTRL_EN_SHIFT) - | ((uint32_t)init->debugRun << _CRYOTIMER_CTRL_DEBUGRUN_SHIFT) - | ((uint32_t)init->osc << _CRYOTIMER_CTRL_OSCSEL_SHIFT) - | ((uint32_t)init->presc << _CRYOTIMER_CTRL_PRESC_SHIFT); - CRYOTIMER_EM4WakeupEnable(init->em4Wakeup); -} - -#endif /* defined(CRYOTIMER_PRESENT) && (CRYOTIMER_COUNT > 0) */ diff --git a/targets/efm32boot/emlib/em_emu.c b/targets/efm32boot/emlib/em_emu.c deleted file mode 100644 index 1ba8a46..0000000 --- a/targets/efm32boot/emlib/em_emu.c +++ /dev/null @@ -1,2587 +0,0 @@ -/***************************************************************************//** - * @file em_emu.c - * @brief Energy Management Unit (EMU) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include - -#include "em_emu.h" -#if defined(EMU_PRESENT) && (EMU_COUNT > 0) - -#include "em_cmu.h" -#include "em_system.h" -#include "em_common.h" -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup EMU - * @brief Energy Management Unit (EMU) Peripheral API - * @details - * This module contains functions to control the EMU peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The EMU handles the different low energy modes - * in Silicon Labs microcontrollers. - * @{ - ******************************************************************************/ - -/* Consistency check, since restoring assumes similar bitpositions in */ -/* CMU OSCENCMD and STATUS regs */ -#if (CMU_STATUS_AUXHFRCOENS != CMU_OSCENCMD_AUXHFRCOEN) -#error Conflict in AUXHFRCOENS and AUXHFRCOEN bitpositions -#endif -#if (CMU_STATUS_HFXOENS != CMU_OSCENCMD_HFXOEN) -#error Conflict in HFXOENS and HFXOEN bitpositions -#endif -#if (CMU_STATUS_LFRCOENS != CMU_OSCENCMD_LFRCOEN) -#error Conflict in LFRCOENS and LFRCOEN bitpositions -#endif -#if (CMU_STATUS_LFXOENS != CMU_OSCENCMD_LFXOEN) -#error Conflict in LFXOENS and LFXOEN bitpositions -#endif - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -#if defined(_SILICON_LABS_32B_SERIES_0) -/* Fix for errata EMU_E107 - non-WIC interrupt masks. - * Zero Gecko and future families are not affected by errata EMU_E107 */ -#if defined(_EFM32_GECKO_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0x0dfc0323U)) -#define NON_WIC_INT_MASK_1 (~(0x0U)) - -#elif defined(_EFM32_TINY_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0x001be323U)) -#define NON_WIC_INT_MASK_1 (~(0x0U)) - -#elif defined(_EFM32_GIANT_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0xff020e63U)) -#define NON_WIC_INT_MASK_1 (~(0x00000046U)) - -#elif defined(_EFM32_WONDER_FAMILY) -#define ERRATA_FIX_EMU_E107_EN -#define NON_WIC_INT_MASK_0 (~(0xff020e63U)) -#define NON_WIC_INT_MASK_1 (~(0x00000046U)) - -#endif -#endif - -/* Fix for errata EMU_E108 - High Current Consumption on EM4 Entry. */ -#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_HAPPY_FAMILY) -#define ERRATA_FIX_EMU_E108_EN -#endif - -/* Fix for errata EMU_E208 - Occasional Full Reset After Exiting EM4H */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -#define ERRATA_FIX_EMU_E208_EN -#endif - -/* Enable FETCNT tuning errata fix */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -#define ERRATA_FIX_DCDC_FETCNT_SET_EN -#endif - -/* Enable LN handshake errata fix */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -#define ERRATA_FIX_DCDC_LNHS_BLOCK_EN -typedef enum { - errataFixDcdcHsInit, - errataFixDcdcHsTrimSet, - errataFixDcdcHsBypassLn, - errataFixDcdcHsLnWaitDone -} errataFixDcdcHs_TypeDef; -static errataFixDcdcHs_TypeDef errataFixDcdcHsState = errataFixDcdcHsInit; -#endif - -/* Used to figure out if a memory address is inside or outside of a RAM block. - * A memory address is inside a RAM block if the address is greater than the - * RAM block address. */ -#define ADDRESS_NOT_IN_BLOCK(addr, block) ((addr) <= (block)) - -/* RAM Block layout for various device families. Note that some devices - * have special layout in RAM0 and some devices have a special RAM block - * at the end of their block layout. */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84) -#define RAM1_BLOCKS 2 -#define RAM1_BLOCK_SIZE 0x10000 // 64 kB blocks -#define RAM2_BLOCKS 1 -#define RAM2_BLOCK_SIZE 0x800 // 2 kB block -#elif defined(_SILICON_LABS_GECKO_INTERNAL_SDID_89) -#define RAM0_BLOCKS 2 -#define RAM0_BLOCK_SIZE 0x4000 -#define RAM1_BLOCKS 2 -#define RAM1_BLOCK_SIZE 0x4000 // 16 kB blocks -#define RAM2_BLOCKS 1 -#define RAM2_BLOCK_SIZE 0x800 // 2 kB block -#elif defined(_SILICON_LABS_GECKO_INTERNAL_SDID_95) -#define RAM0_BLOCKS 1 -#define RAM0_BLOCK_SIZE 0x4000 // 16 kB block -#define RAM1_BLOCKS 1 -#define RAM1_BLOCK_SIZE 0x4000 // 16 kB block -#define RAM2_BLOCKS 1 -#define RAM2_BLOCK_SIZE 0x800 // 2 kB block -#elif defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_GIANT_FAMILY) -#define RAM0_BLOCKS 4 -#define RAM0_BLOCK_SIZE 0x8000 // 32 kB blocks -#elif defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_GECKO_FAMILY) -#define RAM0_BLOCKS 4 -#define RAM0_BLOCK_SIZE 0x1000 // 4 kB blocks -#elif defined(_SILICON_LABS_32B_SERIES_1) && defined(_EFM32_GIANT_FAMILY) -#define RAM0_BLOCKS 8 -#define RAM0_BLOCK_SIZE 0x4000 // 16 kB blocks -#define RAM1_BLOCKS 8 -#define RAM1_BLOCK_SIZE 0x4000 // 16 kB blocks -#define RAM2_BLOCKS 4 -#define RAM2_BLOCK_SIZE 0x10000 // 64 kB blocks -#endif - -#if defined(_SILICON_LABS_32B_SERIES_0) -/* RAM_MEM_END on Gecko devices have a value larger than the SRAM_SIZE */ -#define RAM0_END (SRAM_BASE + SRAM_SIZE - 1) -#else -#define RAM0_END RAM_MEM_END -#endif - -#if defined(CMU_STATUS_HFXOSHUNTOPTRDY) -#define HFXO_STATUS_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY | CMU_STATUS_HFXOSHUNTOPTRDY) -#elif defined(CMU_STATUS_HFXOPEAKDETRDY) -#define HFXO_STATUS_READY_FLAGS (CMU_STATUS_HFXOPEAKDETRDY) -#endif - -/** @endcond */ - -#if defined(_EMU_DCDCCTRL_MASK) -/* DCDCTODVDD output range min/max */ -#if !defined(PWRCFG_DCDCTODVDD_VMIN) -#define PWRCFG_DCDCTODVDD_VMIN 1800 -#endif -#if !defined(PWRCFG_DCDCTODVDD_VMAX) -#define PWRCFG_DCDCTODVDD_VMAX 3000 -#endif -#endif - -/******************************************************************************* - *************************** LOCAL VARIABLES ******************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/* Static user configuration */ -#if defined(_EMU_DCDCCTRL_MASK) -static uint16_t dcdcMaxCurrent_mA; -static uint16_t dcdcEm01LoadCurrent_mA; -static EMU_DcdcLnReverseCurrentControl_TypeDef dcdcReverseCurrentControl; -#endif -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -static EMU_EM01Init_TypeDef vScaleEM01Config = { false }; -#endif -/** @endcond */ - -/******************************************************************************* - ************************** LOCAL FUNCTIONS ******************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/* Convert from level to EM0 and 1 command bit */ -__STATIC_INLINE uint32_t vScaleEM01Cmd(EMU_VScaleEM01_TypeDef level) -{ - return EMU_CMD_EM01VSCALE0 << (_EMU_STATUS_VSCALE_VSCALE0 - (uint32_t)level); -} -#endif - -/***************************************************************************//** - * @brief - * Save/restore/update oscillator, core clock and voltage scaling configuration on - * EM2 or EM3 entry/exit. - * - * @details - * Hardware may automatically change oscillator and voltage scaling configuration - * when going into or out of an energy mode. Static data in this function keeps track of - * such configuration bits and is used to restore state if needed. - * - ******************************************************************************/ -typedef enum { - emState_Save, /* Save EMU and CMU state */ - emState_Restore, /* Restore and unlock */ -} emState_TypeDef; - -static void emState(emState_TypeDef action) -{ - uint32_t oscEnCmd; - uint32_t cmuLocked; - static uint32_t cmuStatus; - static CMU_Select_TypeDef hfClock; -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - static uint8_t vScaleStatus; -#endif - - /* Save or update state */ - if (action == emState_Save) { - /* Save configuration. */ - cmuStatus = CMU->STATUS; - hfClock = CMU_ClockSelectGet(cmuClock_HF); -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Save vscale */ - EMU_VScaleWait(); - vScaleStatus = (uint8_t)((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) - >> _EMU_STATUS_VSCALE_SHIFT); -#endif - } else if (action == emState_Restore) { /* Restore state */ - /* Apply saved configuration. */ -#if defined(_EMU_CMD_EM01VSCALE0_MASK) - /* Restore EM0 and 1 voltage scaling level. EMU_VScaleWait() is called later, - just before HF clock select is set. */ - EMU->CMD = vScaleEM01Cmd((EMU_VScaleEM01_TypeDef)vScaleStatus); -#endif - - /* CMU registers may be locked */ - cmuLocked = CMU->LOCK & CMU_LOCK_LOCKKEY_LOCKED; - CMU_Unlock(); - - /* AUXHFRCO are automatically disabled (except if using debugger). */ - /* HFRCO, USHFRCO and HFXO are automatically disabled. */ - /* LFRCO/LFXO may be disabled by SW in EM3. */ - /* Restore according to status prior to entering energy mode. */ - oscEnCmd = 0; - oscEnCmd |= ((cmuStatus & CMU_STATUS_HFRCOENS) ? CMU_OSCENCMD_HFRCOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_AUXHFRCOENS) ? CMU_OSCENCMD_AUXHFRCOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_LFRCOENS) ? CMU_OSCENCMD_LFRCOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_HFXOENS) ? CMU_OSCENCMD_HFXOEN : 0); - oscEnCmd |= ((cmuStatus & CMU_STATUS_LFXOENS) ? CMU_OSCENCMD_LFXOEN : 0); -#if defined(_CMU_STATUS_USHFRCOENS_MASK) - oscEnCmd |= ((cmuStatus & CMU_STATUS_USHFRCOENS) ? CMU_OSCENCMD_USHFRCOEN : 0); -#endif - CMU->OSCENCMD = oscEnCmd; - -#if defined(_EMU_STATUS_VSCALE_MASK) - /* Wait for upscale to complete and then restore selected clock */ - EMU_VScaleWait(); -#endif - - if (hfClock != cmuSelect_HFRCO) { - CMU_ClockSelectSet(cmuClock_HF, hfClock); - } - - /* If HFRCO was disabled before entering Energy Mode, turn it off again */ - /* as it is automatically enabled by wake up */ - if ( !(cmuStatus & CMU_STATUS_HFRCOENS) ) { - CMU->OSCENCMD = CMU_OSCENCMD_HFRCODIS; - } - - /* Restore CMU register locking */ - if (cmuLocked) { - CMU_Lock(); - } - } -} - -#if defined(ERRATA_FIX_EMU_E107_EN) -/* Get enable conditions for errata EMU_E107 fix. */ -__STATIC_INLINE bool getErrataFixEmuE107En(void) -{ - /* SYSTEM_ChipRevisionGet could have been used here, but we would like a - * faster implementation in this case. - */ - uint16_t majorMinorRev; - - /* CHIP MAJOR bit [3:0] */ - majorMinorRev = ((ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) - >> _ROMTABLE_PID0_REVMAJOR_SHIFT) - << 8; - /* CHIP MINOR bit [7:4] */ - majorMinorRev |= ((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) - >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) - << 4; - /* CHIP MINOR bit [3:0] */ - majorMinorRev |= (ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) - >> _ROMTABLE_PID3_REVMINORLSB_SHIFT; - -#if defined(_EFM32_GECKO_FAMILY) - return (majorMinorRev <= 0x0103); -#elif defined(_EFM32_TINY_FAMILY) - return (majorMinorRev <= 0x0102); -#elif defined(_EFM32_GIANT_FAMILY) - return (majorMinorRev <= 0x0103) || (majorMinorRev == 0x0204); -#elif defined(_EFM32_WONDER_FAMILY) - return (majorMinorRev == 0x0100); -#else - /* Zero Gecko and future families are not affected by errata EMU_E107 */ - return false; -#endif -} -#endif - -/* LP prepare / LN restore P/NFET count */ -#define DCDC_LP_PFET_CNT 7 -#define DCDC_LP_NFET_CNT 7 -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) -static void currentLimitersUpdate(void); -static void dcdcFetCntSet(bool lpModeSet) -{ - uint32_t tmp; - static uint32_t emuDcdcMiscCtrlReg; - - if (lpModeSet) { - emuDcdcMiscCtrlReg = EMU->DCDCMISCCTRL; - tmp = EMU->DCDCMISCCTRL - & ~(_EMU_DCDCMISCCTRL_PFETCNT_MASK | _EMU_DCDCMISCCTRL_NFETCNT_MASK); - tmp |= (DCDC_LP_PFET_CNT << _EMU_DCDCMISCCTRL_PFETCNT_SHIFT) - | (DCDC_LP_NFET_CNT << _EMU_DCDCMISCCTRL_NFETCNT_SHIFT); - EMU->DCDCMISCCTRL = tmp; - currentLimitersUpdate(); - } else { - EMU->DCDCMISCCTRL = emuDcdcMiscCtrlReg; - currentLimitersUpdate(); - } -} -#endif - -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) -static void dcdcHsFixLnBlock(void) -{ -#define EMU_DCDCSTATUS (*(volatile uint32_t *)(EMU_BASE + 0x7C)) - if ((errataFixDcdcHsState == errataFixDcdcHsTrimSet) - || (errataFixDcdcHsState == errataFixDcdcHsBypassLn)) { - /* Wait for LNRUNNING */ - if ((EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK) == EMU_DCDCCTRL_DCDCMODE_LOWNOISE) { - while (!(EMU_DCDCSTATUS & (0x1 << 16))) ; - } - errataFixDcdcHsState = errataFixDcdcHsLnWaitDone; - } -} -#endif - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) -/* Configure EMU and CMU for EM2 and 3 voltage downscale */ -static void vScaleDownEM23Setup(void) -{ - uint32_t hfSrcClockFrequency; - - EMU_VScaleEM23_TypeDef scaleEM23Voltage = - (EMU_VScaleEM23_TypeDef)((EMU->CTRL & _EMU_CTRL_EM23VSCALE_MASK) - >> _EMU_CTRL_EM23VSCALE_SHIFT); - - EMU_VScaleEM01_TypeDef currentEM01Voltage = - (EMU_VScaleEM01_TypeDef)((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) - >> _EMU_STATUS_VSCALE_SHIFT); - - /* Wait until previous scaling is done. */ - EMU_VScaleWait(); - - /* Inverse coding. */ - if ((uint32_t)scaleEM23Voltage > (uint32_t)currentEM01Voltage) { - /* Set safe clock and wait-states. */ - if (scaleEM23Voltage == emuVScaleEM23_LowPower) { - hfSrcClockFrequency = CMU_ClockDivGet(cmuClock_HF) * CMU_ClockFreqGet(cmuClock_HF); - /* Set default low power voltage HFRCO band as HF clock. */ - if (hfSrcClockFrequency > CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX) { - CMU_HFRCOBandSet(cmuHFRCOFreq_19M0Hz); - } - CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFRCO); - } else { - /* Other voltage scaling levels are not currently supported. */ - EFM_ASSERT(false); - } - } else { - /* Same voltage or hardware will scale to min(EMU_CTRL_EM23VSCALE, EMU_STATUS_VSCALE) */ - } -} -#endif -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Enter energy mode 2 (EM2). - * - * @details - * When entering EM2, the high frequency clocks are disabled, ie HFXO, HFRCO - * and AUXHFRCO (for AUXHFRCO, see exception note below). When re-entering - * EM0, HFRCO is re-enabled and the core will be clocked by the configured - * HFRCO band. This ensures a quick wakeup from EM2. - * - * However, prior to entering EM2, the core may have been using another - * oscillator than HFRCO. The @p restore parameter gives the user the option - * to restore all HF oscillators according to state prior to entering EM2, - * as well as the clock used to clock the core. This restore procedure is - * handled by SW. However, since handled by SW, it will not be restored - * before completing the interrupt function(s) waking up the core! - * - * @note - * If restoring core clock to use the HFXO oscillator, which has been - * disabled during EM2 mode, this function will stall until the oscillator - * has stabilized. Stalling time can be reduced by adding interrupt - * support detecting stable oscillator, and an asynchronous switch to the - * original oscillator. See CMU documentation. Such a feature is however - * outside the scope of the implementation in this function. - * @par - * If HFXO is re-enabled by this function, and NOT used to clock the core, - * this function will not wait for HFXO to stabilize. This must be considered - * by the application if trying to use features relying on that oscillator - * upon return. - * @par - * If a debugger is attached, the AUXHFRCO will not be disabled if enabled - * upon entering EM2. It will thus remain enabled when returning to EM0 - * regardless of the @p restore parameter. - * @par - * If HFXO autostart and select is enabled by using CMU_HFXOAutostartEnable(), - * the starting and selecting of the core clocks will be identical to the user - * independently of the value of the @p restore parameter when waking up on - * the wakeup sources corresponding to the autostart and select setting. - * @par - * If voltage scaling is supported, the restore parameter is true and the EM0 - * voltage scaling level is set higher than the EM2 level, then the EM0 level is - * also restored. - * - * @param[in] restore - * @li true - save and restore oscillators, clocks and voltage scaling, see - * function details. - * @li false - do not save and restore oscillators and clocks, see function - * details. - * @par - * The @p restore option should only be used if all clock control is done - * via the CMU API. - ******************************************************************************/ -void EMU_EnterEM2(bool restore) -{ -#if defined(ERRATA_FIX_EMU_E107_EN) - bool errataFixEmuE107En; - uint32_t nonWicIntEn[2]; -#endif - - /* Only save EMU and CMU state if restored on wake-up. */ - if (restore) { - emState(emState_Save); - } - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) - vScaleDownEM23Setup(); -#endif - - /* Enter Cortex deep sleep mode */ - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - - /* Fix for errata EMU_E107 - store non-WIC interrupt enable flags. - Disable the enabled non-WIC interrupts. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - errataFixEmuE107En = getErrataFixEmuE107En(); - if (errataFixEmuE107En) { - nonWicIntEn[0] = NVIC->ISER[0] & NON_WIC_INT_MASK_0; - NVIC->ICER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - nonWicIntEn[1] = NVIC->ISER[1] & NON_WIC_INT_MASK_1; - NVIC->ICER[1] = nonWicIntEn[1]; -#endif - } -#endif - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(true); -#endif -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) - dcdcHsFixLnBlock(); -#endif - - __WFI(); - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(false); -#endif - - /* Fix for errata EMU_E107 - restore state of non-WIC interrupt enable flags. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - if (errataFixEmuE107En) { - NVIC->ISER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - NVIC->ISER[1] = nonWicIntEn[1]; -#endif - } -#endif - - /* Restore oscillators/clocks and voltage scaling if supported. */ - if (restore) { - emState(emState_Restore); - } else { - /* If not restoring, and original clock was not HFRCO, we have to */ - /* update CMSIS core clock variable since HF clock has changed */ - /* to HFRCO. */ - SystemCoreClockUpdate(); - } -} - -/***************************************************************************//** - * @brief - * Enter energy mode 3 (EM3). - * - * @details - * When entering EM3, the high frequency clocks are disabled by HW, ie HFXO, - * HFRCO and AUXHFRCO (for AUXHFRCO, see exception note below). In addition, - * the low frequency clocks, ie LFXO and LFRCO are disabled by SW. When - * re-entering EM0, HFRCO is re-enabled and the core will be clocked by the - * configured HFRCO band. This ensures a quick wakeup from EM3. - * - * However, prior to entering EM3, the core may have been using another - * oscillator than HFRCO. The @p restore parameter gives the user the option - * to restore all HF/LF oscillators according to state prior to entering EM3, - * as well as the clock used to clock the core. This restore procedure is - * handled by SW. However, since handled by SW, it will not be restored - * before completing the interrupt function(s) waking up the core! - * - * @note - * If restoring core clock to use an oscillator other than HFRCO, this - * function will stall until the oscillator has stabilized. Stalling time - * can be reduced by adding interrupt support detecting stable oscillator, - * and an asynchronous switch to the original oscillator. See CMU - * documentation. Such a feature is however outside the scope of the - * implementation in this function. - * @par - * If HFXO/LFXO/LFRCO are re-enabled by this function, and NOT used to clock - * the core, this function will not wait for those oscillators to stabilize. - * This must be considered by the application if trying to use features - * relying on those oscillators upon return. - * @par - * If a debugger is attached, the AUXHFRCO will not be disabled if enabled - * upon entering EM3. It will thus remain enabled when returning to EM0 - * regardless of the @p restore parameter. - * @par - * If voltage scaling is supported, the restore parameter is true and the EM0 - * voltage scaling level is set higher than the EM3 level, then the EM0 level is - * also restored. - * - * @param[in] restore - * @li true - save and restore oscillators, clocks and voltage scaling, see - * function details. - * @li false - do not save and restore oscillators and clocks, see function - * details. - * @par - * The @p restore option should only be used if all clock control is done - * via the CMU API. - ******************************************************************************/ -void EMU_EnterEM3(bool restore) -{ - uint32_t cmuLocked; - -#if defined(ERRATA_FIX_EMU_E107_EN) - bool errataFixEmuE107En; - uint32_t nonWicIntEn[2]; -#endif - - /* Only save EMU and CMU state if restored on wake-up. */ - if (restore) { - emState(emState_Save); - } - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) - vScaleDownEM23Setup(); -#endif - - /* CMU registers may be locked */ - cmuLocked = CMU->LOCK & CMU_LOCK_LOCKKEY_LOCKED; - CMU_Unlock(); - - /* Disable LF oscillators */ - CMU->OSCENCMD = CMU_OSCENCMD_LFXODIS | CMU_OSCENCMD_LFRCODIS; - - /* Restore CMU register locking */ - if (cmuLocked) { - CMU_Lock(); - } - - /* Enter Cortex deep sleep mode */ - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - - /* Fix for errata EMU_E107 - store non-WIC interrupt enable flags. - Disable the enabled non-WIC interrupts. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - errataFixEmuE107En = getErrataFixEmuE107En(); - if (errataFixEmuE107En) { - nonWicIntEn[0] = NVIC->ISER[0] & NON_WIC_INT_MASK_0; - NVIC->ICER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - nonWicIntEn[1] = NVIC->ISER[1] & NON_WIC_INT_MASK_1; - NVIC->ICER[1] = nonWicIntEn[1]; -#endif - } -#endif - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(true); -#endif -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) - dcdcHsFixLnBlock(); -#endif - - __WFI(); - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(false); -#endif - - /* Fix for errata EMU_E107 - restore state of non-WIC interrupt enable flags. */ -#if defined(ERRATA_FIX_EMU_E107_EN) - if (errataFixEmuE107En) { - NVIC->ISER[0] = nonWicIntEn[0]; -#if (NON_WIC_INT_MASK_1 != (~(0x0U))) - NVIC->ISER[1] = nonWicIntEn[1]; -#endif - } -#endif - - /* Restore oscillators/clocks and voltage scaling if supported. */ - if (restore) { - emState(emState_Restore); - } else { - /* If not restoring, and original clock was not HFRCO, we have to */ - /* update CMSIS core clock variable since HF clock has changed */ - /* to HFRCO. */ - SystemCoreClockUpdate(); - } -} - -/***************************************************************************//** - * @brief - * Save CMU HF clock select state, oscillator enable and voltage scaling - * (if available) before @ref EMU_EnterEM2() or @ref EMU_EnterEM3() are called - * with the restore parameter set to false. Calling this function is - * equivalent to calling @ref EMU_EnterEM2() or @ref EMU_EnterEM3() with the - * restore parameter set to true, but it allows the state to be saved without - * going to sleep. The state can be restored manually by calling - * @ref EMU_Restore(). - ******************************************************************************/ -void EMU_Save(void) -{ - emState(emState_Save); -} - -/***************************************************************************//** - * @brief - * Restore CMU HF clock select state, oscillator enable and voltage scaling - * (if available) after @ref EMU_EnterEM2() or @ref EMU_EnterEM3() are called - * with the restore parameter set to false. Calling this function is - * equivalent to calling @ref EMU_EnterEM2() or @ref EMU_EnterEM3() with the - * restore parameter set to true, but it allows the application to evaluate the - * wakeup reason before restoring state. - ******************************************************************************/ -void EMU_Restore(void) -{ - emState(emState_Restore); -} - -/***************************************************************************//** - * @brief - * Enter energy mode 4 (EM4). - * - * @note - * Only a power on reset or external reset pin can wake the device from EM4. - ******************************************************************************/ -void EMU_EnterEM4(void) -{ - int i; - -#if defined(_EMU_EM4CTRL_EM4ENTRY_SHIFT) - uint32_t em4seq2 = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4ENTRY_MASK) - | (2 << _EMU_EM4CTRL_EM4ENTRY_SHIFT); - uint32_t em4seq3 = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4ENTRY_MASK) - | (3 << _EMU_EM4CTRL_EM4ENTRY_SHIFT); -#else - uint32_t em4seq2 = (EMU->CTRL & ~_EMU_CTRL_EM4CTRL_MASK) - | (2 << _EMU_CTRL_EM4CTRL_SHIFT); - uint32_t em4seq3 = (EMU->CTRL & ~_EMU_CTRL_EM4CTRL_MASK) - | (3 << _EMU_CTRL_EM4CTRL_SHIFT); -#endif - - /* Make sure register write lock is disabled */ - EMU_Unlock(); - -#if defined(_EMU_EM4CTRL_MASK) - if ((EMU->EM4CTRL & _EMU_EM4CTRL_EM4STATE_MASK) == EMU_EM4CTRL_EM4STATE_EM4S) { - uint32_t dcdcMode = EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK; - if (dcdcMode == EMU_DCDCCTRL_DCDCMODE_LOWNOISE - || dcdcMode == EMU_DCDCCTRL_DCDCMODE_LOWPOWER) { - /* DCDC is not supported in EM4S so we switch DCDC to bypass mode before - * entering EM4S */ - EMU_DCDCModeSet(emuDcdcMode_Bypass); - } - } -#endif - -#if defined(_EMU_EM4CTRL_MASK) && defined(ERRATA_FIX_EMU_E208_EN) - if (EMU->EM4CTRL & EMU_EM4CTRL_EM4STATE_EM4H) { - /* Fix for errata EMU_E208 - Occasional Full Reset After Exiting EM4H. - * Full description of errata fix can be found in the errata document. */ - __disable_irq(); - *(volatile uint32_t *)(EMU_BASE + 0x190) = 0x0000ADE8UL; - *(volatile uint32_t *)(EMU_BASE + 0x198) |= (0x1UL << 7); - *(volatile uint32_t *)(EMU_BASE + 0x88) |= (0x1UL << 8); - } -#endif - -#if defined(ERRATA_FIX_EMU_E108_EN) - /* Fix for errata EMU_E108 - High Current Consumption on EM4 Entry. */ - __disable_irq(); - *(volatile uint32_t *)0x400C80E4 = 0; -#endif - -#if defined(ERRATA_FIX_DCDC_FETCNT_SET_EN) - dcdcFetCntSet(true); -#endif -#if defined(ERRATA_FIX_DCDC_LNHS_BLOCK_EN) - dcdcHsFixLnBlock(); -#endif - - for (i = 0; i < 4; i++) { -#if defined(_EMU_EM4CTRL_EM4ENTRY_SHIFT) - EMU->EM4CTRL = em4seq2; - EMU->EM4CTRL = em4seq3; - } - EMU->EM4CTRL = em4seq2; -#else - EMU->CTRL = em4seq2; - EMU->CTRL = em4seq3; - } - EMU->CTRL = em4seq2; -#endif -} - -#if defined(_EMU_EM4CTRL_MASK) -/***************************************************************************//** - * @brief - * Enter energy mode 4 hibernate (EM4H). - * - * @note - * Retention of clocks and GPIO in EM4 can be configured using - * @ref EMU_EM4Init before calling this function. - ******************************************************************************/ -void EMU_EnterEM4H(void) -{ - BUS_RegBitWrite(&EMU->EM4CTRL, _EMU_EM4CTRL_EM4STATE_SHIFT, 1); - EMU_EnterEM4(); -} - -/***************************************************************************//** - * @brief - * Enter energy mode 4 shutoff (EM4S). - * - * @note - * Retention of clocks and GPIO in EM4 can be configured using - * @ref EMU_EM4Init before calling this function. - ******************************************************************************/ -void EMU_EnterEM4S(void) -{ - BUS_RegBitWrite(&EMU->EM4CTRL, _EMU_EM4CTRL_EM4STATE_SHIFT, 0); - EMU_EnterEM4(); -} -#endif - -/***************************************************************************//** - * @brief - * Power down memory block. - * - * @param[in] blocks - * Specifies a logical OR of bits indicating memory blocks to power down. - * Bit 0 selects block 1, bit 1 selects block 2, etc. Memory block 0 cannot - * be disabled. Please refer to the reference manual for available - * memory blocks for a device. - * - * @note - * Only a POR reset can power up the specified memory block(s) after powerdown. - * - * @deprecated - * This function is deprecated, use @ref EMU_RamPowerDown() instead which - * maps a user provided memory range into RAM blocks to power down. - ******************************************************************************/ -void EMU_MemPwrDown(uint32_t blocks) -{ -#if defined(_EMU_MEMCTRL_MASK) - EMU->MEMCTRL = blocks & _EMU_MEMCTRL_MASK; -#elif defined(_EMU_RAM0CTRL_MASK) - EMU->RAM0CTRL = blocks & _EMU_RAM0CTRL_MASK; -#else - (void)blocks; -#endif -} - -/***************************************************************************//** - * @brief - * Power down RAM memory blocks. - * - * @details - * This function will power down all the RAM blocks that are within a given - * range. The RAM block layout is different between device families, so this - * function can be used in a generic way to power down a RAM memory region - * which is known to be unused. - * - * This function will only power down blocks which are completely enclosed - * by the memory range given by [start, end). - * - * Here is an example of how to power down all RAM blocks except the first - * one. The first RAM block is special in that it cannot be powered down - * by the hardware. The size of this first RAM block is device specific - * see the reference manual to find the RAM block sizes. - * - * @code - * EMU_RamPowerDown(SRAM_BASE, SRAM_BASE + SRAM_SIZE); - * @endcode - * - * @note - * Only a POR reset can power up the specified memory block(s) after powerdown. - * - * @param[in] start - * The start address of the RAM region to power down. This address is - * inclusive. - * - * @param[in] end - * The end address of the RAM region to power down. This address is - * exclusive. If this parameter is 0, then all RAM blocks contained in the - * region from start to the upper RAM address will be powered down. - ******************************************************************************/ -void EMU_RamPowerDown(uint32_t start, uint32_t end) -{ - uint32_t mask = 0; - - if (end == 0) { - end = SRAM_BASE + SRAM_SIZE; - } - - // Check to see if something in RAM0 can be powered down - if (end > RAM0_END) { -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84) // EFM32xG12 and EFR32xG12 - // Block 0 is 16 kB and cannot be powered off - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20004000) << 0; // Block 1, 16 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20008000) << 1; // Block 2, 16 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x2000C000) << 2; // Block 3, 16 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20010000) << 3; // Block 4, 64 kB -#elif defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) // EFM32xG1 and EFR32xG1 - // Block 0 is 4 kB and cannot be powered off - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20001000) << 0; // Block 1, 4 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20002000) << 1; // Block 2, 8 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20004000) << 2; // Block 3, 8 kB - mask |= ADDRESS_NOT_IN_BLOCK(start, 0x20006000) << 3; // Block 4, 7 kB -#elif defined(RAM0_BLOCKS) - // These platforms have equally sized RAM blocks - for (int i = 1; i < RAM0_BLOCKS; i++) { - mask |= ADDRESS_NOT_IN_BLOCK(start, RAM_MEM_BASE + (i * RAM0_BLOCK_SIZE)) << (i - 1); - } -#endif - } - - // Power down the selected blocks -#if defined(_EMU_MEMCTRL_MASK) - EMU->MEMCTRL = EMU->MEMCTRL | mask; -#elif defined(_EMU_RAM0CTRL_MASK) - EMU->RAM0CTRL = EMU->RAM0CTRL | mask; -#else - // These devices are unable to power down RAM blocks - (void) mask; - (void) start; -#endif - -#if defined(RAM1_MEM_END) - mask = 0; - if (end > RAM1_MEM_END) { - for (int i = 0; i < RAM1_BLOCKS; i++) { - mask |= ADDRESS_NOT_IN_BLOCK(start, RAM1_MEM_BASE + (i * RAM1_BLOCK_SIZE)) << i; - } - } - EMU->RAM1CTRL |= mask; -#endif - -#if defined(RAM2_MEM_END) - mask = 0; - if (end > RAM2_MEM_END) { - for (int i = 0; i < RAM2_BLOCKS; i++) { - mask |= ADDRESS_NOT_IN_BLOCK(start, RAM2_MEM_BASE + (i * RAM2_BLOCK_SIZE)) << i; - } - } - EMU->RAM2CTRL |= mask; -#endif -} - -#if defined(_EMU_EM23PERNORETAINCTRL_MASK) -/***************************************************************************//** - * @brief - * Set EM2 3 peripheral retention control. - * - * @param[in] periMask - * Peripheral select mask. Use | operator to select multiple peripheral, for example - * @ref emuPeripheralRetention_LEUART0 | @ref emuPeripheralRetention_VDAC0. - * @param[in] enable - * Peripheral retention enable (true) or disable (false). - * - * - * @note - * Only peripheral retention disable is currently supported. Peripherals are - * enabled by default, and can only be disabled. - ******************************************************************************/ -void EMU_PeripheralRetention(EMU_PeripheralRetention_TypeDef periMask, bool enable) -{ - EFM_ASSERT(!enable); - EMU->EM23PERNORETAINCTRL = periMask & emuPeripheralRetention_ALL; -} -#endif - -/***************************************************************************//** - * @brief - * Update EMU module with CMU oscillator selection/enable status. - * - * @deprecated - * Oscillator status is saved in @ref EMU_EnterEM2() and @ref EMU_EnterEM3(). - ******************************************************************************/ -void EMU_UpdateOscConfig(void) -{ - emState(emState_Save); -} - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/***************************************************************************//** - * @brief - * Voltage scale in EM0 and 1 by clock frequency. - * - * @param[in] clockFrequency - * Use CMSIS HF clock if 0, or override to custom clock. Providing a - * custom clock frequency is required if using a non-standard HFXO - * frequency. - * @param[in] wait - * Wait for scaling to complete. - * - * @note - * This function is primarily needed by the @ref CMU module. - ******************************************************************************/ -void EMU_VScaleEM01ByClock(uint32_t clockFrequency, bool wait) -{ - uint32_t hfSrcClockFrequency; - uint32_t hfPresc = 1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT); - - /* VSCALE frequency is HFSRCCLK */ - if (clockFrequency == 0) { - hfSrcClockFrequency = SystemHFClockGet() * hfPresc; - } else { - hfSrcClockFrequency = clockFrequency; - } - - /* Apply EM0 and 1 voltage scaling command. */ - if (vScaleEM01Config.vScaleEM01LowPowerVoltageEnable - && (hfSrcClockFrequency < CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX)) { - EMU_VScaleEM01(emuVScaleEM01_LowPower, wait); - } else { - EMU_VScaleEM01(emuVScaleEM01_HighPerformance, wait); - } -} -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/***************************************************************************//** - * @brief - * Force voltage scaling in EM0 and 1 to a specific voltage level. - * - * @param[in] voltage - * Target VSCALE voltage level. - * @param[in] wait - * Wait for scaling to complate. - * - * @note - * This function is useful for upscaling before programming Flash from @ref MSC, - * and downscaling after programming is done. Flash programming is only supported - * at @ref emuVScaleEM01_HighPerformance. - * - * @note - * This function ignores @ref vScaleEM01LowPowerVoltageEnable set from @ref - * EMU_EM01Init(). - ******************************************************************************/ -void EMU_VScaleEM01(EMU_VScaleEM01_TypeDef voltage, bool wait) -{ - uint32_t hfSrcClockFrequency; - uint32_t hfPresc = 1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) - >> _CMU_HFPRESC_PRESC_SHIFT); - uint32_t hfFreq = SystemHFClockGet(); - EMU_VScaleEM01_TypeDef current = EMU_VScaleGet(); - - if (current == voltage) { - /* Voltage is already at correct level. */ - return; - } - - hfSrcClockFrequency = hfFreq * hfPresc; - - if (voltage == emuVScaleEM01_LowPower) { - EFM_ASSERT(hfSrcClockFrequency <= CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX); - /* Update wait states before scaling down voltage */ - CMU_UpdateWaitStates(hfFreq, emuVScaleEM01_LowPower); - } - - EMU->CMD = vScaleEM01Cmd(voltage); - - if (voltage == emuVScaleEM01_HighPerformance) { - /* Update wait states after scaling up voltage */ - CMU_UpdateWaitStates(hfFreq, emuVScaleEM01_HighPerformance); - } - - if (wait) { - EMU_VScaleWait(); - } -} -#endif - -#if defined(_EMU_CMD_EM01VSCALE0_MASK) -/***************************************************************************//** - * @brief - * Update EMU module with Energy Mode 0 and 1 configuration - * - * @param[in] em01Init - * Energy Mode 0 and 1 configuration structure - ******************************************************************************/ -void EMU_EM01Init(const EMU_EM01Init_TypeDef *em01Init) -{ - vScaleEM01Config.vScaleEM01LowPowerVoltageEnable = - em01Init->vScaleEM01LowPowerVoltageEnable; - EMU_VScaleEM01ByClock(0, true); -} -#endif - -/***************************************************************************//** - * @brief - * Update EMU module with Energy Mode 2 and 3 configuration - * - * @param[in] em23Init - * Energy Mode 2 and 3 configuration structure - ******************************************************************************/ -void EMU_EM23Init(const EMU_EM23Init_TypeDef *em23Init) -{ -#if defined(_EMU_CTRL_EMVREG_MASK) - EMU->CTRL = em23Init->em23VregFullEn ? (EMU->CTRL | EMU_CTRL_EMVREG) - : (EMU->CTRL & ~EMU_CTRL_EMVREG); -#elif defined(_EMU_CTRL_EM23VREG_MASK) - EMU->CTRL = em23Init->em23VregFullEn ? (EMU->CTRL | EMU_CTRL_EM23VREG) - : (EMU->CTRL & ~EMU_CTRL_EM23VREG); -#else - (void)em23Init; -#endif - -#if defined(_EMU_CTRL_EM23VSCALE_MASK) - EMU->CTRL = (EMU->CTRL & ~_EMU_CTRL_EM23VSCALE_MASK) - | (em23Init->vScaleEM23Voltage << _EMU_CTRL_EM23VSCALE_SHIFT); -#endif -} - -#if defined(_EMU_EM4CONF_MASK) || defined(_EMU_EM4CTRL_MASK) -/***************************************************************************//** - * @brief - * Update EMU module with Energy Mode 4 configuration - * - * @param[in] em4Init - * Energy Mode 4 configuration structure - ******************************************************************************/ -void EMU_EM4Init(const EMU_EM4Init_TypeDef *em4Init) -{ -#if defined(_EMU_EM4CONF_MASK) - /* Init for platforms with EMU->EM4CONF register */ - uint32_t em4conf = EMU->EM4CONF; - - /* Clear fields that will be reconfigured */ - em4conf &= ~(_EMU_EM4CONF_LOCKCONF_MASK - | _EMU_EM4CONF_OSC_MASK - | _EMU_EM4CONF_BURTCWU_MASK - | _EMU_EM4CONF_VREGEN_MASK); - - /* Configure new settings */ - em4conf |= (em4Init->lockConfig << _EMU_EM4CONF_LOCKCONF_SHIFT) - | (em4Init->osc) - | (em4Init->buRtcWakeup << _EMU_EM4CONF_BURTCWU_SHIFT) - | (em4Init->vreg << _EMU_EM4CONF_VREGEN_SHIFT); - - /* Apply configuration. Note that lock can be set after this stage. */ - EMU->EM4CONF = em4conf; - -#elif defined(_EMU_EM4CTRL_MASK) - /* Init for platforms with EMU->EM4CTRL register */ - - uint32_t em4ctrl = EMU->EM4CTRL; - - em4ctrl &= ~(_EMU_EM4CTRL_RETAINLFXO_MASK - | _EMU_EM4CTRL_RETAINLFRCO_MASK - | _EMU_EM4CTRL_RETAINULFRCO_MASK - | _EMU_EM4CTRL_EM4STATE_MASK - | _EMU_EM4CTRL_EM4IORETMODE_MASK); - - em4ctrl |= (em4Init->retainLfxo ? EMU_EM4CTRL_RETAINLFXO : 0) - | (em4Init->retainLfrco ? EMU_EM4CTRL_RETAINLFRCO : 0) - | (em4Init->retainUlfrco ? EMU_EM4CTRL_RETAINULFRCO : 0) - | (em4Init->em4State ? EMU_EM4CTRL_EM4STATE_EM4H : 0) - | (em4Init->pinRetentionMode); - - EMU->EM4CTRL = em4ctrl; -#endif - -#if defined(_EMU_CTRL_EM4HVSCALE_MASK) - EMU->CTRL = (EMU->CTRL & ~_EMU_CTRL_EM4HVSCALE_MASK) - | (em4Init->vScaleEM4HVoltage << _EMU_CTRL_EM4HVSCALE_SHIFT); -#endif -} -#endif - -#if defined(BU_PRESENT) -/***************************************************************************//** - * @brief - * Configure Backup Power Domain settings - * - * @param[in] bupdInit - * Backup power domain initialization structure - ******************************************************************************/ -void EMU_BUPDInit(const EMU_BUPDInit_TypeDef *bupdInit) -{ - uint32_t reg; - - /* Set power connection configuration */ - reg = EMU->PWRCONF & ~(_EMU_PWRCONF_PWRRES_MASK - | _EMU_PWRCONF_VOUTSTRONG_MASK - | _EMU_PWRCONF_VOUTMED_MASK - | _EMU_PWRCONF_VOUTWEAK_MASK); - - reg |= bupdInit->resistor - | (bupdInit->voutStrong << _EMU_PWRCONF_VOUTSTRONG_SHIFT) - | (bupdInit->voutMed << _EMU_PWRCONF_VOUTMED_SHIFT) - | (bupdInit->voutWeak << _EMU_PWRCONF_VOUTWEAK_SHIFT); - - EMU->PWRCONF = reg; - - /* Set backup domain inactive mode configuration */ - reg = EMU->BUINACT & ~(_EMU_BUINACT_PWRCON_MASK); - reg |= (bupdInit->inactivePower); - EMU->BUINACT = reg; - - /* Set backup domain active mode configuration */ - reg = EMU->BUACT & ~(_EMU_BUACT_PWRCON_MASK); - reg |= (bupdInit->activePower); - EMU->BUACT = reg; - - /* Set power control configuration */ - reg = EMU->BUCTRL & ~(_EMU_BUCTRL_PROBE_MASK - | _EMU_BUCTRL_BODCAL_MASK - | _EMU_BUCTRL_STATEN_MASK - | _EMU_BUCTRL_EN_MASK); - - /* Note use of ->enable to both enable BUPD, use BU_VIN pin input and - release reset */ - reg |= bupdInit->probe - | (bupdInit->bodCal << _EMU_BUCTRL_BODCAL_SHIFT) - | (bupdInit->statusPinEnable << _EMU_BUCTRL_STATEN_SHIFT) - | (bupdInit->enable << _EMU_BUCTRL_EN_SHIFT); - - /* Enable configuration */ - EMU->BUCTRL = reg; - - /* If enable is true, enable BU_VIN input power pin, if not disable it */ - EMU_BUPinEnable(bupdInit->enable); - - /* If enable is true, release BU reset, if not keep reset asserted */ - BUS_RegBitWrite(&(RMU->CTRL), _RMU_CTRL_BURSTEN_SHIFT, !bupdInit->enable); -} - -/***************************************************************************//** - * @brief - * Configure Backup Power Domain BOD Threshold value - * @note - * These values are precalibrated - * @param[in] mode Active or Inactive mode - * @param[in] value - ******************************************************************************/ -void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value) -{ - EFM_ASSERT(value < 8); - EFM_ASSERT(value <= (_EMU_BUACT_BUEXTHRES_MASK >> _EMU_BUACT_BUEXTHRES_SHIFT)); - - switch (mode) { - case emuBODMode_Active: - EMU->BUACT = (EMU->BUACT & ~_EMU_BUACT_BUEXTHRES_MASK) - | (value << _EMU_BUACT_BUEXTHRES_SHIFT); - break; - case emuBODMode_Inactive: - EMU->BUINACT = (EMU->BUINACT & ~_EMU_BUINACT_BUENTHRES_MASK) - | (value << _EMU_BUINACT_BUENTHRES_SHIFT); - break; - } -} - -/***************************************************************************//** - * @brief - * Configure Backup Power Domain BOD Threshold Range - * @note - * These values are precalibrated - * @param[in] mode Active or Inactive mode - * @param[in] value - ******************************************************************************/ -void EMU_BUThresRangeSet(EMU_BODMode_TypeDef mode, uint32_t value) -{ - EFM_ASSERT(value < 4); - EFM_ASSERT(value <= (_EMU_BUACT_BUEXRANGE_MASK >> _EMU_BUACT_BUEXRANGE_SHIFT)); - - switch (mode) { - case emuBODMode_Active: - EMU->BUACT = (EMU->BUACT & ~_EMU_BUACT_BUEXRANGE_MASK) - | (value << _EMU_BUACT_BUEXRANGE_SHIFT); - break; - case emuBODMode_Inactive: - EMU->BUINACT = (EMU->BUINACT & ~_EMU_BUINACT_BUENRANGE_MASK) - | (value << _EMU_BUINACT_BUENRANGE_SHIFT); - break; - } -} -#endif - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ -#if defined(_EMU_DCDCCTRL_MASK) -/* Translate fields with different names across platform generations to common names. */ -#if defined(_EMU_DCDCMISCCTRL_LPCMPBIAS_MASK) -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK _EMU_DCDCMISCCTRL_LPCMPBIAS_MASK -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT _EMU_DCDCMISCCTRL_LPCMPBIAS_SHIFT -#elif defined(_EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK) -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK -#define _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT -#endif -#if defined(_EMU_DCDCLPCTRL_LPCMPHYSSEL_MASK) -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK _EMU_DCDCLPCTRL_LPCMPHYSSEL_MASK -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT _EMU_DCDCLPCTRL_LPCMPHYSSEL_SHIFT -#elif defined(_EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK -#define _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT -#endif - -/* Internal DCDC trim modes. */ -typedef enum { - dcdcTrimMode_EM234H_LP = 0, -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - dcdcTrimMode_EM01_LP, -#endif - dcdcTrimMode_LN, -} dcdcTrimMode_TypeDef; - -/***************************************************************************//** - * @brief - * Load DCDC calibration constants from DI page. Const means calibration - * data that does not change depending on other configuration parameters. - * - * @return - * False if calibration registers are locked - ******************************************************************************/ -static bool dcdcConstCalibrationLoad(void) -{ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - uint32_t val; - volatile uint32_t *reg; - - /* DI calib data in flash */ - volatile uint32_t* const diCal_EMU_DCDCLNFREQCTRL = (volatile uint32_t *)(0x0FE08038); - volatile uint32_t* const diCal_EMU_DCDCLNVCTRL = (volatile uint32_t *)(0x0FE08040); - volatile uint32_t* const diCal_EMU_DCDCLPCTRL = (volatile uint32_t *)(0x0FE08048); - volatile uint32_t* const diCal_EMU_DCDCLPVCTRL = (volatile uint32_t *)(0x0FE08050); - volatile uint32_t* const diCal_EMU_DCDCTRIM0 = (volatile uint32_t *)(0x0FE08058); - volatile uint32_t* const diCal_EMU_DCDCTRIM1 = (volatile uint32_t *)(0x0FE08060); - - if (DEVINFO->DCDCLPVCTRL0 != UINT_MAX) { - val = *(diCal_EMU_DCDCLNFREQCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLNFREQCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCLNVCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLNVCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCLPCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLPCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCLPVCTRL + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCLPVCTRL; - *reg = val; - - val = *(diCal_EMU_DCDCTRIM0 + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCTRIM0; - *reg = val; - - val = *(diCal_EMU_DCDCTRIM1 + 1); - reg = (volatile uint32_t *)*diCal_EMU_DCDCTRIM1; - *reg = val; - - return true; - } - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - -#else - return true; -#endif -} - -/***************************************************************************//** - * @brief - * Set recommended and validated current optimization and timing settings - * - ******************************************************************************/ -static void dcdcValidatedConfigSet(void) -{ -/* Disable LP mode hysterysis in the state machine control */ -#define EMU_DCDCMISCCTRL_LPCMPHYSDIS (0x1UL << 1) -/* Comparator threshold on the high side */ -#define EMU_DCDCMISCCTRL_LPCMPHYSHI (0x1UL << 2) -#define EMU_DCDCSMCTRL (*(volatile uint32_t *)(EMU_BASE + 0x44)) - - uint32_t lnForceCcm; - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - uint32_t dcdcTiming; - SYSTEM_ChipRevision_TypeDef rev; -#endif - - /* Enable duty cycling of the bias */ - EMU->DCDCLPCTRL |= EMU_DCDCLPCTRL_LPVREFDUTYEN; - - /* Set low-noise RCO for LNFORCECCM configuration - * LNFORCECCM is default 1 for EFR32 - * LNFORCECCM is default 0 for EFM32 - */ - lnForceCcm = BUS_RegBitRead(&EMU->DCDCMISCCTRL, _EMU_DCDCMISCCTRL_LNFORCECCM_SHIFT); - if (lnForceCcm) { - /* 7MHz is recommended for LNFORCECCM = 1 */ - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_7MHz); - } else { - /* 3MHz is recommended for LNFORCECCM = 0 */ - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_3MHz); - } - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - EMU->DCDCTIMING &= ~_EMU_DCDCTIMING_DUTYSCALE_MASK; - EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LPCMPHYSDIS - | EMU_DCDCMISCCTRL_LPCMPHYSHI; - - SYSTEM_ChipRevisionGet(&rev); - if ((rev.major == 1) - && (rev.minor < 3) - && (errataFixDcdcHsState == errataFixDcdcHsInit)) { - /* LPCMPWAITDIS = 1 */ - EMU_DCDCSMCTRL |= 1; - - dcdcTiming = EMU->DCDCTIMING; - dcdcTiming &= ~(_EMU_DCDCTIMING_LPINITWAIT_MASK - | _EMU_DCDCTIMING_LNWAIT_MASK - | _EMU_DCDCTIMING_BYPWAIT_MASK); - - dcdcTiming |= ((180 << _EMU_DCDCTIMING_LPINITWAIT_SHIFT) - | (12 << _EMU_DCDCTIMING_LNWAIT_SHIFT) - | (180 << _EMU_DCDCTIMING_BYPWAIT_SHIFT)); - EMU->DCDCTIMING = dcdcTiming; - - errataFixDcdcHsState = errataFixDcdcHsTrimSet; - } -#endif -} - -/***************************************************************************//** - * @brief - * Compute current limiters: - * LNCLIMILIMSEL: LN current limiter threshold - * LPCLIMILIMSEL: LP current limiter threshold - * DCDCZDETCTRL: zero detector limiter threshold - ******************************************************************************/ -static void currentLimitersUpdate(void) -{ - uint32_t lncLimSel; - uint32_t zdetLimSel; - uint32_t pFetCnt; - uint16_t maxReverseCurrent_mA; - - /* 80mA as recommended peak in Application Note AN0948. - The peak current is the average current plus 50% of the current ripple. - Hence, a 14mA average current is recommended in LP mode. Since LP PFETCNT is also - a constant, we get lpcLimImSel = 1. The following calculation is provided - for documentation only. */ - const uint32_t lpcLim = (((14 + 40) + ((14 + 40) / 2)) - / (5 * (DCDC_LP_PFET_CNT + 1))) - - 1; - const uint32_t lpcLimSel = lpcLim << _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_SHIFT; - - /* Get enabled PFETs */ - pFetCnt = (EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_PFETCNT_MASK) - >> _EMU_DCDCMISCCTRL_PFETCNT_SHIFT; - - /* Compute LN current limiter threshold from nominal user input current and - LN PFETCNT as described in the register description for - EMU_DCDCMISCCTRL_LNCLIMILIMSEL. */ - lncLimSel = (((dcdcMaxCurrent_mA + 40) + ((dcdcMaxCurrent_mA + 40) / 2)) - / (5 * (pFetCnt + 1))) - - 1; - - /* Saturate the register field value */ - lncLimSel = SL_MIN(lncLimSel, - _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK - >> _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT); - - lncLimSel <<= _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT; - - /* Check for overflow */ - EFM_ASSERT((lncLimSel & ~_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK) == 0x0); - EFM_ASSERT((lpcLimSel & ~_EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK) == 0x0); - - EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK - | _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK)) - | (lncLimSel | lpcLimSel); - - /* Compute reverse current limit threshold for the zero detector from user input - maximum reverse current and LN PFETCNT as described in the register description - for EMU_DCDCZDETCTRL_ZDETILIMSEL. */ - if (dcdcReverseCurrentControl >= 0) { - /* If dcdcReverseCurrentControl < 0, then EMU_DCDCZDETCTRL_ZDETILIMSEL is "don't care" */ - maxReverseCurrent_mA = (uint16_t)dcdcReverseCurrentControl; - - zdetLimSel = ( ((maxReverseCurrent_mA + 40) + ((maxReverseCurrent_mA + 40) / 2)) - / ((2 * (pFetCnt + 1)) + ((pFetCnt + 1) / 2)) ); - /* Saturate the register field value */ - zdetLimSel = SL_MIN(zdetLimSel, - _EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK - >> _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT); - - zdetLimSel <<= _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT; - - /* Check for overflow */ - EFM_ASSERT((zdetLimSel & ~_EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK) == 0x0); - - EMU->DCDCZDETCTRL = (EMU->DCDCZDETCTRL & ~_EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK) - | zdetLimSel; - } -} - -/***************************************************************************//** - * @brief - * Set static variables that hold the user set maximum peak current - * and reverse current. Update limiters. - * - * @param[in] maxCurrent_mA - * Set the maximum peak current that the DCDC can draw from the power source. - * @param[in] reverseCurrentControl - * Reverse current control as defined by - * @ref EMU_DcdcLnReverseCurrentControl_TypeDef. Positive values have unit mA. - ******************************************************************************/ -static void userCurrentLimitsSet(uint32_t maxCurrent_mA, - EMU_DcdcLnReverseCurrentControl_TypeDef reverseCurrentControl) -{ - dcdcMaxCurrent_mA = maxCurrent_mA; - dcdcReverseCurrentControl = reverseCurrentControl; -} - -/***************************************************************************//** - * @brief - * Set DCDC low noise compensator control register - * - * @param[in] comp - * Low-noise mode compensator trim setpoint - ******************************************************************************/ -static void compCtrlSet(EMU_DcdcLnCompCtrl_TypeDef comp) -{ - switch (comp) { - case emuDcdcLnCompCtrl_1u0F: - EMU->DCDCLNCOMPCTRL = 0x57204077UL; - break; - - case emuDcdcLnCompCtrl_4u7F: - EMU->DCDCLNCOMPCTRL = 0xB7102137UL; - break; - - default: - EFM_ASSERT(false); - break; - } -} - -/***************************************************************************//** - * @brief - * Load EMU_DCDCLPCTRL_LPCMPHYSSEL depending on LP bias, LP feedback - * attenuation and DEVINFOREV. - * - * @param[in] lpAttenuation - * LP feedback attenuation. - * @param[in] lpCmpBias - * lpCmpBias selection. - * @param[in] trimMode - * DCDC trim mode. - ******************************************************************************/ -static bool lpCmpHystCalibrationLoad(bool lpAttenuation, - uint8_t lpCmpBias, - dcdcTrimMode_TypeDef trimMode) -{ - uint32_t lpcmpHystSel; - - /* Get calib data revision */ -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - uint8_t devinfoRev = SYSTEM_GetDevinfoRev(); - - /* Load LPATT indexed calibration data */ - if (devinfoRev < 4) -#else - /* Format change not present of newer families. */ - if (false) -#endif - { - lpcmpHystSel = DEVINFO->DCDCLPCMPHYSSEL0; - - if (lpAttenuation) { - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT1_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT1_SHIFT; - } else { - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT0_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL0_LPCMPHYSSELLPATT0_SHIFT; - } - } else { - /* devinfoRev >= 4: load LPCMPBIAS indexed calibration data */ - lpcmpHystSel = DEVINFO->DCDCLPCMPHYSSEL1; - switch (lpCmpBias) { - case 0: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS0_SHIFT; - break; - - case 1: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS1_SHIFT; - break; - - case 2: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS2_SHIFT; - break; - - case 3: - lpcmpHystSel = (lpcmpHystSel & _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPCMPHYSSEL1_LPCMPHYSSELLPCMPBIAS3_SHIFT; - break; - - default: - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - } - - /* Set trims */ - if (trimMode == dcdcTrimMode_EM234H_LP) { - /* Make sure the sel value is within the field range. */ - lpcmpHystSel <<= _GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT; - if (lpcmpHystSel & ~_GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - EMU->DCDCLPCTRL = (EMU->DCDCLPCTRL & ~_GENERIC_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) | lpcmpHystSel; - } - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) - if (trimMode == dcdcTrimMode_EM01_LP) { - /* Make sure the sel value is within the field range. */ - lpcmpHystSel <<= _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_SHIFT; - if (lpcmpHystSel & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - EMU->DCDCLPEM01CFG = (EMU->DCDCLPEM01CFG & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) | lpcmpHystSel; - } -#endif - - return true; -} - -/***************************************************************************//** - * @brief - * Load LPVREF low and high from DEVINFO. - * - * @param[out] vrefL - * LPVREF low from DEVINFO. - * @param[out] vrefH - * LPVREF high from DEVINFO. - * @param[in] lpAttenuation - * LP feedback attenuation. - * @param[in] lpcmpBias - * lpcmpBias to lookup in DEVINFO. - ******************************************************************************/ -static void lpGetDevinfoVrefLowHigh(uint32_t *vrefL, - uint32_t *vrefH, - bool lpAttenuation, - uint8_t lpcmpBias) -{ - uint32_t vrefLow = 0; - uint32_t vrefHigh = 0; - - /* Find VREF high and low in DEVINFO indexed by LPCMPBIAS (lpcmpBias) - and LPATT (lpAttenuation) */ - uint32_t switchVal = (lpcmpBias << 8) | (lpAttenuation ? 1 : 0); - switch (switchVal) { - case ((0 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL2; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT; - break; - - case ((1 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL2; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT; - break; - - case ((2 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL3; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT; - break; - - case ((3 << 8) | 1): - vrefLow = DEVINFO->DCDCLPVCTRL3; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT; - break; - - case ((0 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL0; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS0_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS0_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS0_SHIFT; - break; - - case ((1 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL0; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V8LPATT0LPCMPBIAS1_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS1_MASK) - >> _DEVINFO_DCDCLPVCTRL0_1V2LPATT0LPCMPBIAS1_SHIFT; - break; - - case ((2 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL1; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS2_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS2_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS2_SHIFT; - break; - - case ((3 << 8) | 0): - vrefLow = DEVINFO->DCDCLPVCTRL1; - vrefHigh = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V8LPATT0LPCMPBIAS3_SHIFT; - vrefLow = (vrefLow & _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS3_MASK) - >> _DEVINFO_DCDCLPVCTRL1_1V2LPATT0LPCMPBIAS3_SHIFT; - break; - - default: - EFM_ASSERT(false); - break; - } - *vrefL = vrefLow; - *vrefH = vrefHigh; -} - -/** @endcond */ - -/***************************************************************************//** - * @brief - * Set DCDC regulator operating mode - * - * @param[in] dcdcMode - * DCDC mode - ******************************************************************************/ -void EMU_DCDCModeSet(EMU_DcdcMode_TypeDef dcdcMode) -{ - uint32_t currentDcdcMode; - - /* Wait for any previous write sync to complete and read DCDC mode. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - currentDcdcMode = (EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK); - - /* Enable bypass current limiter when not in bypass mode to prevent - excessive current between VREGVDD and DVDD supplies when reentering bypass mode. */ - if (currentDcdcMode != EMU_DCDCCTRL_DCDCMODE_BYPASS) { - BUS_RegBitWrite(&EMU->DCDCCLIMCTRL, _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, 1); - } - - if ((EMU_DcdcMode_TypeDef)currentDcdcMode == dcdcMode) { - /* Mode already set. If already in bypass, make sure bypass current limiter - is disabled. */ - if (dcdcMode == emuDcdcMode_Bypass) { - BUS_RegBitWrite(&EMU->DCDCCLIMCTRL, _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, 0); - } - return; - } - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) - - /* Fix for errata DCDC_E203 */ - if ((currentDcdcMode == EMU_DCDCCTRL_DCDCMODE_BYPASS) - && (dcdcMode == emuDcdcMode_LowNoise)) { - errataFixDcdcHsState = errataFixDcdcHsBypassLn; - } - -#else - - /* Fix for errata DCDC_E204 */ - if (((currentDcdcMode == EMU_DCDCCTRL_DCDCMODE_OFF) || (currentDcdcMode == EMU_DCDCCTRL_DCDCMODE_BYPASS)) - && ((dcdcMode == emuDcdcMode_LowPower) || (dcdcMode == emuDcdcMode_LowNoise))) { - /* Always start in LOWNOISE mode and then switch to LOWPOWER mode once LOWNOISE startup is complete. */ - EMU_IntClear(EMU_IFC_DCDCLNRUNNING); - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - EMU->DCDCCTRL = (EMU->DCDCCTRL & ~_EMU_DCDCCTRL_DCDCMODE_MASK) | EMU_DCDCCTRL_DCDCMODE_LOWNOISE; - while (!(EMU_IntGet() & EMU_IF_DCDCLNRUNNING)) ; - } -#endif - - /* Set user requested mode. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - EMU->DCDCCTRL = (EMU->DCDCCTRL & ~_EMU_DCDCCTRL_DCDCMODE_MASK) | dcdcMode; - - /* Disable bypass current limiter after bypass mode is entered. - Enable the limiter if any other mode is entered. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - BUS_RegBitWrite(&EMU->DCDCCLIMCTRL, _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT, dcdcMode == emuDcdcMode_Bypass ? 0 : 1); -} - -/***************************************************************************//** - * @brief - * Set DCDC LN regulator conduction mode - * - * @param[in] conductionMode - * DCDC LN conduction mode. - * @param[in] rcoDefaultSet - * The default DCDC RCO band for the conductionMode will be used if true. - * Otherwise the current RCO configuration is used. - ******************************************************************************/ -void EMU_DCDCConductionModeSet(EMU_DcdcConductionMode_TypeDef conductionMode, bool rcoDefaultSet) -{ - EMU_DcdcMode_TypeDef currentDcdcMode - = (EMU_DcdcMode_TypeDef)(EMU->DCDCCTRL & _EMU_DCDCCTRL_DCDCMODE_MASK); - EMU_DcdcLnRcoBand_TypeDef rcoBand - = (EMU_DcdcLnRcoBand_TypeDef)((EMU->DCDCLNFREQCTRL & _EMU_DCDCLNFREQCTRL_RCOBAND_MASK) - >> _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT); - - /* Set bypass mode and wait for bypass mode to settle before - EMU_DCDCMISCCTRL_LNFORCECCM is set. Restore current DCDC mode. */ - EMU_IntClear(EMU_IFC_DCDCINBYPASS); - EMU_DCDCModeSet(emuDcdcMode_Bypass); - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - while (!(EMU_IntGet() & EMU_IF_DCDCINBYPASS)) ; - if (conductionMode == emuDcdcConductionMode_DiscontinuousLN) { - EMU->DCDCMISCCTRL &= ~EMU_DCDCMISCCTRL_LNFORCECCM; - if (rcoDefaultSet) { - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_3MHz); - } else { - /* emuDcdcConductionMode_DiscontinuousLN supports up to 4MHz LN RCO. */ - EFM_ASSERT(rcoBand <= emuDcdcLnRcoBand_4MHz); - } - } else { - EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LNFORCECCM; - if (rcoDefaultSet) { - EMU_DCDCLnRcoBandSet(emuDcdcLnRcoBand_7MHz); - } - } - EMU_DCDCModeSet(currentDcdcMode); - /* Update slice configuration as it depends on conduction mode and RCO band. */ - EMU_DCDCOptimizeSlice(dcdcEm01LoadCurrent_mA); -} - -/***************************************************************************//** - * @brief - * Configure DCDC regulator - * - * @note - * If the power circuit is configured for NODCDC as described in Section - * 11.3.4.3 of the Reference Manual, do not call this function. Instead call - * EMU_DCDCPowerOff(). - * - * @param[in] dcdcInit - * DCDC initialization structure - * - * @return - * True if initialization parameters are valid - ******************************************************************************/ -bool EMU_DCDCInit(const EMU_DCDCInit_TypeDef *dcdcInit) -{ - uint32_t lpCmpBiasSelEM234H; - -#if defined(_EMU_PWRCFG_MASK) - /* Set external power configuration. This enables writing to the other - DCDC registers. */ - EMU->PWRCFG = EMU_PWRCFG_PWRCFG_DCDCTODVDD; - - /* EMU->PWRCFG is write-once and POR reset only. Check that - we could set the desired power configuration. */ - if ((EMU->PWRCFG & _EMU_PWRCFG_PWRCFG_MASK) != EMU_PWRCFG_PWRCFG_DCDCTODVDD) { - /* If this assert triggers unexpectedly, please power cycle the - kit to reset the power configuration. */ - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } -#endif - - /* Load DCDC calibration data from the DI page */ - dcdcConstCalibrationLoad(); - - /* Check current parameters */ - EFM_ASSERT(dcdcInit->maxCurrent_mA <= 200); - EFM_ASSERT(dcdcInit->em01LoadCurrent_mA <= dcdcInit->maxCurrent_mA); - EFM_ASSERT(dcdcInit->reverseCurrentControl <= 200); - - if (dcdcInit->dcdcMode == emuDcdcMode_LowNoise) { - /* DCDC low-noise supports max 200mA */ - EFM_ASSERT(dcdcInit->em01LoadCurrent_mA <= 200); - } -#if (_SILICON_LABS_GECKO_INTERNAL_SDID != 80) - else if (dcdcInit->dcdcMode == emuDcdcMode_LowPower) { - /* Up to 10mA is supported for EM01-LP mode. */ - EFM_ASSERT(dcdcInit->em01LoadCurrent_mA <= 10); - } -#endif - - /* EM2/3/4 current above 10mA is not supported */ - EFM_ASSERT(dcdcInit->em234LoadCurrent_uA <= 10000); - - if (dcdcInit->em234LoadCurrent_uA < 75) { - lpCmpBiasSelEM234H = 0; - } else if (dcdcInit->em234LoadCurrent_uA < 500) { - lpCmpBiasSelEM234H = 1 << _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - } else if (dcdcInit->em234LoadCurrent_uA < 2500) { - lpCmpBiasSelEM234H = 2 << _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - } else { - lpCmpBiasSelEM234H = 3 << _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - } - - /* ==== THESE NEXT STEPS ARE STRONGLY ORDER DEPENDENT ==== */ - - /* Set DCDC low-power mode comparator bias selection */ - - /* 1. Set DCDC low-power mode comparator bias selection and forced CCM - => Updates DCDCMISCCTRL_LNFORCECCM */ - EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK - | _EMU_DCDCMISCCTRL_LNFORCECCM_MASK)) - | ((uint32_t)lpCmpBiasSelEM234H - | (dcdcInit->reverseCurrentControl >= 0 - ? EMU_DCDCMISCCTRL_LNFORCECCM : 0)); -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - /* Only 10mA EM01-LP current is supported */ - EMU->DCDCLPEM01CFG = (EMU->DCDCLPEM01CFG & ~_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - | EMU_DCDCLPEM01CFG_LPCMPBIASEM01_BIAS3; -#endif - - /* 2. Set recommended and validated current optimization settings - <= Depends on LNFORCECCM - => Updates DCDCLNFREQCTRL_RCOBAND */ - dcdcValidatedConfigSet(); - - /* 3. Updated static currents and limits user data. - Limiters are updated in EMU_DCDCOptimizeSlice() */ - userCurrentLimitsSet(dcdcInit->maxCurrent_mA, - dcdcInit->reverseCurrentControl); - dcdcEm01LoadCurrent_mA = dcdcInit->em01LoadCurrent_mA; - - /* 4. Optimize LN slice based on given user input load current - <= Depends on DCDCMISCCTRL_LNFORCECCM and DCDCLNFREQCTRL_RCOBAND - <= Depends on dcdcInit->maxCurrent_mA and dcdcInit->reverseCurrentControl - => Updates DCDCMISCCTRL_P/NFETCNT - => Updates DCDCMISCCTRL_LNCLIMILIMSEL and DCDCMISCCTRL_LPCLIMILIMSEL - => Updates DCDCZDETCTRL_ZDETILIMSEL */ - EMU_DCDCOptimizeSlice(dcdcInit->em01LoadCurrent_mA); - - /* ======================================================= */ - - /* Set DCDC low noise mode compensator control register. */ - compCtrlSet(dcdcInit->dcdcLnCompCtrl); - - /* Set DCDC output voltage */ - if (!EMU_DCDCOutputVoltageSet(dcdcInit->mVout, true, true)) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - -#if (_SILICON_LABS_GECKO_INTERNAL_SDID == 80) - /* Select analog peripheral power supply. This must be done before - DCDC mode is set for all EFM32xG1 and EFR32xG1 devices. */ - BUS_RegBitWrite(&EMU->PWRCTRL, - _EMU_PWRCTRL_ANASW_SHIFT, - dcdcInit->anaPeripheralPower ? 1 : 0); -#endif - -#if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) - /* Select DVDD as input to the digital regulator. The switch to DVDD will take - effect once the DCDC output is stable. */ - EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD; -#endif - - /* Set EM0 DCDC operating mode. Output voltage set in - EMU_DCDCOutputVoltageSet() above takes effect if mode - is changed from bypass/off mode. */ - EMU_DCDCModeSet(dcdcInit->dcdcMode); - -#if (_SILICON_LABS_GECKO_INTERNAL_SDID != 80) - /* Select analog peripheral power supply. This must be done after - DCDC mode is set for all devices other than EFM32xG1 and EFR32xG1. */ - BUS_RegBitWrite(&EMU->PWRCTRL, - _EMU_PWRCTRL_ANASW_SHIFT, - dcdcInit->anaPeripheralPower ? 1 : 0); -#endif - - return true; -} - -/***************************************************************************//** - * @brief - * Set DCDC output voltage - * - * @param[in] mV - * Target DCDC output voltage in mV - * - * @return - * True if the mV parameter is valid - ******************************************************************************/ -bool EMU_DCDCOutputVoltageSet(uint32_t mV, - bool setLpVoltage, - bool setLnVoltage) -{ -#if defined(_DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK) - -#define DCDC_TRIM_MODES ((uint8_t)dcdcTrimMode_LN + 1) - bool validOutVoltage; - bool attenuationSet; - uint32_t mVlow = 0; - uint32_t mVhigh = 0; - uint32_t mVdiff; - uint32_t vrefVal[DCDC_TRIM_MODES] = { 0 }; - uint32_t vrefLow[DCDC_TRIM_MODES] = { 0 }; - uint32_t vrefHigh[DCDC_TRIM_MODES] = { 0 }; - uint8_t lpcmpBias[DCDC_TRIM_MODES] = { 0 }; - - /* Check that the set voltage is within valid range. - Voltages are obtained from the datasheet. */ - validOutVoltage = ((mV >= PWRCFG_DCDCTODVDD_VMIN) - && (mV <= PWRCFG_DCDCTODVDD_VMAX)); - - if (!validOutVoltage) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - - /* Set attenuation to use and low/high range. */ - attenuationSet = (mV > 1800); - if (attenuationSet) { - mVlow = 1800; - mVhigh = 3000; - mVdiff = mVhigh - mVlow; - } else { - mVlow = 1200; - mVhigh = 1800; - mVdiff = mVhigh - mVlow; - } - - /* Get 2-point calib data from DEVINFO */ - - /* LN mode */ - if (attenuationSet) { - vrefLow[dcdcTrimMode_LN] = DEVINFO->DCDCLNVCTRL0; - vrefHigh[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK) - >> _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_SHIFT; - vrefLow[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_MASK) - >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_SHIFT; - } else { - vrefLow[dcdcTrimMode_LN] = DEVINFO->DCDCLNVCTRL0; - vrefHigh[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK) - >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_SHIFT; - vrefLow[dcdcTrimMode_LN] = (vrefLow[dcdcTrimMode_LN] & _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_MASK) - >> _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_SHIFT; - } - - /* LP EM234H mode */ - lpcmpBias[dcdcTrimMode_EM234H_LP] = (EMU->DCDCMISCCTRL & _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_MASK) - >> _GENERIC_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT; - lpGetDevinfoVrefLowHigh(&vrefLow[dcdcTrimMode_EM234H_LP], - &vrefHigh[dcdcTrimMode_EM234H_LP], - attenuationSet, - lpcmpBias[dcdcTrimMode_EM234H_LP]); - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - /* LP EM01 mode */ - lpcmpBias[dcdcTrimMode_EM01_LP] = (EMU->DCDCLPEM01CFG & _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - >> _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_SHIFT; - lpGetDevinfoVrefLowHigh(&vrefLow[dcdcTrimMode_EM01_LP], - &vrefHigh[dcdcTrimMode_EM01_LP], - attenuationSet, - lpcmpBias[dcdcTrimMode_EM01_LP]); -#endif - - /* Calculate output voltage trims */ - vrefVal[dcdcTrimMode_LN] = ((mV - mVlow) * (vrefHigh[dcdcTrimMode_LN] - vrefLow[dcdcTrimMode_LN])) - / mVdiff; - vrefVal[dcdcTrimMode_LN] += vrefLow[dcdcTrimMode_LN]; - - vrefVal[dcdcTrimMode_EM234H_LP] = ((mV - mVlow) * (vrefHigh[dcdcTrimMode_EM234H_LP] - vrefLow[dcdcTrimMode_EM234H_LP])) - / mVdiff; - vrefVal[dcdcTrimMode_EM234H_LP] += vrefLow[dcdcTrimMode_EM234H_LP]; - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - vrefVal[dcdcTrimMode_EM01_LP] = ((mV - mVlow) * (vrefHigh[dcdcTrimMode_EM01_LP] - vrefLow[dcdcTrimMode_EM01_LP])) - / mVdiff; - vrefVal[dcdcTrimMode_EM01_LP] += vrefLow[dcdcTrimMode_EM01_LP]; -#endif - - /* Range checks */ - if ((vrefVal[dcdcTrimMode_LN] > vrefHigh[dcdcTrimMode_LN]) - || (vrefVal[dcdcTrimMode_LN] < vrefLow[dcdcTrimMode_LN]) -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - || (vrefVal[dcdcTrimMode_EM01_LP] > vrefHigh[dcdcTrimMode_EM01_LP]) - || (vrefVal[dcdcTrimMode_EM01_LP] < vrefLow[dcdcTrimMode_EM01_LP]) -#endif - || (vrefVal[dcdcTrimMode_EM234H_LP] > vrefHigh[dcdcTrimMode_EM234H_LP]) - || (vrefVal[dcdcTrimMode_EM234H_LP] < vrefLow[dcdcTrimMode_EM234H_LP])) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - - /* Update output voltage tuning for LN and LP modes. */ - if (setLnVoltage) { - EMU->DCDCLNVCTRL = (EMU->DCDCLNVCTRL & ~(_EMU_DCDCLNVCTRL_LNVREF_MASK | _EMU_DCDCLNVCTRL_LNATT_MASK)) - | (vrefVal[dcdcTrimMode_LN] << _EMU_DCDCLNVCTRL_LNVREF_SHIFT) - | (attenuationSet ? EMU_DCDCLNVCTRL_LNATT : 0); - } - - if (setLpVoltage) { - /* Load LP EM234H comparator hysteresis calibration */ - if (!(lpCmpHystCalibrationLoad(attenuationSet, lpcmpBias[dcdcTrimMode_EM234H_LP], dcdcTrimMode_EM234H_LP))) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - -#if defined(_EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK) - /* Load LP EM234H comparator hysteresis calibration */ - if (!(lpCmpHystCalibrationLoad(attenuationSet, lpcmpBias[dcdcTrimMode_EM01_LP], dcdcTrimMode_EM01_LP))) { - EFM_ASSERT(false); - /* Return when assertions are disabled */ - return false; - } - - /* LP VREF is that max of trims for EM01 and EM234H. */ - vrefVal[dcdcTrimMode_EM234H_LP] = SL_MAX(vrefVal[dcdcTrimMode_EM234H_LP], vrefVal[dcdcTrimMode_EM01_LP]); -#endif - - /* Don't exceed max available code as specified in the reference manual for EMU_DCDCLPVCTRL. */ - vrefVal[dcdcTrimMode_EM234H_LP] = SL_MIN(vrefVal[dcdcTrimMode_EM234H_LP], 0xE7U); - EMU->DCDCLPVCTRL = (EMU->DCDCLPVCTRL & ~(_EMU_DCDCLPVCTRL_LPVREF_MASK | _EMU_DCDCLPVCTRL_LPATT_MASK)) - | (vrefVal[dcdcTrimMode_EM234H_LP] << _EMU_DCDCLPVCTRL_LPVREF_SHIFT) - | (attenuationSet ? EMU_DCDCLPVCTRL_LPATT : 0); - } -#endif - return true; -} - -/***************************************************************************//** - * @brief - * Optimize DCDC slice count based on the estimated average load current - * in EM0 - * - * @param[in] em0LoadCurrent_mA - * Estimated average EM0 load current in mA. - ******************************************************************************/ -void EMU_DCDCOptimizeSlice(uint32_t em0LoadCurrent_mA) -{ - uint32_t sliceCount = 0; - uint32_t rcoBand = (EMU->DCDCLNFREQCTRL & _EMU_DCDCLNFREQCTRL_RCOBAND_MASK) - >> _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT; - - /* Set recommended slice count */ - if ((EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_LNFORCECCM_MASK) && (rcoBand >= emuDcdcLnRcoBand_5MHz)) { - if (em0LoadCurrent_mA < 20) { - sliceCount = 4; - } else if ((em0LoadCurrent_mA >= 20) && (em0LoadCurrent_mA < 40)) { - sliceCount = 8; - } else { - sliceCount = 16; - } - } else if ((!(EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_LNFORCECCM_MASK)) && (rcoBand <= emuDcdcLnRcoBand_4MHz)) { - if (em0LoadCurrent_mA < 10) { - sliceCount = 4; - } else if ((em0LoadCurrent_mA >= 10) && (em0LoadCurrent_mA < 20)) { - sliceCount = 8; - } else { - sliceCount = 16; - } - } else if ((EMU->DCDCMISCCTRL & _EMU_DCDCMISCCTRL_LNFORCECCM_MASK) && (rcoBand <= emuDcdcLnRcoBand_4MHz)) { - if (em0LoadCurrent_mA < 40) { - sliceCount = 8; - } else { - sliceCount = 16; - } - } else { - /* This configuration is not recommended. EMU_DCDCInit() applies a recommended - configuration. */ - EFM_ASSERT(false); - } - - /* The selected slices are PSLICESEL + 1 */ - sliceCount--; - - /* Apply slice count to both N and P slice */ - sliceCount = (sliceCount << _EMU_DCDCMISCCTRL_PFETCNT_SHIFT - | sliceCount << _EMU_DCDCMISCCTRL_NFETCNT_SHIFT); - EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_PFETCNT_MASK - | _EMU_DCDCMISCCTRL_NFETCNT_MASK)) - | sliceCount; - - /* Update current limiters */ - currentLimitersUpdate(); -} - -/***************************************************************************//** - * @brief - * Set DCDC Low-noise RCO band. - * - * @param[in] band - * RCO band to set. - ******************************************************************************/ -void EMU_DCDCLnRcoBandSet(EMU_DcdcLnRcoBand_TypeDef band) -{ - uint32_t forcedCcm; - forcedCcm = BUS_RegBitRead(&EMU->DCDCMISCCTRL, _EMU_DCDCMISCCTRL_LNFORCECCM_SHIFT); - - /* DCM mode supports up to 4MHz LN RCO. */ - EFM_ASSERT((!forcedCcm && band <= emuDcdcLnRcoBand_4MHz) || forcedCcm); - - EMU->DCDCLNFREQCTRL = (EMU->DCDCLNFREQCTRL & ~_EMU_DCDCLNFREQCTRL_RCOBAND_MASK) - | (band << _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT); - - /* Update slice configuration as this depends on the RCO band. */ - EMU_DCDCOptimizeSlice(dcdcEm01LoadCurrent_mA); -} - -/***************************************************************************//** - * @brief - * Power off the DCDC regulator. - * - * @details - * This function powers off the DCDC controller. This function should only be - * used if the external power circuit is wired for no DCDC. If the external power - * circuit is wired for DCDC usage, then use EMU_DCDCInit() and set the - * DCDC in bypass mode to disable DCDC. - * - * @return - * Return false if the DCDC could not be disabled. - ******************************************************************************/ -bool EMU_DCDCPowerOff(void) -{ - bool dcdcModeSet; - -#if defined(_EMU_PWRCFG_MASK) - /* Set DCDCTODVDD only to enable write access to EMU->DCDCCTRL */ - EMU->PWRCFG = EMU_PWRCFG_PWRCFG_DCDCTODVDD; -#endif - - /* Select DVDD as input to the digital regulator */ -#if defined(EMU_PWRCTRL_IMMEDIATEPWRSWITCH) - EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_IMMEDIATEPWRSWITCH; -#elif defined(EMU_PWRCTRL_REGPWRSEL_DVDD) - EMU->PWRCTRL |= EMU_PWRCTRL_REGPWRSEL_DVDD; -#endif - - /* Set DCDC to OFF and disable LP in EM2/3/4. Verify that the required - mode could be set. */ - while (EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY) ; - EMU->DCDCCTRL = EMU_DCDCCTRL_DCDCMODE_OFF; - - dcdcModeSet = (EMU->DCDCCTRL == EMU_DCDCCTRL_DCDCMODE_OFF); - EFM_ASSERT(dcdcModeSet); - - return dcdcModeSet; -} -#endif - -#if defined(EMU_STATUS_VMONRDY) -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/***************************************************************************//** - * @brief - * Get calibrated threshold value. - * - * @details - * All VMON channels have two calibration fields in the DI page that - * describes the threshold at 1.86V and 2.98V. This function will convert - * the uncalibrated input voltage threshold in millivolts into a calibrated - * threshold. - * - * @param[in] channel - * VMON channel - * - * @param[in] threshold - * Desired threshold in millivolts. - * - * @return - * Calibrated threshold value to use. First digit of return value is placed - * in the "fine" register fields while the next digits are placed in the - * "coarse" register fields. - ******************************************************************************/ -static uint32_t vmonCalibratedThreshold(EMU_VmonChannel_TypeDef channel, - int threshold) -{ - uint32_t tLow; - uint32_t tHigh; - uint32_t calReg; - - /* Get calibration values for 1.86V and 2.98V */ - switch (channel) { - case emuVmonChannel_AVDD: - calReg = DEVINFO->VMONCAL0; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL0_AVDD1V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_AVDD1V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_AVDD1V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_AVDD1V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL0_AVDD2V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_AVDD2V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_AVDD2V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_AVDD2V98THRESFINE_SHIFT); - break; - case emuVmonChannel_ALTAVDD: - calReg = DEVINFO->VMONCAL0; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL0_ALTAVDD1V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD1V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_ALTAVDD1V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD1V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL0_ALTAVDD2V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD2V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL0_ALTAVDD2V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL0_ALTAVDD2V98THRESFINE_SHIFT); - break; - case emuVmonChannel_DVDD: - calReg = DEVINFO->VMONCAL1; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL1_DVDD1V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_DVDD1V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_DVDD1V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_DVDD1V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL1_DVDD2V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_DVDD2V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_DVDD2V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_DVDD2V98THRESFINE_SHIFT); - break; - case emuVmonChannel_IOVDD0: - calReg = DEVINFO->VMONCAL1; - tLow = (10 * ((calReg & _DEVINFO_VMONCAL1_IO01V86THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_IO01V86THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_IO01V86THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_IO01V86THRESFINE_SHIFT); - tHigh = (10 * ((calReg & _DEVINFO_VMONCAL1_IO02V98THRESCOARSE_MASK) - >> _DEVINFO_VMONCAL1_IO02V98THRESCOARSE_SHIFT)) - + ((calReg & _DEVINFO_VMONCAL1_IO02V98THRESFINE_MASK) - >> _DEVINFO_VMONCAL1_IO02V98THRESFINE_SHIFT); - break; - default: - EFM_ASSERT(false); - return threshold; - } - - if (tHigh <= tLow) { - /* Uncalibrated device guard */ - return threshold; - } - - /* Calculate threshold. - * - * Note that volt is used in the reference manual, however we are interested - * in millivolt results. We also increase the precision of Va and Vb in the - * calculation instead of using floating points. - */ - uint32_t va = (1120 * 100) / (tHigh - tLow); - uint32_t vb = (1860 * 100) - (va * tLow); - /* Round threshold to nearest integer value. */ - return ((threshold * 100) - vb + (va / 2)) / va; -} - -/** @endcond */ - -/***************************************************************************//** - * @brief - * Initialize VMON channel. - * - * @details - * Initialize a VMON channel without hysteresis. If the channel supports - * separate rise and fall triggers, both thresholds will be set to the same - * value. The threshold will be converted to a register field value based - * on calibration values from the DI page. - * - * @param[in] vmonInit - * VMON initialization struct - ******************************************************************************/ -void EMU_VmonInit(const EMU_VmonInit_TypeDef *vmonInit) -{ - uint32_t thresholdCoarse, thresholdFine; - uint32_t threshold; - - EFM_ASSERT((vmonInit->threshold >= 1620) && (vmonInit->threshold <= 3400)); - - threshold = vmonCalibratedThreshold(vmonInit->channel, vmonInit->threshold); - thresholdFine = threshold % 10; - thresholdCoarse = threshold / 10; - - /* Saturate threshold to max values. */ - if (thresholdCoarse > 0xF) { - thresholdCoarse = 0xF; - thresholdFine = 9; - } - - switch (vmonInit->channel) { - case emuVmonChannel_AVDD: - EMU->VMONAVDDCTRL = (thresholdCoarse << _EMU_VMONAVDDCTRL_RISETHRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONAVDDCTRL_RISETHRESFINE_SHIFT) - | (thresholdCoarse << _EMU_VMONAVDDCTRL_FALLTHRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONAVDDCTRL_FALLTHRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONAVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONAVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONAVDDCTRL_EN : 0); - break; - case emuVmonChannel_ALTAVDD: - EMU->VMONALTAVDDCTRL = (thresholdCoarse << _EMU_VMONALTAVDDCTRL_THRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONALTAVDDCTRL_THRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONALTAVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONALTAVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONALTAVDDCTRL_EN : 0); - break; - case emuVmonChannel_DVDD: - EMU->VMONDVDDCTRL = (thresholdCoarse << _EMU_VMONDVDDCTRL_THRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONDVDDCTRL_THRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONDVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONDVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONDVDDCTRL_EN : 0); - break; - case emuVmonChannel_IOVDD0: - EMU->VMONIO0CTRL = (thresholdCoarse << _EMU_VMONIO0CTRL_THRESCOARSE_SHIFT) - | (thresholdFine << _EMU_VMONIO0CTRL_THRESFINE_SHIFT) - | (vmonInit->retDisable ? EMU_VMONIO0CTRL_RETDIS : 0) - | (vmonInit->riseWakeup ? EMU_VMONIO0CTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONIO0CTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONIO0CTRL_EN : 0); - break; - default: - EFM_ASSERT(false); - return; - } -} - -/***************************************************************************//** - * @brief - * Initialize VMON channel with hysteresis (separate rise and fall triggers). - * - * @details - * Initialize a VMON channel which supports hysteresis. The AVDD channel is - * the only channel to support separate rise and fall triggers. The rise and - * fall thresholds will be converted to a register field value based on - * calibration values from the DI page. - * - * @param[in] vmonInit - * VMON Hysteresis initialization struct - ******************************************************************************/ -void EMU_VmonHystInit(const EMU_VmonHystInit_TypeDef *vmonInit) -{ - uint32_t riseThreshold; - uint32_t fallThreshold; - - /* VMON supports voltages between 1620 mV and 3400 mV (inclusive) */ - EFM_ASSERT((vmonInit->riseThreshold >= 1620) && (vmonInit->riseThreshold <= 3400)); - EFM_ASSERT((vmonInit->fallThreshold >= 1620) && (vmonInit->fallThreshold <= 3400)); - /* Fall threshold has to be lower than rise threshold */ - EFM_ASSERT(vmonInit->fallThreshold <= vmonInit->riseThreshold); - - riseThreshold = vmonCalibratedThreshold(vmonInit->channel, vmonInit->riseThreshold); - fallThreshold = vmonCalibratedThreshold(vmonInit->channel, vmonInit->fallThreshold); - - switch (vmonInit->channel) { - case emuVmonChannel_AVDD: - EMU->VMONAVDDCTRL = ((riseThreshold / 10) << _EMU_VMONAVDDCTRL_RISETHRESCOARSE_SHIFT) - | ((riseThreshold % 10) << _EMU_VMONAVDDCTRL_RISETHRESFINE_SHIFT) - | ((fallThreshold / 10) << _EMU_VMONAVDDCTRL_FALLTHRESCOARSE_SHIFT) - | ((fallThreshold % 10) << _EMU_VMONAVDDCTRL_FALLTHRESFINE_SHIFT) - | (vmonInit->riseWakeup ? EMU_VMONAVDDCTRL_RISEWU : 0) - | (vmonInit->fallWakeup ? EMU_VMONAVDDCTRL_FALLWU : 0) - | (vmonInit->enable ? EMU_VMONAVDDCTRL_EN : 0); - break; - default: - EFM_ASSERT(false); - return; - } -} - -/***************************************************************************//** - * @brief - * Enable or disable a VMON channel - * - * @param[in] channel - * VMON channel to enable/disable - * - * @param[in] enable - * Whether to enable or disable - ******************************************************************************/ -void EMU_VmonEnable(EMU_VmonChannel_TypeDef channel, bool enable) -{ - uint32_t volatile * reg; - uint32_t bit; - - switch (channel) { - case emuVmonChannel_AVDD: - reg = &(EMU->VMONAVDDCTRL); - bit = _EMU_VMONAVDDCTRL_EN_SHIFT; - break; - case emuVmonChannel_ALTAVDD: - reg = &(EMU->VMONALTAVDDCTRL); - bit = _EMU_VMONALTAVDDCTRL_EN_SHIFT; - break; - case emuVmonChannel_DVDD: - reg = &(EMU->VMONDVDDCTRL); - bit = _EMU_VMONDVDDCTRL_EN_SHIFT; - break; - case emuVmonChannel_IOVDD0: - reg = &(EMU->VMONIO0CTRL); - bit = _EMU_VMONIO0CTRL_EN_SHIFT; - break; - default: - EFM_ASSERT(false); - return; - } - - BUS_RegBitWrite(reg, bit, enable); -} - -/***************************************************************************//** - * @brief - * Get the status of a voltage monitor channel. - * - * @param[in] channel - * VMON channel to get status for - * - * @return - * Status of the selected VMON channel. True if channel is triggered. - ******************************************************************************/ -bool EMU_VmonChannelStatusGet(EMU_VmonChannel_TypeDef channel) -{ - uint32_t bit; - switch (channel) { - case emuVmonChannel_AVDD: - bit = _EMU_STATUS_VMONAVDD_SHIFT; - break; - case emuVmonChannel_ALTAVDD: - bit = _EMU_STATUS_VMONALTAVDD_SHIFT; - break; - case emuVmonChannel_DVDD: - bit = _EMU_STATUS_VMONDVDD_SHIFT; - break; - case emuVmonChannel_IOVDD0: - bit = _EMU_STATUS_VMONIO0_SHIFT; - break; - default: - EFM_ASSERT(false); - bit = 0; - } - - return BUS_RegBitRead(&EMU->STATUS, bit); -} -#endif /* EMU_STATUS_VMONRDY */ - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -/***************************************************************************//** - * @brief - * Adjust the bias refresh rate - * - * @details - * This function is only meant to be used under high-temperature operation on - * EFR32xG1 and EFM32xG1 devices. Adjusting the bias mode will - * increase the typical current consumption. See application note 1027 - * and errata documents for further details. - * - * @param [in] mode - * The new bias refresh rate - ******************************************************************************/ -void EMU_SetBiasMode(EMU_BiasMode_TypeDef mode) -{ -#define EMU_TESTLOCK (*(volatile uint32_t *) (EMU_BASE + 0x190)) -#define EMU_BIASCONF (*(volatile uint32_t *) (EMU_BASE + 0x164)) -#define EMU_BIASTESTCTRL (*(volatile uint32_t *) (EMU_BASE + 0x19C)) -#define CMU_ULFRCOCTRL (*(volatile uint32_t *) (CMU_BASE + 0x03C)) - - uint32_t freq = 0x2u; - bool emuTestLocked = false; - - if (mode == emuBiasMode_1KHz) { - freq = 0x0u; - } - - if (EMU_TESTLOCK == 0x1u) { - emuTestLocked = true; - EMU_TESTLOCK = 0xADE8u; - } - - if (mode == emuBiasMode_Continuous) { - EMU_BIASCONF &= ~0x74u; - } else { - EMU_BIASCONF |= 0x74u; - } - - EMU_BIASTESTCTRL |= 0x8u; - CMU_ULFRCOCTRL = (CMU_ULFRCOCTRL & ~0xC00u) - | ((freq & 0x3u) << 10u); - EMU_BIASTESTCTRL &= ~0x8u; - - if (emuTestLocked) { - EMU_TESTLOCK = 0u; - } -} -#endif - -/** @} (end addtogroup EMU) */ -/** @} (end addtogroup emlib) */ -#endif /* __EM_EMU_H */ diff --git a/targets/efm32boot/emlib/em_gpio.c b/targets/efm32boot/emlib/em_gpio.c deleted file mode 100644 index 3b1d146..0000000 --- a/targets/efm32boot/emlib/em_gpio.c +++ /dev/null @@ -1,367 +0,0 @@ -/***************************************************************************//** - * @file em_gpio.c - * @brief General Purpose IO (GPIO) peripheral API - * devices. - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_gpio.h" - -#if defined(GPIO_COUNT) && (GPIO_COUNT > 0) - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup GPIO - * @brief General Purpose Input/Output (GPIO) API - * @details - * This module contains functions to control the GPIO peripheral of Silicon - * Labs 32-bit MCUs and SoCs. The GPIO peripheral is used for pin configuration - * and direct pin manipulation and sensing as well as routing for peripheral - * pin connections. - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Validation of pin typically usable in assert statements. */ -#define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3) -#define GPIO_STRENGHT_VALID(strenght) (!((strenght) \ - & ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \ - | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK))) -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Sets the pin location of the debug pins (Serial Wire interface). - * - * @note - * Changing the pins used for debugging uncontrolled, may result in a lockout. - * - * @param[in] location - * The debug pin location to use (0-3). - ******************************************************************************/ -void GPIO_DbgLocationSet(unsigned int location) -{ -#if defined (_GPIO_ROUTE_SWLOCATION_MASK) - EFM_ASSERT(location < AFCHANLOC_MAX); - - GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK) - | (location << _GPIO_ROUTE_SWLOCATION_SHIFT); -#else - (void)location; -#endif -} - -#if defined (_GPIO_P_CTRL_DRIVEMODE_MASK) -/***************************************************************************//** - * @brief - * Sets the drive mode for a GPIO port. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] mode - * Drive mode to use for port. - ******************************************************************************/ -void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode) -{ - EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode)); - - GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK)) - | (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT); -} -#endif - -#if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK) -/***************************************************************************//** - * @brief - * Sets the drive strength for a GPIO port. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] strength - * Drive strength to use for port. - ******************************************************************************/ -void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port, - GPIO_DriveStrength_TypeDef strength) -{ - EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength)); - BUS_RegMaskedWrite(&GPIO->P[port].CTRL, - _GPIO_P_CTRL_DRIVESTRENGTH_MASK | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK, - strength); -} -#endif - -/***************************************************************************//** - * @brief - * Configure GPIO external pin interrupt. - * - * @details - * If reconfiguring a GPIO interrupt that is already enabled, it is generally - * recommended to disable it first, see GPIO_Disable(). - * - * The actual GPIO interrupt handler must be in place before enabling the - * interrupt. - * - * Notice that any pending interrupt for the selected interrupt is cleared - * by this function. - * - * @note - * On series 0 devices the pin number parameter is not used. The - * pin number used on these devices is hardwired to the interrupt with the - * same number. @n - * On series 1 devices, pin number can be selected freely within a group. - * Interrupt numbers are divided into 4 groups (intNo / 4) and valid pin - * number within the interrupt groups are: - * 0: pins 0-3 - * 1: pins 4-7 - * 2: pins 8-11 - * 3: pins 12-15 - * - * @param[in] port - * The port to associate with @p pin. - * - * @param[in] pin - * The pin number on the port. - * - * @param[in] intNo - * The interrupt number to trigger. - * - * @param[in] risingEdge - * Set to true if interrupts shall be enabled on rising edge, otherwise false. - * - * @param[in] fallingEdge - * Set to true if interrupts shall be enabled on falling edge, otherwise false. - * - * @param[in] enable - * Set to true if interrupt shall be enabled after configuration completed, - * false to leave disabled. See GPIO_IntDisable() and GPIO_IntEnable(). - ******************************************************************************/ -void GPIO_ExtIntConfig(GPIO_Port_TypeDef port, - unsigned int pin, - unsigned int intNo, - bool risingEdge, - bool fallingEdge, - bool enable) -{ - uint32_t tmp = 0; -#if !defined(_GPIO_EXTIPINSELL_MASK) - (void)pin; -#endif - - EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); -#if defined(_GPIO_EXTIPINSELL_MASK) - EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin)); -#endif - - /* There are two registers controlling the interrupt configuration: - * The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls - * pins 8-15. */ - if (intNo < 8) { - BUS_RegMaskedWrite(&GPIO->EXTIPSELL, - _GPIO_EXTIPSELL_EXTIPSEL0_MASK - << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo), - port << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo)); - } else { - tmp = intNo - 8; - BUS_RegMaskedWrite(&GPIO->EXTIPSELH, - _GPIO_EXTIPSELH_EXTIPSEL8_MASK - << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp), - port << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp)); - } - -#if defined(_GPIO_EXTIPINSELL_MASK) - /* There are two registers controlling the interrupt/pin number mapping: - * The EXTIPINSELL register controls interrupt 0-7 and EXTIPINSELH controls - * interrupt 8-15. */ - if (intNo < 8) { - BUS_RegMaskedWrite(&GPIO->EXTIPINSELL, - _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK - << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo), - ((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK) - << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo)); - } else { - BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, - _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK - << (_GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT * tmp), - ((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK) - << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp)); - } -#endif - - /* Enable/disable rising edge */ - BUS_RegBitWrite(&(GPIO->EXTIRISE), intNo, risingEdge); - - /* Enable/disable falling edge */ - BUS_RegBitWrite(&(GPIO->EXTIFALL), intNo, fallingEdge); - - /* Clear any pending interrupt */ - GPIO->IFC = 1 << intNo; - - /* Finally enable/disable interrupt */ - BUS_RegBitWrite(&(GPIO->IEN), intNo, enable); -} - -/***************************************************************************//** - * @brief - * Set the mode for a GPIO pin. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] pin - * The pin number in the port. - * - * @param[in] mode - * The desired pin mode. - * - * @param[in] out - * Value to set for pin in DOUT register. The DOUT setting is important for - * even some input mode configurations, determining pull-up/down direction. - ******************************************************************************/ -void GPIO_PinModeSet(GPIO_Port_TypeDef port, - unsigned int pin, - GPIO_Mode_TypeDef mode, - unsigned int out) -{ - EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); - - /* If disabling pin, do not modify DOUT in order to reduce chance for */ - /* glitch/spike (may not be sufficient precaution in all use cases) */ - if (mode != gpioModeDisabled) { - if (out) { - GPIO_PinOutSet(port, pin); - } else { - GPIO_PinOutClear(port, pin); - } - } - - /* There are two registers controlling the pins for each port. The MODEL - * register controls pins 0-7 and MODEH controls pins 8-15. */ - if (pin < 8) { - GPIO->P[port].MODEL = (GPIO->P[port].MODEL & ~(0xFu << (pin * 4))) - | (mode << (pin * 4)); - } else { - GPIO->P[port].MODEH = (GPIO->P[port].MODEH & ~(0xFu << ((pin - 8) * 4))) - | (mode << ((pin - 8) * 4)); - } - - if (mode == gpioModeDisabled) { - if (out) { - GPIO_PinOutSet(port, pin); - } else { - GPIO_PinOutClear(port, pin); - } - } -} - -/***************************************************************************//** - * @brief - * Get the mode for a GPIO pin. - * - * @param[in] port - * The GPIO port to access. - * - * @param[in] pin - * The pin number in the port. - * - * @return - * The pin mode. - ******************************************************************************/ -GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port, - unsigned int pin) -{ - EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); - - if (pin < 8) { - return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEL >> (pin * 4)) & 0xF); - } else { - return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEH >> ((pin - 8) * 4)) & 0xF); - } -} - -#if defined(_GPIO_EM4WUEN_MASK) -/**************************************************************************//** - * @brief - * Enable GPIO pin wake-up from EM4. When the function exits, - * EM4 mode can be safely entered. - * - * @note - * It is assumed that the GPIO pin modes are set correctly. - * Valid modes are @ref gpioModeInput and @ref gpioModeInputPull. - * - * @param[in] pinmask - * Bitmask containing the bitwise logic OR of which GPIO pin(s) to enable. - * Refer to Reference Manuals for pinmask to GPIO port/pin mapping. - * @param[in] polaritymask - * Bitmask containing the bitwise logic OR of GPIO pin(s) wake-up polarity. - * Refer to Reference Manuals for pinmask to GPIO port/pin mapping. - *****************************************************************************/ -void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask) -{ - EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0); - -#if defined(_GPIO_EM4WUPOL_MASK) - EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0); - GPIO->EM4WUPOL &= ~pinmask; /* Set wakeup polarity */ - GPIO->EM4WUPOL |= pinmask & polaritymask; -#elif defined(_GPIO_EXTILEVEL_MASK) - EFM_ASSERT((polaritymask & ~_GPIO_EXTILEVEL_MASK) == 0); - GPIO->EXTILEVEL &= ~pinmask; - GPIO->EXTILEVEL |= pinmask & polaritymask; -#endif - GPIO->EM4WUEN |= pinmask; /* Enable wakeup */ - - GPIO_EM4SetPinRetention(true); /* Enable pin retention */ - -#if defined(_GPIO_CMD_EM4WUCLR_MASK) - GPIO->CMD = GPIO_CMD_EM4WUCLR; /* Clear wake-up logic */ -#elif defined(_GPIO_IFC_EM4WU_MASK) - GPIO_IntClear(pinmask); -#endif -} -#endif - -/** @} (end addtogroup GPIO) */ -/** @} (end addtogroup emlib) */ - -#endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */ diff --git a/targets/efm32boot/emlib/em_msc.c b/targets/efm32boot/emlib/em_msc.c deleted file mode 100644 index 2391d2a..0000000 --- a/targets/efm32boot/emlib/em_msc.c +++ /dev/null @@ -1,1163 +0,0 @@ -/***************************************************************************//** - * @file em_msc.c - * @brief Flash controller (MSC) Peripheral API - * @version 5.5.0 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_msc.h" -#if defined(MSC_COUNT) && (MSC_COUNT > 0) - -#include "em_system.h" -#if defined(_MSC_TIMEBASE_MASK) -#include "em_cmu.h" -#endif -#include "em_assert.h" -#if defined(_MSC_ECCCTRL_MASK) -#include "em_cmu.h" -#include "em_core.h" -#endif - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -#if defined(__ICCARM__) -/* Suppress warnings originating from use of EFM_ASSERT() with IAR: - EFM_ASSERT() is implemented as a local ramfunc */ -#pragma diag_suppress=Ta022 -#endif - -#if defined(EM_MSC_RUN_FROM_FLASH) && defined(_EFM32_GECKO_FAMILY) -#error "Running Flash write/erase operations from Flash is not supported on EFM32G." -#endif - -/******************************************************************************* - ****************************** DEFINES ****************************** - ******************************************************************************/ -#if defined(MSC_WRITECTRL_WDOUBLE) -#define WORDS_PER_DATA_PHASE (FLASH_SIZE < (512 * 1024) ? 1 : 2) -#else -#define WORDS_PER_DATA_PHASE (1) -#endif - -#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80) -/* Fix for errata FLASH_E201 - Potential program failure after Power On */ -#define ERRATA_FIX_FLASH_E201_EN -#endif - -#if defined(_MSC_ECCCTRL_MASK) -#if defined(_SILICON_LABS_32B_SERIES_1_CONFIG_1) -/* On Series 1 Config 1, EFM32GG11, ECC is supported for RAM0 and RAM1 - banks (not RAM2). It is necessary to figure out which is biggest to - calculate the number of DMA descriptors needed. */ -#define ECC_RAM_SIZE_MAX (SL_MAX(RAM0_MEM_SIZE, RAM1_MEM_SIZE)) - -#define ECC_RAM0_MEM_BASE (RAM0_MEM_BASE) -#define ECC_RAM0_MEM_SIZE (RAM0_MEM_SIZE) - -#define ECC_RAM1_MEM_BASE (RAM1_MEM_BASE) -#define ECC_RAM1_MEM_SIZE (RAM1_MEM_SIZE) - -#define ECC_CTRL_REG_ADDR (&MSC->ECCCTRL) -#define ECC_RAM0_WRITE_EN (_MSC_ECCCTRL_RAMECCEWEN_SHIFT) -#define ECC_RAM0_CHECK_EN (_MSC_ECCCTRL_RAMECCCHKEN_SHIFT) -#define ECC_RAM1_WRITE_EN (_MSC_ECCCTRL_RAM1ECCEWEN_SHIFT) -#define ECC_RAM1_CHECK_EN (_MSC_ECCCTRL_RAM1ECCCHKEN_SHIFT) - -#define ECC_IFC_REG_ADDR (&MSC->IFC) -#define ECC_IFC_MASK (MSC_IFC_RAMERR1B | MSC_IFC_RAMERR2B \ - | MSC_IFC_RAM1ERR1B | MSC_IFC_RAM1ERR2B) -#else -#error Unknown device. -#endif - -#define ECC_DMA_MAX_XFERCNT (_LDMA_CH_CTRL_XFERCNT_MASK \ - >> _LDMA_CH_CTRL_XFERCNT_SHIFT) -#define ECC_DMA_DESC_SIZE ((ECC_DMA_MAX_XFERCNT + 1) * 4) /* 4 bytes units */ - -#define ECC_DMA_DESCS (ECC_RAM_SIZE_MAX / ECC_DMA_DESC_SIZE) - -#endif - -/******************************************************************************* - ****************************** TYPEDEFS ****************************** - ******************************************************************************/ -typedef enum { - mscWriteIntSafe, - mscWriteFast, -} MSC_WriteStrategy_Typedef; - -#if defined(_MSC_ECCCTRL_MASK) -typedef struct { - volatile uint32_t *ctrlReg; - uint32_t writeEnBit; - uint32_t checkEnBit; - volatile uint32_t *ifClearReg; - uint32_t ifClearMask; - uint32_t base; - uint32_t size; -} MSC_EccBank_Typedef; -#endif - -/******************************************************************************* - ****************************** LOCALS ******************************* - ******************************************************************************/ -#if defined(_MSC_ECCCTRL_MASK) -static const MSC_EccBank_Typedef eccBank[MSC_ECC_BANKS] = -{ - { ECC_CTRL_REG_ADDR, ECC_RAM0_WRITE_EN, ECC_RAM0_CHECK_EN, - ECC_IFC_REG_ADDR, ECC_IFC_MASK, - ECC_RAM0_MEM_BASE, ECC_RAM0_MEM_SIZE }, -#if MSC_ECC_BANKS > 1 - { ECC_CTRL_REG_ADDR, ECC_RAM1_WRITE_EN, ECC_RAM1_CHECK_EN, - ECC_IFC_REG_ADDR, ECC_IFC_MASK, - ECC_RAM1_MEM_BASE, ECC_RAM1_MEM_SIZE }, -#endif -}; -#endif - -/******************************************************************************* - ****************************** FUNCTIONS ****************************** - ******************************************************************************/ -MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef -MSC_WriteWordI(uint32_t *address, - void const *data, - uint32_t numBytes, - MSC_WriteStrategy_Typedef writeStrategy); - -MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef -MSC_LoadWriteData(uint32_t* data, - uint32_t numWords, - MSC_WriteStrategy_Typedef writeStrategy); - -MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef -MSC_LoadVerifyAddress(uint32_t* address); - -#if !defined(EM_MSC_RUN_FROM_FLASH) - -MSC_RAMFUNC_DECLARATOR void mscRfAssertEFM(const char *file, int line); - -/***************************************************************************//** - * @brief - * Local ramfunc assertEFM. - * - * A local ramfunc version of assertEFM is needed because certain MSC functions - * are allocated to RAM. The Flash may get erased and code normally located in - * Flash must therefore have a RAM copy. - * - * This function is invoked through EFM_ASSERT() macro usage only and should - * not be used explicitly. - * - * @param[in] file - * The source file where assertion failed. - * - * @param[in] line - * A line number in the source file where assertion failed. - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -void mscRfAssertEFM(const char *file, int line) -{ - (void)file; /* Unused parameter */ - (void)line; /* Unused parameter */ - - while (true) { - } -} -MSC_RAMFUNC_DEFINITION_END - -/* Undef the define from em_assert.h and redirect to a local ramfunc version. */ -#undef EFM_ASSERT -#if defined(DEBUG_EFM) || defined(DEBUG_EFM_USER) -#define EFM_ASSERT(expr) ((expr) ? ((void)0) : mscRfAssertEFM(__FILE__, __LINE__)) -#else -#define EFM_ASSERT(expr) ((void)(expr)) -#endif /* defined(DEBUG_EFM) || defined(DEBUG_EFM_USER) */ - -#endif /* !EM_MSC_RUN_FROM_FLASH */ - -/** @endcond */ - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup MSC - * @{ - ******************************************************************************/ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Enables the flash controller for writing. - * @note - * This function must be called before flash operations when - * AUXHFRCO clock has been changed from a default band. - ******************************************************************************/ -void MSC_Init(void) -{ -#if defined(_MSC_TIMEBASE_MASK) - uint32_t freq, cycles; -#endif - -#if defined(_EMU_STATUS_VSCALE_MASK) - /* VSCALE must be done. Flash erase and write requires VSCALE2. */ - EFM_ASSERT(!(EMU->STATUS & _EMU_STATUS_VSCALEBUSY_MASK)); - EFM_ASSERT((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) == EMU_STATUS_VSCALE_VSCALE2); -#endif - - /* Unlock the MSC module. */ - MSC->LOCK = MSC_UNLOCK_CODE; - /* Disable writing to the Flash. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - -#if defined(_MSC_TIMEBASE_MASK) - /* Configure MSC->TIMEBASE according to a selected frequency. */ - freq = CMU_ClockFreqGet(cmuClock_AUX); - - /* Timebase 5us is used for the 1/1.2 MHz band only. Note that the 1 MHz band - is tuned to 1.2 MHz on newer revisions. */ - if (freq > 1200000) { - /* Calculate a number of clock cycles for 1 us as a base period. */ - freq = (freq * 11) / 10; - cycles = (freq / 1000000) + 1; - - /* Configure clock cycles for flash timing. */ - MSC->TIMEBASE = (MSC->TIMEBASE & ~(_MSC_TIMEBASE_BASE_MASK - | _MSC_TIMEBASE_PERIOD_MASK)) - | MSC_TIMEBASE_PERIOD_1US - | (cycles << _MSC_TIMEBASE_BASE_SHIFT); - } else { - /* Calculate a number of clock cycles for 5 us as a base period. */ - freq = (freq * 5 * 11) / 10; - cycles = (freq / 1000000) + 1; - - /* Configure clock cycles for flash timing */ - MSC->TIMEBASE = (MSC->TIMEBASE & ~(_MSC_TIMEBASE_BASE_MASK - | _MSC_TIMEBASE_PERIOD_MASK)) - | MSC_TIMEBASE_PERIOD_5US - | (cycles << _MSC_TIMEBASE_BASE_SHIFT); - } -#endif -} - -/***************************************************************************//** - * @brief - * Disables the flash controller for writing. - ******************************************************************************/ -void MSC_Deinit(void) -{ - /* Disable writing to the Flash. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - /* Lock the MSC module.*/ - MSC->LOCK = 0; -} - -/***************************************************************************//** - * @brief - * Set the MSC code execution configuration. - * - * @param[in] execConfig - * The code execution configuration. - ******************************************************************************/ -void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig) -{ - uint32_t mscReadCtrl; - -#if defined(MSC_READCTRL_MODE_WS0SCBTP) - mscReadCtrl = MSC->READCTRL & _MSC_READCTRL_MODE_MASK; - if ((mscReadCtrl == MSC_READCTRL_MODE_WS0) && (execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS0SCBTP; - } else if ((mscReadCtrl == MSC_READCTRL_MODE_WS1) && (execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS1SCBTP; - } else if ((mscReadCtrl == MSC_READCTRL_MODE_WS0SCBTP) && (!execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS0; - } else if ((mscReadCtrl == MSC_READCTRL_MODE_WS1SCBTP) && (!execConfig->scbtEn)) { - mscReadCtrl |= MSC_READCTRL_MODE_WS1; - } else { - /* No change needed. */ - } -#endif - - mscReadCtrl = MSC->READCTRL & ~(0 -#if defined(MSC_READCTRL_SCBTP) - | MSC_READCTRL_SCBTP -#endif -#if defined(MSC_READCTRL_USEHPROT) - | MSC_READCTRL_USEHPROT -#endif -#if defined(MSC_READCTRL_PREFETCH) - | MSC_READCTRL_PREFETCH -#endif -#if defined(MSC_READCTRL_ICCDIS) - | MSC_READCTRL_ICCDIS -#endif -#if defined(MSC_READCTRL_AIDIS) - | MSC_READCTRL_AIDIS -#endif -#if defined(MSC_READCTRL_IFCDIS) - | MSC_READCTRL_IFCDIS -#endif - ); - mscReadCtrl |= (0 -#if defined(MSC_READCTRL_SCBTP) - | (execConfig->scbtEn ? MSC_READCTRL_SCBTP : 0) -#endif -#if defined(MSC_READCTRL_USEHPROT) - | (execConfig->useHprot ? MSC_READCTRL_USEHPROT : 0) -#endif -#if defined(MSC_READCTRL_PREFETCH) - | (execConfig->prefetchEn ? MSC_READCTRL_PREFETCH : 0) -#endif -#if defined(MSC_READCTRL_ICCDIS) - | (execConfig->iccDis ? MSC_READCTRL_ICCDIS : 0) -#endif -#if defined(MSC_READCTRL_AIDIS) - | (execConfig->aiDis ? MSC_READCTRL_AIDIS : 0) -#endif -#if defined(MSC_READCTRL_IFCDIS) - | (execConfig->ifcDis ? MSC_READCTRL_IFCDIS : 0) -#endif - ); - - MSC->READCTRL = mscReadCtrl; -} - -#if defined(_MSC_ECCCTRL_MASK) - -/***************************************************************************//** - * @brief - * DMA read and write existing values (for ECC initialization). - * - * @details - * This function uses DMA to read and write the existing data values in - * the RAM region specified by start and size. The function will use the - * 2 DMA channels specified by the channels[2] array. - * - * @param[in] start - * A start address of the address range in RAM to read/write. - * - * @param[in] size - * A size of the address range in RAM to read/write. - * - * @param[in] channels[2] - * An array of 2 DMA channels to use. - ******************************************************************************/ -static void mscEccReadWriteExistingDma(uint32_t start, - uint32_t size, - uint32_t channels[2]) -{ - uint32_t descCnt = 0; - uint32_t dmaDesc[ECC_DMA_DESCS][4]; - uint32_t chMask = (1 << channels[0]) | (1 << channels[1]); - /* Assert that the 2 DMA channel numbers are different. */ - EFM_ASSERT(channels[0] != channels[1]); - - /* Make sure that the ECC_RAM_SIZE_MAX is a multiple of ECC_DMA_DESC_SIZE - to match the total xfer size of the descriptor chain with the largest - ECC RAM bank. */ - EFM_ASSERT((ECC_RAM_SIZE_MAX % ECC_DMA_DESC_SIZE) == 0); - - /* Initialize the LDMA descriptor chain. */ - do { - dmaDesc[descCnt][0] = /* DMA desc CTRL word */ - LDMA_CH_CTRL_STRUCTTYPE_TRANSFER - | LDMA_CH_CTRL_STRUCTREQ - | _LDMA_CH_CTRL_XFERCNT_MASK - | LDMA_CH_CTRL_BLOCKSIZE_ALL - | LDMA_CH_CTRL_REQMODE_ALL - | LDMA_CH_CTRL_SRCINC_ONE - | LDMA_CH_CTRL_SIZE_WORD - | LDMA_CH_CTRL_DSTINC_ONE; - - /* A source and destination address. */ - dmaDesc[descCnt][1] = start; - dmaDesc[descCnt][2] = start; - /* A link to the next descriptor. */ - dmaDesc[descCnt][3] = LDMA_CH_LINK_LINK - | (((uint32_t) &dmaDesc[descCnt + 1][0]) - & _LDMA_CH_LINK_LINKADDR_MASK); - - start += ECC_DMA_DESC_SIZE; - size -= ECC_DMA_DESC_SIZE; - descCnt++; - } while (size); - - /* Divide the descriptor list in two parts, one for each channel, - by setting the link bit and address 0 of the descriptor in the middle - to 0. */ - dmaDesc[(descCnt / 2) - 1][3] = 0; - - /* Set the last descriptor link bit and address to 0. */ - dmaDesc[descCnt - 1][3] = 0; - - /* Start the LDMA clock. */ - CMU_ClockEnable(cmuClock_LDMA, true); - - /* Round robin scheduling for all channels (0 = no fixed priority channels). - */ - LDMA->CTRL = 0 << _LDMA_CTRL_NUMFIXED_SHIFT; - LDMA->CHEN = 0; - LDMA->DBGHALT = 0; - LDMA->REQDIS = 0; - - /* Disable LDMA interrupts and clear interrupt status. */ - LDMA->IEN = 0; - LDMA->IFC = 0xFFFFFFFF; - - /* Disable looping. */ - LDMA->CH[channels[0]].LOOP = 0; - LDMA->CH[channels[1]].LOOP = 0; - - /* Set the descriptor address for the first channel. */ - LDMA->CH[channels[0]].LINK = ((uint32_t)&dmaDesc[0][0]) - & _LDMA_CH_LINK_LINKADDR_MASK; - /* Set the descriptor address for the second channel. */ - LDMA->CH[channels[1]].LINK = ((uint32_t)&dmaDesc[descCnt / 2][0]) - & _LDMA_CH_LINK_LINKADDR_MASK; - /* Clear the channel done flags. */ - BUS_RegMaskedClear(&LDMA->CHDONE, chMask); - - /* Start transfer by loading descriptors. */ - LDMA->LINKLOAD = chMask; - - /* Wait until finished. */ - while (!(((LDMA->CHEN & chMask) == 0) - && ((LDMA->CHDONE & chMask) == chMask))) { - } - - /* Stop the LDMA clock. */ - CMU_ClockEnable(cmuClock_LDMA, false); -} - -/***************************************************************************//** - * @brief - * Initialize ECC for a given memory bank. - * - * @brief - * This function initializes ECC for a given memory bank which is specified - * with the MSC_EccBank_Typedef structure input parameter. - * - * @param[in] eccBank - * The ECC memory bank device structure. - * - * @param[in] dmaChannels - * An array of 2 DMA channels that may be used during ECC initialization. - * - ******************************************************************************/ -static void mscEccBankInit(const MSC_EccBank_Typedef *eccBank, - uint32_t dmaChannels[2]) -{ - uint32_t ctrlReg; - - CORE_DECLARE_IRQ_STATE; - - CORE_ENTER_CRITICAL(); - - /* Enable the ECC write. Keep ECC checking disabled during initialization. */ - ctrlReg = *eccBank->ctrlReg; - ctrlReg |= 1 << eccBank->writeEnBit; - *eccBank->ctrlReg = ctrlReg; - - /* Initialize ECC syndromes by using DMA to read and write the existing - data values in RAM. */ - mscEccReadWriteExistingDma(eccBank->base, eccBank->size, dmaChannels); - - /* Clear any ECC errors that may have been reported before or during - initialization. */ - *eccBank->ifClearReg = eccBank->ifClearMask; - - /* Enable the ECC decoder to detect and report ECC errors. */ - ctrlReg |= 1 << eccBank->checkEnBit; - *eccBank->ctrlReg = ctrlReg; - - CORE_EXIT_CRITICAL(); -} - -/***************************************************************************//** - * @brief - * Disable ECC for a given memory bank. - * - * @brief - * This function disables ECC for a given memory bank which is specified - * with the MSC_EccBank_Typedef structure input parameter. - * - * @param[in] eccBank - * ECC memory bank device structure. - * - ******************************************************************************/ -static void mscEccBankDisable(const MSC_EccBank_Typedef *eccBank) -{ - /* Disable ECC write (encoder) and checking (decoder). */ - *eccBank->ctrlReg &= ~((1 << eccBank->writeEnBit) | (1 << eccBank->checkEnBit)); -} - -/***************************************************************************//** - * @brief - * Configure Error Correcting Code (ECC) - * - * @details - * This function configures ECC support according to the configuration - * input parameter. If the user requests enabling ECC for a given RAM bank, - * this function will initialize ECC memory (syndromes) for the bank by - * reading and writing the existing values in memory, i.e., all data is - * preserved. The initialization process runs in a critical section - * disallowing interrupts and thread scheduling and will consume a - * considerable amount of clock cycles. Therefore, carefully - * assess where to call this function. Consider increasing - * the clock frequency to reduce the execution time. - * This function makes use of 2 DMA channels to move data to/from RAM in an - * efficient way. The user can select which 2 DMA channels to use - * to avoid conflicts with the application. However, make sure - * that no other DMA operations take place while this function is executing. - * If the application is using the DMA controller prior to calling this - * function, the application will need to reinitialize DMA registers after - * this function has completed. - * - * @note - * This function protects the ECC initialization procedure from interrupts - * and other threads by using a critical section (defined by em_core.h) - * When running on an RTOS, the user may need to override CORE_EnterCritical - * CORE_ExitCritical which are declared as 'SL_WEAK' in em_core.c. - * - * @param[in] eccConfig - * ECC configuration - ******************************************************************************/ -void MSC_EccConfigSet(MSC_EccConfig_TypeDef *eccConfig) -{ - unsigned int cnt; - -#if defined(_SILICON_LABS_32B_SERIES_1_CONFIG_1) - /* On Series 1 Config 1, EFM32GG11, disable the ECC fault enable. */ - MSC->CTRL &= ~MSC_CTRL_RAMECCERRFAULTEN; -#endif - - /* Loop through the ECC banks array and enable or disable according to - the eccConfig->enableEccBank array. */ - for (cnt = 0; cnt < MSC_ECC_BANKS; cnt++) { - if (eccConfig->enableEccBank[cnt]) { - mscEccBankInit(&eccBank[cnt], eccConfig->dmaChannels); - } else { - mscEccBankDisable(&eccBank[cnt]); - } - } -} - -#endif /* #if defined(_MSC_ECCCTRL_MASK) */ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/***************************************************************************//** - * @brief - * Perform the address phase of the flash write cycle. - * @details - * This function performs the address phase of a flash write operation by - * writing the given flash address to the ADDRB register and issuing the - * LADDRIM command to load the address. - * @param[in] address - * An address in flash memory. Must be aligned at a 4 byte boundary. - * @return - * Returns the status of the address load operation, #MSC_Status_TypeDef - * @verbatim - * mscReturnOk - The operation completed successfully. - * mscReturnInvalidAddr - The operation tried to erase a non-flash area. - * mscReturnLocked - The operation tried to erase a locked area of the Flash. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_LoadVerifyAddress(uint32_t* address) -{ - uint32_t status; - uint32_t timeOut; - - /* Wait for the MSC to become ready. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - - /* Check for timeout. */ - if (timeOut == 0) { - return mscReturnTimeOut; - } - /* Load the address. */ - MSC->ADDRB = (uint32_t)address; - MSC->WRITECMD = MSC_WRITECMD_LADDRIM; - - status = MSC->STATUS; - if (status & (MSC_STATUS_INVADDR | MSC_STATUS_LOCKED)) { - /* Check for an invalid address. */ - if (status & MSC_STATUS_INVADDR) { - return mscReturnInvalidAddr; - } - /* Check for the write protected page. */ - if (status & MSC_STATUS_LOCKED) { - return mscReturnLocked; - } - } - return mscReturnOk; -} -MSC_RAMFUNC_DEFINITION_END - -/***************************************************************************//** - * @brief - * Perform a flash data write phase. - * @details - * This function performs the data phase of a flash write operation by loading - * the given number of 32-bit words to the WDATA register. - * @param[in] data - * A pointer to the first data word to load. - * @param[in] numWords - * A number of data words (32-bit) to load. - * @param[in] writeStrategy - * A write strategy to apply. - * @return - * Returns the status of the data load operation. - * @verbatim - * mscReturnOk - An operation completed successfully. - * mscReturnTimeOut - An operation timed out waiting for the flash operation - * to complete. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_LoadWriteData(uint32_t* data, - uint32_t numWords, - MSC_WriteStrategy_Typedef writeStrategy) -{ - uint32_t timeOut; - uint32_t wordIndex; - bool useWDouble = false; - MSC_Status_TypeDef retval = mscReturnOk; -#if !defined(_EFM32_GECKO_FAMILY) - uint32_t irqState; -#endif - -#if defined(_MSC_WRITECTRL_LPWRITE_MASK) && defined(_MSC_WRITECTRL_WDOUBLE_MASK) - /* If the LPWRITE (Low Power Write) is NOT enabled, set WDOUBLE (Write Double word). */ - if (!(MSC->WRITECTRL & MSC_WRITECTRL_LPWRITE)) { -#if defined(_SILICON_LABS_32B_SERIES_0) - /* If the number of words to be written is odd, align by writing - a single word first, before setting the WDOUBLE bit. */ - if (numWords & 0x1) { - /* Wait for the MSC to become ready for the next word. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((!(MSC->STATUS & MSC_STATUS_WDATAREADY)) && (timeOut != 0)) { - timeOut--; - } - /* Check for timeout. */ - if (timeOut == 0) { - return mscReturnTimeOut; - } - /* Clear the double word option to write the initial single word. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WDOUBLE; - /* Write first data word. */ - MSC->WDATA = *data++; - MSC->WRITECMD = MSC_WRITECMD_WRITEONCE; - - /* Wait for the operation to finish. It may be required to change the WDOUBLE - configuration after the initial write. It should not be changed while BUSY. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - /* Check for timeout. */ - if (timeOut == 0) { - return mscReturnTimeOut; - } - /* Subtract this initial odd word for the write loop below. */ - numWords -= 1; - retval = mscReturnOk; - } - /* Set the double word option to write two words per - data phase. */ -#endif - MSC->WRITECTRL |= MSC_WRITECTRL_WDOUBLE; - useWDouble = true; - } -#endif /* defined( _MSC_WRITECTRL_LPWRITE_MASK ) && defined( _MSC_WRITECTRL_WDOUBLE_MASK ) */ - - /* Write the rest as a double word write if wordsPerDataPhase == 2 */ - if (numWords > 0) { - /**** Write strategy: mscWriteIntSafe ****/ - if (writeStrategy == mscWriteIntSafe) { - /* Requires a system core clock at 1MHz or higher */ - EFM_ASSERT(SystemCoreClock >= 1000000); - wordIndex = 0; - while (wordIndex < numWords) { - if (!useWDouble) { - MSC->WDATA = *data++; - wordIndex++; - MSC->WRITECMD = MSC_WRITECMD_WRITEONCE; - } else { // useWDouble == true - /* Trigger a double write according to flash properties. */ -#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_MSC_WRITECTRL_WDOUBLE_MASK) - MSC->WDATA = *data++; - while (!(MSC->STATUS & MSC_STATUS_WDATAREADY)) ; - MSC->WDATA = *data++; - wordIndex += 2; - MSC->WRITECMD = MSC_WRITECMD_WRITEONCE; - -#elif defined(_SILICON_LABS_32B_SERIES_1) && defined(_MSC_WRITECTRL_WDOUBLE_MASK) - while (!(MSC->STATUS & MSC_STATUS_WDATAREADY)) ; - do { - MSC->WDATA = *data++; - wordIndex++; - } while ((MSC->STATUS & MSC_STATUS_WDATAREADY) - && (wordIndex < numWords)); - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; -#endif - } - - /* Wait for the transaction to finish. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - /* Check for a timeout. */ - if (timeOut == 0) { - retval = mscReturnTimeOut; - break; - } -#if defined(_EFM32_GECKO_FAMILY) - MSC->ADDRB += 4; - MSC->WRITECMD = MSC_WRITECMD_LADDRIM; -#endif - } - } - /**** Write strategy: mscWriteFast ****/ - else { -#if defined(_EFM32_GECKO_FAMILY) - /* Gecko does not have auto-increment of ADDR. */ - EFM_ASSERT(false); -#else - /* Requires a system core clock at 14 MHz or higher. */ - EFM_ASSERT(SystemCoreClock >= 14000000); - - /* - * Protect from interrupts to be sure to satisfy the us timing - * needs of the MSC flash programming state machine. - */ - irqState = __get_PRIMASK(); - __disable_irq(); - - wordIndex = 0; - while (wordIndex < numWords) { - /* Wait for the MSC to be ready for the next word. */ - while (!(MSC->STATUS & MSC_STATUS_WDATAREADY)) { - /* If the write to MSC->WDATA below missed the 30 us timeout and the - following MSC_WRITECMD_WRITETRIG command arrived while - MSC_STATUS_BUSY is 1, the MSC_WRITECMD_WRITETRIG could be ignored by - the MSC. In this case, MSC_STATUS_WORDTIMEOUT is set to 1 - and MSC_STATUS_BUSY is 0. A new trigger is therefore needed to - complete write of data in MSC->WDATA. - If WDATAREADY became high since entering the loop, exit and continue - to the next WDATA write. - */ - if ((MSC->STATUS & (MSC_STATUS_WORDTIMEOUT - | MSC_STATUS_BUSY - | MSC_STATUS_WDATAREADY)) - == MSC_STATUS_WORDTIMEOUT) { - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; - } - } - - if (!useWDouble) { - MSC->WDATA = *data; - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; - data++; - wordIndex++; - } else { // useWDouble == true - /* Trigger double write according to flash properties. */ -#if defined(_SILICON_LABS_32B_SERIES_0) - MSC->WDATA = *data; - if (wordIndex & 0x1) { - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; - } - data++; - wordIndex++; - -#elif (_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) - do { - MSC->WDATA = *data++; - wordIndex++; - } while ((MSC->STATUS & MSC_STATUS_WDATAREADY) - && (wordIndex < numWords)); - MSC->WRITECMD = MSC_WRITECMD_WRITETRIG; -#endif - } - } - - if (irqState == 0) { - /* Restore the previous interrupt state. */ - __enable_irq(); - } - - /* Wait for the transaction to finish. */ - timeOut = MSC_PROGRAM_TIMEOUT; - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - /* Check for a timeout. */ - if (timeOut == 0) { - retval = mscReturnTimeOut; - } -#endif - } /* writeStrategy */ - } - -#if defined(_MSC_WRITECTRL_WDOUBLE_MASK) - /* Clear a double word option, which should not be left on when returning. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WDOUBLE; -#endif - - return retval; -} -MSC_RAMFUNC_DEFINITION_END - -/***************************************************************************//** - * @brief - * An internal flash write function with the select write strategy parameter. - * @param[in] address - * A write address. - * @param[in] data - * A pointer to the first data word to load. - * @param[in] numBytes - * A nsumber of data bytes to load, which must be a multiple of 4 bytes. - * @param[in] writeStrategy - * A wWrite strategy to apply. - * @return - * Returns the status of the data load operation. - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_WriteWordI(uint32_t *address, - void const *data, - uint32_t numBytes, - MSC_WriteStrategy_Typedef writeStrategy) -{ - uint32_t wordCount; - uint32_t numWords; - uint32_t pageWords; - uint32_t* pData; - MSC_Status_TypeDef retval = mscReturnOk; - - /* Check alignment (must be aligned to words). */ - EFM_ASSERT(((uint32_t) address & 0x3) == 0); - - /* Check a number of bytes. Must be divisible by four. */ - EFM_ASSERT((numBytes & 0x3) == 0); - -#if defined(_EMU_STATUS_VSCALE_MASK) - /* VSCALE must be done and flash write requires VSCALE2. */ - EFM_ASSERT(!(EMU->STATUS & _EMU_STATUS_VSCALEBUSY_MASK)); - EFM_ASSERT((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) == EMU_STATUS_VSCALE_VSCALE2); -#endif - - /* Enable writing to the MSC module. */ - MSC->WRITECTRL |= MSC_WRITECTRL_WREN; - - /* Convert bytes to words. */ - numWords = numBytes >> 2; - EFM_ASSERT(numWords > 0); - - /* The following loop splits the data into chunks corresponding to flash pages. - The address is loaded only once per page because the hardware automatically - increments the address internally for each data load inside a page. */ - for (wordCount = 0, pData = (uint32_t *)data; wordCount < numWords; ) { - /* First, the address is loaded. The address is auto-incremented within a page. - Therefore, the address phase is only needed once for each page. */ - retval = MSC_LoadVerifyAddress(address + wordCount); - if (mscReturnOk != retval) { - return retval; - } - /* Compute the number of words to write to the current page. */ - pageWords = - (FLASH_PAGE_SIZE - - (((uint32_t) (address + wordCount)) & (FLASH_PAGE_SIZE - 1))) - / sizeof(uint32_t); - if (pageWords > numWords - wordCount) { - pageWords = numWords - wordCount; - } - /* Write the data in the current page. */ - retval = MSC_LoadWriteData(pData, pageWords, writeStrategy); - if (mscReturnOk != retval) { - break; - } - wordCount += pageWords; - pData += pageWords; - } - -#if defined(ERRATA_FIX_FLASH_E201_EN) - /* Fix for errata FLASH_E201 - Potential program failure after Power On. - * - * Check if the first word was programmed correctly. If a failure is detected, - * retry programming of the first word. - * - * A full description of the errata is in the errata document. */ - pData = (uint32_t *) data; - if (*address != *pData) { - retval = MSC_LoadVerifyAddress(address); - if (mscReturnOk == retval) { - retval = MSC_LoadWriteData(pData, 1, writeStrategy); - } - } -#endif - - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - -#if defined(_MSC_WRITECTRL_WDOUBLE_MASK) -#if (WORDS_PER_DATA_PHASE == 2) - /* Turn off the double word write cycle support. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WDOUBLE; -#endif -#endif - - return retval; -} -MSC_RAMFUNC_DEFINITION_END - -/** @endcond */ - -/***************************************************************************//** - * @brief - * Erases a page in flash memory. - * @note - * It is recommended to run this code from RAM. On the Gecko family, it is required - * to run this function from RAM. - * - * For IAR IDE, Rowley IDE, SimplicityStudio IDE, Atollic IDE, and ARM GCC IDE, this is - * achieved automatically by using attributes in the function proctype. For Keil - * uVision IDE, define a section called "ram_code" and place this manually in - * the project's scatter file. - * - * @param[in] startAddress - * A pointer to the flash page to erase. Must be aligned to the beginning of the page - * boundary. - * @return - * Returns the status of erase operation, #MSC_Status_TypeDef - * @verbatim - * mscReturnOk - The operation completed successfully. - * mscReturnInvalidAddr - The operation tried to erase a non-flash area. - * mscReturnLocked - The operation tried to erase a locked area of the flash. - * mscReturnTimeOut - The operation timed out waiting for the flash operation - * to complete. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_ErasePage(uint32_t *startAddress) -{ - uint32_t timeOut = MSC_PROGRAM_TIMEOUT; - - /* An address must be aligned to pages. */ - EFM_ASSERT((((uint32_t) startAddress) & (FLASH_PAGE_SIZE - 1)) == 0); -#if defined(_EMU_STATUS_VSCALE_MASK) - /* VSCALE must be done and flash erase requires VSCALE2. */ - EFM_ASSERT(!(EMU->STATUS & _EMU_STATUS_VSCALEBUSY_MASK)); - EFM_ASSERT((EMU->STATUS & _EMU_STATUS_VSCALE_MASK) == EMU_STATUS_VSCALE_VSCALE2); -#endif - - /* Enable writing to the MSC module. */ - MSC->WRITECTRL |= MSC_WRITECTRL_WREN; - - /* Load an address. */ - MSC->ADDRB = (uint32_t)startAddress; - MSC->WRITECMD = MSC_WRITECMD_LADDRIM; - - /* Check for an invalid address. */ - if (MSC->STATUS & MSC_STATUS_INVADDR) { - /* Disable writing to the MSC */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnInvalidAddr; - } - /* Check for write protected page. */ - if (MSC->STATUS & MSC_STATUS_LOCKED) { - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnLocked; - } - /* Send erase page command. */ - MSC->WRITECMD = MSC_WRITECMD_ERASEPAGE; - - /* Wait for the erase to complete. */ - while ((MSC->STATUS & MSC_STATUS_BUSY) && (timeOut != 0)) { - timeOut--; - } - if (timeOut == 0) { - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnTimeOut; - } - /* Disable writing to the MSC module. */ - MSC->WRITECTRL &= ~MSC_WRITECTRL_WREN; - return mscReturnOk; -} -MSC_RAMFUNC_DEFINITION_END - -/***************************************************************************//** - * @brief - * Writes data to flash memory. This function is interrupt-safe, but slower than - * MSC_WriteWordFast(), which writes to flash with interrupts disabled. - * Write data must be aligned to words and contain a number of bytes that is - * divisible by four. - * @note - * It is recommended to erase the flash page before performing a write. - * - * It is recommended to run this code from RAM. On the Gecko family, it is required - * to run this function from RAM. - * - * For IAR IDE, Rowley IDE, SimplicityStudio IDE, Atollic IDE, and ARM GCC IDE, - * this is done automatically by using attributes in the function proctype. - * For Keil uVision IDE, define a section called "ram_code" and place it - * manually in the project's scatter file. - * - * This function requires a system core clock at 1 MHz or higher. - * - * @param[in] address - * A pointer to the flash word to write to. Must be aligned to words. - * @param[in] data - * Data to write to flash. - * @param[in] numBytes - * A number of bytes to write from flash. NB: Must be divisible by four. - * @return - * Returns the status of the write operation. - * @verbatim - * flashReturnOk - The operation completed successfully. - * flashReturnInvalidAddr - The operation tried to erase a non-flash area. - * flashReturnLocked - The operation tried to erase a locked area of the Flash. - * flashReturnTimeOut - The operation timed out waiting for the flash operation - * to complete, or the MSC module timed out waiting for the software to write - * the next word into the DWORD register. - * @endverbatim - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_WriteWord(uint32_t *address, - void const *data, - uint32_t numBytes) -{ - return MSC_WriteWordI(address, data, numBytes, mscWriteIntSafe); -} -MSC_RAMFUNC_DEFINITION_END - -#if !defined(_EFM32_GECKO_FAMILY) -/***************************************************************************//** - * @brief - * Writes data to flash memory. This function is faster than MSC_WriteWord(), - * but it disables interrupts. Write data must be aligned to words and contain - * a number of bytes that is divisible by four. - * @note - * It is recommended to erase the flash page before performing a write. - * It is required to run this function from RAM on parts that include a - * flash write buffer. - * - * For IAR IDE, Rowley IDE, SimplicityStudio IDE, Atollic IDE, and ARM GCC IDE, - * this is done automatically by using attributes in the function proctype. - * For Keil uVision IDE, define a section called "ram_code" and place this manually - * in the project's scatter file. - * - * @param[in] address - * A pointer to the flash word to write to. Must be aligned to words. - * @param[in] data - * Data to write to flash. - * @param[in] numBytes - * A number of bytes to write from the Flash. NB: Must be divisible by four. - * @return - * Returns the status of the write operation. - * @verbatim - * flashReturnOk - The operation completed successfully. - * flashReturnInvalidAddr - The operation tried to erase a non-flash area. - * flashReturnLocked - The operation tried to erase a locked area of the flash. - * flashReturnTimeOut - The operation timed out waiting for flash operation - * to complete. Or the MSC timed out waiting for the software to write - * the next word into the DWORD register. - * @endverbatim - ******************************************************************************/ -#if !defined (EM_MSC_RUN_FROM_FLASH) || (_SILICON_LABS_GECKO_INTERNAL_SDID < 84) -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_WriteWordFast(uint32_t *address, - void const *data, - uint32_t numBytes) -{ - return MSC_WriteWordI(address, data, numBytes, mscWriteFast); -} -MSC_RAMFUNC_DEFINITION_END - -#endif -#endif - -#if defined(_MSC_MASSLOCK_MASK) -/***************************************************************************//** - * @brief - * Erase the entire Flash in one operation. - * - * @note - * This command will erase the entire contents of the device. - * Use with care, both a debug session and all contents of the flash will be - * lost. The lock bit, MLW will prevent this operation from executing and - * might prevent a successful mass erase. - ******************************************************************************/ -MSC_RAMFUNC_DEFINITION_BEGIN -MSC_Status_TypeDef MSC_MassErase(void) -{ - /* Enable writing to the MSC module. */ - MSC->WRITECTRL |= MSC_WRITECTRL_WREN; - - /* Unlock the device mass erase. */ - MSC->MASSLOCK = MSC_MASSLOCK_LOCKKEY_UNLOCK; - - /* Erase the first 512 K block. */ - MSC->WRITECMD = MSC_WRITECMD_ERASEMAIN0; - - /* Waiting for erase to complete. */ - while ((MSC->STATUS & MSC_STATUS_BUSY) != 0U) { - } - -#if ((FLASH_SIZE >= (512 * 1024)) && defined(_MSC_WRITECMD_ERASEMAIN1_MASK)) - /* Erase the second 512 K block. */ - MSC->WRITECMD = MSC_WRITECMD_ERASEMAIN1; - - /* Waiting for erase to complete. */ - while ((MSC->STATUS & MSC_STATUS_BUSY) != 0U) { - } -#endif - - /* Restore the mass erase lock. */ - MSC->MASSLOCK = MSC_MASSLOCK_LOCKKEY_LOCK; - - /* This will only successfully return if calling function is also in SRAM. */ - return mscReturnOk; -} -MSC_RAMFUNC_DEFINITION_END - -#endif - -/** @} (end addtogroup MSC) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(MSC_COUNT) && (MSC_COUNT > 0) */ diff --git a/targets/efm32boot/emlib/em_system.c b/targets/efm32boot/emlib/em_system.c deleted file mode 100644 index 6877ac4..0000000 --- a/targets/efm32boot/emlib/em_system.c +++ /dev/null @@ -1,114 +0,0 @@ -/***************************************************************************//** - * @file em_system.c - * @brief System Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_system.h" -#include "em_assert.h" -#include - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup SYSTEM - * @{ - ******************************************************************************/ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Get chip major/minor revision. - * - * @param[out] rev - * Location to place chip revision info. - ******************************************************************************/ -void SYSTEM_ChipRevisionGet(SYSTEM_ChipRevision_TypeDef *rev) -{ - uint8_t tmp; - - EFM_ASSERT(rev); - - /* CHIP FAMILY bit [5:2] */ - tmp = (((ROMTABLE->PID1 & _ROMTABLE_PID1_FAMILYMSB_MASK) >> _ROMTABLE_PID1_FAMILYMSB_SHIFT) << 2); - /* CHIP FAMILY bit [1:0] */ - tmp |= ((ROMTABLE->PID0 & _ROMTABLE_PID0_FAMILYLSB_MASK) >> _ROMTABLE_PID0_FAMILYLSB_SHIFT); - rev->family = tmp; - - /* CHIP MAJOR bit [3:0] */ - rev->major = (ROMTABLE->PID0 & _ROMTABLE_PID0_REVMAJOR_MASK) >> _ROMTABLE_PID0_REVMAJOR_SHIFT; - - /* CHIP MINOR bit [7:4] */ - tmp = (((ROMTABLE->PID2 & _ROMTABLE_PID2_REVMINORMSB_MASK) >> _ROMTABLE_PID2_REVMINORMSB_SHIFT) << 4); - /* CHIP MINOR bit [3:0] */ - tmp |= ((ROMTABLE->PID3 & _ROMTABLE_PID3_REVMINORLSB_MASK) >> _ROMTABLE_PID3_REVMINORLSB_SHIFT); - rev->minor = tmp; -} - -/***************************************************************************//** - * @brief - * Get factory calibration value for a given peripheral register. - * - * @param[in] regAddress - * Peripheral calibration register address to get calibration value for. If - * a calibration value is found then this register is updated with the - * calibration value. - * - * @return - * True if a calibration value exists, false otherwise. - ******************************************************************************/ -bool SYSTEM_GetCalibrationValue(volatile uint32_t *regAddress) -{ - SYSTEM_CalAddrVal_TypeDef * p, * end; - - p = (SYSTEM_CalAddrVal_TypeDef *)(DEVINFO_BASE & 0xFFFFF000); - end = (SYSTEM_CalAddrVal_TypeDef *)DEVINFO_BASE; - - for (; p < end; p++) { - if (p->address == 0xFFFFFFFF) { - /* Found table terminator */ - return false; - } - if (p->address == (uint32_t)regAddress) { - *regAddress = p->calValue; - return true; - } - } - /* Nothing found for regAddress */ - return false; -} - -/** @} (end addtogroup SYSTEM) */ -/** @} (end addtogroup emlib) */ diff --git a/targets/efm32boot/emlib/em_timer.c b/targets/efm32boot/emlib/em_timer.c deleted file mode 100644 index 6999d6a..0000000 --- a/targets/efm32boot/emlib/em_timer.c +++ /dev/null @@ -1,253 +0,0 @@ -/***************************************************************************//** - * @file em_timer.c - * @brief Timer/counter (TIMER) Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_timer.h" -#if defined(TIMER_COUNT) && (TIMER_COUNT > 0) - -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup TIMER - * @brief Timer/Counter (TIMER) Peripheral API - * @details - * The timer module consists of three main parts: - * @li General timer config and enable control. - * @li Compare/capture control. - * @li Dead time insertion control (may not be available for all timers). - * @{ - ******************************************************************************/ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Initialize TIMER. - * - * @details - * Notice that counter top must be configured separately with for instance - * TIMER_TopSet(). In addition, compare/capture and dead-time insertion - * init must be initialized separately if used. That should probably - * be done prior to the use of this function if configuring the TIMER to - * start when initialization is completed. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - * - * @param[in] init - * Pointer to TIMER initialization structure. - ******************************************************************************/ -void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init) -{ - EFM_ASSERT(TIMER_REF_VALID(timer)); - - /* Stop timer if specified to be disabled (dosn't hurt if already stopped) */ - if (!(init->enable)) { - timer->CMD = TIMER_CMD_STOP; - } - - /* Reset counter */ - timer->CNT = _TIMER_CNT_RESETVALUE; - - timer->CTRL = ((uint32_t)(init->prescale) << _TIMER_CTRL_PRESC_SHIFT) - | ((uint32_t)(init->clkSel) << _TIMER_CTRL_CLKSEL_SHIFT) - | ((uint32_t)(init->fallAction) << _TIMER_CTRL_FALLA_SHIFT) - | ((uint32_t)(init->riseAction) << _TIMER_CTRL_RISEA_SHIFT) - | ((uint32_t)(init->mode) << _TIMER_CTRL_MODE_SHIFT) - | (init->debugRun ? TIMER_CTRL_DEBUGRUN : 0) - | (init->dmaClrAct ? TIMER_CTRL_DMACLRACT : 0) - | (init->quadModeX4 ? TIMER_CTRL_QDM_X4 : 0) - | (init->oneShot ? TIMER_CTRL_OSMEN : 0) - -#if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI) - | (init->count2x ? TIMER_CTRL_X2CNT : 0) - | (init->ati ? TIMER_CTRL_ATI : 0) -#endif - | (init->sync ? TIMER_CTRL_SYNC : 0); - - /* Start timer if specified to be enabled (dosn't hurt if already started) */ - if (init->enable) { - timer->CMD = TIMER_CMD_START; - } -} - -/***************************************************************************//** - * @brief - * Initialize TIMER compare/capture channel. - * - * @details - * Notice that if operating channel in compare mode, the CCV and CCVB register - * must be set separately as required. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - * - * @param[in] ch - * Compare/capture channel to init for. - * - * @param[in] init - * Pointer to TIMER initialization structure. - ******************************************************************************/ -void TIMER_InitCC(TIMER_TypeDef *timer, - unsigned int ch, - const TIMER_InitCC_TypeDef *init) -{ - EFM_ASSERT(TIMER_REF_VALID(timer)); - EFM_ASSERT(TIMER_CH_VALID(ch)); - - timer->CC[ch].CTRL = - ((uint32_t)(init->eventCtrl) << _TIMER_CC_CTRL_ICEVCTRL_SHIFT) - | ((uint32_t)(init->edge) << _TIMER_CC_CTRL_ICEDGE_SHIFT) - | ((uint32_t)(init->prsSel) << _TIMER_CC_CTRL_PRSSEL_SHIFT) - | ((uint32_t)(init->cufoa) << _TIMER_CC_CTRL_CUFOA_SHIFT) - | ((uint32_t)(init->cofoa) << _TIMER_CC_CTRL_COFOA_SHIFT) - | ((uint32_t)(init->cmoa) << _TIMER_CC_CTRL_CMOA_SHIFT) - | ((uint32_t)(init->mode) << _TIMER_CC_CTRL_MODE_SHIFT) - | (init->filter ? TIMER_CC_CTRL_FILT_ENABLE : 0) - | (init->prsInput ? TIMER_CC_CTRL_INSEL_PRS : 0) - | (init->coist ? TIMER_CC_CTRL_COIST : 0) - | (init->outInvert ? TIMER_CC_CTRL_OUTINV : 0); -} - -#if defined(_TIMER_DTCTRL_MASK) -/***************************************************************************//** - * @brief - * Initialize the TIMER DTI unit. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - * - * @param[in] init - * Pointer to TIMER DTI initialization structure. - ******************************************************************************/ -void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init) -{ - EFM_ASSERT(TIMER0 == timer); - - /* Make sure the DTI unit is disabled while initializing. */ - TIMER_EnableDTI(timer, false); - - /* Setup the DTCTRL register. - The enable bit will be set at the end of the function if specified. */ - timer->DTCTRL = - (init->autoRestart ? TIMER_DTCTRL_DTDAS : 0) - | (init->activeLowOut ? TIMER_DTCTRL_DTIPOL : 0) - | (init->invertComplementaryOut ? TIMER_DTCTRL_DTCINV : 0) - | (init->enablePrsSource ? TIMER_DTCTRL_DTPRSEN : 0) - | ((uint32_t)(init->prsSel) << _TIMER_DTCTRL_DTPRSSEL_SHIFT); - - /* Setup the DTTIME register. */ - timer->DTTIME = - ((uint32_t)(init->prescale) << _TIMER_DTTIME_DTPRESC_SHIFT) - | ((uint32_t)(init->riseTime) << _TIMER_DTTIME_DTRISET_SHIFT) - | ((uint32_t)(init->fallTime) << _TIMER_DTTIME_DTFALLT_SHIFT); - - /* Setup the DTFC register. */ - timer->DTFC = - (init->enableFaultSourceCoreLockup ? TIMER_DTFC_DTLOCKUPFEN : 0) - | (init->enableFaultSourceDebugger ? TIMER_DTFC_DTDBGFEN : 0) - | (init->enableFaultSourcePrsSel0 ? TIMER_DTFC_DTPRS0FEN : 0) - | (init->enableFaultSourcePrsSel1 ? TIMER_DTFC_DTPRS1FEN : 0) - | ((uint32_t)(init->faultAction) << _TIMER_DTFC_DTFA_SHIFT) - | ((uint32_t)(init->faultSourcePrsSel0) << _TIMER_DTFC_DTPRS0FSEL_SHIFT) - | ((uint32_t)(init->faultSourcePrsSel1) << _TIMER_DTFC_DTPRS1FSEL_SHIFT); - - /* Setup the DTOGEN register. */ - timer->DTOGEN = init->outputsEnableMask; - - /* Clear any previous DTI faults. */ - TIMER_ClearDTIFault(timer, TIMER_GetDTIFault(timer)); - - /* Enable/disable before returning. */ - TIMER_EnableDTI(timer, init->enable); -} -#endif - -/***************************************************************************//** - * @brief - * Reset TIMER to same state as after a HW reset. - * - * @note - * The ROUTE register is NOT reset by this function, in order to allow for - * centralized setup of this feature. - * - * @param[in] timer - * Pointer to TIMER peripheral register block. - ******************************************************************************/ -void TIMER_Reset(TIMER_TypeDef *timer) -{ - int i; - - EFM_ASSERT(TIMER_REF_VALID(timer)); - - /* Make sure disabled first, before resetting other registers */ - timer->CMD = TIMER_CMD_STOP; - - timer->CTRL = _TIMER_CTRL_RESETVALUE; - timer->IEN = _TIMER_IEN_RESETVALUE; - timer->IFC = _TIMER_IFC_MASK; - timer->TOPB = _TIMER_TOPB_RESETVALUE; - /* Write TOP after TOPB to invalidate TOPB (clear TIMER_STATUS_TOPBV) */ - timer->TOP = _TIMER_TOP_RESETVALUE; - timer->CNT = _TIMER_CNT_RESETVALUE; - /* Do not reset route register, setting should be done independently */ - /* (Note: ROUTE register may be locked by DTLOCK register.) */ - - for (i = 0; TIMER_CH_VALID(i); i++) { - timer->CC[i].CTRL = _TIMER_CC_CTRL_RESETVALUE; - timer->CC[i].CCV = _TIMER_CC_CCV_RESETVALUE; - timer->CC[i].CCVB = _TIMER_CC_CCVB_RESETVALUE; - } - - /* Reset dead time insertion module, no effect on timers without DTI */ - -#if defined(TIMER_DTLOCK_LOCKKEY_UNLOCK) - /* Unlock DTI registers first in case locked */ - timer->DTLOCK = TIMER_DTLOCK_LOCKKEY_UNLOCK; - - timer->DTCTRL = _TIMER_DTCTRL_RESETVALUE; - timer->DTTIME = _TIMER_DTTIME_RESETVALUE; - timer->DTFC = _TIMER_DTFC_RESETVALUE; - timer->DTOGEN = _TIMER_DTOGEN_RESETVALUE; - timer->DTFAULTC = _TIMER_DTFAULTC_MASK; -#endif -} - -/** @} (end addtogroup TIMER) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(TIMER_COUNT) && (TIMER_COUNT > 0) */ diff --git a/targets/efm32boot/emlib/em_usart.c b/targets/efm32boot/emlib/em_usart.c deleted file mode 100644 index 3a5e65c..0000000 --- a/targets/efm32boot/emlib/em_usart.c +++ /dev/null @@ -1,1161 +0,0 @@ -/***************************************************************************//** - * @file em_usart.c - * @brief Universal synchronous/asynchronous receiver/transmitter (USART/UART) - * Peripheral API - * @version 5.2.2 - ******************************************************************************* - * # License - * Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_usart.h" -#if defined(USART_COUNT) && (USART_COUNT > 0) - -#include "em_cmu.h" -#include "em_bus.h" -#include "em_assert.h" - -/***************************************************************************//** - * @addtogroup emlib - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup USART - * @{ - ******************************************************************************/ - -/******************************************************************************* - ******************************* DEFINES *********************************** - ******************************************************************************/ - -/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ - -/** Validation of USART register block pointer reference for assert statements. */ -#if (USART_COUNT == 1) && defined(USART0) -#define USART_REF_VALID(ref) ((ref) == USART0) - -#elif (USART_COUNT == 1) && defined(USART1) -#define USART_REF_VALID(ref) ((ref) == USART1) - -#elif (USART_COUNT == 2) && defined(USART2) -#define USART_REF_VALID(ref) (((ref) == USART1) || ((ref) == USART2)) - -#elif (USART_COUNT == 2) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1)) - -#elif (USART_COUNT == 3) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2)) -#elif (USART_COUNT == 4) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2) || ((ref) == USART3)) -#elif (USART_COUNT == 5) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2) || ((ref) == USART3) \ - || ((ref) == USART4)) -#elif (USART_COUNT == 6) -#define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) \ - || ((ref) == USART2) || ((ref) == USART3) \ - || ((ref) == USART4) || ((ref) == USART5)) -#else -#error "Undefined number of USARTs." -#endif - -#if defined(USARTRF_COUNT) && (USARTRF_COUNT > 0) -#if (USARTRF_COUNT == 1) && defined(USARTRF0) -#define USARTRF_REF_VALID(ref) ((ref) == USARTRF0) -#elif (USARTRF_COUNT == 1) && defined(USARTRF1) -#define USARTRF_REF_VALID(ref) ((ref) == USARTRF1) -#else -#define USARTRF_REF_VALID(ref) (0) -#endif -#else -#define USARTRF_REF_VALID(ref) (0) -#endif - -#if defined(_EZR32_HAPPY_FAMILY) -#define USART_IRDA_VALID(ref) ((ref) == USART0) -#elif defined(_EFM32_HAPPY_FAMILY) -#define USART_IRDA_VALID(ref) (((ref) == USART0) || ((ref) == USART1)) -#elif defined(USART0) -#define USART_IRDA_VALID(ref) ((ref) == USART0) -#elif (USART_COUNT == 1) && defined(USART1) -#define USART_IRDA_VALID(ref) ((ref) == USART1) -#elif defined(USARTRF0) -#define USART_IRDA_VALID(ref) ((ref) == USARTRF0) -#else -#define USART_IRDA_VALID(ref) (0) -#endif - -#if defined(_SILICON_LABS_32B_SERIES_1) - #if defined(USART3) - #define USART_I2S_VALID(ref) (((ref) == USART1) || ((ref) == USART3)) - #else - #define USART_I2S_VALID(ref) ((ref) == USART1) - #endif -#elif defined(_SILICON_LABS_32B_SERIES_0) - #if defined(_EZR32_HAPPY_FAMILY) - #define USART_I2S_VALID(ref) ((ref) == USART0) - #elif defined(_EFM32_HAPPY_FAMILY) - #define USART_I2S_VALID(ref) (((ref) == USART0) || ((ref) == USART1)) - #elif defined(_EFM32_TINY_FAMILY) || defined(_EFM32_ZERO_FAMILY) - #define USART_I2S_VALID(ref) ((ref) == USART1) - #elif defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY) - #define USART_I2S_VALID(ref) (((ref) == USART1) || ((ref) == USART2)) -#endif -#endif - -#if (UART_COUNT == 1) -#define UART_REF_VALID(ref) ((ref) == UART0) -#elif (UART_COUNT == 2) -#define UART_REF_VALID(ref) (((ref) == UART0) || ((ref) == UART1)) -#else -#define UART_REF_VALID(ref) (0) -#endif - -#if defined(_USART_CLKDIV_DIVEXT_MASK) -#define CLKDIV_MASK (_USART_CLKDIV_DIV_MASK | _USART_CLKDIV_DIVEXT_MASK) -#else -#define CLKDIV_MASK _USART_CLKDIV_DIV_MASK -#endif - -/** @endcond */ - -/******************************************************************************* - ************************** GLOBAL FUNCTIONS ******************************* - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Configure USART/UART operating in asynchronous mode to use a given - * baudrate (or as close as possible to specified baudrate). - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] refFreq - * USART/UART reference clock frequency in Hz that will be used. If set to 0, - * the currently configured reference clock is assumed. - * - * @param[in] baudrate - * Baudrate to try to achieve for USART/UART. - * - * @param[in] ovs - * Oversampling to be used. Normal is 16x oversampling, but lower oversampling - * may be used to achieve higher rates or better baudrate accuracy in some - * cases. Notice that lower oversampling frequency makes channel more - * vulnerable to bit faults during reception due to clock inaccuracies - * compared to link partner. - ******************************************************************************/ -void USART_BaudrateAsyncSet(USART_TypeDef *usart, - uint32_t refFreq, - uint32_t baudrate, - USART_OVS_TypeDef ovs) -{ - uint32_t clkdiv; - uint32_t oversample; - - /* Inhibit divide by 0 */ - EFM_ASSERT(baudrate); - - /* - * We want to use integer division to avoid forcing in float division - * utils, and yet keep rounding effect errors to a minimum. - * - * CLKDIV in asynchronous mode is given by: - * - * CLKDIV = 256 * (fHFPERCLK/(oversample * br) - 1) - * or - * CLKDIV = (256 * fHFPERCLK)/(oversample * br) - 256 - * - * The basic problem with integer division in the above formula is that - * the dividend (256 * fHFPERCLK) may become higher than max 32 bit - * integer. Yet, we want to evaluate dividend first before dividing in - * order to get as small rounding effects as possible. We do not want - * to make too harsh restrictions on max fHFPERCLK value either. - * - * One can possibly factorize 256 and oversample/br. However, - * since the last 6 or 3 bits of CLKDIV are don't care, we can base our - * integer arithmetic on the below formula - * - * CLKDIV / 64 = (4 * fHFPERCLK)/(oversample * br) - 4 (3 bits dont care) - * or - * CLKDIV / 8 = (32 * fHFPERCLK)/(oversample * br) - 32 (6 bits dont care) - * - * and calculate 1/64 of CLKDIV first. This allows for fHFPERCLK - * up to 1GHz without overflowing a 32 bit value! - */ - - /* HFPERCLK used to clock all USART/UART peripheral modules */ - if (!refFreq) { - refFreq = CMU_ClockFreqGet(cmuClock_HFPER); - } - - /* Map oversampling */ - switch (ovs) { - case usartOVS16: - EFM_ASSERT(baudrate <= (refFreq / 16)); - oversample = 16; - break; - - case usartOVS8: - EFM_ASSERT(baudrate <= (refFreq / 8)); - oversample = 8; - break; - - case usartOVS6: - EFM_ASSERT(baudrate <= (refFreq / 6)); - oversample = 6; - break; - - case usartOVS4: - EFM_ASSERT(baudrate <= (refFreq / 4)); - oversample = 4; - break; - - default: - /* Invalid input */ - EFM_ASSERT(0); - return; - } - - /* Calculate and set CLKDIV with fractional bits. - * The added (oversample*baudrate)/2 in the first line is to round the - * divisor to the nearest fractional divisor. */ -#if defined(_SILICON_LABS_32B_SERIES_0) && !defined(_EFM32_HAPPY_FAMILY) - /* Devices with 2 fractional bits. CLKDIV[7:6] */ - clkdiv = 4 * refFreq + (oversample * baudrate) / 2; - clkdiv /= (oversample * baudrate); - clkdiv -= 4; - clkdiv *= 64; -#else - /* Devices with 5 fractional bits. CLKDIV[7:3] */ - clkdiv = 32 * refFreq + (oversample * baudrate) / 2; - clkdiv /= (oversample * baudrate); - clkdiv -= 32; - clkdiv *= 8; -#endif - - /* Verify that resulting clock divider is within limits */ - EFM_ASSERT(clkdiv <= CLKDIV_MASK); - - /* Make sure we don't write to reserved bits */ - clkdiv &= CLKDIV_MASK; - - usart->CTRL &= ~_USART_CTRL_OVS_MASK; - usart->CTRL |= ovs; - usart->CLKDIV = clkdiv; -} - -/***************************************************************************//** - * @brief - * Calculate baudrate for USART/UART given reference frequency, clock division - * and oversampling rate (if async mode). - * - * @details - * This function returns the baudrate that a USART/UART module will use if - * configured with the given frequency, clock divisor and mode. Notice that - * this function will not use actual HW configuration. It can be used - * to determinate if a given configuration is sufficiently accurate for the - * application. - * - * @param[in] refFreq - * USART/UART HF peripheral frequency used. - * - * @param[in] clkdiv - * Clock division factor to be used. - * - * @param[in] syncmode - * @li true - synchronous mode operation. - * @li false - asynchronous mode operation. - * - * @param[in] ovs - * Oversampling used if asynchronous mode. Not used if @p syncmode is true. - * - * @return - * Baudrate with given settings. - ******************************************************************************/ -uint32_t USART_BaudrateCalc(uint32_t refFreq, - uint32_t clkdiv, - bool syncmode, - USART_OVS_TypeDef ovs) -{ - uint32_t oversample; - uint64_t divisor; - uint64_t factor; - uint64_t remainder; - uint64_t quotient; - uint32_t br; - - /* Out of bound clkdiv ? */ - EFM_ASSERT(clkdiv <= CLKDIV_MASK); - - /* Mask out unused bits */ - clkdiv &= CLKDIV_MASK; - - /* We want to use integer division to avoid forcing in float division */ - /* utils, and yet keep rounding effect errors to a minimum. */ - - /* Baudrate calculation depends on if synchronous or asynchronous mode */ - if (syncmode) { - /* - * Baudrate is given by: - * - * br = fHFPERCLK/(2 * (1 + (CLKDIV / 256))) - * - * which can be rewritten to - * - * br = (128 * fHFPERCLK)/(256 + CLKDIV) - */ - oversample = 1; /* Not used in sync mode, ie 1 */ - factor = 128; - } else { - /* - * Baudrate in asynchronous mode is given by: - * - * br = fHFPERCLK/(oversample * (1 + (CLKDIV / 256))) - * - * which can be rewritten to - * - * br = (256 * fHFPERCLK)/(oversample * (256 + CLKDIV)) - * - * First of all we can reduce the 256 factor of the dividend with - * (part of) oversample part of the divisor. - */ - - switch (ovs) { - case usartOVS16: - oversample = 1; - factor = 256 / 16; - break; - - case usartOVS8: - oversample = 1; - factor = 256 / 8; - break; - - case usartOVS6: - oversample = 3; - factor = 256 / 2; - break; - - default: - oversample = 1; - factor = 256 / 4; - break; - } - } - - /* - * The basic problem with integer division in the above formula is that - * the dividend (factor * fHFPERCLK) may become larger than a 32 bit - * integer. Yet we want to evaluate dividend first before dividing in - * order to get as small rounding effects as possible. We do not want - * to make too harsh restrictions on max fHFPERCLK value either. - * - * For division a/b, we can write - * - * a = qb + r - * - * where q is the quotient and r is the remainder, both integers. - * - * The orignal baudrate formula can be rewritten as - * - * br = xa / b = x(qb + r)/b = xq + xr/b - * - * where x is 'factor', a is 'refFreq' and b is 'divisor', referring to - * variable names. - */ - - /* - * Divisor will never exceed max 32 bit value since - * clkdiv <= _USART_CLKDIV_DIV_MASK (currently 0x1FFFC0 or 0x7FFFF8) - * and 'oversample' has been reduced to <= 3. - */ - divisor = oversample * (256 + clkdiv); - - quotient = refFreq / divisor; - remainder = refFreq % divisor; - - /* factor <= 128 and since divisor >= 256, the below cannot exceed max */ - /* 32 bit value. However, factor * remainder can become larger than 32-bit */ - /* because of the size of _USART_CLKDIV_DIV_MASK on some families. */ - br = (uint32_t)(factor * quotient); - - /* - * factor <= 128 and remainder < (oversample*(256 + clkdiv)), which - * means dividend (factor * remainder) worst case is - * 128 * (3 * (256 + _USART_CLKDIV_DIV_MASK)) = 0x1_8001_7400. - */ - br += (uint32_t)((factor * remainder) / divisor); - - return br; -} - -/***************************************************************************//** - * @brief - * Get current baudrate for USART/UART. - * - * @details - * This function returns the actual baudrate (not considering oscillator - * inaccuracies) used by a USART/UART peripheral. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Current baudrate. - ******************************************************************************/ -uint32_t USART_BaudrateGet(USART_TypeDef *usart) -{ - uint32_t freq; - USART_OVS_TypeDef ovs; - bool syncmode; - - if (usart->CTRL & USART_CTRL_SYNC) { - syncmode = true; - } else { - syncmode = false; - } - - /* HFPERCLK used to clock all USART/UART peripheral modules */ - freq = CMU_ClockFreqGet(cmuClock_HFPER); - ovs = (USART_OVS_TypeDef)(usart->CTRL & _USART_CTRL_OVS_MASK); - return USART_BaudrateCalc(freq, usart->CLKDIV, syncmode, ovs); -} - -/***************************************************************************//** - * @brief - * Configure USART operating in synchronous mode to use a given baudrate - * (or as close as possible to specified baudrate). - * - * @details - * The configuration will be set to use a baudrate <= the specified baudrate - * in order to ensure that the baudrate does not exceed the specified value. - * - * Fractional clock division is suppressed, although the HW design allows it. - * It could cause half clock cycles to exceed specified limit, and thus - * potentially violate specifications for the slave device. In some special - * situations fractional clock division may be useful even in synchronous - * mode, but in those cases it must be directly adjusted, possibly assisted - * by USART_BaudrateCalc(): - * - * @param[in] usart - * Pointer to USART peripheral register block. (Cannot be used on UART - * modules.) - * - * @param[in] refFreq - * USART reference clock frequency in Hz that will be used. If set to 0, - * the currently configured reference clock is assumed. - * - * @param[in] baudrate - * Baudrate to try to achieve for USART. - ******************************************************************************/ -void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate) -{ - uint32_t clkdiv; - - /* Inhibit divide by 0 */ - EFM_ASSERT(baudrate); - - /* - * CLKDIV in synchronous mode is given by: - * - * CLKDIV = 256 * (fHFPERCLK/(2 * br) - 1) - */ - - /* HFPERCLK used to clock all USART/UART peripheral modules */ - if (!refFreq) { - refFreq = CMU_ClockFreqGet(cmuClock_HFPER); - } - - clkdiv = (refFreq - 1) / (2 * baudrate); - clkdiv = clkdiv << 8; - - /* Verify that resulting clock divider is within limits */ - EFM_ASSERT(!(clkdiv & ~CLKDIV_MASK)); - - usart->CLKDIV = clkdiv; -} - -/***************************************************************************//** - * @brief - * Enable/disable USART/UART receiver and/or transmitter. - * - * @details - * Notice that this function does not do any configuration. Enabling should - * normally be done after initialization is done (if not enabled as part - * of init). - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] enable - * Select status for receiver/transmitter. - ******************************************************************************/ -void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable) -{ - uint32_t tmp; - - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) - || USARTRF_REF_VALID(usart) - || UART_REF_VALID(usart) ); - - /* Disable as specified */ - tmp = ~((uint32_t) (enable)); - tmp &= _USART_CMD_RXEN_MASK | _USART_CMD_TXEN_MASK; - usart->CMD = tmp << 1; - - /* Enable as specified */ - usart->CMD = (uint32_t) (enable); -} - -/***************************************************************************//** - * @brief - * Init USART/UART for normal asynchronous mode. - * - * @details - * This function will configure basic settings in order to operate in normal - * asynchronous mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL register. - * - * Notice that pins used by the USART/UART module must be properly configured - * by the user explicitly, in order for the USART/UART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] init - * Pointer to initialization structure used to configure basic async setup. - ******************************************************************************/ -void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init) -{ - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) - || USARTRF_REF_VALID(usart) - || UART_REF_VALID(usart) ); - - /* Init USART registers to HW reset state. */ - USART_Reset(usart); - -#if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS) - /* Disable majority vote if specified. */ - if (init->mvdis) { - usart->CTRL |= USART_CTRL_MVDIS; - } - - /* Configure PRS input mode. */ - if (init->prsRxEnable) { - usart->INPUT = (uint32_t) init->prsRxCh | USART_INPUT_RXPRS; - } -#endif - - /* Configure databits, stopbits and parity */ - usart->FRAME = (uint32_t)init->databits - | (uint32_t)init->stopbits - | (uint32_t)init->parity; - - /* Configure baudrate */ - USART_BaudrateAsyncSet(usart, init->refFreq, init->baudrate, init->oversampling); - -#if defined(_USART_TIMING_CSHOLD_MASK) - usart->TIMING = ((init->autoCsHold << _USART_TIMING_CSHOLD_SHIFT) - & _USART_TIMING_CSHOLD_MASK) - | ((init->autoCsSetup << _USART_TIMING_CSSETUP_SHIFT) - & _USART_TIMING_CSSETUP_MASK); - if (init->autoCsEnable) { - usart->CTRL |= USART_CTRL_AUTOCS; - } -#endif - /* Finally enable (as specified) */ - usart->CMD = (uint32_t)init->enable; -} - -/***************************************************************************//** - * @brief - * Init USART for synchronous mode. - * - * @details - * This function will configure basic settings in order to operate in - * synchronous mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL register. - * - * Notice that pins used by the USART module must be properly configured - * by the user explicitly, in order for the USART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART peripheral register block. (UART does not support this - * mode.) - * - * @param[in] init - * Pointer to initialization structure used to configure basic async setup. - ******************************************************************************/ -void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init) -{ - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) || USARTRF_REF_VALID(usart) ); - - /* Init USART registers to HW reset state. */ - USART_Reset(usart); - - /* Set bits for synchronous mode */ - usart->CTRL |= (USART_CTRL_SYNC) - | (uint32_t)init->clockMode - | (init->msbf ? USART_CTRL_MSBF : 0); - -#if defined(_USART_CTRL_AUTOTX_MASK) - usart->CTRL |= init->autoTx ? USART_CTRL_AUTOTX : 0; -#endif - -#if defined(_USART_INPUT_RXPRS_MASK) - /* Configure PRS input mode. */ - if (init->prsRxEnable) { - usart->INPUT = (uint32_t)init->prsRxCh | USART_INPUT_RXPRS; - } -#endif - - /* Configure databits, leave stopbits and parity at reset default (not used) */ - usart->FRAME = (uint32_t)init->databits - | USART_FRAME_STOPBITS_DEFAULT - | USART_FRAME_PARITY_DEFAULT; - - /* Configure baudrate */ - USART_BaudrateSyncSet(usart, init->refFreq, init->baudrate); - - /* Finally enable (as specified) */ - if (init->master) { - usart->CMD = USART_CMD_MASTEREN; - } - -#if defined(_USART_TIMING_CSHOLD_MASK) - usart->TIMING = ((init->autoCsHold << _USART_TIMING_CSHOLD_SHIFT) - & _USART_TIMING_CSHOLD_MASK) - | ((init->autoCsSetup << _USART_TIMING_CSSETUP_SHIFT) - & _USART_TIMING_CSSETUP_MASK); - if (init->autoCsEnable) { - usart->CTRL |= USART_CTRL_AUTOCS; - } -#endif - - usart->CMD = (uint32_t)init->enable; -} - -/***************************************************************************//** - * @brief - * Init USART for asynchronous IrDA mode. - * - * @details - * This function will configure basic settings in order to operate in - * asynchronous IrDA mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL and IRCTRL - * registers. - * - * Notice that pins used by the USART/UART module must be properly configured - * by the user explicitly, in order for the USART/UART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART peripheral register block. - * - * @param[in] init - * Pointer to initialization structure used to configure async IrDA setup. - * - * @note - * Not all USART instances support IrDA. See the datasheet for your device. - * - ******************************************************************************/ -void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init) -{ - EFM_ASSERT(USART_IRDA_VALID(usart)); - - /* Init USART as async device */ - USART_InitAsync(usart, &(init->async)); - - /* Set IrDA modulation to RZI (return-to-zero-inverted) */ - usart->CTRL |= USART_CTRL_TXINV; - - /* Invert Rx signal before demodulator if enabled */ - if (init->irRxInv) { - usart->CTRL |= USART_CTRL_RXINV; - } - - /* Configure IrDA */ - usart->IRCTRL |= (uint32_t)init->irPw - | (uint32_t)init->irPrsSel - | ((uint32_t)init->irFilt << _USART_IRCTRL_IRFILT_SHIFT) - | ((uint32_t)init->irPrsEn << _USART_IRCTRL_IRPRSEN_SHIFT); - - /* Enable IrDA */ - usart->IRCTRL |= USART_IRCTRL_IREN; -} - -#if defined(_USART_I2SCTRL_MASK) -/***************************************************************************//** - * @brief - * Init USART for I2S mode. - * - * @details - * This function will configure basic settings in order to operate in I2S - * mode. - * - * Special control setup not covered by this function must be done after - * using this function by direct modification of the CTRL and I2SCTRL - * registers. - * - * Notice that pins used by the USART module must be properly configured - * by the user explicitly, in order for the USART to work as intended. - * (When configuring pins, one should remember to consider the sequence of - * configuration, in order to avoid unintended pulses/glitches on output - * pins.) - * - * @param[in] usart - * Pointer to USART peripheral register block. (UART does not support this - * mode.) - * - * @param[in] init - * Pointer to initialization structure used to configure basic I2S setup. - * - * @note - * This function does not apply to all USART's. Refer to chip manuals. - * - ******************************************************************************/ -void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init) -{ - USART_Enable_TypeDef enable; - - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_I2S_VALID(usart)); - - /* Override the enable setting. */ - enable = init->sync.enable; - init->sync.enable = usartDisable; - - /* Init USART as a sync device. */ - USART_InitSync(usart, &init->sync); - - /* Configure and enable I2CCTRL register acording to selected mode. */ - usart->I2SCTRL = (uint32_t)init->format - | (uint32_t)init->justify - | (init->delay ? USART_I2SCTRL_DELAY : 0) - | (init->dmaSplit ? USART_I2SCTRL_DMASPLIT : 0) - | (init->mono ? USART_I2SCTRL_MONO : 0) - | USART_I2SCTRL_EN; - - if (enable != usartDisable) { - USART_Enable(usart, enable); - } -} -#endif - -/***************************************************************************//** - * @brief - * Initialize automatic transmissions using PRS channel as trigger - * @note - * Initialize USART with USART_Init() before setting up PRS configuration - * - * @param[in] usart Pointer to USART to configure - * @param[in] init Pointer to initialization structure - ******************************************************************************/ -void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init) -{ - uint32_t trigctrl; - - /* Clear values that will be reconfigured */ - trigctrl = usart->TRIGCTRL & ~(_USART_TRIGCTRL_RXTEN_MASK - | _USART_TRIGCTRL_TXTEN_MASK -#if defined(USART_TRIGCTRL_AUTOTXTEN) - | _USART_TRIGCTRL_AUTOTXTEN_MASK -#endif - | _USART_TRIGCTRL_TSEL_MASK); - -#if defined(USART_TRIGCTRL_AUTOTXTEN) - if (init->autoTxTriggerEnable) { - trigctrl |= USART_TRIGCTRL_AUTOTXTEN; - } -#endif - if (init->txTriggerEnable) { - trigctrl |= USART_TRIGCTRL_TXTEN; - } - if (init->rxTriggerEnable) { - trigctrl |= USART_TRIGCTRL_RXTEN; - } - trigctrl |= init->prsTriggerChannel; - - /* Enable new configuration */ - usart->TRIGCTRL = trigctrl; -} - -/***************************************************************************//** - * @brief - * Reset USART/UART to same state as after a HW reset. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - ******************************************************************************/ -void USART_Reset(USART_TypeDef *usart) -{ - /* Make sure the module exists on the selected chip */ - EFM_ASSERT(USART_REF_VALID(usart) - || USARTRF_REF_VALID(usart) - || UART_REF_VALID(usart) ); - - /* Make sure disabled first, before resetting other registers */ - usart->CMD = USART_CMD_RXDIS | USART_CMD_TXDIS | USART_CMD_MASTERDIS - | USART_CMD_RXBLOCKDIS | USART_CMD_TXTRIDIS | USART_CMD_CLEARTX - | USART_CMD_CLEARRX; - usart->CTRL = _USART_CTRL_RESETVALUE; - usart->FRAME = _USART_FRAME_RESETVALUE; - usart->TRIGCTRL = _USART_TRIGCTRL_RESETVALUE; - usart->CLKDIV = _USART_CLKDIV_RESETVALUE; - usart->IEN = _USART_IEN_RESETVALUE; - usart->IFC = _USART_IFC_MASK; -#if defined(_USART_ROUTEPEN_MASK) || defined(_UART_ROUTEPEN_MASK) - usart->ROUTEPEN = _USART_ROUTEPEN_RESETVALUE; - usart->ROUTELOC0 = _USART_ROUTELOC0_RESETVALUE; - usart->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE; -#else - usart->ROUTE = _USART_ROUTE_RESETVALUE; -#endif - - if (USART_IRDA_VALID(usart)) { - usart->IRCTRL = _USART_IRCTRL_RESETVALUE; - } - -#if defined(_USART_INPUT_RESETVALUE) - usart->INPUT = _USART_INPUT_RESETVALUE; -#endif - -#if defined(_USART_I2SCTRL_RESETVALUE) - if (USART_I2S_VALID(usart)) { - usart->I2SCTRL = _USART_I2SCTRL_RESETVALUE; - } -#endif -} - -/***************************************************************************//** - * @brief - * Receive one 4-8 bit frame, (or part of 10-16 bit frame). - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 4-8 bits. Please refer to @ref USART_RxExt() for reception of - * 9 bit frames. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if the buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDataGet() to read the RXDATA - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint8_t USART_Rx(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXDATAV)) - ; - - return (uint8_t)usart->RXDATA; -} - -/***************************************************************************//** - * @brief - * Receive two 4-8 bit frames, or one 10-16 bit frame. - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 10-16 bits. Please refer to @ref USART_RxDoubleExt() for - * reception of two 9 bit frames. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDoubleGet() to read the RXDOUBLE - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint16_t USART_RxDouble(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXFULL)) - ; - - return (uint16_t)usart->RXDOUBLE; -} - -/***************************************************************************//** - * @brief - * Receive two 4-9 bit frames, or one 10-16 bit frame with extended - * information. - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 10-16 bits and additional RX status information is required. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDoubleXGet() to read the RXDOUBLEX - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint32_t USART_RxDoubleExt(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXFULL)) - ; - - return usart->RXDOUBLEX; -} - -/***************************************************************************//** - * @brief - * Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended - * information. - * - * @details - * This function is normally used to receive one frame when operating with - * frame length 4-9 bits and additional RX status information is required. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is empty, until data is received. - * Alternatively the user can explicitly check whether data is available, and - * if data is avaliable, call @ref USART_RxDataXGet() to read the RXDATAX - * register directly. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @return - * Data received. - ******************************************************************************/ -uint16_t USART_RxExt(USART_TypeDef *usart) -{ - while (!(usart->STATUS & USART_STATUS_RXDATAV)) - ; - - return (uint16_t)usart->RXDATAX; -} - -/***************************************************************************//** - * @brief - * Perform one 8 bit frame SPI transfer. - * - * @note - * This function will stall if the transmit buffer is full. When a transmit - * buffer becomes available, data is written and the function will wait until - * the data is fully transmitted. The SPI return value is then read out and - * returned. - * - * @param[in] usart - * Pointer to USART peripheral register block. - * - * @param[in] data - * Data to transmit. - * - * @return - * Data received. - ******************************************************************************/ -uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data) -{ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDATA = (uint32_t)data; - while (!(usart->STATUS & USART_STATUS_TXC)) - ; - return (uint8_t)usart->RXDATA; -} - -/***************************************************************************//** - * @brief - * Transmit one 4-9 bit frame. - * - * @details - * Depending on frame length configuration, 4-8 (least significant) bits from - * @p data are transmitted. If frame length is 9, 8 bits are transmitted from - * @p data and one bit as specified by CTRL register, BIT8DV field. Please - * refer to USART_TxExt() for transmitting 9 bit frame with full control of - * all 9 bits. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit. See details above for further info. - ******************************************************************************/ -void USART_Tx(USART_TypeDef *usart, uint8_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDATA = (uint32_t)data; -} - -/***************************************************************************//** - * @brief - * Transmit two 4-9 bit frames, or one 10-16 bit frame. - * - * @details - * Depending on frame length configuration, 4-8 (least significant) bits from - * each byte in @p data are transmitted. If frame length is 9, 8 bits are - * transmitted from each byte in @p data adding one bit as specified by CTRL - * register, BIT8DV field, to each byte. Please refer to USART_TxDoubleExt() - * for transmitting two 9 bit frames with full control of all 9 bits. - * - * If frame length is 10-16, 10-16 (least significant) bits from @p data - * are transmitted. - * - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit, the least significant byte holds the frame transmitted - * first. See details above for further info. - ******************************************************************************/ -void USART_TxDouble(USART_TypeDef *usart, uint16_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDOUBLE = (uint32_t)data; -} - -/***************************************************************************//** - * @brief - * Transmit two 4-9 bit frames, or one 10-16 bit frame with extended control. - * - * @details - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit with extended control. Contains two 16 bit words - * concatenated. Least significant word holds frame transitted first. If frame - * length is 4-9, two frames with 4-9 least significant bits from each 16 bit - * word are transmitted. - * @par - * If frame length is 10-16 bits, 8 data bits are taken from the least - * significant 16 bit word, and the remaining bits from the other 16 bit word. - * @par - * Additional control bits are available as documented in the reference - * manual (set to 0 if not used). For 10-16 bit frame length, these control - * bits are taken from the most significant 16 bit word. - ******************************************************************************/ -void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDOUBLEX = data; -} - -/***************************************************************************//** - * @brief - * Transmit one 4-9 bit frame with extended control. - * - * @details - * Notice that possible parity/stop bits in asynchronous mode are not - * considered part of specified frame bit length. - * - * @note - * This function will stall if buffer is full, until buffer becomes available. - * - * @param[in] usart - * Pointer to USART/UART peripheral register block. - * - * @param[in] data - * Data to transmit with extended control. Least significant bits contains - * frame bits, and additional control bits are available as documented in - * the reference manual (set to 0 if not used). - ******************************************************************************/ -void USART_TxExt(USART_TypeDef *usart, uint16_t data) -{ - /* Check that transmit buffer is empty */ - while (!(usart->STATUS & USART_STATUS_TXBL)) - ; - usart->TXDATAX = (uint32_t)data; -} - -/** @} (end addtogroup USART) */ -/** @} (end addtogroup emlib) */ -#endif /* defined(USART_COUNT) && (USART_COUNT > 0) */ diff --git a/targets/efm32boot/inc/app.h b/targets/efm32boot/inc/app.h deleted file mode 100644 index 0419502..0000000 --- a/targets/efm32boot/inc/app.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * app.h - * - * Created on: Jun 26, 2018 - * Author: conor - */ - -#ifndef SRC_APP_H_ -#define SRC_APP_H_ - -#include - -#define IS_BOOTLOADER - -#define DEBUG_LEVEL 0 - -//#define PRINTING_USE_VCOM - -//#define USING_DEV_BOARD - -#define BRIDGE_TO_WALLET - -#define JUMP_LOC 0x4000 - -#ifdef USING_DEV_BOARD -#define PUSH_BUTTON gpioPortF,6 -#else -#define PUSH_BUTTON gpioPortD,13 -#endif - -//#define DISABLE_CTAPHID_PING -#define DISABLE_CTAPHID_WINK -#define DISABLE_CTAPHID_CBOR - -void printing_init(); - -int bootloader_bridge(uint8_t klen, uint8_t * keyh); - -int is_authorized_to_boot(); - -#define LED_INIT_VALUE 0x101000 - -extern uint8_t REBOOT_FLAG; - -#endif /* SRC_APP_H_ */ diff --git a/targets/efm32boot/src/boot.c b/targets/efm32boot/src/boot.c deleted file mode 100644 index 79aab6e..0000000 --- a/targets/efm32boot/src/boot.c +++ /dev/null @@ -1,98 +0,0 @@ -/**************************************************************************//** - * @file boot.c - * @brief Functions for booting another application - * @author Silicon Labs - * @version 1.03 - ****************************************************************************** - * @section License - * (C) Copyright 2014 Silicon Labs, http://www.silabs.com - ******************************************************************************* - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no - * obligation to support this Software. Silicon Labs is providing the - * Software "AS IS", with no express or implied warranties of any kind, - * including, but not limited to, any implied warranties of merchantability - * or fitness for any particular purpose or warranties against infringement - * of any proprietary rights of a third party. - * - * Silicon Labs will not be liable for any consequential, incidental, or - * special damages, or any other relief, or for any claim by any third party, - * arising from your use of this Software. - * - ******************************************************************************/ - -#include "em_device.h" -#include "em_gpio.h" -#include "em_cmu.h" -#include "app.h" - - -/****************************************************************************** - * This function sets up the Cortex-M3 with a new SP and PC. - *****************************************************************************/ -#if defined ( __CC_ARM ) -__asm void BOOT_jump(uint32_t sp, uint32_t pc) -{ - /* Set new MSP, PSP based on SP (r0)*/ - msr msp, r0 - msr psp, r0 - - /* Jump to PC (r1)*/ - bx r1 -} -#else -void __attribute__((optimize("O0"))) BOOT_jump(uint32_t sp, uint32_t pc) -{ - (void) sp; - (void) pc; - /* Set new MSP, PSP based on SP (r0)*/ - __asm("msr msp, r0"); - __asm("msr psp, r0"); - - /* Jump to PC (r1)*/ - __asm("mov pc, r1"); -} -#endif - - -/* Resets any peripherals that have been in use by - * the bootloader before booting the appliation */ -static void resetPeripherals(void) -{ - -} - - - -/****************************************************************************** - * Boots the firmware. This function will activate the vector table - * of the firmware application and set the PC and SP from this table. - *****************************************************************************/ -void __attribute__((optimize("O0"))) BOOT_boot(void) -{ - uint32_t pc, sp; - - uint32_t *bootAddress = (uint32_t *)(JUMP_LOC); - - resetPeripherals(); - - /* Set new vector table */ - SCB->VTOR = (uint32_t)bootAddress; - - /* Read new SP and PC from vector table */ - sp = bootAddress[0]; - pc = bootAddress[1]; - - /* Do a jump by loading the PC and SP into the CPU registers */ - BOOT_jump(sp, pc); -} diff --git a/targets/efm32boot/src/crypto.c b/targets/efm32boot/src/crypto.c deleted file mode 100644 index 0ad3e8e..0000000 --- a/targets/efm32boot/src/crypto.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * Wrapper for crypto implementation on device - * - * */ -#include -#include -#include - - - -#include "util.h" -#include "crypto.h" - -#ifdef USE_SOFTWARE_IMPLEMENTATION - -#include "sha256.h" -#include "uECC.h" -#include "aes.h" -#include "ctap.h" -#include "device.h" -#include "app.h" -#include "log.h" - -#if defined(USING_PC) || defined(IS_BOOTLOADER) -typedef enum -{ - MBEDTLS_ECP_DP_NONE = 0, - MBEDTLS_ECP_DP_SECP192R1, /*!< 192-bits NIST curve */ - MBEDTLS_ECP_DP_SECP224R1, /*!< 224-bits NIST curve */ - MBEDTLS_ECP_DP_SECP256R1, /*!< 256-bits NIST curve */ - MBEDTLS_ECP_DP_SECP384R1, /*!< 384-bits NIST curve */ - MBEDTLS_ECP_DP_SECP521R1, /*!< 521-bits NIST curve */ - MBEDTLS_ECP_DP_BP256R1, /*!< 256-bits Brainpool curve */ - MBEDTLS_ECP_DP_BP384R1, /*!< 384-bits Brainpool curve */ - MBEDTLS_ECP_DP_BP512R1, /*!< 512-bits Brainpool curve */ - MBEDTLS_ECP_DP_CURVE25519, /*!< Curve25519 */ - MBEDTLS_ECP_DP_SECP192K1, /*!< 192-bits "Koblitz" curve */ - MBEDTLS_ECP_DP_SECP224K1, /*!< 224-bits "Koblitz" curve */ - MBEDTLS_ECP_DP_SECP256K1, /*!< 256-bits "Koblitz" curve */ -} mbedtls_ecp_group_id; -#endif - - -const uint8_t attestation_cert_der[]; -const uint16_t attestation_cert_der_size; -const uint8_t attestation_key[]; -const uint16_t attestation_key_size; - - - -static SHA256_CTX sha256_ctx; -static const struct uECC_Curve_t * _es256_curve = NULL; -static const uint8_t * _signing_key = NULL; -static int _key_len = 0; - -// Secrets for testing only -static uint8_t master_secret[32] = "\x00\x11\x22\x33\x44\x55\x66\x77\x88\x99\xaa\xbb\xcc\xdd\xee\xff" - "\xff\xee\xdd\xcc\xbb\xaa\x99\x88\x77\x66\x55\x44\x33\x22\x11\x00"; - -static uint8_t transport_secret[32] = "\x10\x01\x22\x33\x44\x55\x66\x77\x87\x90\x0a\xbb\x3c\xd8\xee\xff" - "\xff\xee\x8d\x1c\x3b\xfa\x99\x88\x77\x86\x55\x44\xd3\xff\x33\x00"; - - - -void crypto_sha256_init() -{ - sha256_init(&sha256_ctx); -} - -void crypto_reset_master_secret() -{ - ctap_generate_rng(master_secret, 32); -} - - -void crypto_sha256_update(uint8_t * data, size_t len) -{ - sha256_update(&sha256_ctx, data, len); -} - -void crypto_sha256_update_secret() -{ - sha256_update(&sha256_ctx, master_secret, 32); -} - -void crypto_sha256_final(uint8_t * hash) -{ - sha256_final(&sha256_ctx, hash); -} - -void crypto_sha256_hmac_init(uint8_t * key, uint32_t klen, uint8_t * hmac) -{ - uint8_t buf[64]; - int i; - memset(buf, 0, sizeof(buf)); - - if (key == CRYPTO_MASTER_KEY) - { - key = master_secret; - klen = sizeof(master_secret); - } - - if(klen > 64) - { - printf2(TAG_ERR,"Error, key size must be <= 64\n"); - exit(1); - } - - memmove(buf, key, klen); - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = buf[i] ^ 0x36; - } - - crypto_sha256_init(); - crypto_sha256_update(buf, 64); -} - -void crypto_sha256_hmac_final(uint8_t * key, uint32_t klen, uint8_t * hmac) -{ - uint8_t buf[64]; - int i; - crypto_sha256_final(hmac); - memset(buf, 0, sizeof(buf)); - if (key == CRYPTO_MASTER_KEY) - { - key = master_secret; - klen = sizeof(master_secret); - } - - - if(klen > 64) - { - printf2(TAG_ERR,"Error, key size must be <= 64\n"); - exit(1); - } - memmove(buf, key, klen); - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = buf[i] ^ 0x5c; - } - - crypto_sha256_init(); - crypto_sha256_update(buf, 64); - crypto_sha256_update(hmac, 32); - crypto_sha256_final(hmac); -} - - -void crypto_ecc256_init() -{ - uECC_set_rng((uECC_RNG_Function)ctap_generate_rng); - _es256_curve = uECC_secp256r1(); -} - - -void crypto_ecc256_load_attestation_key() -{ - _signing_key = attestation_key; - _key_len = 32; -} - -void crypto_ecc256_sign(uint8_t * data, int len, uint8_t * sig) -{ - if ( uECC_sign(_signing_key, data, len, sig, _es256_curve) == 0) - { - printf2(TAG_ERR,"error, uECC failed\n"); - exit(1); - } -} - -void crypto_ecc256_load_key(uint8_t * data, int len, uint8_t * data2, int len2) -{ - static uint8_t privkey[32]; - generate_private_key(data,len,data2,len2,privkey); - _signing_key = privkey; - _key_len = 32; -} - -void crypto_ecdsa_sign(uint8_t * data, int len, uint8_t * sig, int MBEDTLS_ECP_ID) -{ - - const struct uECC_Curve_t * curve = NULL; - - switch(MBEDTLS_ECP_ID) - { - case MBEDTLS_ECP_DP_SECP256R1: - curve = uECC_secp256r1(); - if (_key_len != 32) goto fail; - break; - default: - printf2(TAG_ERR,"error, invalid ECDSA alg specifier\n"); - exit(1); - } - - if ( uECC_sign(_signing_key, data, len, sig, curve) == 0) - { - printf2(TAG_ERR,"error, uECC failed\n"); - exit(1); - } - return; - -fail: - printf2(TAG_ERR,"error, invalid key length\n"); - exit(1); - -} - -void generate_private_key(uint8_t * data, int len, uint8_t * data2, int len2, uint8_t * privkey) -{ - crypto_sha256_hmac_init(CRYPTO_MASTER_KEY, 0, privkey); - crypto_sha256_update(data, len); - crypto_sha256_update(data2, len2); - crypto_sha256_update(master_secret, 32); - crypto_sha256_hmac_final(CRYPTO_MASTER_KEY, 0, privkey); -} - - -/*int uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, uECC_Curve curve);*/ -void crypto_ecc256_derive_public_key(uint8_t * data, int len, uint8_t * x, uint8_t * y) -{ - uint8_t privkey[32]; - uint8_t pubkey[64]; - - generate_private_key(data,len,NULL,0,privkey); - - memset(pubkey,0,sizeof(pubkey)); - uECC_compute_public_key(privkey, pubkey, _es256_curve); - memmove(x,pubkey,32); - memmove(y,pubkey+32,32); -} - -void crypto_load_external_key(uint8_t * key, int len) -{ - _signing_key = key; - _key_len = len; -} - - -void crypto_ecc256_make_key_pair(uint8_t * pubkey, uint8_t * privkey) -{ - if (uECC_make_key(pubkey, privkey, _es256_curve) != 1) - { - printf2(TAG_ERR,"Error, uECC_make_key failed\n"); - exit(1); - } -} - -void crypto_ecc256_shared_secret(const uint8_t * pubkey, const uint8_t * privkey, uint8_t * shared_secret) -{ - if (uECC_shared_secret(pubkey, privkey, shared_secret, _es256_curve) != 1) - { - printf2(TAG_ERR,"Error, uECC_shared_secret failed\n"); - exit(1); - } - -} - -struct AES_ctx aes_ctx; -void crypto_aes256_init(uint8_t * key, uint8_t * nonce) -{ - if (key == CRYPTO_TRANSPORT_KEY) - { - AES_init_ctx(&aes_ctx, transport_secret); - } - else - { - AES_init_ctx(&aes_ctx, key); - } - if (nonce == NULL) - { - memset(aes_ctx.Iv, 0, 16); - } - else - { - memmove(aes_ctx.Iv, nonce, 16); - } -} - -// prevent round key recomputation -void crypto_aes256_reset_iv(uint8_t * nonce) -{ - if (nonce == NULL) - { - memset(aes_ctx.Iv, 0, 16); - } - else - { - memmove(aes_ctx.Iv, nonce, 16); - } -} - -void crypto_aes256_decrypt(uint8_t * buf, int length) -{ - AES_CBC_decrypt_buffer(&aes_ctx, buf, length); -} - -void crypto_aes256_encrypt(uint8_t * buf, int length) -{ - AES_CBC_encrypt_buffer(&aes_ctx, buf, length); -} - - -const uint8_t attestation_cert_der[] = -"\x30\x82\x01\xfb\x30\x82\x01\xa1\xa0\x03\x02\x01\x02\x02\x01\x00\x30\x0a\x06\x08" -"\x2a\x86\x48\xce\x3d\x04\x03\x02\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13" -"\x02\x55\x53\x31\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x10\x30\x0e" -"\x06\x03\x55\x04\x0a\x0c\x07\x54\x45\x53\x54\x20\x43\x41\x30\x20\x17\x0d\x31\x38" -"\x30\x35\x31\x30\x30\x33\x30\x36\x32\x30\x5a\x18\x0f\x32\x30\x36\x38\x30\x34\x32" -"\x37\x30\x33\x30\x36\x32\x30\x5a\x30\x7c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13" -"\x02\x55\x53\x31\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x0f\x30\x0d" -"\x06\x03\x55\x04\x07\x0c\x06\x4c\x61\x75\x72\x65\x6c\x31\x15\x30\x13\x06\x03\x55" -"\x04\x0a\x0c\x0c\x54\x45\x53\x54\x20\x43\x4f\x4d\x50\x41\x4e\x59\x31\x22\x30\x20" -"\x06\x03\x55\x04\x0b\x0c\x19\x41\x75\x74\x68\x65\x6e\x74\x69\x63\x61\x74\x6f\x72" -"\x20\x41\x74\x74\x65\x73\x74\x61\x74\x69\x6f\x6e\x31\x14\x30\x12\x06\x03\x55\x04" -"\x03\x0c\x0b\x63\x6f\x6e\x6f\x72\x70\x70\x2e\x63\x6f\x6d\x30\x59\x30\x13\x06\x07" -"\x2a\x86\x48\xce\x3d\x02\x01\x06\x08\x2a\x86\x48\xce\x3d\x03\x01\x07\x03\x42\x00" -"\x04\x45\xa9\x02\xc1\x2e\x9c\x0a\x33\xfa\x3e\x84\x50\x4a\xb8\x02\xdc\x4d\xb9\xaf" -"\x15\xb1\xb6\x3a\xea\x8d\x3f\x03\x03\x55\x65\x7d\x70\x3f\xb4\x02\xa4\x97\xf4\x83" -"\xb8\xa6\xf9\x3c\xd0\x18\xad\x92\x0c\xb7\x8a\x5a\x3e\x14\x48\x92\xef\x08\xf8\xca" -"\xea\xfb\x32\xab\x20\xa3\x62\x30\x60\x30\x46\x06\x03\x55\x1d\x23\x04\x3f\x30\x3d" -"\xa1\x30\xa4\x2e\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13\x02\x55\x53\x31" -"\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x10\x30\x0e\x06\x03\x55\x04" -"\x0a\x0c\x07\x54\x45\x53\x54\x20\x43\x41\x82\x09\x00\xf7\xc9\xec\x89\xf2\x63\x94" -"\xd9\x30\x09\x06\x03\x55\x1d\x13\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04" -"\x04\x03\x02\x04\xf0\x30\x0a\x06\x08\x2a\x86\x48\xce\x3d\x04\x03\x02\x03\x48\x00" -"\x30\x45\x02\x20\x18\x38\xb0\x45\x03\x69\xaa\xa7\xb7\x38\x62\x01\xaf\x24\x97\x5e" -"\x7e\x74\x64\x1b\xa3\x7b\xf7\xe6\xd3\xaf\x79\x28\xdb\xdc\xa5\x88\x02\x21\x00\xcd" -"\x06\xf1\xe3\xab\x16\x21\x8e\xd8\xc0\x14\xaf\x09\x4f\x5b\x73\xef\x5e\x9e\x4b\xe7" -"\x35\xeb\xdd\x9b\x6d\x8f\x7d\xf3\xc4\x3a\xd7"; - - -const uint16_t attestation_cert_der_size = sizeof(attestation_cert_der)-1; - - -const uint8_t attestation_key[] = "\xcd\x67\xaa\x31\x0d\x09\x1e\xd1\x6e\x7e\x98\x92\xaa\x07\x0e\x19\x94\xfc\xd7\x14\xae\x7c\x40\x8f\xb9\x46\xb7\x2e\x5f\xe7\x5d\x30"; -const uint16_t attestation_key_size = sizeof(attestation_key)-1; - - -#else -#error "No crypto implementation defined" -#endif - - diff --git a/targets/efm32boot/src/main.c b/targets/efm32boot/src/main.c deleted file mode 100644 index 17ab419..0000000 --- a/targets/efm32boot/src/main.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include "em_device.h" -#include "em_chip.h" -#include "em_timer.h" - -#include "device.h" -#include "app.h" -#include "u2f.h" -#include "log.h" -#include "InitDevice.h" - -void bootloader_init(void); -uint8_t REBOOT_FLAG; - -int main(void) -{ - int count = 0; - uint32_t t1 = 0; - uint32_t t2 = 0; - uint32_t accum = 0; - uint32_t dt = 0; - uint8_t hidmsg[64]; - /* Chip errata */ - CHIP_Init(); - - EMU_enter_DefaultMode_from_RESET(); - CMU_enter_DefaultMode_from_RESET(); - // ADC0_enter_DefaultMode_from_RESET(); - USART0_enter_DefaultMode_from_RESET(); - USART1_enter_DefaultMode_from_RESET(); - // LDMA_enter_DefaultMode_from_RESET(); - CRYOTIMER_enter_DefaultMode_from_RESET(); - PORTIO_enter_DefaultMode_from_RESET(); - - bootloader_init(); - - set_logging_mask( - /*0*/ - TAG_GEN| - /*TAG_MC |*/ - /*TAG_GA |*/ - /*TAG_WALLET |*/ - TAG_STOR | - /*TAG_CP |*/ -// TAG_CTAP| - /*TAG_HID|*/ - /*TAG_U2F|*/ - /*TAG_PARSE |*/ -// TAG_TIME| - /*TAG_DUMP|*/ - /*TAG_GREEN|*/ - /*TAG_RED|*/ - TAG_ERR - ); - - printf1(TAG_GEN,"Bootloader init\r\n"); - - if (GPIO_PinInGet(PUSH_BUTTON) == 0) - { - t1 = millis(); - while(GPIO_PinInGet(PUSH_BUTTON) == 0 && (millis() - t1) < 2000) - ; - if (GPIO_PinInGet(PUSH_BUTTON) == 0) { -bootmode: - printf1(TAG_GEN,"Reflash condition detected\n"); - ctaphid_init(); - reset_efm8(); - TIMER0_enter_DefaultMode_from_RESET(); - TIMER_TopSet(TIMER0, 255); - - RGB(LED_INIT_VALUE); - - /* Infinite loop */ - int count = 0; - while (1) { - if (millis() - t1 > 10) - { - /*printf("heartbeat %ld\n", beat++);*/ - heartbeat(); - t1 = millis(); - } - - if (usbhid_recv(hidmsg) > 0) - { - /*printf("%d>> ",count++); dump_hex1(TAG_DUMP, hidmsg,sizeof(hidmsg));*/ - // t2 = millis(); - ctaphid_handle_packet(hidmsg); - // accum += millis() - t2; - // printf("accum: %d\n", (uint32_t)accum); - // printf("dt: %d\n", t2 - dt); - // dt = t2; -// memset(hidmsg, 0, sizeof(hidmsg)); - } - else - { - /*main_loop_delay();*/ - } - ctaphid_check_timeouts(); - - if (REBOOT_FLAG) break; - } - -// delay(100); - - } - } - - printf1(TAG_GEN,"Normal boot\n"); - - if (is_authorized_to_boot() ) - { - BOOT_boot(); - } else { - printf1(TAG_GEN,"Warning: not authorized to boot\n"); - goto bootmode; - } - -} diff --git a/targets/efm8/.cproject b/targets/efm8/.cproject deleted file mode 100644 index 3561848..0000000 --- a/targets/efm8/.cproject +++ /dev/null @@ -1,195 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/targets/efm8/.project b/targets/efm8/.project deleted file mode 100644 index f26a120..0000000 --- a/targets/efm8/.project +++ /dev/null @@ -1,27 +0,0 @@ - - - efm8 - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - com.silabs.ss.framework.ide.project.sls.core.SLSProjectNature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - diff --git a/targets/efm8/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs b/targets/efm8/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs deleted file mode 100644 index b4554b4..0000000 --- a/targets/efm8/.settings/com.silabs.ss.framework.ide.project.sls.core.prefs +++ /dev/null @@ -1,2 +0,0 @@ -copiedFilesOriginState={} -eclipse.preferences.version=1 diff --git a/targets/efm8/.settings/org.eclipse.cdt.codan.core.prefs b/targets/efm8/.settings/org.eclipse.cdt.codan.core.prefs deleted file mode 100644 index 2ead633..0000000 --- a/targets/efm8/.settings/org.eclipse.cdt.codan.core.prefs +++ /dev/null @@ -1,71 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.cdt.codan.checkers.errnoreturn=Warning -org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},implicit\=>false} -org.eclipse.cdt.codan.checkers.errreturnvalue=Error -org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.checkers.nocommentinside=-Error -org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.checkers.nolinecomment=-Error -org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.checkers.noreturn=Error -org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},implicit\=>false} -org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation=Error -org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem=Error -org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem=Warning -org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem=Warning -org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},no_break_comment\=>"no break",last_case_param\=>false,empty_case_param\=>false} -org.eclipse.cdt.codan.internal.checkers.CatchByReference=Warning -org.eclipse.cdt.codan.internal.checkers.CatchByReference.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},unknown\=>false,exceptions\=>()} -org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem=Error -org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization=Warning -org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},skip\=>true} -org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem=Error -org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem=Error -org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.InvalidArguments=Error -org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem=Error -org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem=Error -org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem=Error -org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem=Error -org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker=-Info -org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},pattern\=>"^[a-z]",macro\=>true,exceptions\=>()} -org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem=Warning -org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.OverloadProblem=Error -org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem=Error -org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem=Error -org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem=-Warning -org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem=-Warning -org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem=Warning -org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},macro\=>true,exceptions\=>()} -org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem=Warning -org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},paramNot\=>false} -org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem=Warning -org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},else\=>false,afterelse\=>false} -org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem=Error -org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem=Warning -org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},macro\=>true} -org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem=Warning -org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},macro\=>true} -org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem=Warning -org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},macro\=>true,exceptions\=>("@(\#)","$Id")} -org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem=Error -org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true}} -useParentScope=false diff --git a/targets/efm8/.settings/org.eclipse.ltk.core.refactoring.prefs b/targets/efm8/.settings/org.eclipse.ltk.core.refactoring.prefs deleted file mode 100644 index b196c64..0000000 --- a/targets/efm8/.settings/org.eclipse.ltk.core.refactoring.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false diff --git a/targets/efm8/efm8.hwconf b/targets/efm8/efm8.hwconf deleted file mode 100644 index cc9a2f6..0000000 --- a/targets/efm8/efm8.hwconf +++ /dev/null @@ -1,117 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/targets/efm8/inc/InitDevice.h b/targets/efm8/inc/InitDevice.h deleted file mode 100644 index a326614..0000000 --- a/targets/efm8/inc/InitDevice.h +++ /dev/null @@ -1,37 +0,0 @@ -//========================================================= -// inc/InitDevice.h: generated by Hardware Configurator -// -// This file will be regenerated when saving a document. -// leave the sections inside the "$[...]" comment tags alone -// or they will be overwritten! -//========================================================= -#ifndef __INIT_DEVICE_H__ -#define __INIT_DEVICE_H__ - -// USER CONSTANTS -// USER PROTOTYPES - -// $[Mode Transition Prototypes] -extern void enter_DefaultMode_from_RESET(void); -// [Mode Transition Prototypes]$ - -// $[Config(Per-Module Mode)Transition Prototypes] -extern void WDT_0_enter_DefaultMode_from_RESET(void); -extern void PORTS_0_enter_DefaultMode_from_RESET(void); -extern void PORTS_1_enter_DefaultMode_from_RESET(void); -extern void PBCFG_0_enter_DefaultMode_from_RESET(void); -extern void LFOSC_0_enter_DefaultMode_from_RESET(void); -extern void CIP51_0_enter_DefaultMode_from_RESET(void); -extern void CLOCK_0_enter_DefaultMode_from_RESET(void); -extern void TIMER01_0_enter_DefaultMode_from_RESET(void); -extern void TIMER16_2_enter_DefaultMode_from_RESET(void); -extern void TIMER16_3_enter_DefaultMode_from_RESET(void); -extern void TIMER_SETUP_0_enter_DefaultMode_from_RESET(void); -extern void SPI_0_enter_DefaultMode_from_RESET(void); -extern void UART_0_enter_DefaultMode_from_RESET(void); -extern void INTERRUPT_0_enter_DefaultMode_from_RESET(void); -extern void USBLIB_0_enter_DefaultMode_from_RESET(void); -// [Config(Per-Module Mode)Transition Prototypes]$ - -#endif - diff --git a/targets/efm8/inc/app.h b/targets/efm8/inc/app.h deleted file mode 100644 index 3cbd530..0000000 --- a/targets/efm8/inc/app.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * app.h - * - * Created on: Jun 25, 2018 - * Author: conor - */ - -#ifndef INC_APP_H_ -#define INC_APP_H_ - -#define USE_PRINTING - -void usb_transfer_complete(); -void spi_transfer_complete(); - - - -#define INPUT_ENDPOINT EP2OUT -#define OUTPUT_ENDPOINT EP3IN - -#define INPUT_ENDPOINT_NUM 0x83 -#define OUTPUT_ENDPOINT_NUM 0x02 - -//#define INPUT_ENDPOINT EP1OUT -//#define OUTPUT_ENDPOINT EP1IN -// -//#define INPUT_ENDPOINT_NUM 0x81 -//#define OUTPUT_ENDPOINT_NUM 0x01 - - -void delay(int ms); - -#endif /* INC_APP_H_ */ diff --git a/targets/efm8/inc/config/usbconfig.h b/targets/efm8/inc/config/usbconfig.h deleted file mode 100644 index 148a510..0000000 --- a/targets/efm8/inc/config/usbconfig.h +++ /dev/null @@ -1,157 +0,0 @@ -/******************************************************************************* - * @file usbconfig.h - * @brief USB protocol stack library, application supplied configuration options. - *******************************************************************************/ - -//============================================================================= -// inc/config/usbconfig.h: generated by Hardware Configurator -// -// This file will be regenerated when saving a document. leave the sections -// inside the "$[...]" comment tags alone or they will be overwritten! -//============================================================================= -#ifndef __SILICON_LABS_USBCONFIG_H -#define __SILICON_LABS_USBCONFIG_H - -// ----------------------------------------------------------------------------- -// Specify bus- or self-powered -// ----------------------------------------------------------------------------- -// $[Device Power] -#define SLAB_USB_BUS_POWERED 1 -// [Device Power]$ - -// ----------------------------------------------------------------------------- -// Specify USB speed -// ----------------------------------------------------------------------------- -// $[USB Speed] -#define SLAB_USB_FULL_SPEED 1 -// [USB Speed]$ - -// ----------------------------------------------------------------------------- -// Enable or disable the clock recovery -// ----------------------------------------------------------------------------- -// $[Clock Recovery] -#define SLAB_USB_CLOCK_RECOVERY_ENABLED 1 -// [Clock Recovery]$ - -// ----------------------------------------------------------------------------- -// Enable or disable remote wakeup -// ----------------------------------------------------------------------------- -// $[Remote Wake-up] -#define SLAB_USB_REMOTE_WAKEUP_ENABLED 0 -// [Remote Wake-up]$ - -// ----------------------------------------------------------------------------- -// Specify number of interfaces and whether any interfaces support alternate -// settings -// ----------------------------------------------------------------------------- -// $[Number of Interfaces] -#define SLAB_USB_NUM_INTERFACES 1 -#define SLAB_USB_SUPPORT_ALT_INTERFACES 0 -// [Number of Interfaces]$ - -// ----------------------------------------------------------------------------- -// Enable or disable each endpoint -// ----------------------------------------------------------------------------- -// $[Endpoints Used] -#define SLAB_USB_EP1IN_USED 0 -#define SLAB_USB_EP1OUT_USED 0 -#define SLAB_USB_EP2IN_USED 0 -#define SLAB_USB_EP2OUT_USED 1 -#define SLAB_USB_EP3IN_USED 1 -#define SLAB_USB_EP3OUT_USED 0 -// [Endpoints Used]$ - -// ----------------------------------------------------------------------------- -// Specify maximum packet size for each endpoint -// ----------------------------------------------------------------------------- -// $[Endpoint Max Packet Size] -#define SLAB_USB_EP1IN_MAX_PACKET_SIZE 64 -#define SLAB_USB_EP1OUT_MAX_PACKET_SIZE 64 -#define SLAB_USB_EP2IN_MAX_PACKET_SIZE 64 -#define SLAB_USB_EP2OUT_MAX_PACKET_SIZE 64 -#define SLAB_USB_EP3IN_MAX_PACKET_SIZE 64 -#define SLAB_USB_EP3OUT_MAX_PACKET_SIZE 1 -// [Endpoint Max Packet Size]$ - -// ----------------------------------------------------------------------------- -// Specify transfer type of each endpoint -// ----------------------------------------------------------------------------- -// $[Endpoint Transfer Type] -#define SLAB_USB_EP1IN_TRANSFER_TYPE USB_EPTYPE_INTR -#define SLAB_USB_EP1OUT_TRANSFER_TYPE USB_EPTYPE_INTR -#define SLAB_USB_EP2IN_TRANSFER_TYPE USB_EPTYPE_INTR -#define SLAB_USB_EP2OUT_TRANSFER_TYPE USB_EPTYPE_INTR -#define SLAB_USB_EP3IN_TRANSFER_TYPE USB_EPTYPE_INTR -#define SLAB_USB_EP3OUT_TRANSFER_TYPE USB_EPTYPE_ISOC -// [Endpoint Transfer Type]$ - -// ----------------------------------------------------------------------------- -// Enable or disable callback functions -// ----------------------------------------------------------------------------- -// $[Callback Functions] -#define SLAB_USB_HANDLER_CB 0 -#define SLAB_USB_IS_SELF_POWERED_CB 1 -#define SLAB_USB_RESET_CB 1 -#define SLAB_USB_SETUP_CMD_CB 1 -#define SLAB_USB_SOF_CB 0 -#define SLAB_USB_STATE_CHANGE_CB 1 -// [Callback Functions]$ - -// ----------------------------------------------------------------------------- -// Specify number of languages supported by string descriptors. -// ----------------------------------------------------------------------------- -// $[Number of Languages] -#define SLAB_USB_NUM_LANGUAGES 1 -// [Number of Languages]$ - -// ----------------------------------------------------------------------------- -// If only one descriptor language is supported, specify that language here. -// If multiple descriptor languages are supported, this value is ignored and -// the supported languages must listed in the -// myUsbStringTableLanguageIDsDescriptor structure. -// ----------------------------------------------------------------------------- -// $[USB Language] -#define SLAB_USB_LANGUAGE USB_LANGID_ENUS -// [USB Language]$ - -// ----------------------------------------------------------------------------- -// -// Set the power saving mode -// -// SLAB_USB_PWRSAVE_MODE configures when the device will automatically enter -// the USB power-save mode. It is a bitmask constant with bit values: -// USB_PWRSAVE_MODE_OFF - No energy saving mode selected -// USB_PWRSAVE_MODE_ONSUSPEND - Enter USB power-save mode on USB suspend -// USB_PWRSAVE_MODE_ONVBUSOFF - Enter USB power-save mode when not attached -// to the USB host. -// USB_PWRSAVE_MODE_FASTWAKE - Exit USB power-save mode more quickly, but -// consume more power while in USB power-save -// mode. -// While the device is in USB power-save mode -// (typically during USB suspend), the -// internal voltage regulator stays in normal -// power mode instead of entering suspend -// power mode. -// This is an advanced feature that may be -// useful in certain applications that support -// remote wakeup. -// -// ----------------------------------------------------------------------------- -// $[Power Save Mode] -#define SLAB_USB_PWRSAVE_MODE USB_PWRSAVE_MODE_OFF -// [Power Save Mode]$ - -// ----------------------------------------------------------------------------- -// Enable or disable polled mode -// -// When enabled, the application must call USBD_Run() periodically to process -// USB events. -// When disabled, USB events will be handled automatically by an interrupt -// handler. -// ----------------------------------------------------------------------------- -// $[Polled Mode] -#define SLAB_USB_POLLED_MODE 0 -// [Polled Mode]$ - -#endif // __SILICON_LABS_USBCONFIG_H - diff --git a/targets/efm8/inc/descriptors.h b/targets/efm8/inc/descriptors.h deleted file mode 100644 index c41add8..0000000 --- a/targets/efm8/inc/descriptors.h +++ /dev/null @@ -1,65 +0,0 @@ -/******************************************************************************* - * @file descriptors.h - * @brief USB descriptors header file. - *******************************************************************************/ - -//============================================================================= -// inc/descriptors.h: generated by Hardware Configurator -// -// This file will be regenerated when saving a document. leave the sections -// inside the "$[...]" comment tags alone or they will be overwritten! -//============================================================================= -#ifndef __SILICON_LABS_DESCRIPTORS_H -#define __SILICON_LABS_DESCRIPTORS_H - -//----------------------------------------------------------------------------- -// Includes -//----------------------------------------------------------------------------- -#include -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -// -------------------- USB Identification ------------------------------------ -// -// ********** -// NOTE: YOU MUST PROVIDE YOUR OWN USB VID/PID (below) -// ********** -// -// Following are the definition of the USB VID and PID. These are, by default, -// values that are assigned to Silicon Labs. These values are provided merely -// as an example. You may not use the Silicon Labs VID/PID values in your -// product. You must provide your own assigned VID and PID values. -//----------------------------------------------------------------------------- -// $[Vendor ID] -#define USB_VENDOR_ID htole16(0x10c4) -// [Vendor ID]$ - -// $[Product ID] -#define USB_PRODUCT_ID htole16(0x8acf) -// [Product ID]$ - -extern SI_SEGMENT_VARIABLE(ReportDescriptor0[34], const uint8_t, SI_SEG_CODE); - -extern SI_SEGMENT_VARIABLE(deviceDesc[], const USB_DeviceDescriptor_TypeDef, SI_SEG_CODE); -extern SI_SEGMENT_VARIABLE(configDesc[], const uint8_t, SI_SEG_CODE); -extern SI_SEGMENT_VARIABLE(initstruct, const USBD_Init_TypeDef, SI_SEG_CODE); - -#define HID_PACKET_SIZE 64 - -#ifdef __cplusplus -} -#endif - -#endif // __SILICON_LABS_DESCRIPTORS_H -#if 0 -// $[HID Report Descriptors] -extern SI_SEGMENT_VARIABLE(ReportDescriptor0[0], const uint8_t, SI_SEG_CODE); -// [HID Report Descriptors]$ -#endif - diff --git a/targets/efm8/inc/eeprom.h b/targets/efm8/inc/eeprom.h deleted file mode 100644 index 7ef68b3..0000000 --- a/targets/efm8/inc/eeprom.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#ifndef EEPROM_H_ -#define EEPROM_H_ - -#include "app.h" - -void eeprom_init(); - -void eeprom_read(uint16_t addr, uint8_t * buf, uint8_t len); - -void _eeprom_write(uint16_t addr, uint8_t * buf, uint8_t len, uint8_t flags); - -extern char __erase_mem[3]; - -#define eeprom_write(a,b,l) _eeprom_write(a,b,l,0x1) -#define eeprom_erase(a) _eeprom_write(a,__erase_mem,1,0x3) - -#define EEPROM_DATA_START 0xF800 - -#endif /* EEPROM_H_ */ diff --git a/targets/efm8/inc/printing.h b/targets/efm8/inc/printing.h deleted file mode 100644 index fdb3cdd..0000000 --- a/targets/efm8/inc/printing.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#ifndef PRINTING_H_ -#define PRINTING_H_ - -#include -#include -#include -#include "app.h" - -#define watchdog() (WDTCN = 0xA5) - -#define reboot() (RSTSRC = 1 << 4) - -#define millis() ((uint16_t)(TMR3L | (TMR3H << 8))) - -void u2f_delay(uint32_t ms); - -void usb_write(); - - - -#ifdef USE_PRINTING - - void dump_hex(uint8_t* hex, uint8_t len); - - void cputd(uint32_t i); - void cputx(uint32_t i); - -#define cputb(x) cputx((uint8_t) (x)) -#define cputl(x) cputd((uint32_t) (x)) -#define cputlx(x) cputx((uint32_t) (x)) - - void cprints(const char * str); - void cprintb(const char * tag, uint8_t c, ...); - void cprintd(const char * tag, uint8_t c, ...); - void cprintx(const char * tag, uint8_t c, ...); - void cprintl(const char * tag, uint8_t c, ...); - void cprintlx(const char * tag, uint8_t c, ...); - -#else - - #define cprintx(x) - #define cprintb(x) - #define cprintlx(x) - #define cprintl(x) - #define cprintd(x) - #define cprints(x) - - #define cputx(x) - #define cputb(x) - #define cputl(x) - #define cputlx(x) - - #define putf(x) - #define dump_hex(x) - -#endif - - - - -#endif /* BSP_H_ */ diff --git a/targets/efm8/lib/efm8_assert/assert.c b/targets/efm8/lib/efm8_assert/assert.c deleted file mode 100644 index e96edfd..0000000 --- a/targets/efm8/lib/efm8_assert/assert.c +++ /dev/null @@ -1,15 +0,0 @@ -/**************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#ifndef NDEBUG -void slab_Assert( const char * file, int line ) -{ - file = file; - line = line; - - while ( 1 ); -} -#endif diff --git a/targets/efm8/lib/efm8_assert/assert.h b/targets/efm8/lib/efm8_assert/assert.h deleted file mode 100644 index d99ef84..0000000 --- a/targets/efm8/lib/efm8_assert/assert.h +++ /dev/null @@ -1,60 +0,0 @@ -/****************************************************************************** - * Copyright (c) 2014 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#ifndef __ASSERT_H__ - -#include "efm8_config.h" - -/**************************************************************************//** - * @addtogroup efm8_assert - * @{ - * - * @brief Runtime assert for EFM8 - * - * This module contains a runtime assert macro. It can be compiled out by setting - * the NDEBUG flag. - * - *****************************************************************************/ - - -/**************************************************************************//** - * @def NDEBUG - * @brief Controls if the asserts are present. - * - * Asserts are removed if this symbol is defined - * - *****************************************************************************/ - -/**************************************************************************//** - * @def USER_ASSERT - * @brief User implemented assert function. - * - * When asserts are enabled the default handler can be be replaced with a user defined - * function of the form 'void userAssertName( const char * file, int line )' by setting - * the value of USER_ASSERT to the userAssertName. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_ASSERT(expr) - * @brief default implementation of assert_failed. - * - * This function can be replaced by a user defined assert function by setting the USER_ASSERT flag - *****************************************************************************/ - -#ifdef NDEBUG - #define SLAB_ASSERT(expr) -#else - #ifdef USER_ASSERT - #define SLAB_ASSERT(expr) ((expr) ? ((void)0) : USER_ASSERT( __FILE__, __LINE__ )) - #else - void slab_Assert( const char * file, int line ); - //Yes this is smaller than if(!expr){assert} - #define SLAB_ASSERT(expr) if(expr){}else{slab_Assert( __FILE__, __LINE__ );} - #endif -#endif - -#endif //!__ASSERT_H__ diff --git a/targets/efm8/lib/efm8_usb/Readme.txt b/targets/efm8/lib/efm8_usb/Readme.txt deleted file mode 100644 index 059e38b..0000000 --- a/targets/efm8/lib/efm8_usb/Readme.txt +++ /dev/null @@ -1,56 +0,0 @@ -------------------------------------------------------------------------------- - Readme.txt -------------------------------------------------------------------------------- - -Copyright 2014 Silicon Laboratories, Inc. -http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - -Program Description: -------------------- - -This is the generic EFM8 USB Firmware Library. Please see the EFM8 Libraries -Documentation for more information (/doc/EFM8/software/Lib/index.html). - -Known Issues and Limitations: ----------------------------- - -1) The library does not reset its Data Toggle after receiving a SET_INTERFACE - request. - -Target and Tool Chain Information: ---------------------------------- - -Target: EFM8UB1, EFM8UB2, C8051F320/1, C8051F326/7, C8051F34x, C8051F38x -Tool chain: Keil - -File List: ---------- - -/inc/efm8_usb.h -/src/efm8_usbd.c -/src/efm8_usbdch9.c -/src/efm8_usbdep.c -/src/efm8_usbdint.c - -Release Information: -------------------- - -Version 1.0.0 - - Initial release. - -Version 1.0.1 - - Fixed bug in logic of remote wakeup feature where the device would - attempt to wake the host before enabling its USB transceiver. - - Fixed bug where the device would stall the Data Phase instead of the - Setup Phase when sending a procedural stall on Endpoint 0. - - Fixed bug where a bus-powered device would look at VBUS after a USB Reset - to determine if it should enter the Default or Attached State. VBUS is - always present on a bus-powered device, so it should automatically enter - the Default State. - - Removed code that generated a compiler warning when - USB_PWRSAVE_MODE_FASTWAKE was enabled. - - Improved documentation of USB_PWRSAVE_MODE_FASTWAKE feature. - -------------------------------------------------------------------------------- - End Of File -------------------------------------------------------------------------------- diff --git a/targets/efm8/lib/efm8_usb/inc/efm8_usb.h b/targets/efm8/lib/efm8_usb/inc/efm8_usb.h deleted file mode 100644 index 2581ce3..0000000 --- a/targets/efm8/lib/efm8_usb/inc/efm8_usb.h +++ /dev/null @@ -1,2210 +0,0 @@ -/***************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - ******************************************************************************/ - -#ifndef __SILICON_LABS_EFM8_USB_H__ -#define __SILICON_LABS_EFM8_USB_H__ - -#include "si_toolchain.h" -#include "usbconfig.h" -#include -#include -#include -#include - -/***************************************************************************//** - * @addtogroup Efm8_usb - * @brief USB Device Protocol Stack for EFM8 devices - * @{ - * - * @section usb_device_contents Contents - * - * @li @ref usb_device_intro - * @li @ref usb_device_api - * @li @ref usb_device_conf - * @li @ref usb_device_powersave - * @li @ref usb_device_transfers - * @li @ref usb_device_pitfalls - * - * @n @section usb_device_intro Introduction - * - * The USB device protocol stack provides an API which makes it possible to - * create USB devices with a minimum of effort. The device stack supports Control, - * Bulk, Interrupt, and Isochronous transfers. - * - * The stack is highly configurable to suit various needs and includes - * demonstration projects to get you started fast. - * - * We recommend that you read through this documentation, then proceed to build - * and test a few example projects before you start designing your own device. - * - * @n @section usb_library_architecture_diagram Library Architecture Diagram - * - * @image html USB_Library_Architecture.png - * - * @n @section usb_device_api The EFM8 USB Library API - * - * This section contains brief descriptions of the functions in the API. You will - * find detailed information on input and output parameters and return values by - * clicking on the hyper-linked function names. It is also a good idea to study - * the code in the USB demonstration projects. - * - * Your application code must include one header file: @em efm8_usb.h. - * - * All functions defined in the API can be called from within interrupt handlers. - * - * @subsection usb_device_api_functions API Functions - * - * @ref USBD_Init() @n - * This function is called to register your device and all its properties with - * the device stack. The application must fill in a @ref USBD_Init_TypeDef - * structure prior to calling. When this function has been called your device - * is ready to be enumerated by the USB host. - * - * @ref USBD_Read(), @ref USBD_Write() @n - * These functions initiate data transfers. - * @n @htmlonly USBD_Read() @endhtmlonly initiate a transfer of data @em - * from host @em to device (an @em OUT transfer in USB terminology). - * @n @htmlonly USBD_Write() @endhtmlonly initiate a transfer of data @em from - * device @em to host (an @em IN transfer). - * - * When the USB host actually performs the transfer, your application will be - * notified by means of a call to the @ref USBD_XferCompleteCb() callback - * function (optionally). Refer to @ref TransferCallback for details of the - * callback functionality. - * - * @ref USBD_AbortTransfer(), @ref USBD_AbortAllTransfers() @n - * These functions terminate transfers that are initiated with @htmlonly - * USBD_Read() or USBD_Write() @endhtmlonly but that have not completed yet. - * These functions will deactivate the transfer setup to make the USB device - * endpoint hardware ready for new (and potentially) different transfers. - * - * @ref USBD_Connect(), @ref USBD_Disconnect() @n - * These functions turn the data-line (D+ or D-) pull-up on or off. They can - * be used to force re-enumeration. It's good practice to delay at least one - * second between @htmlonly USBD_Disconnect() and USBD_Connect() @endhtmlonly - * to allow the USB host to unload the currently active device driver. - * - * @ref USBD_EpIsBusy() @n - * Checks if an endpoint is busy. - * - * @ref USBD_StallEp(), @ref USBD_UnStallEp() @n - * These functions stall or un-stall an endpoint. This functionality may not - * be needed by your application. They may be useful when implementing some - * USB classes, e.g. a mass storage devices use them extensively. - * - * @ref USBD_Stop() @n - * Removes the data-line (D+ or D-) pull-up and disables the USB block. The - * application should call @htmlonly USBD_Init() after calling - * USBD_Stop() @endhtmlonly to restart USB operation. - * - * @ref USBD_Suspend() @n - * Puts the device in its low-power suspend mode. This function will not exit - * until a wakeup event (resume signaling, VBUS attachment/removal, or remote - * wakeup source interrupt) occurs. The USB Library can be configured to - * automatically call this function by configuring @ref SLAB_USB_PWRSAVE_MODE. - * - * @ref USBD_RemoteWakeup() @n - * Used in SUSPENDED state (see @ref USB_Status_TypeDef) to signal resume to - * host. It's the applications responsibility to adhere to the USB standard - * which states that a device can not signal resume before it has been - * SUSPENDED for at least 5 ms. The function will also check that the host - * has sent a SET_FEATURE request to enable Remote Wakeup before issuing the - * resume. - * - * @ref USBD_GetUsbState() @n - * Returns the device USB state (see @ref USBD_State_TypeDef). Refer to - * Figure 9-1. "Device State Diagram" in the USB revision 2.0 specification. - * - * @ref USBD_Run() @n - * When @ref SLAB_USB_POLLED_MODE is set to 1, the USB interrupt is disabled - * and the application must periodically call @htmlonly USBD_Run() - * @endhtmlonly to handle USB events. - * - * @n @subsection usb_device_api_callback Callback Functions - * - * @subsubsection usb_device_api_mandatory_callbacks Mandatory Callback Functions - * - * @n @anchor TransferCallback - * @ref USBD_XferCompleteCb() is called each time a packet is sent or - * received. It is called with three parameters, the status of the transfer, - * the number of bytes transferred and the number of bytes remaining. The - * transfer complete callback can be enabled or disabled by setting the - * callback parameters of @ref USBD_Write() and @ref USBD_Read() to - * true or false. - * @note This callback is called from within the USB interrupt handler if - * @ref SLAB_USB_POLLED_MODE is set to 1. Otherwise, it is called from - * @ref USBD_Run(). - * - * @n - * @subsubsection usb_device_api_optional_callbacks Optional Callback Functions - * - * @n These callbacks are all optional, and it is up to the application - * programmer to decide if the application needs the functionality they - * provide. Each callback is enabled or disabled by setting a constant in - * usbconfig.h. - * @note These callbacks are called from within the USB interrupt handler if - * @ref SLAB_USB_POLLED_MODE is set to 1. Otherwise, they are called - * from @ref USBD_Run(). - * - * @n USBD_ResetCb() is called each time reset signaling is sensed on the USB - * wire. - * - * @n USBD_SofCb() is called with the frame number as a parameter on each SOF - * interrupt. - * - * @n USBD_DeviceStateChangeCb() is called whenever the device state changes. - * Some uses of this include detecting that a USB suspend has been issued - * in order to reduce current consumption or calling USBD_Read() after - * entering the Configured state. The USB HID keyboard example - * project has a good example on how to use this callback. - * - * @n USBD_IsSelfPoweredCb() is called by the device stack when host - * queries the device with a GET_STATUS command to check if the device is - * currently self-powered or bus-powered. This feature is only applicable on - * self-powered devices which can also operate when only bus power is - * available. - * - * @n USBD_SetupCmdCb() is called each time a setup command is received from - * the host. Use this callback to override or extend the default handling of - * standard setup commands, and to implement class- or vendor-specific setup - * commands. The USB HID keyboard example project has a good example of how - * to use this callback. - * - * @n @section usb_device_conf Configuring the Library - * - * Your application must provide a header file named @em usbconfig.h. This file - * must contain the following \#define's. See @ref usb_config for - * documentation of these constants.@n @n - * @code - * // ----------------------------------------------------------------------------- - * // Specify bus- or self-powered - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_BUS_POWERED 0 - * - * // ----------------------------------------------------------------------------- - * // Specify USB speed - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_FULL_SPEED 1 - * - * // ----------------------------------------------------------------------------- - * // Enable or disable the clock recovery - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_CLOCK_RECOVERY_ENABLED 1 - * - * // ----------------------------------------------------------------------------- - * // Enable or disable remote wakeup - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_REMOTE_WAKEUP_ENABLED 0 - * - * // ----------------------------------------------------------------------------- - * // Specify number of interfaces and whether any interfaces support alternate - * // settings - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_NUM_INTERFACES 1 - * #define SLAB_USB_SUPPORT_ALT_INTERFACES 0 - * - * // ----------------------------------------------------------------------------- - * // Enable or disable each endpoint - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_EP1IN_USED 1 - * #define SLAB_USB_EP1OUT_USED 0 - * #define SLAB_USB_EP2IN_USED 0 - * #define SLAB_USB_EP2OUT_USED 0 - * #define SLAB_USB_EP3IN_USED 0 - * #define SLAB_USB_EP3OUT_USED 0 - * - * // ----------------------------------------------------------------------------- - * // Specify the maximum packet size for each endpoint - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_EP1IN_MAX_PACKET_SIZE 64 - * #define SLAB_USB_EP1OUT_MAX_PACKET_SIZE 0 - * #define SLAB_USB_EP2IN_MAX_PACKET_SIZE 0 - * #define SLAB_USB_EP2OUT_MAX_PACKET_SIZE 0 - * #define SLAB_USB_EP3IN_MAX_PACKET_SIZE 0 - * #define SLAB_USB_EP3OUT_MAX_PACKET_SIZE 0 - * - * // ----------------------------------------------------------------------------- - * // Specify transfer type of each endpoint - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_EP1IN_TRANSFER_TYPE USB_EPTYPE_INTR - * #define SLAB_USB_EP1OUT_TRANSFER_TYPE USB_EPTYPE_BULK - * #define SLAB_USB_EP2IN_TRANSFER_TYPE USB_EPTYPE_INTR - * #define SLAB_USB_EP2OUT_TRANSFER_TYPE USB_EPTYPE_BULK - * #define SLAB_USB_EP3IN_TRANSFER_TYPE USB_EPTYPE_ISOC - * #define SLAB_USB_EP3OUT_TRANSFER_TYPE USB_EPTYPE_ISOC - * - * // ----------------------------------------------------------------------------- - * // Enable or disable callback functions - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_RESET_CB 1 - * #define SLAB_USB_SOF_CB 1 - * #define SLAB_USB_STATE_CHANGE_CB 1 - * #define SLAB_USB_IS_SELF_POWERED_CB 1 - * #define SLAB_USB_SETUP_CMD_CB 1 - * #define SLAB_USB_HANDLER_CB 0 - * - * // ----------------------------------------------------------------------------- - * // Specify number of languages supported by string descriptors - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_NUM_LANGUAGES 1 - * - * // ----------------------------------------------------------------------------- - * // If only one descriptor language is supported, specify that language here. - * // If multiple descriptor languages are supported, this value is ignored and - * // the supported languages must listed in the - * // myUsbStringTableLanguageIDsDescriptor structure. - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_LANGUAGE USB_LANGID_ENUS - * - * // ----------------------------------------------------------------------------- - * // Set the power saving mode - * // - * // SLAB_USB_PWRSAVE_MODE configures when the device will automatically enter - * // the USB power-save mode. It is a bitmask constant with bit values: - * // - * // USB_PWRSAVE_MODE_OFF - No energy saving mode selected - * // USB_PWRSAVE_MODE_ONSUSPEND - Enter USB power-save mode on USB suspend - * // USB_PWRSAVE_MODE_ONVBUSOFF - Enter USB power-save mode when not attached - * // to the USB host. - * // USB_PWRSAVE_MODE_FASTWAKE - Exit USB power-save mode more quickly. - * // This is useful for some applications that - * // support remote wakeup. - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_PWRSAVE_MODE (USB_PWRSAVE_MODE_ONVBUSOFF \ - * | USB_PWRSAVE_MODE_ONSUSPEND) - * - * // ----------------------------------------------------------------------------- - * // Enable or disable polled mode - * // - * // When enabled, the application must call USBD_Run() periodically to process - * // USB events. - * // When disabled, USB events will be handled automatically by an interrupt - * // handler. - * // ----------------------------------------------------------------------------- - * #define SLAB_USB_POLLED_MODE 0 - * @endcode - * - * @n @section usb_device_powersave Energy-saving options - * - * The device stack provides built-in energy saving options.These options - * are configured by setting flags in @ref SLAB_USB_PWRSAVE_MODE in @em - * usbconfig.h. These flags are bitmasks and can be or'd together.@n@n - * - * Energy-Saving Option Flags: - * - * @ref USB_PWRSAVE_MODE_OFF@n The device will not automatically enter its - * low-power suspned mode after detecting a USB suspend. The application - * firmware may still call @ref USBD_Suspend() to manually enter suspend mode. - * - * @ref USB_PWRSAVE_MODE_ONSUSPEND@n Enter a low-power suspend mode - * when a USB suspend is detected. When resume signaling is detected, - * the stack will exit the low-power mode. - * - * @ref USB_PWRSAVE_MODE_ONVBUSOFF@n Enter the low-power suspend - * mode any time the device detects that VBUS is not present. When VBUS is - * attached, the stack will exit the low-power mode. The USB Specification - * does not define the state of the device when VBUS is not present, but it - * may be desirable for some applications to enter suspend mode when in this - * undefined state. - * - * @ref USB_PWRSAVE_MODE_FASTWAKE@n Keep the internal regulator at - * its normal operating state while in the low-power suspend state. This - * allows the device to wake from suspend more quickly than it would from its - * suspend state. This option can be useful in applications that support - * remote wakeup and need to exit suspend in time to recognize some external - * signal (i.e. a byte received on the UART). The device will still consume - * low enough power to meet the USB Suspend Current Specification, but it will - * be slightly higher than it would otherwise be. - * - * The USB HID Keyboard device example project demonstrates some of these - * energy-saving options. - * - * Example: - * Leave all energy saving to the stack, the device enters low-power mode on - * suspend and when detached from host. @n - * In usbconfig.h: - * @code - * #define SLAB_USB_PWRSAVE_MODE (USB_PWRSAVE_MODE_ONSUSPEND | USB_PWRSAVE_MODE_ONVBUSOFF) - * @endcode - * - * @n @section usb_device_transfers Transfer Operation - * - * @subsection usb_device_transfers_overview Overview - * - * A USB transfer consists of one or more packets. For an IN transfer, the - * packets are sent from the device to the host. For an OUT transfer, the - * packets are sent from the host to the device. @ref USBD_Write() initiates - * an IN transfer, while @ref USBD_Read() initiates an OUT transfer. - * - * @subsection usb_device_transfers_types Transfer Types - * - * There are four USB transfer types: @ref usb_device_transfer_types_control, - * @ref usb_device_transfer_types_bulk, @ref usb_device_transfer_types_interrupt, - * and @ref usb_device_transfer_types_isochronous. - * - * @subsubsection usb_device_transfer_types_control Control - * - * Control transfers are used to send configuration and status - * information, and also to send vendor-defined data. The USB Library only - * supports control transfers on Endpoint 0. @n @n - * The application firmware can handle control requests by looking at the - * contents of the setup packet in @ref USBD_SetupCmdCb(). If the application - * supports a particular request, it can call @ref USBD_Read() or @ref - * USBD_Write() with epAddr set to EP0 and return @ref - * USB_STATUS_OK. If it does not need to handle the request, it should return - * @ref USB_STATUS_REQ_UNHANDLED. This will notify the library that it should - * try to handle the setup command. The library will automatically service - * Standard (i.e. Chapter 9) requests, so @ref USBD_SetupCmdCb() should return - * @ref USB_STATUS_REQ_UNHANDLED unless it is a class- or vendor-specific - * request. If neither the library nor the application supports a setup - * request, the library will issue a stall. - * - * @subsubsection usb_device_transfer_types_bulk Bulk - * - * Bulk transfers are used to send large, non-periodic data. Examples include - * sending a file to a Mass Storage Device or a print-job to a printer. A bulk - * transfer may consist of one or more packets. - * - * Endpoints are configured for bulk mode in usbconfig.h. As an - * example: @code - * #define SLAB_USB_EP1OUT_TRANSFER_TYPE USB_EPTYPE_BULK@endcode - * configures Endpout 1 OUT transfers for bulk mode. - * - * The @ref byteCount parameter of @ref USBD_Write() and @ref USBD_Read() - * configures the maximum length for a given bulk transfer. The transfer will - * complete when the device sends or receives either: - * 1. A packet less than its maximum packet size - * 2. Exactly the number of bytes specified in @ref byteCount - * Note that @ref USBD_XferCompleteCb() will be called for each packet sent or - * received for the duration of a transfer. - * - * @subsubsection usb_device_transfer_types_interrupt Interrupt - * - * Interrupt transfers are used to send low-bandwidth, hight-latency data at - * a non-periodic rate. Examples include input devices, such as mice, - * keyboards, and joysticks. An interrupt transfer may consist of one or more - * packets. - * - * Endpoints are configured for interrupt mode in usbconfig.h. As an - * example: @code - * #define SLAB_USB_EP1OUT_TRANSFER_TYPE USB_EPTYPE_INTR@endcode - * configures Endpout 1 OUT transfers for interrupt mode. - * - * Interrupt transfers work identically to bulk transfer in the USB Library. - * Refer to @ref usb_device_transfer_types_bulk for more information. - * - * @subsubsection usb_device_transfer_types_isochronous Isochronous - * - * Isochronous transfers are used to send periodic, continuous data. Automatic - * error-checking is not included with isochronous transfers as it is with all - * other transfer types. Examples include streaming audio and video. As - * isochronous data is sent at a continuous rate, it typically consists of - * one IN and/or OUT packet per frame. - * - * Endpoint 3 is the only endpoint in the USB Library that supports - * isochronous transfers. Endpoints are configured for isochronous mode in - * usbconfig.h. As an example: @code - * #define SLAB_USB_EP3OUT_TRANSFER_TYPE USB_EPTYPE_ISOC@endcode - * configures Endpout 3 OUT transfers for isochronous mode. - * - * The library works differently for isochronous transfers. The application - * must define a circular buffer to hold isochronous data. When calling - * USBD_Read() or USBD_Write(), dat is the first address of this - * buffer and byteCount is its length. The library will read from or - * write to this buffer as soon as the host issues a request, so it is the - * responsibility of the application firmware to ensure that this buffer is - * fed or consumed at the correct rate to prevent an underrun/overrun - * condition. - * - * The parameters of @ref USBD_XferCompleteCb() take on a different meaning in - * isochronous mode. For OUT transfers, xferred is the number of - * bute received in the last packet and remaining is the current - * index into the circular buffer. For IN transfers, xferred is - * ignored, remaining is the current index into the circular buffer, - * and the return value is the number of bytes to transmit in the next - * packet. - * - * @n @section usb_device_pitfalls Pitfalls - * - * @subsection usb_device_pitfalls_nonreentrancy Non-Reentrancy - * - * Due to the non-reentrant architecture of the 8051, it is recommended - * that all calls to a particular API function be made from functions of the - * same interrupt priority (main loop, low priority, or high priority). - * - * The interrupt priority of the USB callback functions is determined by the - * constant @ref SLAB_USB_POLLED_MODE. When 0, the callbacks are called from - * the USB Interrupt Handler. When 1, the callbacks are called from - * USBD_Run(), which is typically called from the main loop. - * If an API function must be called from functions of differing interrupt - * priorities, there are a number of ways to ensure that the calls are made - * safely: - * - * 1. Disable the interrupt source of the higher-priority function before - * making the call. Restore the interrupt enable setting after the call - * returns: - * - * (Assuming @htmlonly USBD_Write() is called from main() and - * USBD_XferCompleteCb() @endhtmlonly, the call from main() should - * disable and restore the USB interrupt): - * @code - * bool usbIntsEnabled = USB_GetIntsEnabled(); - * - * USB_DisableInts(); - * - * USBD_Write(EP1IN, myBuf, 1, true); - * - * if (usbIntsEnabled) - * { - * USB_EnableInts(); - * } - * @endcode - * - * 2. Add the compiler-specific reentrant keyword to the function - * definition(s) in efm8_usbd.c: - * @code - * int8_t USBD_AbortTransfer(uint8_t epAddr) reentrant - * @endcode - * and to the function prototype definition(s) in efm8_usb.h: - * @code - * int8_t USBD_AbortTransfer(uint8_t epAddr) reentrant; - * @endcode - * Using the reentrant keyword may require the application to provide - * a heap for local variable allocation. Additionally, it will reduce - * the performance and increase the code size of the modified function. - * 3. Make a copy of the function(s) and rename it. Call the original - * function in once context, and the renamed version in another. - * - * @subsection usb_device_pitfalls_buffer_allocation Buffer Allocation - * - * Dynamically allocated buffers passed to @ref USBD_Write() and @ref - * USBD_Read() must not be freed until the transfer completes. - * - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup efm8_usb_constants Constants - * @{ - ******************************************************************************/ - -// ----------------------------------------------------------------------------- -// Global Constants - -// SETUP request, direction of data stage -#define USB_SETUP_DIR_OUT 0 ///< Setup request data stage OUT direction value. -#define USB_SETUP_DIR_IN 1 ///< Setup request data stage IN direction value. -#define USB_SETUP_DIR_MASK 0x80 ///< Setup request data stage direction mask. -#define USB_SETUP_DIR_D2H 0x80 ///< Setup request data stage IN direction mask. -#define USB_SETUP_DIR_H2D 0x00 ///< Setup request data stage OUT direction mask. - -// SETUP request type -#define USB_SETUP_TYPE_STANDARD 0 ///< Standard setup request value. -#define USB_SETUP_TYPE_CLASS 1 ///< Class setup request value. -#define USB_SETUP_TYPE_VENDOR 2 ///< Vendor setup request value. -#define USB_SETUP_TYPE_STANDARD_MASK 0x00 ///< Standard setup request mask. -#define USB_SETUP_TYPE_CLASS_MASK 0x20 ///< Class setup request mask. -#define USB_SETUP_TYPE_VENDOR_MASK 0x40 ///< Vendor setup request mask. - -// SETUP request recipient -#define USB_SETUP_RECIPIENT_DEVICE 0 ///< Setup request device recipient value. -#define USB_SETUP_RECIPIENT_INTERFACE 1 ///< Setup request interface recipient value. -#define USB_SETUP_RECIPIENT_ENDPOINT 2 ///< Setup request endpoint recipient value. -#define USB_SETUP_RECIPIENT_OTHER 3 ///< Setup request other recipient value. - -// bmRequestType bitmasks -#define USB_BMREQUESTTYPE_RECIPIENT 0x1F ///< Recipient is bmRequestType[4:0] -#define USB_BMREQUESTTYPE_TYPE 0x60 ///< Type is bmRequestType[6:5] -#define USB_BMREQUESTTYPE_DIRECTION 0x80 ///< Recipient is bmRequestType[7] - -// SETUP standard request codes for Full Speed devices -#define GET_STATUS 0 ///< Standard setup request GET_STATUS. -#define CLEAR_FEATURE 1 ///< Standard setup request CLEAR_FEATURE. -#define SET_FEATURE 3 ///< Standard setup request SET_FEATURE. -#define SET_ADDRESS 5 ///< Standard setup request SET_ADDRESS. -#define GET_DESCRIPTOR 6 ///< Standard setup request GET_DESCRIPTOR. -#define SET_DESCRIPTOR 7 ///< Standard setup request SET_DESCRIPTOR. -#define GET_CONFIGURATION 8 ///< Standard setup request GET_CONFIGURATION. -#define SET_CONFIGURATION 9 ///< Standard setup request SET_CONFIGURATION. -#define GET_INTERFACE 10 ///< Standard setup request GET_INTERFACE. -#define SET_INTERFACE 11 ///< Standard setup request SET_INTERFACE. -#define SYNCH_FRAME 12 ///< Standard setup request SYNCH_FRAME. - -// SETUP class request codes -#define USB_HID_GET_REPORT 0x01 ///< HID class setup request GET_REPORT. -#define USB_HID_GET_IDLE 0x02 ///< HID class setup request GET_IDLE. -#define USB_HID_SET_REPORT 0x09 ///< HID class setup request SET_REPORT. -#define USB_HID_SET_IDLE 0x0A ///< HID class setup request SET_IDLE. -#define USB_HID_SET_PROTOCOL 0x0B ///< HID class setup request SET_PROTOCOL. -#define USB_CDC_SETLINECODING 0x20 ///< CDC class setup request SET_LINE_CODING. -#define USB_CDC_GETLINECODING 0x21 ///< CDC class setup request GET_LINE_CODING. -#define USB_CDC_SETCTRLLINESTATE 0x22 ///< CDC class setup request SET_CONTROL_LINE_STATE. -#define USB_MSD_BOTRESET 0xFF ///< MSD class setup request Bulk only transfer reset. -#define USB_MSD_GETMAXLUN 0xFE ///< MSD class setup request Get Max LUN. - -// SETUP command GET/SET_DESCRIPTOR descriptor types -#define USB_DEVICE_DESCRIPTOR 1 ///< DEVICE descriptor value. -#define USB_CONFIG_DESCRIPTOR 2 ///< CONFIGURATION descriptor value. -#define USB_STRING_DESCRIPTOR 3 ///< STRING descriptor value. -#define USB_INTERFACE_DESCRIPTOR 4 ///< INTERFACE descriptor value. -#define USB_ENDPOINT_DESCRIPTOR 5 ///< ENDPOINT descriptor value. -#define USB_DEVICE_QUALIFIER_DESCRIPTOR 6 ///< DEVICE_QUALIFIER descriptor value. -#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR 7 ///< OTHER_SPEED_CONFIGURATION descriptor value. -#define USB_INTERFACE_POWER_DESCRIPTOR 8 ///< INTERFACE_POWER descriptor value. -#define USB_HUB_DESCRIPTOR 0x29 ///< HUB descriptor value. -#define USB_HID_DESCRIPTOR 0x21 ///< HID descriptor value. -#define USB_HID_REPORT_DESCRIPTOR 0x22 ///< HID REPORT descriptor value. -#define USB_CS_INTERFACE_DESCRIPTOR 0x24 ///< Audio Class-specific Descriptor Type. - -#define USB_DEVICE_DESCSIZE 18 ///< Device descriptor size. -#define USB_CONFIG_DESCSIZE 9 ///< Configuration descriptor size. -#define USB_INTERFACE_DESCSIZE 9 ///< Interface descriptor size. -#define USB_ENDPOINT_DESCSIZE 7 ///< Endpoint descriptor size. -#define USB_DEVICE_QUALIFIER_DESCSIZE 10 ///< Device qualifier descriptor size. -#define USB_OTHER_SPEED_CONFIG_DESCSIZE 9 ///< Device other speed configuration descriptor size. -#define USB_HID_DESCSIZE 9 ///< HID descriptor size. -#define USB_CDC_HEADER_FND_DESCSIZE 5 ///< CDC Header functional descriptor size. -#define USB_CDC_CALLMNG_FND_DESCSIZE 5 ///< CDC Call Management functional descriptor size. -#define USB_CDC_ACM_FND_DESCSIZE 4 ///< CDC Abstract Control Management functional descriptor size. - -// String descriptor locations -#define USB_STRING_DESCRIPTOR_ENCODING 0 ///< Denotes whether string descriptor is UTF-8 or binary -#define USB_STRING_DESCRIPTOR_LENGTH 1 ///< Length of string descriptor -#define USB_STRING_DESCRIPTOR_TYPE 2 ///< Type of string descriptor (USB_STRING_DESCRIPTOR) -#define USB_STRING_DESCRIPTOR_NAME 3 ///< The string encoded as per USB_STRING_DESCRIPTOR_PACKED - -// String descriptor encoding types -#define USB_STRING_DESCRIPTOR_UTF16LE 0 ///< The string is in UTF-16LE encoding -#define USB_STRING_DESCRIPTOR_UTF16LE_PACKED 1 ///< The string is in packed UTF-16LE encoding (the 0x00 - /// characters between ASCII characters are omitted) -#define USB_STRING_DESCRIPTOR_UTF8 2 ///< The string is in UTF-8 encoding - -// Misc. USB definitions -#define USB_FULL_EP0_SIZE 64 ///< The size of endpoint 0 at full speed. -#define USB_FULL_INT_BULK_MAX_EP_SIZE 64 ///< The max size of any full speed bulk/interrupt endpoint. -#define USB_FULL_ISOC_MAX_EP_SIZE 1023 ///< The max size of any full speed isochronous endpoint. -#define USB_LOW_EP0_SIZE 8 ///< The size of endpoint 0 at low speed. -#define USB_LOW_INT_BULK_MAX_EP_SIZE 8 ///< The max size of any low speed bulk/interrupt endpoint. -#define USB_LOW_ISOC_MAX_EP_SIZE 0 ///< The max size of any low speed isochronous endpoint. -#define USB_EPTYPE_CTRL 0 ///< Endpoint type control. -#define USB_EPTYPE_ISOC 1 ///< Endpoint type isochronous. -#define USB_EPTYPE_BULK 2 ///< Endpoint type bulk. -#define USB_EPTYPE_INTR 3 ///< Endpoint type interrupt. -#define USB_EP_DIR_IN 0x80 ///< Endpoint IN direction mask. -#define USB_EP_DIR_OUT 0x00 ///< Endponit OUT direction mask. -#define USB_SETUP_PKT_SIZE 8 ///< Setup request packet size. -#define USB_EPNUM_MASK 0x0F ///< Endpoint number mask. -#define USB_LANGID_ENUS 0x0409 ///< English-United States language id. -#define USB_LANGID_NOBO 0x0414 ///< Norwegian-Bokmal language id. -#define USB_MAX_DEVICE_ADDRESS 127 ///< Maximum allowable device address. -#define MAX_USB_EP_NUM 15 ///< Limit imposed by the USB standard -#define USB_VENDOR_ID_SILICON_LABS 0x10C4 ///< Silicon Labs VID - -#define CONFIG_DESC_BM_REMOTEWAKEUP 0x20 ///< Configuration descriptor attribute macro. -#define CONFIG_DESC_BM_SELFPOWERED 0x40 ///< Configuration descriptor attribute macro. -#define CONFIG_DESC_BM_RESERVED_D7 0x80 ///< Configuration descriptor attribute macro. -#define CONFIG_DESC_BM_TRANSFERTYPE 0x03 ///< Configuration descriptor transfer type bitmask. -#define CONFIG_DESC_MAXPOWER_mA(x) (((x)+1)/2) ///< Configuration descriptor power macro. - -#define DEVICE_IS_SELFPOWERED 0x0001 ///< Standard request GET_STATUS bitmask. -#define REMOTE_WAKEUP_ENABLED 0x0002 ///< Standard request GET_STATUS bitmask. -#define USB_FEATURE_ENDPOINT_HALT 0 ///< Standard request CLEAR/SET_FEATURE bitmask. -#define USB_FEATURE_DEVICE_REMOTE_WAKEUP 1 ///< Standard request CLEAR/SET_FEATURE bitmask. - -#define HUB_FEATURE_PORT_RESET 4 ///< HUB class request CLEAR/SET_PORT_FEATURE feature selector. -#define HUB_FEATURE_PORT_POWER 8 ///< HUB class request CLEAR/SET_PORT_FEATURE feature selector. -#define HUB_FEATURE_C_PORT_CONNECTION 16 ///< HUB class request CLEAR/SET_PORT_FEATURE feature selector. -#define HUB_FEATURE_C_PORT_RESET 20 ///< HUB class request CLEAR/SET_PORT_FEATURE feature selector. -#define HUB_FEATURE_PORT_INDICATOR 22 ///< HUB class request CLEAR/SET_PORT_FEATURE feature selector. - -#define USB_CLASS_CDC 2 ///< CDC device/interface class code. -#define USB_CLASS_CDC_DATA 0x0A ///< CDC Data interface class code. -#define USB_CLASS_CDC_ACM 2 ///< CDC Abstract Control Model interface subclass code. -#define USB_CLASS_CDC_HFN 0 ///< CDC class Header Functional Descriptor subtype. -#define USB_CLASS_CDC_CMNGFN 1 ///< CDC class Call Management Functional Descriptor subtype. -#define USB_CLASS_CDC_ACMFN 2 ///< CDC class Abstract Control Management Functional Descriptor subtype. -#define USB_CLASS_CDC_UNIONFN 6 ///< CDC class Union Functional Descriptor subtype. - -#define USB_CLASS_HID 3 ///< HID device/interface class code. -#define USB_CLASS_HID_KEYBOARD 1 ///< HID keyboard interface protocol code. -#define USB_CLASS_HID_MOUSE 2 ///< HID mouse interface protocol code. - -#define USB_CLASS_HUB 9 ///< HUB device/interface class code. - -#define USB_CLASS_MSD 8 ///< MSD device/interface class code. -#define USB_CLASS_MSD_BOT_TRANSPORT 0x50 ///< MSD Bulk Only Transport protocol. -#define USB_CLASS_MSD_SCSI_CMDSET 6 ///< MSD Subclass SCSI transparent command set. -#define USB_CLASS_MSD_CSW_CMDPASSED 0 ///< MSD BOT Command status wrapper command passed code. -#define USB_CLASS_MSD_CSW_CMDFAILED 1 ///< MSD BOT Command status wrapper command failed code. -#define USB_CLASS_MSD_CSW_PHASEERROR 2 ///< MSD BOT Command status wrapper cmd phase error code. - -#define USB_CLASS_VENDOR_SPECIFIC 0xFF ///< Vendor Specific class -#define USB_SUBCLASS_VENDOR_SPECIFIC 0xFF ///< Vendor Specific sub-class - -/// @brief USB power save modes -#define USB_PWRSAVE_MODE_OFF 0 ///< No energy saving option selected. -#define USB_PWRSAVE_MODE_ONSUSPEND 1 ///< Enter USB power-save mode on suspend. -#define USB_PWRSAVE_MODE_ONVBUSOFF 2 ///< Enter USB power-save mode when not attached to the USB host. -#define USB_PWRSAVE_MODE_FASTWAKE 4 ///< Exit USB power-save mode more quickly. This is useful for - ///< some applications that support remote wakeup. - -/// @brief Endpoint 0 packet size -#if SLAB_USB_FULL_SPEED -#define USB_EP0_SIZE USB_FULL_EP0_SIZE -#else -#define USB_EP0_SIZE USB_LOW_EP0_SIZE -#endif // SLABS_USB_FULL_SPEED - -/// @brief Total number of USB endpoints used by the device -#define SLAB_USB_NUM_EPS_USED (SLAB_USB_EP1IN_USED \ - + SLAB_USB_EP1OUT_USED \ - + SLAB_USB_EP2IN_USED \ - + SLAB_USB_EP2OUT_USED \ - + SLAB_USB_EP3IN_USED \ - + SLAB_USB_EP3OUT_USED \ - + 1) -/** @} (end addtogroup efm8_usb_constants Constants) */ - -/***************************************************************************//** - * @addtogroup efm8_usb_macros Macros - * @{ - ******************************************************************************/ - -// ----------------------------------------------------------------------------- -// Global Macros - -/// Macro for getting minimum value. -#ifndef EFM8_MIN -#define EFM8_MIN(a, b) ((a) < (b) ? (a) : (b)) -#endif - -/// Macro for getting maximum value. -#ifndef EFM8_MAX -#define EFM8_MAX(a, b) ((a) > (b) ? (a) : (b)) -#endif - -#ifndef UNREFERENCED_ARGUMENT -/// Macro for removing unreferenced arguments from compiler warnings -#define UNREFERENCED_ARGUMENT(arg) (0, arg) -#endif - -/***************************************************************************//** - * @brief Macro for creating USB-compliant UTF-16LE UNICODE string - * descriptor from a C string. - * @details This macro should be used for UTF-8 strings in which all - * characters are represented by a single ASCII byte (i.e. - * U.S. English strings). - * The USB Library will expand variables created with this macro - * by inserting a 0x00 between each character. This allows the - * string to be stored in a "packed", or compressed, format. - * @n@n This example sends "Silicon Labs" as the Manufacturer String: - * - * #define MFR_STRING "Silicon Labs" - * - * UTF16LE_PACKED_STATIC_CONST_STRING_DESC(manufacturer[], \ - * MFR_STRING); - * @param __name - * The name of the variable that holds the string descriptor - * @param __val - * The value of the string descriptor - ******************************************************************************/ -#define UTF16LE_PACKED_STATIC_CONST_STRING_DESC(__name, __val) \ - SI_SEGMENT_VARIABLE(__name, static const USB_StringDescriptor_TypeDef, SI_SEG_CODE) = \ - { USB_STRING_DESCRIPTOR_UTF16LE_PACKED, sizeof(__val) * 2, USB_STRING_DESCRIPTOR, __val } - -/***************************************************************************//** - * @brief Macro for creating USB-compliant UTF-16LE UNICODE string - * descriptor from a C array initializer. - * @details This macro should be used for converting an array initializer - * into a string descriptor. Unlike @ref - * UTF16LE_PACKED_STATIC_CONST_STRING_DESC(), the library will not - * attempt to unpack variables created with this macro, so the - * array will be sent exactly as it is defined. - * @n@n This example sends "Mouse" as the Product String: - * - * #define PROD_STRING 'M',0,'o',0,'u',0,'s',0,'e',0 - * - * ARRAY_STATIC_CONST_STRING_DESC(product[], \ - * 10, \ - * PROD_STRING); - * @param __name - * The name of the variable that holds the string descriptor - * @param __len - * Number of characters (including nulls) in the string to send - * @param __val - * The array initializer. - ******************************************************************************/ -#define ARRAY_STATIC_CONST_STRING_DESC(__name, __len, __val) \ - SI_SEGMENT_VARIABLE(__name, static const USB_StringDescriptor_TypeDef, SI_SEG_CODE) = \ - { USB_STRING_DESCRIPTOR_UTF16LE, __len + 2, USB_STRING_DESCRIPTOR, __val } - -/***************************************************************************//** - * @brief Macro for creating USB-compliant UTF-16LE UNICODE string - * descriptor from a UTF-16 C string. - * @details This macro should be used for strings which are already - * represented in UTF-16. This is an advanced option that should - * only be used for some foreign languages. - * @param __name - * The name of the variable that holds the string descriptor - * @param __val - * The value of the string descriptor - ******************************************************************************/ -#define UTF16LE_STATIC_CONST_STRING_DESC(__name, __val) \ - SI_SEGMENT_VARIABLE(__name, static const USB_StringDescriptor_TypeDef, SI_SEG_CODE) = \ - { USB_STRING_DESCRIPTOR_UTF16LE, sizeof(__val) + 2, USB_STRING_DESCRIPTOR, __val } - -/***************************************************************************//** - * @brief Macro for creating Language ID's String Descriptor (String - * Descriptor 0) - * @details This macro should be used to create the Language ID String - * Descriptor. - * @n@n This example USB device only support U.S. English: - * - * #define LANG_STRING htole16(SLAB_USB_LANGUAGE) - * - * LANGID_STATIC_CONST_STRING_DESC(langDesc[], LANG_STRING); - * - * This example USB device support Norwegian U.S. English: - * - * #define LANG_STRING htole16(USB_LANGID_NOBO), \ - * htole16(USB_LANGID_ENUS) - * - * LANGID_STATIC_CONST_STRING_DESC(langDesc[], LANG_STRING); - * - * @param __name - * The name of the variable that holds the string descriptor - * @param __val - * The value of the string descriptor - ******************************************************************************/ -#define LANGID_STATIC_CONST_STRING_DESC(__name, __val) \ - SI_SEGMENT_VARIABLE(__name, static const USB_LangId_StringDescriptor_Typedef, __code) = \ - { (((SLAB_USB_NUM_LANGUAGES * 2) + 2) << 8) + USB_STRING_DESCRIPTOR, __val } - -/** @} (end addtogroup efm8_usb_macros Macros) */ - -/***************************************************************************//** - * @addtogroup efm8_usb_typedefs Typedefs - * @{ - ******************************************************************************/ - -// ----------------------------------------------------------------------------- -// Typedefs - -/// @brief USB transfer status enumerator. -typedef enum -{ - USB_STATUS_OK = 0, ///< No errors detected. - USB_STATUS_REQ_ERR = -1, ///< Setup request error. - USB_STATUS_EP_BUSY = -2, ///< Endpoint is busy. - USB_STATUS_REQ_UNHANDLED = -3, ///< Setup request not handled. - USB_STATUS_ILLEGAL = -4, ///< Illegal operation attempted. - USB_STATUS_EP_STALLED = -5, ///< Endpoint is stalled. - USB_STATUS_EP_ABORTED = -6, ///< Endpoint transfer was aborted. - USB_STATUS_EP_ERROR = -7, ///< Endpoint transfer error. - USB_STATUS_EP_NAK = -8, ///< Endpoint NAK'ed transfer request. - USB_STATUS_DEVICE_UNCONFIGURED = -9, ///< Device is unconfigured. - USB_STATUS_DEVICE_SUSPENDED = -10, ///< Device is suspended. - USB_STATUS_DEVICE_RESET = -11, ///< Device is/was reset. - USB_STATUS_TIMEOUT = -12, ///< Transfer timeout. - USB_STATUS_DEVICE_REMOVED = -13, ///< Device was removed. - USB_STATUS_EP_RX_BUFFER_OVERRUN = -14 ///< Not enough data in the Rx buffer to hold the - ///< last received packet -} USB_Status_TypeDef; - -/// @brief USB device state enumerator. -typedef enum -{ - USBD_STATE_NONE = 0, ///< Device state is undefined/unknown. - USBD_STATE_ATTACHED = 1, ///< Device state is ATTACHED. - USBD_STATE_POWERED = 2, ///< Device state is POWERED. - USBD_STATE_DEFAULT = 3, ///< Device state is DEFAULT. - USBD_STATE_ADDRESSED = 4, ///< Device state is ADDRESSED. - USBD_STATE_SUSPENDED = 5, ///< Device state is SUSPENDED. - USBD_STATE_CONFIGURED = 6, ///< Device state is CONFIGURED. - USBD_STATE_LASTMARKER = 7, ///< Device state enum end marker. -} USBD_State_TypeDef; - -/// @cond DO_NOT_INCLUDE_WITH_DOXYGEN -/// @brief Endpoint states -typedef enum -{ - D_EP_DISABLED = 0, ///< Endpoint is disabled - D_EP_IDLE = 1, ///< Endpoint is idle - D_EP_TRANSMITTING = 2, ///< Endpoint is transmitting data - D_EP_RECEIVING = 3, ///< Endpoint is receiving data - D_EP_STATUS = 4, ///< Endpoint is in status stage - D_EP_STALL = 5, ///< Endpoint is stalling - D_EP_HALT = 6, ///< Endpoint is halted - D_EP_LASTMARKER = 7 ///< End of EpState enum -} USBD_EpState_TypeDef; -/// @endcond DO_NOT_INCLUDE_WITH_DOXYGEN - -/// @brief Endpoint access address -typedef enum -{ - EP0, -#if (SLAB_USB_EP1IN_USED) - EP1IN, -#endif -#if (SLAB_USB_EP2IN_USED) - EP2IN, -#endif -#if (SLAB_USB_EP3IN_USED) - EP3IN, -#endif -#if (SLAB_USB_EP1OUT_USED) - EP1OUT, -#endif -#if (SLAB_USB_EP2OUT_USED) - EP2OUT, -#endif -#if (SLAB_USB_EP3OUT_USED) - EP3OUT, -#endif -}USB_EP_Index_TypeDef; - -/// @brief USB Setup type. -typedef struct -{ - struct - { - uint8_t Recipient : 5; ///< Request recipient (device, interface, endpoint, other) - uint8_t Type : 2; ///< Request type (standard, class or vendor). - uint8_t Direction : 1; ///< Transfer direction of SETUP data phase. - } bmRequestType; - - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -} USB_Setup_TypeDef; - -/// @brief USB Setup Union type. -typedef union -{ - USB_Setup_TypeDef setup; - uint8_t c[8]; - uint16_t i[4]; -} USB_Setup_UnionDef; - -/// @brief USB Device Descriptor. -typedef struct -{ - uint8_t bLength; ///< Size of this descriptor in bytes - uint8_t bDescriptorType; ///< Constant DEVICE Descriptor Type - uint16_t bcdUSB; ///< USB Specification Release Number in BCD - uint8_t bDeviceClass; ///< Class code (assigned by the USB-IF) - uint8_t bDeviceSubClass; ///< Subclass code (assigned by the USB-IF) - uint8_t bDeviceProtocol; ///< Protocol code (assigned by the USB-IF) - uint8_t bMaxPacketSize0; ///< Maximum packet size for endpoint zero - uint16_t idVendor; ///< Vendor ID (assigned by the USB-IF) - uint16_t idProduct; ///< Product ID (assigned by the manufacturer) - uint16_t bcdDevice; ///< Device release number in binary-coded decimal - uint8_t iManufacturer; ///< Index of string descriptor describing manufacturer - uint8_t iProduct; ///< Index of string descriptor describing product - uint8_t iSerialNumber; ///< Index of string descriptor describing the serial number - uint8_t bNumConfigurations; ///< Number of possible configurations -} USB_DeviceDescriptor_TypeDef; - - -/// @brief USB Configuration Descriptor. -typedef struct -{ - uint8_t bLength; ///< Size of this descriptor in bytes - uint8_t bDescriptorType; ///< Constant CONFIGURATION Descriptor Type - uint16_t wTotalLength; ///< Total length of data returned for this - ///< configuration. Includes the combined length of all - ///< descriptors (configuration, interface, endpoint, - ///< and class- or vendor-specific) returned for this - ///< configuration. - uint8_t bNumInterfaces; ///< Number of interfaces supported by this - ///< configuration - uint8_t bConfigurationValue; ///< Value to use as an argument to the - ///< SetConfiguration request to select this - ///< configuration. - uint8_t iConfiguration; ///< Index of string descriptor describing this - ///< configuration. - uint8_t bmAttributes; ///< Configuration characteristics. - ///< @n D7: Reserved (set to one) - ///< @n D6: Self-powered - ///< @n D5: Remote Wakeup - ///< @n D4...0: Reserved (reset to zero) - uint8_t bMaxPower; ///< Maximum power consumption of the USB device, unit - ///< is 2mA per LSB -} USB_ConfigurationDescriptor_TypeDef; - - -/// @brief USB Interface Descriptor. -typedef struct -{ - uint8_t bLength; ///< Size of this descriptor in bytes. - uint8_t bDescriptorType; ///< Constant INTERFACE Descriptor Type. - uint8_t bInterfaceNumber; ///< Number of this interface. Zero-based value - ///< identifying the index in the array of concurrent - ///< interfaces supported by this configuration. - uint8_t bAlternateSetting; ///< Value used to select this alternate setting for - ///< the interface identified in the prior field. - uint8_t bNumEndpoints; ///< Number of endpoints used by this interface - ///< (excluding endpoint zero). If this value is zero, - ///< this interface only uses the Default Control Pipe. - uint8_t bInterfaceClass; ///< Class code (assigned by the USB-IF). A value - ///< of zero is reserved for future standardization. If - ///< this field is set to FFH, the interface class is - ///< vendor-specific. All other values are reserved for - ///< assignment by the USB-IF. - uint8_t bInterfaceSubClass; ///< Subclass code (assigned by the USB-IF). These codes - ///< are qualified by the value of the bInterfaceClass - ///< field. If the bInterfaceClass field is reset to - ///< zero, this field must also be reset to zero. If - ///< the bInterfaceClass field is not set to FFH, all - ///< values are reserved for assignment by the USB-IF. - uint8_t bInterfaceProtocol; ///< Protocol code (assigned by the USB). These codes - ///< are qualified by the value of the bInterfaceClass - ///< and the bInterfaceSubClass fields. If an interface - ///< supports class-specific requests, this code - ///< identifies the protocols that the device uses as - ///< defined by the specification of the device class. - ///< If this field is reset to zero, the device does - ///< not use a class-specific protocol on this - ///< interface. If this field is set to FFH, the device - ///< uses a vendor-specific protocol for this interface - uint8_t iInterface; ///< Index of string descriptor describing this - ///< interface. -} USB_InterfaceDescriptor_TypeDef; - - -/// @brief USB Endpoint Descriptor. -typedef struct -{ - uint8_t bLength; ///< Size of this descriptor in bytes - uint8_t bDescriptorType; ///< Constant ENDPOINT Descriptor Type - uint8_t bEndpointAddress; ///< The address of the endpoint - uint8_t bmAttributes; ///< This field describes the endpoint attributes - uint16_t wMaxPacketSize; ///< Maximum packet size for the endpoint - uint8_t bInterval; ///< Interval for polling EP for data transfers -} USB_EndpointDescriptor_TypeDef; - -/// @brief USB String Descriptor. -typedef uint8_t USB_StringDescriptor_TypeDef; ///< The string descriptor - -/// @brief USB Language ID String Descriptor. -typedef uint16_t USB_LangId_StringDescriptor_Typedef; ///< The language ID string descriptor - -#if (SLAB_USB_NUM_LANGUAGES == 1) -/// @brief USB String Table Structure. -typedef USB_StringDescriptor_TypeDef * *USB_StringTable_TypeDef; -#elif (SLAB_USB_NUM_LANGUAGES > 1) -typedef struct -{ - uint16_t *languageIDs; - USB_StringDescriptor_TypeDef * * *languageArray; -} USB_StringTable_TypeDef; -#endif // ( SLAB_USB_NUM_LANGUAGES == 1 ) - -/// @brief USB Device stack initialization structure. -/// @details This structure is passed to @ref USBD_Init() when starting up -/// the device. -typedef struct -{ - USB_DeviceDescriptor_TypeDef *deviceDescriptor; ///< Pointer to the device descriptor - uint8_t *configDescriptor; ///< Pointer to the configuration descriptor - USB_StringTable_TypeDef *stringDescriptors; ///< Pointer to an array of string descriptor pointers - uint8_t numberOfStrings; ///< Number of strings in string descriptor array -} USBD_Init_TypeDef; - -/// @cond DO_NOT_INCLUDE_WITH_DOXYGEN -// Endpoint structure -typedef struct -{ - uint8_t *buf; - uint16_t remaining; - USBD_EpState_TypeDef state; - union - { - struct - { - uint8_t callback : 1; - uint8_t outPacketPending : 1; - uint8_t inPacketPending : 1; - uint8_t waitForRead : 1; - } bits; - uint8_t c; - } misc; -} USBD_Ep_TypeDef; - -// USB Device structure -typedef struct -{ - uint8_t configurationValue; -#if SLAB_USB_REMOTE_WAKEUP_ENABLED - uint8_t remoteWakeupEnabled; -#endif - uint8_t numberOfStrings; - USBD_State_TypeDef state; - USBD_State_TypeDef savedState; - USB_Setup_TypeDef setup; - union - { - struct - { - uint8_t type : 7; - uint8_t init : 1; - } encoding; - uint8_t c; - } ep0String; - USBD_Ep_TypeDef ep0; -#if SLAB_USB_EP1IN_USED - USBD_Ep_TypeDef ep1in; -#endif -#if SLAB_USB_EP2IN_USED - USBD_Ep_TypeDef ep2in; -#endif -#if SLAB_USB_EP3IN_USED - USBD_Ep_TypeDef ep3in; -#endif -#if SLAB_USB_EP1OUT_USED - USBD_Ep_TypeDef ep1out; -#endif -#if SLAB_USB_EP2OUT_USED - USBD_Ep_TypeDef ep2out; -#endif -#if SLAB_USB_EP3OUT_USED - USBD_Ep_TypeDef ep3out; -#endif -#if ((SLAB_USB_EP3IN_USED) && (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC)) - uint16_t ep3inIsoIdx; -#endif -#if ((SLAB_USB_EP3OUT_USED) && (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC)) - uint16_t ep3outIsoIdx; -#endif -#if SLAB_USB_SUPPORT_ALT_INTERFACES - uint8_t interfaceAltSetting[SLAB_USB_NUM_INTERFACES]; -#endif - USB_DeviceDescriptor_TypeDef *deviceDescriptor; - USB_ConfigurationDescriptor_TypeDef *configDescriptor; - USB_StringTable_TypeDef *stringDescriptors; -} USBD_Device_TypeDef; -/// @endcond DO_NOT_INCLUDE_WITH_DOXYGEN - -/** @} (end addtogroup efm8_usb_typedefs Typedefs) */ - -/***************************************************************************//** - * @addtogroup efm8_usb_constants Constants - * @{ - ******************************************************************************/ - -// ----------------------------------------------------------------------------- -// Compiler-specific memory segment definitions - -#ifndef MEM_MODEL_SEG - -// ----------------------------------------------------------------------------- -// Memory Model-Specific Location -// -// MEM_MODEL_SEG is the default memory segment used for a given -// memory model. Some variables use this symbol in order to reduce the amount -// of code space and number of cycles it takes to access them. -// The user can override this value by defining it in his usbconfig.h file. -// For example: -// -// #define MEM_MODEL_LOC SI_SEG_XDATA -// -// will place these variables in XRAM regardless of the memory model used to -// build the project. -// ----------------------------------------------------------------------------- - -#if (defined SDCC) || (defined __SDCC) - -#if (__SDCC_MODEL_SMALL) -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif defined __SDCC_MODEL_MEDIUM -#define MEM_MODEL_SEG SI_SEG_PDATA -#elif (defined __SDCC_MODEL_LARGE) || (defined __SDCC_MODEL_HUGE) -#define MEM_MODEL_SEG SI_SEG_XDATA -#else -#error "Illegal memory model setting." -#endif - -#elif defined __RC51__ - -#if (__MEMORY_MODEL__ == 0) // TINY -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif (__MEMORY_MODEL__ == 1) // SMALL -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif (__MEMORY_MODEL__ == 2) // COMPACT -#define MEM_MODEL_SEG SI_SEG_PDATA -#elif (__MEMORY_MODEL__ == 3) // LARGE -#define MEM_MODEL_SEG SI_SEG_XDATA -#elif (__MEMORY_MODEL__ == 4) // HUGE -#define MEM_MODEL_SEG SI_SEG_PDATA -#else -#error "Illegal memory model setting." -#endif - -#elif defined __C51__ - -#if (__MODEL__ == 0) // SMALL -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif (__MODEL__ == 1) // COMPACT -#define MEM_MODEL_SEG SI_SEG_PDATA -#elif (__MODEL__ == 2) // LARGE -#define MEM_MODEL_SEG SI_SEG_XDATA -#else -#error "Illegal memory model setting." -#endif - -#elif defined _CC51 - -#if (_MODEL == 's') // SMALL -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif (_MODEL == 'a') // AUXPAGE -#define MEM_MODEL_SEG SI_SEG_PDATA -#elif (_MODEL == 'l') // LARGE -#define MEM_MODEL_SEG SI_SEG_XDATA -#elif (_MODEL == 'r') // REENTRANT -#define MEM_MODEL_SEG SI_SEG_XDATA -#else -#error "Illegal memory model setting." -#endif - -#elif defined __ICC8051__ -#if (__DATA_MODEL__ == 0) // TINY -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif (__DATA_MODEL__ == 1) // SMALL -#define MEM_MODEL_SEG SI_SEG_IDATA -#elif (__DATA_MODEL__ == 2) // LARGE -#define MEM_MODEL_SEG SI_SEG_XDATA -#elif (__DATA_MODEL__ == 3) // GENERIC -#define MEM_MODEL_SEG SI_SEG_XDATA -#elif (__DATA_MODEL__ == 4) // FAR -#define MEM_MODEL_SEG SI_SEG_XDATA -#else -#error "Illegal memory model setting." -#endif - -#endif -#endif // #ifndef MEM_MODEL_SEG - -/** @} (end addtogroup efm8_usb_constants Constants) */ - -/// @cond DO_NOT_INCLUDE_WITH_DOXYGEN -void USBD_SetUsbState(USBD_State_TypeDef newState); -USB_Status_TypeDef USBDCH9_SetupCmd(void); -/// @endcond DO_NOT_INCLUDE_WITH_DOXYGEN - -// ----------------------------------------------------------------------------- -// Library Configuration Definitions - -/**************************************************************************//** - * @addtogroup efm8_usb_config Library Configuration - * @{ - * - * @details Library configuration constants read from usbconfig.h. - * - * This library will look for configuration constants in **usbconfig.h**. - * This file is provided/written by the user and should be - * located in a directory that is part of the include path. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_BUS_POWERED - * @brief Configures the USB device for bus-powered or self-powered mode. - * @details - * When '1' the USB device is bus-powered. - * When '0' the USB device is self-powered. - * - * Default setting is '1' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_FULL_SPEED - * @brief Configures the USB device for full-speed or low-speed operation. - * @details - * When '1' the USB device is full-speed - * When '0' the USB device is low-speed - * - * Default setting is '1' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_CLOCK_RECOVERY_ENABLED - * @brief Enables/disables the USB Clock Recovery - * @details USB Clock Recovery uses the incoming USB dat stream to adjust the - * internal oscillator. This allows the internal oscillator to meet the - * requirements for USB clock tolerance. - * - * When '1' the USB clock recovery is enabled - * When '0' the USB clock recovery is disabled - * - * Default setting is '1' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_REMOTE_WAKEUP_ENABLED - * @brief Enables/disables remote wakeup capability - * @details Remote wakeup allow the USB device to wake the host from suspend. - * When enabled, the library will call @ref USBD_RemoteWakeupCb() to determine - * if the remote wakeup source caused the device to wake up. If it was, the - * library will exit suspend mode and the application should call - * @ref USBD_RemoteWakeup() to wake up the host. - * - * When '1' remote wakeup is enabled - * When '0' remote wakeup is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_NUM_INTERFACES - * @brief The number of interfaces available in the configuration - * @details - * Default setting is '1' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_SUPPORT_ALT_INTERFACES - * @brief Enables/disables alternate interface settings - * @details If any of the interfaces support alternate settings, this should be - * set to '1'. Upon receiveing a SET_INTERFACE request, the library will call - * @ref USBD_SetInterfaceCb(), which should return @ref USB_STATUS_OK if the - * alternate setting is valid or @ref USB_STATUS_REQ_ERR if it is not. - * - * When '1' alternate inteface settings are supported - * When '0' alternate interface settings are not supported, and the library will - * respond to any SET_INTERFACE request with a procedural stall - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP1IN_USED - * @brief Enables/disables Endpoint 1 IN - * @details - * When '1' Endpoint 1 IN is enabled - * When '0' Endpoint 1 IN is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP1OUT_USED - * @brief Enables/disables Endpoint 1 OUT - * @details - * When '1' Endpoint 1 OUT is enabled - * When '0' Endpoint 1 OUT is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP2IN_USED - * @brief Enables/disables Endpoint 2 IN - * @details - * When '1' Endpoint 2 IN is enabled - * When '0' Endpoint 2 IN is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP2OUT_USED - * @brief Enables/disables Endpoint 2 OUT - * @details - * When '1' Endpoint 2 OUT is enabled - * When '0' Endpoint 2 OUT is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP3IN_USED - * @brief Enables/disables Endpoint 3 IN - * @details - * When '1' Endpoint 3 IN is enabled - * When '0' Endpoint 3 IN is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP3OUT_USED - * @brief Enables/disables Endpoint 3 OUT - * @details - * When '1' Endpoint 3 OUT is enabled - * When '0' Endpoint 3 OUT is disabled - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP1IN_MAX_PACKET_SIZE - * @brief The maximum packet size that can be received on Endpoint 1 IN - * @details - * Default setting is '64' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP1OUT_MAX_PACKET_SIZE - * @brief The maximum packet size that can be transmitted on Endpoint 1 OUT - * @details - * Default setting is '64' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP2IN_MAX_PACKET_SIZE - * @brief The maximum packet size that can be received on Endpoint 2 IN - * @details - * Default setting is '64' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP2OUT_MAX_PACKET_SIZE - * @brief The maximum packet size that can be transmitted on Endpoint 2 OUT - * @details - * Default setting is '64' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP3IN_MAX_PACKET_SIZE - * @brief The maximum packet size that can be received on Endpoint 3 IN - * @details - * Default setting is '64' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP3OUT_MAX_PACKET_SIZE - * @brief The maximum packet size that can be transmitted on Endpoint 3 OUT - * @details - * Default setting is '64' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP1IN_TRANSFER_TYPE - * @brief Transfer type on Endpoint 1 IN - * @details - * May take one of the following values: - * USB_EPTYPE_INTR - Interrupt - * USB_EPTYPE_BULK - Bulk - * - * Default setting is @ref USB_EPTYPE_INTR and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP1OUT_TRANSFER_TYPE - * @brief Transfer type on Endpoint 1 OUT - * @details - * May take one of the following values: - * USB_EPTYPE_INTR - Interrupt - * USB_EPTYPE_BULK - Bulk - * - * Default setting is @ref USB_EPTYPE_INTR and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP2IN_TRANSFER_TYPE - * @brief Transfer type on Endpoint 2 IN - * @details - * May take one of the following values: - * USB_EPTYPE_INTR - Interrupt - * USB_EPTYPE_BULK - Bulk - * - * Default setting is @ref USB_EPTYPE_INTR and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP2OUT_TRANSFER_TYPE - * @brief Transfer type on Endpoint 2 OUT - * @details - * May take one of the following values: - * USB_EPTYPE_INTR - Interrupt - * USB_EPTYPE_BULK - Bulk - * - * Default setting is @ref USB_EPTYPE_INTR and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP3IN_TRANSFER_TYPE - * @brief Transfer type on Endpoint 3 IN - * @details - * May take one of the following values: - * USB_EPTYPE_INTR - Interrupt - * USB_EPTYPE_BULK - Bulk - * USB_EPTYPE_ISOC - Isochronous - * - * Default setting is @ref USB_EPTYPE_INTR and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_EP3OUT_TRANSFER_TYPE - * @brief Transfer type on Endpoint 3 OUT - * @details - * May take one of the following values: - * USB_EPTYPE_INTR - Interrupt - * USB_EPTYPE_BULK - Bulk - * USB_EPTYPE_ISOC - Isochronous - * - * Default setting is @ref USB_EPTYPE_INTR and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_RESET_CB - * @brief Enables/disables the USB Reset callback function - * @details - * When '1' @ref USBD_ResetCb() is called upon reception of a USB Reset - * When '0' @ref USBD_ResetCb() is not called upon reception of a USB Reset - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_SOF_CB - * @brief Enables/disables the USB Start-Of-Frame callback function - * @details - * When '1' @ref USBD_SofCb() is called upon reception of a Start-of-Frame - * packet - * When '0' @ref USBD_SofCb() is not called upon reception of a Start-of-Frame - * packet - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_STATE_CHANGE_CB - * @brief Enables/disables the USB State Change callback function - * @details - * When '1' @ref USBD_DeviceStateChangeCb() is called when the USB device state - * changes - * When '0' @ref USBD_DeviceStateChangeCb() is not called when the USB device - * state changes - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_IS_SELF_POWERED_CB - * @brief Enables/disables the USB Self-Powered callback function - * @details - * When '1' @ref USBD_IsSelfPoweredCb() is called upon reception of a - * GET_STATUS (Self-Powered) request - * When '0' @ref USBD_IsSelfPoweredCb() is not called upon reception of a - * GET_STATUS (Self-Powered) request - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_SETUP_CMD_CB - * @brief Enables/disables the USB Setup Command callback function - * @details - * When '1' @ref USBD_SetupCmdCb() is called upon reception of a Setup Request - * When '0' @ref USBD_SetupCmdCb() is not called upon reception of a Setup - * Request - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_HANDLER_CB - * @brief Enables/disables the USB Handler Entry and Exit callback functions - * @details - * When '1' @ref USBD_EnterHandler() will be called before the USB handler - * executes and @ref USBD_ExitHandler() will be called after the USB handler - * completes - * When '0' @ref USBD_EnterHandler() and @ref USBD_ExitHandler() will not be - * called - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_NUM_LANGUAGES - * @brief Number of languages supported by the USB string descriptors - * @details - * Default setting is '1' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_LANGUAGE - * @brief - * Defines the language of the USB string descriptors when - * @ref SLAB_USB_NUM_LANGUAGES is '1'. - * - * @details - * When @ref SLAB_USB_NUM_LANGUAGES is greater than '1', the supported languages - * must be defined in a separate table, and a structure of type - * @ref USB_StringDescriptor_TypeDef must be defined for each supported - * language - * - * Default setting is @ref USB_LANGID_ENUS and may be overridden by defining in - * 'usbconfig.h'. - * - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_PWRSAVE_MODE - * @brief Configures the power-saving options supported by the device - * - * @details - * Default setting is @ref USB_PWRSAVE_MODE_ONSUSPEND and may be overridden by - * defining in 'usbconfig.h'. - * - * SLAB_USB_PWRSAVE_MODE configures when the device will automatically enter - * the USB power-save mode. It is a bitmask constant with bit values: - * - * @ref USB_PWRSAVE_MODE_OFF - No energy saving option selected - * @ref USB_PWRSAVE_MODE_ONSUSPEND - Enter USB power-save mode on USB suspend - * @ref USB_PWRSAVE_MODE_ONVBUSOFF - Enter USB power-save mode when not - * attached to the USB host. - * @ref USB_PWRSAVE_MODE_FASTWAKE - Exit USB power-save mode more quickly. - * This is useful for some applications that - * support remote wakeup. - *****************************************************************************/ - -/**************************************************************************//** - * @def SLAB_USB_POLLED_MODE - * @brief Enables/disables USB library polled mode - * @details - * When '1' the library will run in polled mode - * When '0' the library will run in interrupt mode - * - * Default setting is '0' and may be overridden by defining in 'usbconfig.h'. - * - *****************************************************************************/ - -/** @} (end addtogroup efm8_usb_config Library Configuration) */ - -// Set default USB library configurations if the value is not configured in -// usbconfig.h - -#ifndef SLAB_USB_BUS_POWERED -#define SLAB_USB_BUS_POWERED 1 -#endif - -#ifndef SLAB_USB_FULL_SPEED -#define SLAB_USB_FULL_SPEED 1 -#endif - -#ifndef SLAB_USB_CLOCK_RECOVERY_ENABLED -#define SLAB_USB_CLOCK_RECOVERY_ENABLED 1 -#endif - -#ifndef SLAB_USB_REMOTE_WAKEUP_ENABLED -#define SLAB_USB_REMOTE_WAKEUP_ENABLED 0 -#endif - -#ifndef SLAB_USB_NUM_INTERFACES -#define SLAB_USB_NUM_INTERFACES 1 -#endif - -#ifndef SLAB_USB_SUPPORT_ALT_INTERFACES -#define SLAB_USB_SUPPORT_ALT_INTERFACES 0 -#endif - -#ifndef SLAB_USB_EP1IN_USED -#define SLAB_USB_EP1IN_USED 0 -#endif - -#ifndef SLAB_USB_EP1OUT_USED -#define SLAB_USB_EP1OUT_USED 0 -#endif - -#ifndef SLAB_USB_EP2IN_USED -#define SLAB_USB_EP2IN_USED 0 -#endif - -#ifndef SLAB_USB_EP2OUT_USED -#define SLAB_USB_EP2OUT_USED 0 -#endif - -#ifndef SLAB_USB_EP3IN_USED -#define SLAB_USB_EP3IN_USED 0 -#endif - -#ifndef SLAB_USB_EP3OUT_USED -#define SLAB_USB_EP3OUT_USED 0 -#endif - -#ifndef SLAB_USB_EP1IN_MAX_PACKET_SIZE -#define SLAB_USB_EP1IN_MAX_PACKET_SIZE 64 -#endif - -#ifndef SLAB_USB_EP1OUT_MAX_PACKET_SIZE -#define SLAB_USB_EP1OUT_MAX_PACKET_SIZE 64 -#endif - -#ifndef SLAB_USB_EP2IN_MAX_PACKET_SIZE -#define SLAB_USB_EP2IN_MAX_PACKET_SIZE 64 -#endif - -#ifndef SLAB_USB_EP2OUT_MAX_PACKET_SIZE -#define SLAB_USB_EP2OUT_MAX_PACKET_SIZE 64 -#endif - -#ifndef SLAB_USB_EP3IN_MAX_PACKET_SIZE -#define SLAB_USB_EP3IN_MAX_PACKET_SIZE 64 -#endif - -#ifndef SLAB_USB_EP3OUT_MAX_PACKET_SIZE -#define SLAB_USB_EP3OUT_MAX_PACKET_SIZE 64 -#endif - -#ifndef SLAB_USB_EP1IN_TRANSFER_TYPE -#define SLAB_USB_EP1IN_TRANSFER_TYPE USB_EPTYPE_INTR -#endif - -#ifndef SLAB_USB_EP1OUT_TRANSFER_TYPE -#define SLAB_USB_EP1OUT_TRANSFER_TYPE USB_EPTYPE_INTR -#endif - -#ifndef SLAB_USB_EP2IN_TRANSFER_TYPE -#define SLAB_USB_EP2IN_TRANSFER_TYPE USB_EPTYPE_INTR -#endif - -#ifndef SLAB_USB_EP2OUT_TRANSFER_TYPE -#define SLAB_USB_EP2OUT_TRANSFER_TYPE USB_EPTYPE_INTR -#endif - -#ifndef SLAB_USB_EP3IN_TRANSFER_TYPE -#define SLAB_USB_EP3IN_TRANSFER_TYPE USB_EPTYPE_INTR -#endif - -#ifndef SLAB_USB_EP3OUT_TRANSFER_TYPE -#define SLAB_USB_EP3OUT_TRANSFER_TYPE USB_EPTYPE_INTR -#endif - -#ifndef SLAB_USB_RESET_CB -#define SLAB_USB_RESET_CB 0 -#endif - -#ifndef SLAB_USB_SOF_CB -#define SLAB_USB_SOF_CB 0 -#endif - -#ifndef SLAB_USB_STATE_CHANGE_CB -#define SLAB_USB_STATE_CHANGE_CB 0 -#endif - -#ifndef SLAB_USB_IS_SELF_POWERED_CB -#define SLAB_USB_IS_SELF_POWERED_CB 0 -#endif - -#ifndef SLAB_USB_SETUP_CMD_CB -#define SLAB_USB_SETUP_CMD_CB 0 -#endif - -#ifndef SLAB_USB_HANDLER_CB -#define SLAB_USB_HANDLER_CB 0 -#endif - -#ifndef SLAB_USB_NUM_LANGUAGES -#define SLAB_USB_NUM_LANGUAGES 1 -#endif - -#ifndef SLAB_USB_LANGUAGE -#define SLAB_USB_LANGUAGE USB_LANGID_ENUS -#endif - -#ifndef SLAB_USB_PWRSAVE_MODE -#define SLAB_USB_PWRSAVE_MODE USB_PWRSAVE_MODE_ONSUSPEND -#endif - -#ifndef SLAB_USB_POLLED_MODE -#define SLAB_USB_POLLED_MODE 0 -#endif - -#if SLAB_USB_POLLED_MODE -void usbIrqHandler(void); -#endif - -/***************************************************************************//** - * @addtogroup efm8_api API Functions - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * Abort all pending transfers. - * - * @details - * Aborts transfers for all endpoints currently in use. Pending - * transfers on the default endpoint (EP0) are not aborted. - ******************************************************************************/ -void USBD_AbortAllTransfers(void); - -/***************************************************************************//** - * @brief - * Abort a pending transfer on a specific endpoint. - * - * @param epAddr - * The address of the endpoint to abort. - * @return - * @ref USB_STATUS_OK is the transfer aborted, @ref USB_STATUS_ILLEGAL - * otherwise - ******************************************************************************/ -int8_t USBD_AbortTransfer(uint8_t epAddr); - -/***************************************************************************//** - * @brief - * Start USB device operation. - * - * @details - * Device operation is started by connecting a pull-up resistor on the - * appropriate USB data line. - ******************************************************************************/ -void USBD_Connect(void); - -/***************************************************************************//** - * @brief - * Stop USB device operation. - * - * @details - * Device operation is stopped by disconnecting the pull-up resistor from the - * appropriate USB data line. Often referred to as a "soft" disconnect. - ******************************************************************************/ -void USBD_Disconnect(void); - -/***************************************************************************//** - * @brief - * Check if an endpoint is busy doing a transfer. - * - * @param epAddr - * The address of the endpoint to check. - * - * @return - * True if endpoint is busy, false otherwise. - ******************************************************************************/ -bool USBD_EpIsBusy(uint8_t epAddr); - -/***************************************************************************//** - * @brief - * Get current USB device state. - * - * @return - * Device USB state. See @ref USBD_State_TypeDef. - ******************************************************************************/ -USBD_State_TypeDef USBD_GetUsbState(void); - -/***************************************************************************//** - * @brief - * Initializes USB device hardware and internal protocol stack data structures, - * then connects the data-line (D+ or D-) pullup resistor to signal host that - * enumeration can begin. - * - * @note - * You may later use @ref USBD_Disconnect() and @ref USBD_Connect() to force - * reenumeration. - * - * @param p - * Pointer to device initialization struct. See @ref USBD_Init_TypeDef. - * - * @return - * @ref USB_STATUS_OK on success, else an appropriate error code. - ******************************************************************************/ -int8_t USBD_Init(const USBD_Init_TypeDef *p); - -/***************************************************************************//** - * @brief - * Start a read (OUT) transfer on an endpoint. - * - * @note - * If it is possible that the host will send more data than your device - * expects, round buffer size up to the next multiple of maxpacket size. - * - * @param epAddr - * Endpoint address. - * - * @param dat - * Pointer to transfer data buffer. - * - * @param byteCount - * Transfer length. - * - * @param callback - * Boolean to determine if USB_XferCompleteCb should be called for this - * transfer. - * - * @return - * @ref USB_STATUS_OK on success, else an appropriate error code. - ******************************************************************************/ -int8_t USBD_Read(uint8_t epAddr, - uint8_t *dat, - uint16_t byteCount, - bool callback); - -/***************************************************************************//** - * @brief - * Perform a remote wakeup signaling sequence. - * - * @note - * It is the responsibility of the application to ensure that remote wakeup - * is not attempted before the device has been suspended for at least 5 - * miliseconds. This function should not be called from within an interrupt - * handler. - * - * @return - * @ref USB_STATUS_OK on success, else an appropriate error code. - ******************************************************************************/ -int8_t USBD_RemoteWakeup(void); - -/***************************************************************************//** - * @brief - * Processes USB events when the library is configured for polled mode - * - * @details - * The USB library can be configured for interrupt (SLAB_USB_POLLED_MODE == 0) - * or polled (SLAB_USB_POLLED_MODE == 1) mode. - * - * When in interrupt mode, the USB interrupt handler will trigger - * when a USB event occurs. Callback functions will be called as needed. - * - * When in polled mode, the application must call USBD_Run() periodically to - * check for and process USB events. This may be useful in complex systems or - * when using an RTOS to perform all USB processing in the main loop instead - * of in the interrupt context. - * - ******************************************************************************/ -void USBD_Run(void); - -/***************************************************************************//** - * @brief - * Set an endpoint in the stalled (halted) state. - * - * @param epAddr - * The address of the endpoint to stall. - * - * @return - * @ref USB_STATUS_OK on success, else an appropriate error code. - ******************************************************************************/ -int8_t USBD_StallEp(int8_t epAddr); - -/***************************************************************************//** - * @brief - * Stop USB device stack operation. - * - * @details - * The data-line pullup resistor is turned off, USB interrupts are disabled, - * and finally the USB pins are disabled. - ******************************************************************************/ -void USBD_Stop(void); - -/***************************************************************************//** - * @brief - * Enters USB suspend mode - * - * @details - * Disables USB transceiver, VDD Monitor, and prefetch engine. Suspends the - * internal regulator and internal oscillator. - * This function will not exit until the device recognizes resume signaling, - * VBUS attachment/removal, or a remote wakeup source interrupt. - * Before exiting, restores the states of the USB transceiver, - * VDD Monitor, prefetch engine, and internal regulator. - ******************************************************************************/ -void USBD_Suspend(void); - -/***************************************************************************//** - * @brief - * Reset stall state on a stalled (halted) endpoint. - * - * @param epAddr - * The address of the endpoint to un-stall. - * - * @return - * @ref USB_STATUS_OK on success, else an appropriate error code. - ******************************************************************************/ -int8_t USBD_UnStallEp(uint8_t epAddr); - -/***************************************************************************//** - * @brief - * Start a write (IN) transfer on an endpoint. - * - * @param epAddr - * Endpoint address. - * - * @param dat - * Pointer to transfer data buffer. This buffer must be WORD (4 byte) aligned. - * - * @param byteCount - * Transfer length. - * - * @param callback - * Boolean to determine if USB_XferCompleteCb should be called for this - * transfer. - * - * @return - * @ref USB_STATUS_OK on success, else an appropriate error code. - ******************************************************************************/ -int8_t USBD_Write(uint8_t epAddr, - uint8_t *dat, - uint16_t byteCount, - bool callback); - -/** @} (end addtogroup efm8_api API Functions) */ - -/***************************************************************************//** - * @addtogroup efm8_callbacks Callback Functions - * @{ - ******************************************************************************/ - -/***************************************************************************//** - * @brief - * USB Handler Entry callback function. - * @details - * Some systems may wish to be in a low-power state when between USB events. - * This low-power state may configure the system clock to a very low - * frequency. In order to reduce the execution time of the USB handler, this - * function is called before the handler executes to allow the system to switch - * to a higher clock source. When all USB processing is complete, - * @ref USBD_ExitHandler() will be called to allow the system to return - * to the low-power state. - * This callback function is optionally enabled by setting - * @ref SLAB_USB_HANDLER_CB to 1. - ******************************************************************************/ -void USBD_EnterHandler(void); - -/***************************************************************************//** - * @brief - * USB Handler Exit callback function. - * @details - * Some systems may wish to be in a low-power state when between USB events. - * This low-power state may configure the system clock to a very low - * frequency. This function is called after all USB processing is finished - * to allow a system that was previously configured by - * @ref USBD_EnterHandler() for high power to return to a low power state. - * This callback function is optionally enabled by setting - * @ref SLAB_USB_HANDLER_CB to 1. - ******************************************************************************/ -void USBD_ExitHandler(void); - -/***************************************************************************//** - * @brief - * USB Reset callback function. - * @details - * Called whenever USB reset signaling is detected on the USB port. - ******************************************************************************/ -void USBD_ResetCb(void); - -/***************************************************************************//** - * @brief - * USB Start Of Frame (SOF) interrupt callback function. - * - * @details - * Called at each SOF interrupt (if enabled), - * - * @param sofNr - * Current frame number. The value rolls over to 0 after 16383 (0x3FFF). - ******************************************************************************/ -void USBD_SofCb(uint16_t sofNr); - -/***************************************************************************//** - * @brief - * USB State change callback function. - * - * @details - * Called whenever the USB state of the device changes - * - * @param oldState - * The device USB state just left. See @ref USBD_State_TypeDef. - * - * @param newState - * New (the current) USB device state. See @ref USBD_State_TypeDef. - ******************************************************************************/ -void USBD_DeviceStateChangeCb(USBD_State_TypeDef oldState, - USBD_State_TypeDef newState); - -/***************************************************************************//** - * @brief - * USB power mode callback function. - * - * @details - * Called whenever the device stack needs to know if the device is currently - * self- or bus-powered. Typically when host has issued a @ref GET_STATUS - * setup command. - * - * @return - * True if self-powered, false otherwise. - ******************************************************************************/ -bool USBD_IsSelfPoweredCb(void); - -/***************************************************************************//** - * @brief - * USB setup request callback function. - * - * @details - * Called on each setup request received from host. This gives the system a - * possibility to extend or override standard requests, and to implement class - * or vendor specific requests. Return @ref USB_STATUS_OK if the request is - * handled, return @ref USB_STATUS_REQ_ERR if it is an illegal request or - * return @ref USB_STATUS_REQ_UNHANDLED to pass the request on to the default - * request handler. - * - * @param setup - * Pointer to a USB setup packet. See @ref USB_Setup_TypeDef. - * - * @return - * An appropriate status/error code. See @ref USB_Status_TypeDef. - ******************************************************************************/ -USB_Status_TypeDef USBD_SetupCmdCb(SI_VARIABLE_SEGMENT_POINTER(setup, - USB_Setup_TypeDef, - MEM_MODEL_SEG)); - -/***************************************************************************//** - * @brief - * USB set interface callback function. - * - * @details - * Called each time the SET_INTERFACE request is made. - * - * @param interface - * Number of the interface to set. - * - * @param altSetting - * Alternate setting for the interface - * - * @return - * @ref USB_STATUS_OK if the alternate interface is valid and can be set, - * @ref USB_STATUS_REQ_ERR otherwise - ******************************************************************************/ -USB_Status_TypeDef USBD_SetInterfaceCb(uint8_t interface, uint8_t altSetting); - -/***************************************************************************//** - * @brief - * Queries the application to see if a remote wakeup occurred. - * @details - * If remote wakeup is enabled via @ref SLAB_USB_REMOTE_WAKEUP_ENABLED, the - * USB library will query the application after waking from suspend to see if - * the remote wakeup source was the reason for the wakeup. If this function - * returns True, the library will exit suspend mode and the application should - * call @ref USBD_RemoteWakeup() to wake up the host. - * @return - * True if the remote wakeup source was the reason the device woke from - * suspend, false otherwise. - * - ******************************************************************************/ -bool USBD_RemoteWakeupCb(void); - -/***************************************************************************//** - * @brief - * Delays 10 - 15 ms while resume signaling is active during a remote - * wakeup event - * - ******************************************************************************/ -void USBD_RemoteWakeupDelay(void); - -/***************************************************************************//** - * @brief - * Processes USB events when the library is configured for polled mode - * - * @ details - * The USB library can be configured for interrupt - * (@ref SLAB_USB_POLLED_MODE == 0) or polled (@ref SLAB_USB_POLLED_MODE == 1) - * mode. - * - * When in interrupt mode, the USB interrupt handler will trigger - * when a USB event occurs. Callback functions will be called as needed. - * - * When in polled mode, the application must call USBD_Run() periodically to - * check for and process USB events. This may be useful in complex systems or - * when using an RTOS to perform all USB processing in the main loop instead - * of in the interrupt context. - * - ******************************************************************************/ -void USBD_Run(void); - -/***************************************************************************//** - * @brief - * USB transfer complete callback function. - * - * @details - * Called each time a packet is sent on an IN endpoint or received on an - * OUT endpoint. - * - * @param epAddr - * Endpoint on which the transfer occurred - * - * @param status - * Status of the endpoint - * - * @param xferred - * For bulk, interrupt, and control transfers: - * Number of bytes transferred since the last USBD_Write() or USBD_Read() - * call. - * For isochronous IN transfers: - * This parameter is not used - * For isochronous OUT transfers: - * the number of bytes received in the last packet - * - * @param remaining - * For bulk, interrupt, and control transfers: - * Number of bytes left to send or receive on the endpoint - * For isochronous transfers: - * The current index into the circular buffer holding isochronous data - * - * @return - * For bulk, interrupt, and control transfers: - * '0' - * For isochronous IN transfers: - * the number of bytes to transmit in the next packet - * For isochronous OUT ransfers: - * '0' - ******************************************************************************/ -uint16_t USBD_XferCompleteCb(uint8_t epAddr, \ - USB_Status_TypeDef status, \ - uint16_t xferred, \ - uint16_t remaining); - -/** @} (end addtogroup efm8_callbacks Callback Functions) */ - -/// @cond DO_NOT_INCLUDE_WITH_DOXYGEN -// -------------------- FIFO Access Functions --------------------------------- -void USB_ReadFIFO(uint8_t fifoNum, uint8_t numBytes, uint8_t *dat); -void USB_WriteFIFO(uint8_t fifoNum, uint8_t numBytes, uint8_t *dat, bool txPacket); -/// @endcond DO_NOT_INCLUDE_WITH_DOXYGEN - -// -------------------- Include Files ------------------------------------------ - - // Error if peripheral driver not in use - #include "usb_0.h" - -/** @} (end addtogroup Efm8_usb) */ - -#endif // __SILICON_LABS_EFM8_USB_H__ diff --git a/targets/efm8/lib/efm8_usb/src/efm8_usbd.c b/targets/efm8/lib/efm8_usb/src/efm8_usbd.c deleted file mode 100644 index 24e2d8d..0000000 --- a/targets/efm8/lib/efm8_usb/src/efm8_usbd.c +++ /dev/null @@ -1,755 +0,0 @@ -/**************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#include "si_toolchain.h" -#include "efm8_usb.h" -//#include "assert.h" -#include -#define SLAB_ASSERT(x) -// ----------------------------------------------------------------------------- -// Global Variables - -/// Tracks the state of the USB device and endpoints and contains pointers -/// to all descriptors. -SI_SEGMENT_VARIABLE(myUsbDevice, USBD_Device_TypeDef, MEM_MODEL_SEG); - -// ----------------------------------------------------------------------------- -// Macros - -/// Returns the requested endpoint object of type USBD_Ep_TypeDef -/// This macro does not check that epAddr is valid, so the calling function -/// should verify epAddr before using the macro. -#define GetEp(epAddr) (&myUsbDevice.ep0 + epAddr) - - -#if SLAB_USB_POLLED_MODE -#define DISABLE_USB_INTS {} -#define ENABLE_USB_INTS {} - -#else -/// Saves the current state of the USB Interrupt Enable to a variable called -/// usbIntsEnabled, then disables USB interrupts. -#define DISABLE_USB_INTS { usbIntsEnabled = USB_GetIntsEnabled(); USB_DisableInts(); } - -/// Sets the USB Interrupt Enable bit to the value of usbIntsEnabled. -/// @ref DISABLE_USB_INTS must be used before this macro is used. -#define ENABLE_USB_INTS { if (usbIntsEnabled) {USB_EnableInts(); } } -#endif // SLAB_USB_POLLED_MODE - -// Function in efm8_usbdint.c to force load the module for libraries -extern void forceModuleLoad_usbint(void); - -// ----------------------------------------------------------------------------- -// USB API Functions - -void USBD_AbortAllTransfers(void) -{ - uint8_t i; - bool usbIntsEnabled; - - USB_SaveSfrPage(); - DISABLE_USB_INTS; - - // Call USBD_AbortTransfer() for each endpoint - for (i = 1; i < SLAB_USB_NUM_EPS_USED; i++) - { - USBD_AbortTransfer(i); - } - - ENABLE_USB_INTS; - USB_RestoreSfrPage(); -} - -int8_t USBD_AbortTransfer(uint8_t epAddr) -{ - USBD_Ep_TypeDef MEM_MODEL_SEG *ep; - uint8_t retVal = USB_STATUS_OK; - bool usbIntsEnabled; - - USB_SaveSfrPage(); - - // Verify this is a valid endpoint address and is not Endpoint 0. - if ((epAddr == EP0) || (epAddr >= SLAB_USB_NUM_EPS_USED)) - { - SLAB_ASSERT(false); - retVal = USB_STATUS_ILLEGAL; - } - else - { - DISABLE_USB_INTS; - ep = GetEp(epAddr); - - // If the state of the endpoint is already idle, there is not need to abort - // a transfer - if (ep->state != D_EP_IDLE) - { - switch (epAddr) - { - #if SLAB_USB_EP1IN_USED - case EP1IN: - USB_AbortInEp(1); - break; - #endif - #if SLAB_USB_EP2IN_USED - case EP2IN: - USB_AbortInEp(2); - break; - #endif - #if SLAB_USB_EP3IN_USED - case EP3IN: - USB_AbortInEp(3); - break; - #endif - #if SLAB_USB_EP1OUT_USED - case EP1OUT: - USB_AbortOutEp(1); - break; - #endif - #if SLAB_USB_EP2OUT_USED - case EP2OUT: - USB_AbortOutEp(2); - break; - #endif - #if SLAB_USB_EP3OUT_USED - case EP3OUT: - USB_AbortOutEp(3); - break; - #endif - } - - // Set the endpoint state to idle and clear out endpoint state variables - ep->state = D_EP_IDLE; - ep->misc.c = 0; - } - } - - ENABLE_USB_INTS; - USB_RestoreSfrPage(); - - return retVal; -} - -void USBD_Connect(void) -{ - USB_SaveSfrPage(); - myUsbDevice.ep0.state = D_EP_IDLE; - USB_EnablePullUpResistor(); - USB_EnableTransceiver(); - USB_RestoreSfrPage(); -} - -void USBD_Disconnect(void) -{ - USB_SaveSfrPage(); - USB_DisablePullUpResistor(); - USB_RestoreSfrPage(); -} - -bool USBD_EpIsBusy(uint8_t epAddr) -{ - USBD_Ep_TypeDef MEM_MODEL_SEG *ep; - - // Verify this is a valid endpoint address - if (epAddr >= SLAB_USB_NUM_EPS_USED) - { - SLAB_ASSERT(false); - return true; - } - - ep = GetEp(epAddr); - - if (ep->state == D_EP_IDLE) - { - return false; - } - - return true; -} - -USBD_State_TypeDef USBD_GetUsbState(void) -{ - return myUsbDevice.state; -} - -int8_t USBD_Init(const USBD_Init_TypeDef *p) -{ - uint8_t i; - - USB_SaveSfrPage(); - USB_DisableInts(); - - // This forces the liner to bring in the contents efm8_usbdint - // It is place here since all users MUST call this function - // for the library to work properly - forceModuleLoad_usbint(); - - - // Zero out the myUsbDevice struct, then initialize all non-zero members - for (i = 0; i < sizeof(myUsbDevice); i++) - { - *((uint8_t MEM_MODEL_SEG *)&myUsbDevice + i) = 0; - } - - // Get the USB descriptors from p - myUsbDevice.deviceDescriptor = p->deviceDescriptor; - myUsbDevice.configDescriptor = (USB_ConfigurationDescriptor_TypeDef *)p->configDescriptor; - myUsbDevice.stringDescriptors = p->stringDescriptors; - myUsbDevice.numberOfStrings = p->numberOfStrings; - - // Enable USB clock -#if SLAB_USB_FULL_SPEED - USB_SetClockIntOsc(); - USB_SelectFullSpeed(); -#else - USB_SetClockIntOscDiv8(); - USB_SelectLowSpeed(); -#endif // SLAB_USB_FULL_SPEED - - // Enable or disable VBUS detection -#if SLAB_USB_BUS_POWERED - USB_VbusDetectDisable(); -#else - USB_VbusDetectEnable(); -#endif - - USB_ForceReset(); - USB_EnableDeviceInts(); - USBD_Connect(); - - // If VBUS is present, the state should be Default. - // Otherwise, it is Attached. -#if SLAB_USB_BUS_POWERED - myUsbDevice.state = USBD_STATE_DEFAULT; -#else - if (USB_IsVbusOn()) - { - myUsbDevice.state = USBD_STATE_DEFAULT; - } - else - { - myUsbDevice.state = USBD_STATE_ATTACHED; - } -#endif - - // Only enable USB interrupts when not in polled mode -#if (SLAB_USB_POLLED_MODE == 0) - USB_EnableInts(); -#endif - - USB_RestoreSfrPage(); - USB_DisableInhibit(); - - return USB_STATUS_OK; -} - -int8_t USBD_Read(uint8_t epAddr, - uint8_t *dat, - uint16_t byteCount, - bool callback) -{ - bool usbIntsEnabled; - USBD_Ep_TypeDef MEM_MODEL_SEG *ep; - - USB_SaveSfrPage(); - - // Verify the endpoint address is valid. - switch (epAddr) - { - case EP0: -#if SLAB_USB_EP1OUT_USED - case EP1OUT: -#endif -#if SLAB_USB_EP2OUT_USED - case EP2OUT: -#endif -#if SLAB_USB_EP3OUT_USED - case EP3OUT: -#endif - break; -#if SLAB_USB_EP1IN_USED - case EP1IN: -#endif -#if SLAB_USB_EP2IN_USED - case EP2IN: -#endif -#if SLAB_USB_EP3IN_USED - case EP3IN: -#endif - default: - SLAB_ASSERT(false); - return USB_STATUS_ILLEGAL; - } - - // If the device has not been configured, we cannot start a transfer. - if ((epAddr != EP0) && (myUsbDevice.state != USBD_STATE_CONFIGURED)) - { - return USB_STATUS_DEVICE_UNCONFIGURED; - } - - ep = GetEp(epAddr); - - // If the endpoint is not idle, we cannot start a new transfer. - // Return the appropriate error code. - if (ep->state != D_EP_IDLE) - { - if (ep->state == D_EP_STALL) - { - return USB_STATUS_EP_STALLED; - } - else - { - return USB_STATUS_EP_BUSY; - } - } - - DISABLE_USB_INTS; - - ep->buf = dat; - ep->remaining = byteCount; - ep->state = D_EP_RECEIVING; - ep->misc.bits.callback = callback; - ep->misc.bits.waitForRead = false; - - // If isochronous, set the buffer index to 0 -#if ((SLAB_USB_EP3OUT_USED) && (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC)) - if (epAddr == EP3OUT) - { - myUsbDevice.ep3outIsoIdx = 0; - } -#endif - - ENABLE_USB_INTS; - USB_RestoreSfrPage(); - - return USB_STATUS_OK; -} - -#if SLAB_USB_REMOTE_WAKEUP_ENABLED -int8_t USBD_RemoteWakeup(void) -{ - // The device must be suspended and Remote Wakeup must have been previously - // configured with a SET_FEATURE (Remote Wakeup) command. - if ((myUsbDevice.state != USBD_STATE_SUSPENDED) || - (myUsbDevice.remoteWakeupEnabled == false)) - { - return USB_STATUS_ILLEGAL; - } - - USB_ForceResume(); - USBD_RemoteWakeupDelay(); // Application will provide the delay between - // starting and stopping the resume signal. - USB_ClearResume(); - - return USB_STATUS_OK; -} -#endif // SLAB_USB_REMOTE_WAKEUP_ENABLED - -#if SLAB_USB_POLLED_MODE -void USBD_Run(void) -{ - usbIrqHandler(); -} -#endif // SLAB_USB_POLLED_MODE - -int8_t USBD_StallEp(uint8_t epAddr) -{ - bool usbIntsEnabled; - - USB_SaveSfrPage(); - - // Verify the endpoint address is valid and not Endpoint 0. - if ((epAddr == EP0) || (epAddr >= SLAB_USB_NUM_EPS_USED)) - { - SLAB_ASSERT(false); - return USB_STATUS_ILLEGAL; - } - - DISABLE_USB_INTS; - - // Halt the appropriate endpoint by sending a stall and setting the endpoint - // state to Halted (D_EP_HALT). - switch (epAddr) - { -#if SLAB_USB_EP1IN_USED - case (EP1IN): - myUsbDevice.ep1in.state = D_EP_HALT; - USB_SetIndex(1); - USB_EpnInStall(); - break; -#endif -#if SLAB_USB_EP2IN_USED - case (EP2IN): - myUsbDevice.ep2in.state = D_EP_HALT; - USB_SetIndex(2); - USB_EpnInStall(); - break; -#endif -#if SLAB_USB_EP3IN_USED - case (EP3IN): - myUsbDevice.ep3in.state = D_EP_HALT; - USB_SetIndex(3); - USB_EpnInStall(); - break; -#endif -#if SLAB_USB_EP1OUT_USED - case (EP1OUT): - myUsbDevice.ep1out.state = D_EP_HALT; - USB_SetIndex(1); - USB_EpnOutStall(); - break; -#endif -#if SLAB_USB_EP2OUT_USED - case (EP2OUT): - myUsbDevice.ep2out.state = D_EP_HALT; - USB_SetIndex(2); - USB_EpnOutStall(); - break; -#endif -#if SLAB_USB_EP3OUT_USED - case (EP3OUT): - myUsbDevice.ep3out.state = D_EP_HALT; - USB_SetIndex(3); - USB_EpnOutStall(); - break; -#endif - } - - ENABLE_USB_INTS; - USB_RestoreSfrPage(); - - return USB_STATUS_OK; -} - -void USBD_Stop(void) -{ - USB_DisableInts(); - USBD_Disconnect(); - USBD_SetUsbState(USBD_STATE_NONE); -} - -void USBD_Suspend(void) -{ - uint8_t i; - bool regulatorEnabled, prefetchEnabled; - - USB_SaveSfrPage(); - - // If the USB_PWRSAVE_MODE_ONVBUSOFF is enabled, we can enter suspend if VBUS - // is not present even if the USB has not detected a suspend event. -#if ((!(SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_ONVBUSOFF)) || \ - (SLAB_USB_BUS_POWERED)) - if (USB_IsSuspended() == true) -#else - if ((USB_IsSuspended() == true) || (USB_IsVbusOn() == false)) -#endif - { - USB_SuspendTransceiver(); - -#if SLAB_USB_FULL_SPEED - USB_SetSuspendClock(); -#endif - - // Get the state of the prefetch engine enable bit and disable the prefetch - // engine - prefetchEnabled = USB_IsPrefetchEnabled(); - USB_DisablePrefetch(); - - // Get the state of the internal regulator before suspending it. - if (USB_IsRegulatorEnabled() == true) - { - regulatorEnabled = true; - -#if (SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_FASTWAKE) - USB_SuspendRegulatorFastWake(); -#else - USB_SuspendRegulator(); - - // Wait at least 12 clock instructions before halting the internal oscillator - for (i = 0; i < 3; i++) - { - } -#endif - } - else - { - regulatorEnabled = false; - } - - do - { - USB_SuspendOscillator(); - - // When we arrive here, the device has waked from suspend mode. - -#if SLAB_USB_REMOTE_WAKEUP_ENABLED - // If remote wakeup is enabled, query the application if the remote - // wakeup event occurred. If so, exit USBD_Suspend(). - if (USB_IsSuspended() == true) - { - if (USBD_RemoteWakeupCb() == true) - { - break; - } - } -#endif -#if ((!(SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_ONVBUSOFF)) && \ - (SLAB_USB_BUS_POWERED == 0)) - // If the USB_PWRSAVE_MODE_ONVBUSOFF mode is disabled, VBUS has been - // removed, so exit USBD_Suspend(). - if (USB_IsVbusOn() == false) - { - break; - } -#endif - } while (USB_IsSuspended() == true); - - // Restore the internal regulator - if (regulatorEnabled == true) - { - USB_UnsuspendRegulator(); - } - - // Restore the prefetch engine - if (prefetchEnabled == true) - { - USB_EnablePrefetch(); - } - -#if SLAB_USB_FULL_SPEED - // Restore the clock - USB_SetNormalClock(); -#endif - USB_EnableTransceiver(); - } - - USB_RestoreSfrPage(); -} - -int8_t USBD_UnStallEp(uint8_t epAddr) -{ - bool usbIntsEnabled; - - USB_SaveSfrPage(); - - // Verify the endpoint address is valid and not Endpoint 0. - if ((epAddr == EP0) || (epAddr >= SLAB_USB_NUM_EPS_USED)) - { - SLAB_ASSERT(false); - return USB_STATUS_ILLEGAL; - } - else - { - DISABLE_USB_INTS; - - // End the stall condition and set the endpoint state to idle. - switch (epAddr) - { -#if SLAB_USB_EP1IN_USED - case (EP1IN): - myUsbDevice.ep1in.state = D_EP_IDLE; - USB_SetIndex(1); - USB_EpnInEndStall(); - break; -#endif -#if SLAB_USB_EP2IN_USED - case (EP2IN): - myUsbDevice.ep2in.state = D_EP_IDLE; - USB_SetIndex(2); - USB_EpnInEndStall(); - break; -#endif -#if SLAB_USB_EP3IN_USED - case (EP3IN): - myUsbDevice.ep3in.state = D_EP_IDLE; - USB_SetIndex(3); - USB_EpnInEndStall(); - break; -#endif -#if SLAB_USB_EP1OUT_USED - case (EP1OUT): - myUsbDevice.ep1out.state = D_EP_IDLE; - USB_SetIndex(1); - USB_EpnOutEndStall(); - break; -#endif -#if SLAB_USB_EP2OUT_USED - case (EP2OUT): - myUsbDevice.ep2out.state = D_EP_IDLE; - USB_SetIndex(2); - USB_EpnOutEndStall(); - break; -#endif -#if SLAB_USB_EP3OUT_USED - case (EP3OUT): - myUsbDevice.ep3out.state = D_EP_IDLE; - USB_SetIndex(3); - USB_EpnOutEndStall(); - break; -#endif - } - - ENABLE_USB_INTS; - USB_RestoreSfrPage(); - } - - return USB_STATUS_OK; -} - -int8_t USBD_Write(uint8_t epAddr, - uint8_t *dat, - uint16_t byteCount, - bool callback) -{ - bool usbIntsEnabled; - USBD_Ep_TypeDef MEM_MODEL_SEG *ep; - - USB_SaveSfrPage(); - - // Verify the endpoint address is valid. - switch (epAddr) - { - case EP0: -#if SLAB_USB_EP1IN_USED - case EP1IN: -#endif -#if SLAB_USB_EP2IN_USED - case EP2IN: -#endif -#if SLAB_USB_EP3IN_USED - case EP3IN: -#endif - break; -#if SLAB_USB_EP1OUT_USED - case EP1OUT: -#endif -#if SLAB_USB_EP2OUT_USED - case EP2OUT: -#endif -#if SLAB_USB_EP3OUT_USED - case EP3OUT: -#endif - default: - SLAB_ASSERT(false); - return USB_STATUS_ILLEGAL; - } - - // If the device is not configured and it is not Endpoint 0, we cannot begin - // a transfer. - if ((epAddr != EP0) && (myUsbDevice.state != USBD_STATE_CONFIGURED)) - { - return USB_STATUS_DEVICE_UNCONFIGURED; - } - - ep = GetEp(epAddr); - - // If the endpoint is not idle, we cannot start a new transfer. - // Return the appropriate error code. - if (ep->state != D_EP_IDLE) - { - if (ep->state == D_EP_STALL) - { - return USB_STATUS_EP_STALLED; - } - else - { - return USB_STATUS_EP_BUSY; - } - } - - DISABLE_USB_INTS; - - ep->buf = dat; - ep->remaining = byteCount; - ep->state = D_EP_TRANSMITTING; - ep->misc.bits.callback = callback; - - switch (epAddr) - { - // For Endpoint 0, set the inPacketPending flag to true. The USB handler - // will see this on the next SOF and begin the transfer. - case (EP0): - myUsbDevice.ep0.misc.bits.inPacketPending = true; - break; - - // For data endpoints, we will call USB_WriteFIFO here to reduce latency - // between the call to USBD_Write() and the first packet being sent. -#if SLAB_USB_EP1IN_USED - case (EP1IN): - USB_WriteFIFO(1, - (byteCount > SLAB_USB_EP1IN_MAX_PACKET_SIZE) ? SLAB_USB_EP1IN_MAX_PACKET_SIZE : byteCount, - myUsbDevice.ep1in.buf, - true); - break; -#endif // SLAB_USB_EP1IN_USED -#if SLAB_USB_EP2IN_USED - case (EP2IN): - USB_WriteFIFO(2, - (byteCount > SLAB_USB_EP2IN_MAX_PACKET_SIZE) ? SLAB_USB_EP2IN_MAX_PACKET_SIZE : byteCount, - myUsbDevice.ep2in.buf, - true); - break; -#endif // SLAB_USB_EP2IN_USED -#if SLAB_USB_EP3IN_USED - case (EP3IN): -#if ((SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_INTR)) - USB_WriteFIFO(3, - (byteCount > SLAB_USB_EP3IN_MAX_PACKET_SIZE) ? SLAB_USB_EP3IN_MAX_PACKET_SIZE : byteCount, - myUsbDevice.ep3in.buf, - true); -#elif (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC) - myUsbDevice.ep3in.misc.bits.inPacketPending = true; - myUsbDevice.ep3inIsoIdx = 0; -#endif - break; -#endif // SLAB_USB_EP3IN_USED - } - - ENABLE_USB_INTS; - USB_RestoreSfrPage(); - - return USB_STATUS_OK; -} - -// ----------------------------------------------------------------------------- -// UtilityFunctions - -void USBD_SetUsbState(USBD_State_TypeDef newState) -{ -#if (SLAB_USB_SUPPORT_ALT_INTERFACES) - uint8_t i; -#endif - USBD_State_TypeDef currentState; - - currentState = myUsbDevice.state; - - // If the device is un-configuring, disable the data endpoints and clear out - // alternate interface settings - if ((currentState >= USBD_STATE_SUSPENDED) - && (newState < USBD_STATE_SUSPENDED)) - { - USBD_AbortAllTransfers(); - -#if (SLAB_USB_SUPPORT_ALT_INTERFACES) - for (i = 0; i < SLAB_USB_NUM_INTERFACES; i++) - { - myUsbDevice.interfaceAltSetting[i] = 0; - } -#endif - } - if (newState == USBD_STATE_SUSPENDED) - { - myUsbDevice.savedState = currentState; - } - - myUsbDevice.state = newState; - -#if SLAB_USB_STATE_CHANGE_CB - if (currentState != newState) - { - USBD_DeviceStateChangeCb(currentState, newState); - } -#endif -} diff --git a/targets/efm8/lib/efm8_usb/src/efm8_usbdch9.c b/targets/efm8/lib/efm8_usb/src/efm8_usbdch9.c deleted file mode 100644 index c0afa23..0000000 --- a/targets/efm8/lib/efm8_usb/src/efm8_usbdch9.c +++ /dev/null @@ -1,880 +0,0 @@ -/**************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#include "si_toolchain.h" -#include "efm8_usb.h" -#include -#include - -// ----------------------------------------------------------------------------- -// Function Prototypes - -static USB_Status_TypeDef ClearFeature(void); -static USB_Status_TypeDef GetConfiguration(void); -static USB_Status_TypeDef GetDescriptor(void); -static USB_Status_TypeDef GetInterface(void); -static USB_Status_TypeDef GetStatus(void); -static USB_Status_TypeDef SetAddress(void); -static USB_Status_TypeDef SetConfiguration(void); -static USB_Status_TypeDef SetFeature(void); -static USB_Status_TypeDef SetInterface(void); -static void USBD_ActivateAllEps(bool forceIdle); -static void EP0_Write(uint8_t *dat, uint16_t numBytes); -void SendEp0Stall(void); - -// ----------------------------------------------------------------------------- -// Global Variables - -extern SI_SEGMENT_VARIABLE(myUsbDevice, USBD_Device_TypeDef, MEM_MODEL_SEG); -SI_SEGMENT_VARIABLE(txZero[2], uint8_t, SI_SEG_CODE); - -// ----------------------------------------------------------------------------- -// Static Global Variables - -static uint16_t pStatus; - -// ----------------------------------------------------------------------------- -// Chapter 9 Functions - -/***************************************************************************//** - * @brief Processes Standard Request (Chapter 9 Command) - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -USB_Status_TypeDef USBDCH9_SetupCmd(void) -{ - USB_Status_TypeDef status = USB_STATUS_OK; - - switch (myUsbDevice.setup.bRequest) - { - case GET_STATUS: - status = GetStatus(); - break; - - case CLEAR_FEATURE: - status = ClearFeature(); - break; - - case SET_FEATURE: - status = SetFeature(); - break; - - case SET_ADDRESS: - status = SetAddress(); - break; - - case GET_DESCRIPTOR: - status = GetDescriptor(); - break; - - case GET_CONFIGURATION: - status = GetConfiguration(); - break; - - case SET_CONFIGURATION: - status = SetConfiguration(); - break; - - case GET_INTERFACE: - status = GetInterface(); - break; - - case SET_INTERFACE: - status = SetInterface(); - break; - - default: - status = USB_STATUS_REQ_ERR; - break; - } - - // Reset index to 0 in case one of the above commands modified it - USB_SetIndex(0); - - // If the command resulted in an error, send a procedural stall - if (status == USB_STATUS_REQ_ERR) - { - SendEp0Stall(); - } - - return status; -} - -/***************************************************************************//** - * @brief Clears the requested feature - * @details Supports CLEAR_FEATURE for Remote Wakeup and Endpoint Halt - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef ClearFeature(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if (myUsbDevice.setup.wLength == 0) - { - switch (myUsbDevice.setup.bmRequestType.Recipient) - { - #if SLAB_USB_REMOTE_WAKEUP_ENABLED - case USB_SETUP_RECIPIENT_DEVICE: - if ((myUsbDevice.setup.wIndex == 0) - && (myUsbDevice.setup.wValue == USB_FEATURE_DEVICE_REMOTE_WAKEUP) - && (myUsbDevice.state >= USBD_STATE_ADDRESSED)) - { - // Remote wakeup feature clear - myUsbDevice.remoteWakeupEnabled = false; - retVal = USB_STATUS_OK; - } - break; - #endif // SLAB_USB_REMOTE_WAKEUP_ENABLED - case USB_SETUP_RECIPIENT_ENDPOINT: - if (myUsbDevice.setup.wValue == USB_FEATURE_ENDPOINT_HALT) - { - // Device does not support halting endpoint 0, but do not return - // an error as this is a valid request - if (((myUsbDevice.setup.wIndex & ~USB_EP_DIR_IN) == 0) - && (myUsbDevice.state >= USBD_STATE_ADDRESSED)) - { - retVal = USB_STATUS_OK; - } - else if (((myUsbDevice.setup.wIndex & ~USB_SETUP_DIR_D2H) < SLAB_USB_NUM_EPS_USED) - && (myUsbDevice.state == USBD_STATE_CONFIGURED)) - { - retVal = USB_STATUS_OK; - USB_SetIndex((myUsbDevice.setup.wIndex & 0xFF) & ~USB_SETUP_DIR_D2H); - -#if (SLAB_USB_EP1IN_USED || SLAB_USB_EP2IN_USED || SLAB_USB_EP3IN_USED) - if ((myUsbDevice.setup.wIndex & 0xFF) & USB_EP_DIR_IN) - { - USB_EpnInEndStallAndClearDataToggle(); - } -#endif -#if (SLAB_USB_EP1OUT_USED || SLAB_USB_EP2OUT_USED || SLAB_USB_EP3OUT_USED) - if (((myUsbDevice.setup.wIndex & 0xFF) & USB_EP_DIR_IN) == 0) - { - USB_EpnOutEndStallAndClearDataToggle(); - } -#endif - - switch (myUsbDevice.setup.wIndex & 0xFF) - { -#if SLAB_USB_EP1OUT_USED - case (USB_EP_DIR_OUT | 1): - if (myUsbDevice.ep1out.state != D_EP_RECEIVING) - { - myUsbDevice.ep1out.state = D_EP_IDLE; - } - break; -#endif -#if SLAB_USB_EP2OUT_USED - case (USB_EP_DIR_OUT | 2): - if (myUsbDevice.ep2out.state != D_EP_RECEIVING) - { - myUsbDevice.ep2out.state = D_EP_IDLE; - } - break; -#endif -#if SLAB_USB_EP3OUT_USED - case (USB_EP_DIR_OUT | 3): - if (myUsbDevice.ep3out.state != D_EP_RECEIVING) - { - myUsbDevice.ep3out.state = D_EP_IDLE; - } - break; -#endif -#if SLAB_USB_EP1IN_USED - case (USB_EP_DIR_IN | 1): - if (myUsbDevice.ep1in.state != D_EP_TRANSMITTING) - { - myUsbDevice.ep1in.state = D_EP_IDLE; - } - break; -#endif -#if SLAB_USB_EP2IN_USED - case (USB_EP_DIR_IN | 2): - if (myUsbDevice.ep2in.state != D_EP_TRANSMITTING) - { - myUsbDevice.ep2in.state = D_EP_IDLE; - } - break; -#endif -#if SLAB_USB_EP3IN_USED - case (USB_EP_DIR_IN | 3): - if (myUsbDevice.ep3in.state != D_EP_TRANSMITTING) - { - myUsbDevice.ep3in.state = D_EP_IDLE; - } - break; -#endif - } - } - } - } - } - return retVal; -} - -/***************************************************************************//** - * @brief Gets the current configuration value - * @details Zero means the device is not configured, a non-zero value - * is the configuration value of the configured device. - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef GetConfiguration(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if ((myUsbDevice.setup.wIndex == 0) - && (myUsbDevice.setup.wValue == 0) - && (myUsbDevice.setup.wLength == 1) - && (myUsbDevice.setup.bmRequestType.Direction == USB_SETUP_DIR_IN) - && (myUsbDevice.setup.bmRequestType.Recipient == USB_SETUP_RECIPIENT_DEVICE)) - { - if (myUsbDevice.state == USBD_STATE_ADDRESSED) - { - EP0_Write(txZero, 1); - retVal = USB_STATUS_OK; - } - else if (myUsbDevice.state == USBD_STATE_CONFIGURED) - { - EP0_Write(&myUsbDevice.configurationValue, 1); - retVal = USB_STATUS_OK; - } - } - return retVal; -} - -/***************************************************************************//** - * @brief Sends the requested USB Descriptor - * @details Supports single or multiple languages (configured by - * @ref SLAB_USB_NUM_LANGUAGES). - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef GetDescriptor(void) -{ -#if (SLAB_USB_NUM_LANGUAGES > 1) - bool langSupported; - uint8_t lang; -#endif - - uint8_t index; - uint16_t length = 0; - uint8_t *dat; - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if (*((uint8_t *)&myUsbDevice.setup.bmRequestType) == - (USB_SETUP_DIR_D2H | USB_SETUP_TYPE_STANDARD | USB_SETUP_RECIPIENT_DEVICE)) - { - index = myUsbDevice.setup.wValue & 0xFF; - - switch (myUsbDevice.setup.wValue >> 8) - { - case USB_DEVICE_DESCRIPTOR: - if (index != 0) - { - break; - } - dat = (uint8_t *)myUsbDevice.deviceDescriptor; - length = myUsbDevice.deviceDescriptor->bLength; - break; - - case USB_CONFIG_DESCRIPTOR: - if (index != 0) - { - break; - } - dat = (uint8_t *)myUsbDevice.configDescriptor; - length = le16toh(myUsbDevice.configDescriptor->wTotalLength); - break; - - case USB_STRING_DESCRIPTOR: - #if (SLAB_USB_NUM_LANGUAGES == 1) - - dat = (uint8_t *)myUsbDevice.stringDescriptors[index]; - - // Index 0 is the language string. If SLAB_USB_NUM_LANGUAGES == 1, we - // know the length will be 4 and the format will be UTF16LE. - if (index == 0) - { - length = 4; - myUsbDevice.ep0String.encoding.type = USB_STRING_DESCRIPTOR_UTF16LE; - } - // Otherwise, verify the language is correct (either the value set as - // SLAB_USB_LANGUAGE in usbconfig.h, or 0). - else if ((myUsbDevice.setup.wIndex == 0) || (myUsbDevice.setup.wIndex == SLAB_USB_LANGUAGE)) - { - // Verify the index is valid - if (index < myUsbDevice.numberOfStrings) - { - length = *(dat + USB_STRING_DESCRIPTOR_LENGTH); - myUsbDevice.ep0String.encoding.type = *(dat + USB_STRING_DESCRIPTOR_ENCODING); - dat += USB_STRING_DESCRIPTOR_LENGTH; - myUsbDevice.ep0String.encoding.init = true; - } - } - #elif (SLAB_USB_NUM_LANGUAGES > 1) - - langSupported = false; - - // Index 0 is the language. - if (index == 0) - { - dat = ((uint8_t *)myUsbDevice.stringDescriptors->languageArray[0][index]); - length = *((uint8_t *)dat); - myUsbDevice.ep0String.encoding.type = USB_STRING_DESCRIPTOR_UTF16LE; - } - else - { - // Otherwise, verify the language is one of the supported languages or 0. - for (lang = 0; lang < SLAB_USB_NUM_LANGUAGES; lang++) - { - if ((myUsbDevice.stringDescriptors->languageIDs[lang] == myUsbDevice.setup.wIndex) - || (myUsbDevice.stringDescriptors->languageIDs[lang] == 0)) - { - langSupported = true; - break; - } - } - if ((langSupported == true) && (index < myUsbDevice.numberOfStrings)) - { - dat = ((uint8_t *)myUsbDevice.stringDescriptors->languageArray[lang][index]); - length = *(dat + USB_STRING_DESCRIPTOR_LENGTH); - myUsbDevice.ep0String.encoding.type = *(dat + USB_STRING_DESCRIPTOR_ENCODING); - dat += USB_STRING_DESCRIPTOR_LENGTH; - - if (myUsbDevice.ep0String.encoding.type == USB_STRING_DESCRIPTOR_UTF16LE_PACKED) - { - myUsbDevice.ep0String.encoding.init = true; - } - else - { - myUsbDevice.ep0String.encoding.init = false; - } - } - } - #endif // ( SLAB_USB_NUM_LANGUAGES == 1 ) - } - - // If there is a descriptor to send, get the proper length, then call - // EP0_Write() to send. - if (length) - { - if (length > myUsbDevice.setup.wLength) - { - length = myUsbDevice.setup.wLength; - } - - EP0_Write(dat, length); - - retVal = USB_STATUS_OK; - } - } - - return retVal; -} - -/***************************************************************************//** - * @brief Sends the current interface alternate setting - * @details Sends 0x0000 if alternate interfaces are not supported. - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef GetInterface(void) -{ - uint16_t interface = myUsbDevice.setup.wIndex; - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if ((interface < SLAB_USB_NUM_INTERFACES) - && (myUsbDevice.setup.wLength == 1) - && (myUsbDevice.setup.wValue == 0) - && (*((uint8_t *)&myUsbDevice.setup.bmRequestType) == - (USB_SETUP_DIR_D2H | USB_SETUP_TYPE_STANDARD | USB_SETUP_RECIPIENT_INTERFACE))) - { - if (myUsbDevice.state == USBD_STATE_CONFIGURED) - { -#if (SLAB_USB_SUPPORT_ALT_INTERFACES) - // Return the alternate setting for the specified interface - EP0_Write(&myUsbDevice.interfaceAltSetting[interface], 1); -#else - // Alternate interfaces are not supported, so return 0x0000. - EP0_Write(&txZero, 1); -#endif - retVal = USB_STATUS_OK; - } - } - return retVal; -} - -/***************************************************************************//** - * @brief Sends the requested Remote Wakeup, Self-Powered, or - * Endpoint Status - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef GetStatus(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if ((myUsbDevice.setup.wLength == 2) - && (myUsbDevice.setup.wValue == 0) - && (myUsbDevice.setup.bmRequestType.Direction == USB_SETUP_DIR_IN) - && (myUsbDevice.state >= USBD_STATE_ADDRESSED)) - { - pStatus = htole16(0); // Default return value is 0x0000 - - switch (myUsbDevice.setup.bmRequestType.Recipient) - { - case USB_SETUP_RECIPIENT_DEVICE: - if (myUsbDevice.setup.wIndex == 0) - { - #if SLAB_USB_REMOTE_WAKEUP_ENABLED - // Remote wakeup feature status - if (myUsbDevice.remoteWakeupEnabled) - { - pStatus |= htole16(REMOTE_WAKEUP_ENABLED); - } - #endif // SLAB_USB_REMOTE_WAKEUP_ENABLED - - #if SLAB_USB_IS_SELF_POWERED_CB - // Current self/bus power status - if (USBD_IsSelfPoweredCb()) - { - pStatus |= htole16(DEVICE_IS_SELFPOWERED); - } - #elif (SLAB_USB_BUS_POWERED == 0) - pStatus |= htole16(DEVICE_IS_SELFPOWERED); - #endif // SLAB_USB_IS_SELF_POWERED_CB - - retVal = USB_STATUS_OK; - } - break; - - case USB_SETUP_RECIPIENT_INTERFACE: - if (myUsbDevice.setup.wIndex < SLAB_USB_NUM_INTERFACES) - { - retVal = USB_STATUS_OK; - } - break; - - - case USB_SETUP_RECIPIENT_ENDPOINT: - // Device does not support halting endpoint 0, but do not give - // an error as this is a valid request - if (((myUsbDevice.setup.wIndex & ~USB_EP_DIR_IN) == 0) - && (myUsbDevice.state == USBD_STATE_ADDRESSED)) - { - retVal = USB_STATUS_OK; - } - else if (myUsbDevice.state == USBD_STATE_CONFIGURED) - { - switch (myUsbDevice.setup.wIndex & 0xFF) - { - #if SLAB_USB_EP1OUT_USED - case (USB_EP_DIR_OUT | 1): - if (myUsbDevice.ep1out.state == D_EP_HALT) - { - pStatus = htole16(1); - } - retVal = USB_STATUS_OK; - break; - #endif - #if SLAB_USB_EP2OUT_USED - case (USB_EP_DIR_OUT | 2): - if (myUsbDevice.ep2out.state == D_EP_HALT) - { - pStatus = htole16(1); - } - retVal = USB_STATUS_OK; - break; - #endif - #if SLAB_USB_EP3OUT_USED - case (USB_EP_DIR_OUT | 3): - if (myUsbDevice.ep3out.state == D_EP_HALT) - { - pStatus = htole16(1); - } - retVal = USB_STATUS_OK; - break; - #endif - #if SLAB_USB_EP1IN_USED - case (USB_EP_DIR_IN | 1): - if (myUsbDevice.ep1in.state == D_EP_HALT) - { - pStatus = htole16(1); - } - retVal = USB_STATUS_OK; - break; - #endif - #if SLAB_USB_EP2IN_USED - case (USB_EP_DIR_IN | 2): - if (myUsbDevice.ep2in.state == D_EP_HALT) - { - pStatus = htole16(1); - } - retVal = USB_STATUS_OK; - break; - #endif - #if SLAB_USB_EP3IN_USED - case (USB_EP_DIR_IN | 3): - if (myUsbDevice.ep3in.state == D_EP_HALT) - { - pStatus = htole16(1); - } - retVal = USB_STATUS_OK; - break; - #endif - } - } - break; - } - - // If the command was valid, send the requested status. - if (retVal == USB_STATUS_OK) - { - EP0_Write((uint8_t *)&pStatus, 2); - } - } - - return retVal; -} - -/***************************************************************************//** - * @brief Sets the Address - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef SetAddress(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if ((myUsbDevice.setup.wValue < 128) - && (myUsbDevice.setup.wLength == 0) - && (myUsbDevice.setup.bmRequestType.Recipient == USB_SETUP_RECIPIENT_DEVICE) - && (myUsbDevice.setup.wIndex == 0)) - { - // If the device is in the Default state and the address is non-zero, put - // the device in the Addressed state. - if (myUsbDevice.state == USBD_STATE_DEFAULT) - { - if (myUsbDevice.setup.wValue != 0) - { - USBD_SetUsbState(USBD_STATE_ADDRESSED); - } - retVal = USB_STATUS_OK; - } - // If the device is already addressed and the address is zero, put the - // device in the Default state. - else if (myUsbDevice.state == USBD_STATE_ADDRESSED) - { - if (myUsbDevice.setup.wValue == 0) - { - USBD_SetUsbState(USBD_STATE_DEFAULT); - } - retVal = USB_STATUS_OK; - } - - // Set the new address if the request was valid. - if (retVal == USB_STATUS_OK) - { - USB_SetAddress(myUsbDevice.setup.wValue); - } - } - - return retVal; -} - -/***************************************************************************//** - * @brief Sets the Configuration - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef SetConfiguration(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if (((myUsbDevice.setup.wValue >> 8) == 0) - && (myUsbDevice.setup.bmRequestType.Recipient == USB_SETUP_RECIPIENT_DEVICE) - && (myUsbDevice.setup.wLength == 0) - && (myUsbDevice.setup.wIndex == 0)) - { - // If the device is in the Addressed state and a valid Configuration value - // was sent, enter the Configured state. - if (myUsbDevice.state == USBD_STATE_ADDRESSED) - { - if ((myUsbDevice.setup.wValue == 0) - || (myUsbDevice.setup.wValue == myUsbDevice.configDescriptor->bConfigurationValue)) - { - myUsbDevice.configurationValue = myUsbDevice.setup.wValue; - if (myUsbDevice.setup.wValue == myUsbDevice.configDescriptor->bConfigurationValue) - { - USBD_ActivateAllEps(true); - USBD_SetUsbState(USBD_STATE_CONFIGURED); - } - retVal = USB_STATUS_OK; - } - } - // If the device is in the Configured state and Configuration zero is sent, - // abort all transfer and enter the Addressed state. - else if (myUsbDevice.state == USBD_STATE_CONFIGURED) - { - if ((myUsbDevice.setup.wValue == 0) - || (myUsbDevice.setup.wValue == myUsbDevice.configDescriptor->bConfigurationValue)) - { - myUsbDevice.configurationValue = myUsbDevice.setup.wValue; - if (myUsbDevice.setup.wValue == 0) - { - USBD_SetUsbState(USBD_STATE_ADDRESSED); - USBD_AbortAllTransfers(); - } - else - { - // Reenable device endpoints, will reset data toggles - USBD_ActivateAllEps(false); - } - retVal = USB_STATUS_OK; - } - } - } - - return retVal; -} - -/***************************************************************************//** - * @brief Sets the Remote Wakeup or Endpoint Halt Feature - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef SetFeature(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - - if (myUsbDevice.setup.wLength == 0) - { - switch (myUsbDevice.setup.bmRequestType.Recipient) - { - #if SLAB_USB_REMOTE_WAKEUP_ENABLED - case USB_SETUP_RECIPIENT_DEVICE: - if ((myUsbDevice.setup.wIndex == 0) // ITF no. 0 - && (myUsbDevice.setup.wValue == USB_FEATURE_DEVICE_REMOTE_WAKEUP) - && (myUsbDevice.state == USBD_STATE_CONFIGURED)) - { - myUsbDevice.remoteWakeupEnabled = true; - retVal = USB_STATUS_OK; - } - break; - #endif // SLAB_USB_REMOTE_WAKEUP_ENABLED - case USB_SETUP_RECIPIENT_ENDPOINT: - // Device does not support halting endpoint 0, but do not return - // an error as this is a valid request - if (((myUsbDevice.setup.wIndex & ~USB_EP_DIR_IN) == 0) - && (myUsbDevice.state >= USBD_STATE_ADDRESSED)) - { - retVal = USB_STATUS_OK; - } - else if ((((myUsbDevice.setup.wIndex) & ~USB_SETUP_DIR_D2H) < SLAB_USB_NUM_EPS_USED) - && (myUsbDevice.setup.wValue == USB_FEATURE_ENDPOINT_HALT) - && (myUsbDevice.state == USBD_STATE_CONFIGURED)) - { - retVal = USB_STATUS_OK; - USB_SetIndex((myUsbDevice.setup.wIndex & 0xFF) & ~USB_SETUP_DIR_D2H); - - // Enable Stalls on the specified endpoint. -#if (SLAB_USB_EP1IN_USED || SLAB_USB_EP2IN_USED || SLAB_USB_EP3IN_USED) - if ((myUsbDevice.setup.wIndex & 0xFF) & USB_EP_DIR_IN) - { - USB_EpnInStall(); - } -#endif -#if (SLAB_USB_EP1OUT_USED || SLAB_USB_EP2OUT_USED || SLAB_USB_EP3OUT_USED) - if (((myUsbDevice.setup.wIndex & 0xFF) & USB_EP_DIR_IN) == 0) - { - USB_EpnOutStall(); - } -#endif - - // Put the specified endpoint in the Halted state. - switch (myUsbDevice.setup.wIndex & 0xFF) - { - #if SLAB_USB_EP1OUT_USED - case (USB_EP_DIR_OUT | 1): - myUsbDevice.ep1out.state = D_EP_HALT; - break; - #endif - #if SLAB_USB_EP2OUT_USED - case (USB_EP_DIR_OUT | 2): - myUsbDevice.ep2out.state = D_EP_HALT; - break; - #endif - #if SLAB_USB_EP3OUT_USED - case (USB_EP_DIR_OUT | 3): - myUsbDevice.ep3out.state = D_EP_HALT; - break; - #endif - #if SLAB_USB_EP1IN_USED - case (USB_EP_DIR_IN | 1): - myUsbDevice.ep1in.state = D_EP_HALT; - break; - #endif - #if SLAB_USB_EP2IN_USED - case (USB_EP_DIR_IN | 2): - myUsbDevice.ep2in.state = D_EP_HALT; - break; - #endif - #if SLAB_USB_EP3IN_USED - case (USB_EP_DIR_IN | 3): - myUsbDevice.ep3in.state = D_EP_HALT; - break; - #endif - } - } - } - } - - return retVal; -} - -/***************************************************************************//** - * @brief Sets the Interface and Alternate Interface (if supported) - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static USB_Status_TypeDef SetInterface(void) -{ - USB_Status_TypeDef retVal = USB_STATUS_REQ_ERR; - uint8_t interface = (uint8_t)myUsbDevice.setup.wIndex; - uint8_t altSetting = (uint8_t)myUsbDevice.setup.wValue; - - if ((interface < SLAB_USB_NUM_INTERFACES) - && (myUsbDevice.state == USBD_STATE_CONFIGURED) - && (myUsbDevice.setup.wLength == 0) -#if (SLAB_USB_SUPPORT_ALT_INTERFACES == 0) - && (altSetting == 0) -#endif - && (myUsbDevice.setup.bmRequestType.Recipient == USB_SETUP_RECIPIENT_INTERFACE)) - { -#if (SLAB_USB_SUPPORT_ALT_INTERFACES) - if (USBD_SetInterfaceCb(interface, altSetting) == USB_STATUS_OK) - { - myUsbDevice.interfaceAltSetting[interface] = altSetting; - retVal = USB_STATUS_OK; - } -#else -#if (SLAB_USB_NUM_INTERFACES == 1) - // Reset data toggles on EP's - USBD_ActivateAllEps(false); -#endif // ( SLAB_USB_NUM_INTERFACES == 1 ) - retVal = USB_STATUS_OK; -#endif // ( SLAB_USB_SUPPORT_ALT_INTERFACES ) - } - - return retVal; -} - -// ----------------------------------------------------------------------------- -// Utility Functions - -/***************************************************************************//** - * @brief Enables all endpoints for data transfers - * @return Status of request (type @ref USB_Status_TypeDef) - * @note This function takes no parameters, but it uses the setup command - * stored in @ref myUsbDevice.setup. - ******************************************************************************/ -static void USBD_ActivateAllEps(bool forceIdle) -{ - if (forceIdle == true) - { -#if SLAB_USB_EP1IN_USED - myUsbDevice.ep1in.state = D_EP_IDLE; -#endif -#if SLAB_USB_EP2IN_USED - myUsbDevice.ep2in.state = D_EP_IDLE; -#endif -#if SLAB_USB_EP3IN_USED - myUsbDevice.ep3in.state = D_EP_IDLE; -#endif -#if SLAB_USB_EP1OUT_USED - myUsbDevice.ep1out.state = D_EP_IDLE; -#endif -#if SLAB_USB_EP2OUT_USED - myUsbDevice.ep2out.state = D_EP_IDLE; -#endif -#if SLAB_USB_EP3OUT_USED - myUsbDevice.ep3out.state = D_EP_IDLE; -#endif - } - -#if SLAB_USB_EP1IN_USED - USB_ActivateEp(1, // ep - SLAB_USB_EP1IN_MAX_PACKET_SIZE, // packetSize - 1, // inDir - SLAB_USB_EP1OUT_USED, // splitMode - 0); // isoMod -#endif // SLAB_USB_EP1IN_USED -#if SLAB_USB_EP2IN_USED - USB_ActivateEp(2, // ep - SLAB_USB_EP2IN_MAX_PACKET_SIZE, // packetSize - 1, // inDir - SLAB_USB_EP2OUT_USED, // splitMode - 0); // isoMod -#endif // SLAB_USB_EP2IN_USED -#if SLAB_USB_EP3IN_USED - USB_ActivateEp(3, // ep - SLAB_USB_EP3IN_MAX_PACKET_SIZE, // packetSize - 1, // inDir - SLAB_USB_EP3OUT_USED, // splitMode - (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC)); // isoMod -#endif // SLAB_USB_EP3IN_USED -#if SLAB_USB_EP1OUT_USED - USB_ActivateEp(1, // ep - SLAB_USB_EP1OUT_MAX_PACKET_SIZE, // packetSize - 0, // inDir - SLAB_USB_EP1IN_USED, // splitMode - 0); // isoMod -#endif // SLAB_USB_EP1OUT_USED -#if SLAB_USB_EP2OUT_USED - USB_ActivateEp(2, // ep - SLAB_USB_EP2OUT_MAX_PACKET_SIZE, // packetSize - 0, // inDir - SLAB_USB_EP2IN_USED, // splitMode - 0); // isoMod -#endif // SLAB_USB_EP2OUT_USED -#if SLAB_USB_EP3OUT_USED - USB_ActivateEp(3, // ep - SLAB_USB_EP3OUT_MAX_PACKET_SIZE, // packetSize - 0, // inDir - SLAB_USB_EP3IN_USED, // splitMode - (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC)); // isoMod -#endif // SLAB_USB_EP1OUT_USED -} - -/***************************************************************************//** - * @brief Sets up an Endpoint 0 Write - * @param dat - * Data to transmit on Endpoint 0 - * @param numBytes - * Number of bytes to transmit on Endpoint 0 - ******************************************************************************/ -static void EP0_Write(uint8_t *dat, uint16_t numBytes) -{ - if (myUsbDevice.ep0.state == D_EP_IDLE) - { - myUsbDevice.ep0.buf = (uint8_t *)dat; - myUsbDevice.ep0.remaining = numBytes; - myUsbDevice.ep0.state = D_EP_TRANSMITTING; - myUsbDevice.ep0.misc.c = 0; - } -} diff --git a/targets/efm8/lib/efm8_usb/src/efm8_usbdep.c b/targets/efm8/lib/efm8_usb/src/efm8_usbdep.c deleted file mode 100644 index ec8721a..0000000 --- a/targets/efm8/lib/efm8_usb/src/efm8_usbdep.c +++ /dev/null @@ -1,896 +0,0 @@ -/**************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#include "si_toolchain.h" -#include "efm8_usb.h" -#include -#include - -extern SI_SEGMENT_VARIABLE(myUsbDevice, USBD_Device_TypeDef, MEM_MODEL_SEG); - -// ----------------------------------------------------------------------------- -// Function Prototypes - -// ------------------------------- -// Memory-specific FIFO access functions -#ifdef SI_GPTR - -static void USB_ReadFIFO_Idata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_IDATA), uint8_t fifoNum); -static void USB_WriteFIFO_Idata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_IDATA)); - -static void USB_ReadFIFO_Xdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_XDATA), uint8_t fifoNum); -static void USB_WriteFIFO_Xdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_XDATA)); - -#if SI_GPTR_MTYPE_PDATA != SI_GPTR_MTYPE_XDATA -static void USB_ReadFIFO_Pdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_PDATA), uint8_t fifoNum); -static void USB_WriteFIFO_Pdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_PDATA)); -#endif - -#if SI_GPTR_MTYPE_DATA != SI_GPTR_MTYPE_IDATA -static void USB_ReadFIFO_Data(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_DATA), uint8_t fifoNum); -static void USB_WriteFIFO_Data(uint8_t numBytes, uint8_t SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_DATA)); -#endif - -static void USB_WriteFIFO_Code(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_CODE)); - -#else - -// ------------------------------- -// Generic FIFO access functions -static void USB_ReadFIFO_Generic(uint8_t numBytes, uint8_t *dat, uint8_t fifoNum); -static void USB_WriteFIFO_Generic(uint8_t numBytes, uint8_t *dat); - -#endif // #ifdef SI_GPTR - -// ----------------------------------------------------------------------------- -// Functions - -/***************************************************************************//** - * @brief Reads Isochronous data from the Endpoint FIFO - * @param fifoNum - * USB Endpoint FIFO to read - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to buffer to hold data read from the FIFO - ******************************************************************************/ -#if (SLAB_USB_EP3OUT_USED && (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC) && (SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 255)) -// ---------------------------------------------------------------------------- -// If Isochronous mode is enabled and the max packet size is greater than 255, -// break the FIFO reads up into multiple reads of 255 or less bytes. -// ---------------------------------------------------------------------------- -void USB_ReadFIFOIso(uint8_t fifoNum, uint16_t numBytes, uint8_t *dat) -{ - uint8_t numBytesRead; - - // USB_ReadFIFO() accepts a maximum of 255 bytes. If the number of bytes to - // send is greated than 255, call USB_ReadFIFO() multiple times. - while (numBytes > 0) - { - numBytesRead = (numBytes > 255) ? 255 : numBytes; - USB_ReadFIFO(fifoNum, numBytesRead, dat); - numBytes -= numBytesRead; - dat += numBytesRead; - } -} -#else -#define USB_ReadFIFOIso(a, b, c) USB_ReadFIFO(a, b, c) -#endif - -/***************************************************************************//** - * @brief Writes Isochronous data to the Endpoint FIFO - * @param fifoNum - * USB Endpoint FIFO to write - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to buffer hoding data to write to the FIFO - ******************************************************************************/ -#if (SLAB_USB_EP3IN_USED && (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC) && (SLAB_USB_EP3IN_MAX_PACKET_SIZE > 255)) -// ---------------------------------------------------------------------------- -// If Isochronous mode is enabled and the max packet size is greater than 255, -// break the FIFO writes up into multiple writes of 255 or less bytes. -// ---------------------------------------------------------------------------- -void USB_WriteFIFOIso(uint8_t fifoNum, uint16_t numBytes, uint8_t *dat) -{ - uint8_t numBytesWrite; - - // USB_WriteFIFO() accepts a maximum of 255 bytes. If the number of bytes to - // send is greated than 255, call USB_WriteFIFO() multiple times. - while (numBytes > 0) - { - numBytesWrite = (numBytes > 255) ? 255 : numBytes; - numBytes -= numBytesWrite; - USB_WriteFIFO(fifoNum, numBytesWrite, dat, (numBytes == 0)); - dat += numBytesWrite; - } -} -#else -#define USB_WriteFIFOIso(a, b, c) USB_WriteFIFO(a, b, c, true) -#endif - -#if SLAB_USB_EP1IN_USED -/***************************************************************************//** - * @brief Handle Endpoint 1 IN transfer interrupt - * @note This function takes no parameters, but it uses the EP1IN status - * variables stored in @ref myUsbDevice.ep1in. - ******************************************************************************/ -void handleUsbIn1Int(void) -{ - uint8_t xferred; - bool callback; - - USB_SetIndex(1); - - if (USB_EpnInGetSentStall()) - { - USB_EpnInClearSentStall(); - } - else if (myUsbDevice.ep1in.state == D_EP_TRANSMITTING) - { - xferred = (myUsbDevice.ep1in.remaining > SLAB_USB_EP1IN_MAX_PACKET_SIZE) - ? SLAB_USB_EP1IN_MAX_PACKET_SIZE : myUsbDevice.ep1in.remaining; - myUsbDevice.ep1in.remaining -= xferred; - myUsbDevice.ep1in.buf += xferred; - - callback = myUsbDevice.ep1in.misc.bits.callback; - - // Load more data - if (myUsbDevice.ep1in.remaining > 0) - { - USB_WriteFIFO(1, - (myUsbDevice.ep1in.remaining > SLAB_USB_EP1IN_MAX_PACKET_SIZE) - ? SLAB_USB_EP1IN_MAX_PACKET_SIZE - : myUsbDevice.ep1in.remaining, - myUsbDevice.ep1in.buf, - true); - } - else - { - myUsbDevice.ep1in.misc.bits.callback = false; - myUsbDevice.ep1in.state = D_EP_IDLE; - } - - if (callback == true) - { - USBD_XferCompleteCb(EP1IN, USB_STATUS_OK, xferred, myUsbDevice.ep1in.remaining); - } - - } -} -#endif // SLAB_USB_EP1IN_USED - -#if SLAB_USB_EP2IN_USED -/***************************************************************************//** - * @brief Handle Endpoint 2 IN transfer interrupt - * @note This function takes no parameters, but it uses the EP2IN status - * variables stored in @ref myUsbDevice.ep2in. - ******************************************************************************/ -void handleUsbIn2Int(void) -{ - uint8_t xferred; - bool callback; - - USB_SetIndex(2); - - if (USB_EpnInGetSentStall()) - { - USB_EpnInClearSentStall(); - } - else if (myUsbDevice.ep2in.state == D_EP_TRANSMITTING) - { - xferred = (myUsbDevice.ep2in.remaining > SLAB_USB_EP2IN_MAX_PACKET_SIZE) - ? SLAB_USB_EP2IN_MAX_PACKET_SIZE : myUsbDevice.ep2in.remaining; - myUsbDevice.ep2in.remaining -= xferred; - myUsbDevice.ep2in.buf += xferred; - - callback = myUsbDevice.ep2in.misc.bits.callback; - - // Load more data - if (myUsbDevice.ep2in.remaining > 0) - { - USB_WriteFIFO(2, - (myUsbDevice.ep2in.remaining > SLAB_USB_EP2IN_MAX_PACKET_SIZE) - ? SLAB_USB_EP2IN_MAX_PACKET_SIZE - : myUsbDevice.ep2in.remaining, - myUsbDevice.ep2in.buf, - true); - } - else - { - myUsbDevice.ep2in.misc.bits.callback = false; - myUsbDevice.ep2in.state = D_EP_IDLE; - } - - if (callback == true) - { - USBD_XferCompleteCb(EP2IN, USB_STATUS_OK, xferred, myUsbDevice.ep2in.remaining); - } - - } -} -#endif // SLAB_USB_EP2IN_USED - -#if SLAB_USB_EP3IN_USED -/***************************************************************************//** - * @brief Handle Endpoint 3 IN transfer interrupt - * @details Endpoint 3 IN is the only IN endpoint that supports isochronous - * transfers. - * @note This function takes no parameters, but it uses the EP3IN status - * variables stored in @ref myUsbDevice.ep3in. - ******************************************************************************/ -void handleUsbIn3Int(void) -{ -#if SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - uint16_t xferred, nextIdx; -#else - uint8_t xferred; - bool callback; -#endif - - USB_SetIndex(3); - - if (USB_EpnInGetSentStall()) - { - USB_EpnInClearSentStall(); - } - else if (myUsbDevice.ep3in.state == D_EP_TRANSMITTING) - { -#if ((SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_INTR)) - xferred = (myUsbDevice.ep3in.remaining > SLAB_USB_EP3IN_MAX_PACKET_SIZE) - ? SLAB_USB_EP3IN_MAX_PACKET_SIZE : myUsbDevice.ep3in.remaining; - myUsbDevice.ep3in.remaining -= xferred; - myUsbDevice.ep3in.buf += xferred; -#endif - -#if ((SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_INTR)) - - callback = myUsbDevice.ep3in.misc.bits.callback; - -#elif (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC) - if (myUsbDevice.ep3in.misc.bits.callback == true) - { - // In Isochronous mode, the meaning of the USBD_XferCompleteCb parameters changes: - // xferred is ignored - // remaining is the current index into the circular buffer - // the return value is the number of bytes to transmit in the next packet - xferred = USBD_XferCompleteCb(EP3IN, USB_STATUS_OK, 0, myUsbDevice.ep3inIsoIdx); - if (xferred == 0) - { - myUsbDevice.ep3in.misc.bits.inPacketPending = true; - return; - } - } -#endif - // Load more data -#if ((SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_INTR)) - if (myUsbDevice.ep3in.remaining > 0) - { - USB_WriteFIFO(3, - (myUsbDevice.ep3in.remaining > SLAB_USB_EP3IN_MAX_PACKET_SIZE) - ? SLAB_USB_EP3IN_MAX_PACKET_SIZE - : myUsbDevice.ep3in.remaining, - myUsbDevice.ep3in.buf, - true); - } - else - { - myUsbDevice.ep3in.misc.bits.callback = false; - myUsbDevice.ep3in.state = D_EP_IDLE; - } - - if (callback == true) - { - USBD_XferCompleteCb(EP3IN, USB_STATUS_OK, xferred, myUsbDevice.ep3in.remaining); - } -#elif (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC) - nextIdx = xferred + myUsbDevice.ep3inIsoIdx; - myUsbDevice.ep3in.misc.bits.inPacketPending = false; - - // Check if the next index is past the end of the circular buffer. - // If so, break the write up into two calls to USB_WriteFIFOIso() - if (nextIdx > myUsbDevice.ep3in.remaining) - { - USB_WriteFIFOIso(3, myUsbDevice.ep3in.remaining - myUsbDevice.ep3inIsoIdx, &myUsbDevice.ep3in.buf[myUsbDevice.ep3inIsoIdx]); - myUsbDevice.ep3inIsoIdx = nextIdx - myUsbDevice.ep3in.remaining; - USB_WriteFIFOIso(3, myUsbDevice.ep3inIsoIdx, myUsbDevice.ep3in.buf); - } - else - { - USB_WriteFIFOIso(3, xferred, &myUsbDevice.ep3in.buf[myUsbDevice.ep3inIsoIdx]); - myUsbDevice.ep3inIsoIdx = nextIdx; - } -#endif // ( ( SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_BULK ) || ( SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_INTR ) ) - } -} -#endif // SLAB_USB_EP3IN_USED - -#if SLAB_USB_EP1OUT_USED -/***************************************************************************//** - * @brief Handle Endpoint 1 OUT transfer interrupt - * @note This function takes no parameters, but it uses the EP1OUT status - * variables stored in @ref myUsbDevice.ep1out. - ******************************************************************************/ -void handleUsbOut1Int(void) -{ - uint8_t count; - - USB_Status_TypeDef status; - bool xferComplete = false; - - USB_SetIndex(1); - - if (USB_EpnOutGetSentStall()) - { - USB_EpnOutClearSentStall(); - } - else if (USB_EpnGetOutPacketReady()) - { - count = USB_EpOutGetCount(); - - // If USBD_Read() has not been called, return an error - if (myUsbDevice.ep1out.state != D_EP_RECEIVING) - { - myUsbDevice.ep1out.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_ERROR; - } - // Check for overrun of user buffer - else if (myUsbDevice.ep1out.remaining < count) - { - myUsbDevice.ep1out.state = D_EP_IDLE; - myUsbDevice.ep1out.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_RX_BUFFER_OVERRUN; - } - else - { - USB_ReadFIFO(1, count, myUsbDevice.ep1out.buf); - - myUsbDevice.ep1out.misc.bits.outPacketPending = false; - myUsbDevice.ep1out.remaining -= count; - myUsbDevice.ep1out.buf += count; - - if ((myUsbDevice.ep1out.remaining == 0) || (count != SLAB_USB_EP1OUT_MAX_PACKET_SIZE)) - { - myUsbDevice.ep1out.state = D_EP_IDLE; - xferComplete = true; - } - status = USB_STATUS_OK; - USB_EpnClearOutPacketReady(); - } - if (myUsbDevice.ep1out.misc.bits.callback == true) - { - if (xferComplete == true) - { - myUsbDevice.ep1out.misc.bits.callback = false; - } - USBD_XferCompleteCb(EP1OUT, status, count, myUsbDevice.ep1out.remaining); - } - } -} -#endif // EP1OUT_USED - -#if SLAB_USB_EP2OUT_USED -/***************************************************************************//** - * @brief Handle Endpoint 2 OUT transfer interrupt - * @note This function takes no parameters, but it uses the EP2OUT status - * variables stored in @ref myUsbDevice.ep2out. - ******************************************************************************/ -void handleUsbOut2Int(void) -{ - uint8_t count; - - USB_Status_TypeDef status; - bool xferComplete = false; - - USB_SetIndex(2); - - if (USB_EpnOutGetSentStall()) - { - USB_EpnOutClearSentStall(); - } - else if (USB_EpnGetOutPacketReady()) - { - count = USB_EpOutGetCount(); - - // If USBD_Read() has not been called, return an error - if (myUsbDevice.ep2out.state != D_EP_RECEIVING) - { - myUsbDevice.ep2out.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_ERROR; - } - // Check for overrun of user buffer - else if (myUsbDevice.ep2out.remaining < count) - { - myUsbDevice.ep2out.state = D_EP_IDLE; - myUsbDevice.ep2out.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_RX_BUFFER_OVERRUN; - } - else - { - USB_ReadFIFO(2, count, myUsbDevice.ep2out.buf); - - myUsbDevice.ep2out.misc.bits.outPacketPending = false; - myUsbDevice.ep2out.remaining -= count; - myUsbDevice.ep2out.buf += count; - - if ((myUsbDevice.ep2out.remaining == 0) || (count != SLAB_USB_EP2OUT_MAX_PACKET_SIZE)) - { - myUsbDevice.ep2out.state = D_EP_IDLE; - xferComplete = true; - } - - status = USB_STATUS_OK; - USB_EpnClearOutPacketReady(); - } - if (myUsbDevice.ep2out.misc.bits.callback == true) - { - if (xferComplete == true) - { - myUsbDevice.ep2out.misc.bits.callback = false; - } - - USBD_XferCompleteCb(EP2OUT, status, count, myUsbDevice.ep2out.remaining); - } - } -} -#endif // EP2OUT_USED - -#if SLAB_USB_EP3OUT_USED -/***************************************************************************//** - * @brief Handle Endpoint 3 OUT transfer interrupt - * @details Endpoint 3 OUT is the only OUT endpoint that supports - * isochronous transfers. - * @note This function takes no parameters, but it uses the EP3OUT status - * variables stored in @ref myUsbDevice.ep3out. - ******************************************************************************/ -void handleUsbOut3Int(void) -{ -#if (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC) - uint16_t nextIdx; -#if (SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 255) - uint16_t count; -#else - uint8_t count; -#endif // ( SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 255 ) -#else - uint8_t count; -#endif // ( SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC ) - - USB_Status_TypeDef status; - bool xferComplete = false; - - USB_SetIndex(3); - - if (USB_EpnOutGetSentStall()) - { - USB_EpnOutClearSentStall(); - } - else if (USB_EpnGetOutPacketReady()) - { - count = USB_EpOutGetCount(); - - // If USBD_Read() has not been called, return an error - if (myUsbDevice.ep3out.state != D_EP_RECEIVING) - { - myUsbDevice.ep3out.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_ERROR; - } -#if ((SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_INTR)) - // Check for overrun of user buffer - else if (myUsbDevice.ep3out.remaining < count) - { - myUsbDevice.ep3out.state = D_EP_IDLE; - myUsbDevice.ep3out.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_RX_BUFFER_OVERRUN; - } -#endif - else - { -#if ((SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_INTR)) - USB_ReadFIFO(3, count, myUsbDevice.ep3out.buf); - - myUsbDevice.ep3out.remaining -= count; - myUsbDevice.ep3out.buf += count; - - if ((myUsbDevice.ep3out.remaining == 0) || (count != SLAB_USB_EP3OUT_MAX_PACKET_SIZE)) - { - myUsbDevice.ep3out.state = D_EP_IDLE; - xferComplete = true; - } -#elif (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC) - nextIdx = count + myUsbDevice.ep3outIsoIdx; - - // In isochronous mode, a circular buffer is used to hold the data - // If the next index into the circular buffer passes the end of the - // buffer, make two calls to USB_ReadFIFOIso() - if (nextIdx > myUsbDevice.ep3out.remaining) - { - USB_ReadFIFOIso(3, myUsbDevice.ep3out.remaining - myUsbDevice.ep3outIsoIdx, &myUsbDevice.ep3out.buf[myUsbDevice.ep3outIsoIdx]); - myUsbDevice.ep3outIsoIdx = nextIdx - myUsbDevice.ep3out.remaining; - USB_ReadFIFOIso(3, myUsbDevice.ep3outIsoIdx, myUsbDevice.ep3out.buf); - } - else - { - USB_ReadFIFOIso(3, count, &myUsbDevice.ep3out.buf[myUsbDevice.ep3outIsoIdx]); - myUsbDevice.ep3outIsoIdx = nextIdx; - } -#endif // ( ( SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_BULK ) || ( SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_INTR ) ) - - myUsbDevice.ep3out.misc.bits.outPacketPending = false; - status = USB_STATUS_OK; - USB_EpnClearOutPacketReady(); - } - if (myUsbDevice.ep3out.misc.bits.callback == true) - { - if (xferComplete == true) - { - myUsbDevice.ep3out.misc.bits.callback = false; - } - -#if ((SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_BULK) || (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_INTR)) - USBD_XferCompleteCb(EP3OUT, status, count, myUsbDevice.ep3out.remaining); -#elif (SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC) - - // In Isochronous mode, the meaning of the USBD_XferCompleteCb parameters changes: - // xferred is the number of bytes received in the last packet - // remaining is the current index into the circular buffer - USBD_XferCompleteCb(EP3OUT, status, count, myUsbDevice.ep3outIsoIdx); -#endif - } - } -} -#endif // EP3OUT_USED - -/***************************************************************************//** - * @brief Reads data from the USB FIFO - * @param fifoNum - * USB Endpoint FIFO to read - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to buffer to hold data read from the FIFO - ******************************************************************************/ -void USB_ReadFIFO(uint8_t fifoNum, uint8_t numBytes, uint8_t *dat) -{ - if (numBytes > 0) - { - USB_EnableReadFIFO(fifoNum); - - // Convert generic pointer to memory-specific pointer and call the - // the corresponding memory-specific function, if possible. - // The memory-specific functions are much faster than the generic functions. -#ifdef SI_GPTR - - switch (((SI_GEN_PTR_t *)&dat)->gptr.memtype) - { - case SI_GPTR_MTYPE_IDATA: - USB_ReadFIFO_Idata(numBytes, dat, fifoNum); - break; - - // For some compilers, IDATA and DATA are treated the same. - // Only call the USB_ReadFIFO_Data() if the compiler differentiates - // between DATA and IDATA. -#if (SI_GPTR_MTYPE_DATA != SI_GPTR_MTYPE_IDATA) - case SI_GPTR_MTYPE_DATA: - USB_ReadFIFO_Data(numBytes, dat, fifoNum); - break; -#endif - - case SI_GPTR_MTYPE_XDATA: - USB_ReadFIFO_Xdata(numBytes, dat, fifoNum); - break; - - // For some compilers, XDATA and PDATA are treated the same. - // Only call the USB_ReadFIFO_Pdata() if the compiler differentiates - // between XDATA and PDATA. -#if (SI_GPTR_MTYPE_PDATA != SI_GPTR_MTYPE_XDATA) - case SI_GPTR_MTYPE_PDATA: - USB_ReadFIFO_Pdata(numBytes, dat, fifoNum); - break; -#endif - - default: - break; - } - -#else - USB_ReadFIFO_Generic(numBytes, dat, fifoNum); -#endif // #ifdef SI_GPTR - - USB_DisableReadFIFO(fifoNum); - } -} - -/***************************************************************************//** - * @brief Writes data to the USB FIFO - * @param fifoNum - * USB Endpoint FIFO to write - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to buffer hoding data to write to the FIFO - * @param txPacket - * If TRUE, the packet will be sent immediately after loading the - * FIFO - * If FALSE, the packet will be stored in the FIFO and the - * transmission must be started at a later time - ******************************************************************************/ -void USB_WriteFIFO(uint8_t fifoNum, uint8_t numBytes, uint8_t *dat, bool txPacket) -{ - USB_EnableWriteFIFO(fifoNum); - - // Convert generic pointer to memory-specific pointer and call the - // the corresponding memory-specific function, if possible. - // The memory-specific functions are much faster than the generic functions. -#ifdef SI_GPTR - - switch (((SI_GEN_PTR_t *)&dat)->gptr.memtype) - { - case SI_GPTR_MTYPE_IDATA: - USB_WriteFIFO_Idata(numBytes, dat); - break; - - // For some compilers, IDATA and DATA are treated the same. - // Only call the USB_WriteFIFO_Data() if the compiler differentiates between - // DATA and IDATA. -#if (SI_GPTR_MTYPE_DATA != SI_GPTR_MTYPE_IDATA) - case SI_GPTR_MTYPE_DATA: - USB_WriteFIFO_Data(numBytes, dat); - break; -#endif - - case SI_GPTR_MTYPE_XDATA: - USB_WriteFIFO_Xdata(numBytes, dat); - break; - - // For some compilers, XDATA and PDATA are treated the same. - // Only call the USB_WriteFIFO_Pdata() if the compiler differentiates - // between XDATA and PDATA. -#if (SI_GPTR_MTYPE_PDATA != SI_GPTR_MTYPE_XDATA) - case SI_GPTR_MTYPE_PDATA: - USB_WriteFIFO_Pdata(numBytes, dat); - break; -#endif - - case SI_GPTR_MTYPE_CODE: - USB_WriteFIFO_Code(numBytes, dat); - break; - - default: - break; - } - -#else - USB_WriteFIFO_Generic(numBytes, dat); -#endif // #ifdef SI_GPTR - - USB_DisableWriteFIFO(fifoNum); - - if ((txPacket == true) && (fifoNum > 0)) - { - USB_SetIndex(fifoNum); - USB_EpnSetInPacketReady(); - } -} - -// ----------------------------------------------------------------------------- -// Memory-Specific FIFO Access Functions -// -// Memory-specific functions are much faster (more than 2x) than generic -// generic functions, so we will use memory-specific functions if possible. -// ----------------------------------------------------------------------------- - -#ifdef SI_GPTR -/***************************************************************************//** - * @brief Reads data from the USB FIFO to a buffer in IRAM - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to IDATA buffer to hold data read from the FIFO - * @param fifoNum - * USB FIFO to read - ******************************************************************************/ -static void USB_ReadFIFO_Idata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_IDATA), uint8_t fifoNum) -{ - while (--numBytes) - { - USB_GetFIFOByte(dat); - dat++; - } - USB_GetLastFIFOByte(dat, fifoNum); -} - -/***************************************************************************//** - * @brief Writes data held in IRAM to the USB FIFO - * @details The FIFO to write must be set before calling the function with - * @ref USB_EnableWriteFIFO(). - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to IDATA buffer holding data to write to the FIFO - ******************************************************************************/ -static void USB_WriteFIFO_Idata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_IDATA)) -{ - while (numBytes--) - { - USB_SetFIFOByte(*dat); - dat++; - } -} - -/***************************************************************************//** - * @brief Reads data from the USB FIFO to a buffer in XRAM - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to XDATA buffer to hold data read from the FIFO - * @param fifoNum - * USB FIFO to read - ******************************************************************************/ -static void USB_ReadFIFO_Xdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_XDATA), uint8_t fifoNum) -{ - while (--numBytes) - { - USB_GetFIFOByte(dat); - dat++; - } - USB_GetLastFIFOByte(dat, fifoNum); -} - -/***************************************************************************//** - * @brief Writes data held in XRAM to the USB FIFO - * @details The FIFO to write must be set before calling the function with - * @ref USB_EnableWriteFIFO(). - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to XDATA buffer holding data to write to the FIFO - ******************************************************************************/ -static void USB_WriteFIFO_Xdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_XDATA)) -{ - while (numBytes--) - { - USB_SetFIFOByte(*dat); - dat++; - } -} - -#if SI_GPTR_MTYPE_PDATA != SI_GPTR_MTYPE_XDATA -/***************************************************************************//** - * @brief Reads data from the USB FIFO to a buffer in paged XRAM - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to PDATA buffer to hold data read from the FIFO - * @param fifoNum - * USB FIFO to read - ******************************************************************************/ -static void USB_ReadFIFO_Pdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_PDATA), uint8_t fifoNum) -{ - while (--numBytes) - { - USB_GetFIFOByte(dat); - dat++; - } - USB_GetLastFIFOByte(dat, fifoNum); -} - -/***************************************************************************//** - * @brief Writes data held in paged XRAM to the USB FIFO - * @details The FIFO to write must be set before calling the function with - * @ref USB_EnableWriteFIFO(). - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to PDATA buffer holding data to write to the FIFO - ******************************************************************************/ -static void USB_WriteFIFO_Pdata(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_PDATA)) -{ - while (numBytes--) - { - USB_SetFIFOByte(*dat); - dat++; - } -} - -#endif - -#if SI_GPTR_MTYPE_DATA != SI_GPTR_MTYPE_IDATA -/***************************************************************************//** - * @brief Reads data from the USB FIFO to a buffer in DRAM - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to DATA buffer to hold data read from the FIFO - * @param fifoNum - * USB FIFO to read - ******************************************************************************/ -static void USB_ReadFIFO_Data(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_DATA), uint8_t fifoNum) -{ - while (--numBytes) - { - USB_GetFIFOByte(*dat); - dat++; - } - USB_GetLastFIFOByte(*dat, fifoNum); -} - -/***************************************************************************//** - * @brief Writes data held in DRAM to the USB FIFO - * @details The FIFO to write must be set before calling the function with - * @ref USB_EnableWriteFIFO(). - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to DATA buffer to hold data read from the FIFO - ******************************************************************************/ -static void USB_WriteFIFO_Data(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_DATA)) -{ - while (numBytes--) - { - USB_SetFIFOByte(*dat); - dat++; - } -} -#endif - -/***************************************************************************//** - * @brief Writes data held in code space to the USB FIFO - * @details The FIFO to write must be set before calling the function with - * @ref USB_EnableWriteFIFO(). - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to CODE buffer holding data to write to the FIFO - ******************************************************************************/ -static void USB_WriteFIFO_Code(uint8_t numBytes, SI_VARIABLE_SEGMENT_POINTER(dat, uint8_t, SI_SEG_CODE)) -{ - while (numBytes--) - { - USB_SetFIFOByte(*dat); - dat++; - } -} - -#else -/***************************************************************************//** - * @brief Reads data from the USB FIFO to a buffer in generic memory space - * @param numBytes - * Number of bytes to read from the FIFO - * @param dat - * Pointer to generic buffer to hold data read from the FIFO - * @param fifoNum - * USB FIFO to read - ******************************************************************************/ -static void USB_ReadFIFO_Generic(uint8_t numBytes, uint8_t *dat, uint8_t fifoNum) -{ - while (--numBytes) - { - USB_GetFIFOByte(*dat); - dat++; - } - USB_GetLastFIFOByte(*dat, fifoNum); -} - -/***************************************************************************//** - * @brief Writes data held in generic memory space to the USB FIFO - * @details The FIFO to write must be set before calling the function with - * @ref USB_EnableWriteFIFO(). - * @param numBytes - * Number of bytes to write to the FIFO - * @param dat - * Pointer to generic buffer holding data to write to the FIFO - ******************************************************************************/ -static void USB_WriteFIFO_Generic(uint8_t numBytes, uint8_t *dat) -{ - while (numBytes--) - { - USB_SetFIFOByte(*dat); - dat++; - } -} - -#endif // #ifdef SI_GPTR diff --git a/targets/efm8/lib/efm8_usb/src/efm8_usbdint.c b/targets/efm8/lib/efm8_usb/src/efm8_usbdint.c deleted file mode 100644 index f00c9ed..0000000 --- a/targets/efm8/lib/efm8_usb/src/efm8_usbdint.c +++ /dev/null @@ -1,533 +0,0 @@ -/**************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#include "si_toolchain.h" -#include "efm8_usb.h" -#include -#include - -// ----------------------------------------------------------------------------- -// Global variables - -extern SI_SEGMENT_VARIABLE(myUsbDevice, USBD_Device_TypeDef, MEM_MODEL_SEG); -extern SI_SEGMENT_VARIABLE(txZero[2], uint8_t, SI_SEG_CODE); - -// ----------------------------------------------------------------------------- -// Function prototypes - -static void handleUsbEp0Int(void); -static void handleUsbResetInt(void); -static void handleUsbSuspendInt(void); -static void handleUsbResumeInt(void); -static void handleUsbEp0Tx(void); -static void handleUsbEp0Rx(void); -static void USB_ReadFIFOSetup(void); - -#if (SLAB_USB_EP1IN_USED) -void handleUsbIn1Int(void); -#endif // SLAB_USB_EP1IN_USED -#if (SLAB_USB_EP2IN_USED) -void handleUsbIn2Int(void); -#endif // SLAB_USB_EP2IN_USED -#if (SLAB_USB_EP3IN_USED) -void handleUsbIn3Int(void); -#endif // SLAB_USB_EP3IN_USED - -#if (SLAB_USB_EP1OUT_USED) -void handleUsbOut1Int(void); -#endif // SLAB_USB_EP1OUT_USED -#if (SLAB_USB_EP2OUT_USED) -void handleUsbOut2Int(void); -#endif // SLAB_USB_EP2OUT_USED -#if (SLAB_USB_EP3OUT_USED) -void handleUsbOut3Int(void); -#endif // SLAB_USB_EP3OUT_USED - -void SendEp0Stall(void); - -// ----------------------------------------------------------------------------- -// Functions - -/***************************************************************************//** - * @brief First-level handler for USB peripheral interrupt - * @details If @ref SLAB_USB_POLLED_MODE is 1, this becomes a regular - * function instead of an ISR and must be called by the application - * periodically. - ******************************************************************************/ -#if (SLAB_USB_POLLED_MODE == 0) -SI_INTERRUPT(usbIrqHandler, USB0_IRQn) -#else -void usbIrqHandler(void) -#endif -{ - uint8_t statusCommon, statusIn, statusOut, indexSave; - -#if SLAB_USB_HANDLER_CB - // Callback to user before processing - USBD_EnterHandler(); -#endif - - // Get the interrupt sources - statusCommon = USB_GetCommonInts(); - statusIn = USB_GetInInts(); - statusOut = USB_GetOutInts(); - -#if SLAB_USB_POLLED_MODE - if ((statusCommon == 0) && (statusIn == 0) && (statusOut == 0)) - { - return; - } -#endif - - // Save the current index - indexSave = USB_GetIndex(); - - // Check Common USB Interrupts - if (USB_IsSofIntActive(statusCommon)) - { -#if SLAB_USB_SOF_CB - USBD_SofCb(USB_GetSofNumber()); -#endif // SLAB_USB_SOF_CB - - // Check for unhandled USB packets on EP0 and set the corresponding IN or - // OUT interrupt active flag if necessary. - if (((myUsbDevice.ep0.misc.bits.outPacketPending == true) && (myUsbDevice.ep0.state == D_EP_RECEIVING)) || - ((myUsbDevice.ep0.misc.bits.inPacketPending == true) && (myUsbDevice.ep0.state == D_EP_TRANSMITTING))) - { - USB_SetEp0IntActive(statusIn); - } - // Check for unhandled USB OUT packets and set the corresponding OUT - // interrupt active flag if necessary. -#if SLAB_USB_EP1OUT_USED - if ((myUsbDevice.ep1out.misc.bits.outPacketPending == true) && (myUsbDevice.ep1out.state == D_EP_RECEIVING)) - { - USB_SetOut1IntActive(statusOut); - } -#endif -#if SLAB_USB_EP2OUT_USED - if ((myUsbDevice.ep2out.misc.bits.outPacketPending == true) && (myUsbDevice.ep2out.state == D_EP_RECEIVING)) - { - USB_SetOut2IntActive(statusOut); - } -#endif -#if SLAB_USB_EP3OUT_USED - if ((myUsbDevice.ep3out.misc.bits.outPacketPending == true) && (myUsbDevice.ep3out.state == D_EP_RECEIVING)) - { - USB_SetOut3IntActive(statusOut); - } -#endif -#if (SLAB_USB_EP3IN_USED && (SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC)) - if ((myUsbDevice.ep3in.misc.bits.inPacketPending == true) && (myUsbDevice.ep3in.state == D_EP_TRANSMITTING)) - { - USB_SetIn3IntActive(statusIn); - } -#endif - } - - if (USB_IsResetIntActive(statusCommon)) - { - handleUsbResetInt(); - - // If VBUS is not present on detection of a USB reset, enter suspend mode. -#if (SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_ONVBUSOFF) - if (USB_IsVbusOn() == false) - { - USB_SetSuspendIntActive(statusCommon); - } -#endif - } - - if (USB_IsResumeIntActive(statusCommon)) - { - handleUsbResumeInt(); - } - - if (USB_IsSuspendIntActive(statusCommon)) - { - handleUsbSuspendInt(); - } - -#if SLAB_USB_EP3IN_USED - if (USB_IsIn3IntActive(statusIn)) - { - handleUsbIn3Int(); - } -#endif // EP3IN_USED - -#if SLAB_USB_EP3OUT_USED - if (USB_IsOut3IntActive(statusOut)) - { - handleUsbOut3Int(); - } -#endif // EP3OUT_USED - -#if SLAB_USB_EP2IN_USED - if (USB_IsIn2IntActive(statusIn)) - { - handleUsbIn2Int(); - } -#endif // EP2IN_USED - -#if SLAB_USB_EP1IN_USED - if (USB_IsIn1IntActive(statusIn)) - { - handleUsbIn1Int(); - } -#endif // EP1IN_USED - -#if SLAB_USB_EP2OUT_USED - if (USB_IsOut2IntActive(statusOut)) - { - handleUsbOut2Int(); - } -#endif // EP2OUT_USED - -#if SLAB_USB_EP1OUT_USED - if (USB_IsOut1IntActive(statusOut)) - { - handleUsbOut1Int(); - } -#endif // EP1OUT_USED - - // Check USB Endpoint 0 Interrupt - if (USB_IsEp0IntActive(statusIn)) - { - handleUsbEp0Int(); - } - - // Restore index - USB_SetIndex(indexSave); - -#if SLAB_USB_HANDLER_CB - // Callback to user before exiting - USBD_ExitHandler(); -#endif -} - -/***************************************************************************//** - * @brief Handles Endpoint 0 transfer interrupt - ******************************************************************************/ -static void handleUsbEp0Int(void) -{ - USB_SetIndex(0); - - if (USB_Ep0SentStall() || USB_GetSetupEnd()) - { - USB_Ep0ClearSentStall(); - USB_ServicedSetupEnd(); - myUsbDevice.ep0.state = D_EP_IDLE; - myUsbDevice.ep0.misc.c = 0; - } - if (USB_Ep0OutPacketReady()) - { - if (myUsbDevice.ep0.misc.bits.waitForRead == true) - { - myUsbDevice.ep0.misc.bits.outPacketPending = true; - } - else if (myUsbDevice.ep0.state == D_EP_IDLE) - { - myUsbDevice.ep0String.c = USB_STRING_DESCRIPTOR_UTF16LE; - USB_ReadFIFOSetup(); - - // Vendor unique, Class or Standard setup commands override? -#if SLAB_USB_SETUP_CMD_CB - if (USBD_SetupCmdCb(&myUsbDevice.setup) == USB_STATUS_REQ_UNHANDLED) - { -#endif - if (myUsbDevice.setup.bmRequestType.Type == USB_SETUP_TYPE_STANDARD) - { - USBDCH9_SetupCmd(); - } - else - { - SendEp0Stall(); - } -#if SLAB_USB_SETUP_CMD_CB - } - else - { - // If in-packet but callback didn't setup a USBD_Read and we are expecting a data byte then - // we need to wait for the read to be setup and nack packets till USBD_Read is called. - if ((myUsbDevice.setup.bmRequestType.Direction == USB_SETUP_DIR_OUT) - && (myUsbDevice.ep0.state != D_EP_RECEIVING) - && (myUsbDevice.setup.wLength) - ) - { - myUsbDevice.ep0.misc.bits.waitForRead = true; - } - } -#endif - } - else if (myUsbDevice.ep0.state == D_EP_RECEIVING) - { - handleUsbEp0Rx(); - } - else - { - myUsbDevice.ep0.misc.bits.outPacketPending = true; - } - } - if ((myUsbDevice.ep0.state == D_EP_TRANSMITTING) && (USB_Ep0InPacketReady() == 0)) - { - handleUsbEp0Tx(); - } -} - -/***************************************************************************//** - * @brief Reads and formats a setup packet - ******************************************************************************/ -static void USB_ReadFIFOSetup(void) -{ - uint16_t MEM_MODEL_SEG *ptr = &myUsbDevice.setup; - - USB_ReadFIFO(0, 8, (uint8_t *)ptr); - - USB_Ep0ServicedOutPacketReady(); - - // Modify for Endian-ness of the compiler - ptr[1] = le16toh(ptr[1]); - ptr[2] = le16toh(ptr[2]); - ptr[3] = le16toh(ptr[3]); -} - -/***************************************************************************//** - * @brief Handles USB port reset interrupt - * @details After receiving a USB reset, halt all endpoints except for - * Endpoint 0, set the device state, and configure USB hardware. - ******************************************************************************/ -static void handleUsbResetInt(void) -{ - // Setup EP0 to receive SETUP packets - myUsbDevice.ep0.state = D_EP_IDLE; - - // Halt all other endpoints -#if SLAB_USB_EP1IN_USED - myUsbDevice.ep1in.state = D_EP_HALT; -#endif -#if SLAB_USB_EP2IN_USED - myUsbDevice.ep2in.state = D_EP_HALT; -#endif -#if SLAB_USB_EP3IN_USED - myUsbDevice.ep3in.state = D_EP_HALT; -#endif -#if SLAB_USB_EP1OUT_USED - myUsbDevice.ep1out.state = D_EP_HALT; -#endif -#if SLAB_USB_EP2OUT_USED - myUsbDevice.ep2out.state = D_EP_HALT; -#endif -#if SLAB_USB_EP3OUT_USED - myUsbDevice.ep3out.state = D_EP_HALT; -#endif - - // After a USB reset, some USB hardware configurations will be reset and must - // be reconfigured. - - // Re-enable clock recovery -#if SLAB_USB_CLOCK_RECOVERY_ENABLED -#if SLAB_USB_FULL_SPEED - USB_EnableFullSpeedClockRecovery(); -#else - USB_EnableLowSpeedClockRecovery(); -#endif -#endif - - // Re-enable USB interrupts - USB_EnableSuspendDetection(); - USB_EnableDeviceInts(); - - // If VBUS is preset, put the device in the Default state. - // Otherwise, put it in the Attached state. -#if (!(SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_ONVBUSOFF)) - if (USB_IsVbusOn()) - { - USBD_SetUsbState(USBD_STATE_DEFAULT); - } - else - { - USBD_SetUsbState(USBD_STATE_ATTACHED); - } -#else - USBD_SetUsbState(USBD_STATE_DEFAULT); -#endif // (!(SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_ONVBUSOFF)) - -#if SLAB_USB_RESET_CB - // Make the USB Reset Callback - USBD_ResetCb(); -#endif -} - -/***************************************************************************//** - * @brief Handle USB port suspend interrupt - * @details After receiving a USB reset, set the device state and - * call @ref USBD_Suspend() if configured to do so in - * @ref SLAB_USB_PWRSAVE_MODE - ******************************************************************************/ -static void handleUsbSuspendInt(void) -{ - if (myUsbDevice.state >= USBD_STATE_POWERED) - { - USBD_SetUsbState(USBD_STATE_SUSPENDED); - -#if (SLAB_USB_PWRSAVE_MODE & USB_PWRSAVE_MODE_ONSUSPEND) - USBD_Suspend(); -#endif - } -} - -/***************************************************************************//** - * @brief Handles USB port resume interrupt - * @details Restore the device state to its previous value. - ******************************************************************************/ -static void handleUsbResumeInt(void) -{ - USBD_SetUsbState(myUsbDevice.savedState); -} - -/***************************************************************************//** - * @brief Handles transmit data phase on Endpoint 0 - ******************************************************************************/ -static void handleUsbEp0Tx(void) -{ - uint8_t count, count_snapshot, i; - bool callback = myUsbDevice.ep0.misc.bits.callback; - - // The number of bytes to send in the next packet must be less than or equal - // to the maximum EP0 packet size. - count = (myUsbDevice.ep0.remaining >= USB_EP0_SIZE) ? - USB_EP0_SIZE : myUsbDevice.ep0.remaining; - - // Save the packet size for future use. - count_snapshot = count; - - // Strings can use the USB_STRING_DESCRIPTOR_UTF16LE_PACKED type to pack - // UTF16LE data without the zero's between each character. - // If the current string is of type USB_STRING_DESCRIPTOR_UTF16LE_PACKED, - // unpacket it by inserting a zero between each character in the string. - if (myUsbDevice.ep0String.encoding.type == USB_STRING_DESCRIPTOR_UTF16LE_PACKED) - { - // If ep0String.encoding.init is true, this is the beginning of the string. - // The first two bytes of the string are the bLength and bDescriptorType - // fields. These are no packed like the reset of the string, so write them - // to the FIFO and set ep0String.encoding.init to false. - if (myUsbDevice.ep0String.encoding.init == true) - { - USB_WriteFIFO(0, 2, myUsbDevice.ep0.buf, false); - myUsbDevice.ep0.buf += 2; - count -= 2; - myUsbDevice.ep0String.encoding.init = false; - } - - // Insert a 0x00 between each character of the string. - for (i = 0; i < count / 2; i++) - { - USB_WriteFIFO(0, 1, myUsbDevice.ep0.buf, false); - myUsbDevice.ep0.buf++; - USB_WriteFIFO(0, 1, &txZero, false); - } - } - // For any data other than USB_STRING_DESCRIPTOR_UTF16LE_PACKED, just send the - // data normally. - else - { - USB_WriteFIFO(0, count, myUsbDevice.ep0.buf, false); - myUsbDevice.ep0.buf += count; - } - - myUsbDevice.ep0.misc.bits.inPacketPending = false; - myUsbDevice.ep0.remaining -= count_snapshot; - - // If the last packet of the transfer is exactly the maximum EP0 packet size, - // we will have to send a ZLP (zero-length packet) after the last data packet - // to signal to the host that the transfer is complete. - // Check for the ZLP packet case here. - if ((myUsbDevice.ep0.remaining == 0) && (count_snapshot != USB_EP0_SIZE)) - { - USB_Ep0SetLastInPacketReady(); - myUsbDevice.ep0.state = D_EP_IDLE; - myUsbDevice.ep0String.c = USB_STRING_DESCRIPTOR_UTF16LE; - myUsbDevice.ep0.misc.c = 0; - } - else - { - // Do not call USB_Ep0SetLastInPacketReady() because we still need to send - // the ZLP. - USB_Ep0SetInPacketReady(); - } - // Make callback if requested - if (callback == true) - { - USBD_XferCompleteCb(EP0, USB_STATUS_OK, count_snapshot, myUsbDevice.ep0.remaining); - } -} - -/***************************************************************************//** - * @brief Handles receive data phase on Endpoint 0 - ******************************************************************************/ -void handleUsbEp0Rx(void) -{ - uint8_t count; - USB_Status_TypeDef status; - bool callback = myUsbDevice.ep0.misc.bits.callback; - - // Get the number of bytes received - count = USB_Ep0GetCount(); - - // If the call to USBD_Read() did not give a large enough buffer to hold this - // data, set the outPacketPending flag and signal an RX overrun. - if (myUsbDevice.ep0.remaining < count) - { - myUsbDevice.ep0.state = D_EP_IDLE; - myUsbDevice.ep0.misc.bits.outPacketPending = true; - status = USB_STATUS_EP_RX_BUFFER_OVERRUN; - } - else - { - USB_ReadFIFO(0, count, myUsbDevice.ep0.buf); - myUsbDevice.ep0.buf += count; - myUsbDevice.ep0.remaining -= count; - status = USB_STATUS_OK; - - // If the last packet of the transfer is exactly the maximum EP0 packet - // size, we will must wait to receive a ZLP (zero-length packet) after the - // last data packet. This signals that the host has completed the transfer. - // Check for the ZLP packet case here. - if ((myUsbDevice.ep0.remaining == 0) && (count != USB_EP0_SIZE)) - { - USB_Ep0SetLastOutPacketReady(); - myUsbDevice.ep0.state = D_EP_IDLE; - myUsbDevice.ep0.misc.bits.callback = false; - } - else - { - // Do not call USB_Ep0SetLastOutPacketReady() until we get the ZLP. - USB_Ep0ServicedOutPacketReady(); - } - } - - // Make callback if requested - if (callback == true) - { - USBD_XferCompleteCb(EP0, status, count, myUsbDevice.ep0.remaining); - } -} - - -/***************************************************************************//** - * @brief Send a procedural stall on Endpoint 0 - ******************************************************************************/ -void SendEp0Stall(void) -{ - USB_SetIndex(0); - myUsbDevice.ep0.state = D_EP_STALL; - USB_Ep0SendStall(); -} - -// This function is called from USBD_Init(). It forces the user project to pull -// this module from the library so that the declared ISR can be seen and -// included. If this is not done then this entire module by never be included -// and the ISR will not be present. -void forceModuleLoad_usbint(void){} diff --git a/targets/efm8/lib/efm8ub1/peripheralDrivers/inc/usb_0.h b/targets/efm8/lib/efm8ub1/peripheralDrivers/inc/usb_0.h deleted file mode 100644 index be32bad..0000000 --- a/targets/efm8/lib/efm8ub1/peripheralDrivers/inc/usb_0.h +++ /dev/null @@ -1,2087 +0,0 @@ -/***************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - ******************************************************************************/ - -#ifndef __SILICON_LABS_EFM8_USB_0_H__ -#define __SILICON_LABS_EFM8_USB_0_H__ - -#include "SI_EFM8UB1_Register_Enums.h" -#include -#include -#include "efm8_config.h" - -/******************************************************************************/ - -/** - * - * @addtogroup usb_0_group USB0 Driver - * @{ - * - * @brief Peripheral driver for USB 0 - * - * # Introduction # - * - * This module provides an API for using the USB0 peripheral. - * The API provides access to the USB hardware. A full-featured - * USB stack (EFM8 USB Library) is available in the SDK at "\lib\efm8_usb." - * The primary purpose of this USB peripheral driver is to abstract hardware - * accesses so that the EFM8 USB Library can run on multiple EFM8 devices - * (e.g. EFM8UB1, EFM8UB2). However, this driver can also be used to build - * custom USB stacks and applications in cases where greater optimization or - * performance than what the EFM8 USB Library provides is required. - * - ******************************************************************************/ - -/***************************************************************************//** - * @addtogroup usb_0_runtime USB0 Runtime API - * @brief - * Functions and macros to access the USB hardware. - * @{ - ******************************************************************************/ - -// ------------------------------- -// Macros - -/***************************************************************************//** - * @brief Reads an indirect USB register - * @details Sets USB0ADR and polls on the busy bit. - * When the macro completes, the value can be read from USB0DAT. - * @param addr - * The address of the USB indirect register to read - * @return The value of the USB indirect register is held in USB0DAT. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern uint8_t USB_READ_BYTE(uint8_t addr); -#else -#define USB_READ_BYTE(addr) \ - do \ - { \ - USB0ADR = (USB0ADR_BUSY__SET | (addr)); \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Writes an indirect USB register - * @details Sets USB0ADR, writes a value to USB0DAT, and waits for the busy - * bit to clear. - * @param addr - * The address of the USB indirect register to read - * @param dat - * The value to write to the USB indirect register - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_WRITE_BYTE(uint8_t addr, uint8_t dat); -#else -#define USB_WRITE_BYTE(addr, dat) \ - do \ - { \ - USB0ADR = (addr); \ - USB0DAT = (dat); \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Sets bits in an indirect USB register - * @details Sets the bits in the bitmask of the indirect USB register - * without disturbing the value of other bits in the indirect - * register. - * @param addr - * The address of the USB indirect register to write - * @param bitmask - * The bits to set - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SET_BITS(uint8_t addr, uint8_t bitmask); -#else -#define USB_SET_BITS(addr, bitmask) \ - do \ - { \ - USB0ADR = (USB0ADR_BUSY__SET | (addr)); \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0DAT = (USB0DAT | (bitmask)); \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Clears bits in an indirect USB register - * @details Clears the bits in the bitmask of an indirect USB register - * without disturbing the value of other bits in the indirect - * register. - * @param addr - * The address of the USB indirect register to write - * @param bitmask - * The bits to clear - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_CLEAR_BITS(uint8_t addr, uint8_t bitmask); -#else -#define USB_CLEAR_BITS(addr, bitmask) \ - do \ - { \ - USB0ADR = (USB0ADR_BUSY__SET | (addr)); \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0DAT = (USB0DAT & ~(bitmask)); \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Enables USB interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableInts(void); -#else -#define USB_EnableInts() \ - do \ - { \ - SFRPAGE = PG2_PAGE; \ - EIE2 |= EIE2_EUSB0__ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Disables USB interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableInts(void); -#else -#define USB_DisableInts() \ - do \ - { \ - SFRPAGE = PG2_PAGE; \ - EIE2 &= ~EIE2_EUSB0__ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Returns state of USB interrupt enabler - * @return TRUE if USB interrupts are enabled, FALSE otherwise. - ******************************************************************************/ -bool USB_GetIntsEnabled(void); - -/***************************************************************************//** - * @brief Enables VBUS detection - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_VbusDetectEnable(void); -#else -#define USB_VbusDetectEnable() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF |= USB0CF_VBUSEN__ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Disables VBUS detection - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_VbusDetectDisable(void); -#else -#define USB_VbusDetectDisable() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_VBUSEN__ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Check status of VBUS signal - * @return TRUE if VBUS signal is present, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsVbusOn(void); -#else -#define USB_IsVbusOn() ((bool) P3_B1) -#endif - -/***************************************************************************//** - * @brief Enables the USB pull-up resistor - * @details Enables either the D+ or the D- pull-up resistor, depending on - * whether @ref USB_SelectFullSpeed() or @ref USB_SelectLowSpeed() - * was previously called. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnablePullUpResistor(void); -#else -#define USB_EnablePullUpResistor() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN |= USB0XCN_PREN__PULL_UP_ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Disables the USB pull-up resistor - * @details Disables either the D+ or the D- pull-up resistor, depending on - * whether @ref USB_SelectFullSpeed() or @ref USB_SelectLowSpeed() - * was previously called. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisablePullUpResistor(void); -#else -#define USB_DisablePullUpResistor() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN &= ~USB0XCN_PREN__PULL_UP_ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Enables the USB transceiver - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableTransceiver(void); -#else -#define USB_EnableTransceiver() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN |= USB0XCN_PHYEN__ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Disables the USB transceiver - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableTransceiver(void); -#else -#define USB_DisableTransceiver() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN &= ~USB0XCN_PHYEN__ENABLED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Puts the USB in full-speed mode. - * @details Configures the USB to operate as a full-speed device by - * enabling the D+ pull-up resistor. After calling this - * function, the user must call @ref USB_EnablePullUpResistor(). - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SelectFullSpeed(void); -#else -#define USB_SelectFullSpeed() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN |= USB0XCN_SPEED__FULL_SPEED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Puts the USB in low-speed mode. - * @details Configures the USB to operate as a low-speed device by - * enabling the D- pull-up resistor. After calling this - * function, the user must call @ref USB_EnablePullUpResistor(). - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SelectLowSpeed(void); -#else -#define USB_SelectLowSpeed() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN &= ~USB0XCN_SPEED__FULL_SPEED; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Suspends the transceiver - * @details Puts the USB transceiver in suspend mode. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SuspendTransceiver(void); -#else -#define USB_SuspendTransceiver() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0XCN &= ~(USB0XCN_PHYEN__ENABLED \ - | USB0XCN_Dp__HIGH \ - | USB0XCN_Dn__HIGH); \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the internal oscillator as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockIntOsc(void); -#else -#define USB_SetClockIntOsc() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the internal oscillator / 8 as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockIntOscDiv8(void); -#else -#define USB_SetClockIntOscDiv8() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - USB0CF |= USB0CF_USBCLK__HFOSC1_DIV_8; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the external oscillator as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockExtOsc(void); -#else -#define USB_SetClockExtOsc() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - USB0CF |= USB0CF_USBCLK__EXTOSC; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the external oscillator / 2 as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockExtOscDiv2(void); -#else -#define USB_SetClockExtOscDiv2() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - USB0CF |= USB0CF_USBCLK__EXTOSC_DIV_2; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the external oscillator / 3 as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockExtOscDiv3(void); -#else -#define USB_SetClockExtOscDiv3() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - USB0CF |= USB0CF_USBCLK__EXTOSC_DIV_3; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the external oscillator / 4 as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockExtOscDiv4(void); -#else -#define USB_SetClockExtOscDiv4() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - USB0CF |= USB0CF_USBCLK__EXTOSC_DIV_4; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the low-frequency oscillator as the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetClockLfo(void); -#else -#define USB_SetClockLfo() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - USB0CF &= ~USB0CF_USBCLK__FMASK; \ - USB0CF |= USB0CF_USBCLK__LFOSC; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Selects the normal setting for the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetNormalClock(void); -#else -#define USB_SetNormalClock() USB_SetClockIntOsc() -#endif - -/***************************************************************************//** - * @brief Selects the low-power setting for the USB clock - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetSuspendClock(void); -#else -#define USB_SetSuspendClock() USB_SetClockIntOscDiv8() -#endif - -/***************************************************************************//** - * @brief Suspends REG1 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SuspendRegulator(void); -#else -#define USB_SuspendRegulator() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - REG1CN |= REG1CN_SUSEN__SUSPEND; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Does not use regulator low-power modes - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SuspendRegulatorFastWake(void); -#else -#define USB_SuspendRegulatorFastWake() -#endif - -/***************************************************************************//** - * @brief Takes REG0 and REG1 out of suspend - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_UnsuspendRegulator(void); -#else -#define USB_UnsuspendRegulator() \ - do \ - { \ - SFRPAGE = PG3_PAGE; \ - REG1CN &= ~REG1CN_SUSEN__SUSPEND; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Determine if the internal regulator is enabled - * @return TRUE if the internal regulator is enabled, FALSE otherwise - ******************************************************************************/ -bool USB_IsRegulatorEnabled(void); - -/***************************************************************************//** - * @brief Disable the prefetch engine - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -void USB_DisablePrefetch(void); -#else -#define USB_DisablePrefetch() \ - do \ - { \ - SFRPAGE = PG2_PAGE; \ - PFE0CN &= ~(PFE0CN_PFEN__ENABLED | PFE0CN_FLRT__SYSCLK_BELOW_50_MHZ); \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Enable the prefetch engine - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -void USB_EnablePrefetch(void); -#else -#define USB_EnablePrefetch() \ - do \ - { \ - SFRPAGE = PG2_PAGE; \ - PFE0CN |= (PFE0CN_PFEN__ENABLED | PFE0CN_FLRT__SYSCLK_BELOW_50_MHZ); \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Determine if the prefetch engine is enabled - * @return TRUE if prefetch engine is enabled, FALSE otherwise. - ******************************************************************************/ -bool USB_IsPrefetchEnabled(void); - -/***************************************************************************//** - * @brief Suspends internal oscillator - ******************************************************************************/ -void USB_SuspendOscillator(void); - -/***************************************************************************//** - * @brief Enables clock recovery in full speed mode - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableFullSpeedClockRecovery(void); -#else -#define USB_EnableFullSpeedClockRecovery() \ - USB_WRITE_BYTE(CLKREC, (CLKREC_CRE__ENABLED | 0x0F)) -#endif - -/***************************************************************************//** - * @brief Enables clock recovery in low speed mode - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableLowSpeedClockRecovery(void); -#else -#define USB_EnableLowSpeedClockRecovery() \ - USB_WRITE_BYTE(CLKREC, \ - (CLKREC_CRE__ENABLED \ - | CLKREC_CRLOW__LOW_SPEED \ - | 0x0F)) -#endif - -/***************************************************************************//** - * @brief Disables clock recovery - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableClockRecovery(void); -#else -#define USB_DisableClockRecovery() USB_WRITE_BYTE(CLKREC, 0x0F) -#endif - -/***************************************************************************//** - * @brief Sets the USB function address - * @param addr - * USB Function Address value - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetAddress(uint8_t addr); -#else -#define USB_SetAddress(addr) \ - USB_WRITE_BYTE(FADDR, (FADDR_UPDATE__SET | (addr))) -#endif - -/***************************************************************************//** - * @brief Disable the USB Inhibit feature - * @details The USB block is inhibited after a power-on-reset or an - * asynchronous reset. Software should disable the inhibit bit - * after all USB and transceiver initialization is complete. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableInhibit(void); -#else -#define USB_DisableInhibit() \ - USB_WRITE_BYTE(POWER, (POWER_USBINH__ENABLED | POWER_SUSEN__ENABLED)) -#endif - -/***************************************************************************//** - * @brief Forces a USB reset - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_ForceReset(void); -#else -#define USB_ForceReset() USB_WRITE_BYTE(POWER, POWER_USBRST__SET) -#endif - -/***************************************************************************//** - * @brief Forces USB resume signaling - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_ForceResume(void); -#else -#define USB_ForceResume() \ - USB_WRITE_BYTE(POWER, (POWER_RESUME__START | POWER_SUSEN__ENABLED)) -#endif - -/***************************************************************************//** - * @brief Clears USB resume signaling - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_ClearResume(void); -#else -#define USB_ClearResume() USB_WRITE_BYTE(POWER, POWER_SUSEN__ENABLED) -#endif - -/***************************************************************************//** - * @brief Enables USB suspend detection - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableSuspendDetection(void); -#else -#define USB_EnableSuspendDetection() USB_WRITE_BYTE(POWER, POWER_SUSEN__ENABLED) -#endif - -/***************************************************************************//** - * @brief Disables USB suspend detection - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableSuspendDetection(void); -#else -#define USB_DisableSuspendDetection() USB_WRITE_BYTE(POWER, 0) -#endif - -/***************************************************************************//** - * @brief Setup End Serviced - * @details Software should call this function after servicing a Setup End - * event. Setup End is detected by calling usbGetSetupEnd - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_ServicedSetupEnd(void); -#else -#define USB_ServicedSetupEnd() \ - USB_WRITE_BYTE(E0CSR, E0CSR_SSUEND__SET) -#endif - -/***************************************************************************//** - * @brief Out Packet Ready Serviced - * @details Software should call this function after servicing a received - * Endpoint 0 packet. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0ServicedOutPacketReady(void); -#else -#define USB_Ep0ServicedOutPacketReady() \ - USB_WRITE_BYTE(E0CSR, E0CSR_SOPRDY__SET) -#endif - -/***************************************************************************//** - * @brief Sets In Packet Ready and Data End on Endpoint 0 - * @details This should be called instead of @ref USB_Ep0SetInPacketReady() - * when sending the last packet of a setup data phase. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0SetLastInPacketReady(void); -#else -#define USB_Ep0SetLastInPacketReady() \ - USB_WRITE_BYTE(E0CSR, (E0CSR_INPRDY__SET | E0CSR_DATAEND__SET)) -#endif - -/***************************************************************************//** - * @brief Sets In Packet Ready and Data End on Endpoint 0 - * @details This should be called instead of @ref USB_Ep0SetInPacketReady() - * when sending a zero-length packet. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0SetZLPInPacketReady(void); -#else -#define USB_Ep0SetZLPInPacketReady() \ - USB_WRITE_BYTE(E0CSR, (E0CSR_INPRDY__SET | E0CSR_DATAEND__SET)) -#endif - -/***************************************************************************//** - * @brief Serviced Out Packet Ready and Data End on Endpoint 0 - * @details This should be called instead of @ref USB_ServicedSetupEnd() - * after servicing the last incoming data packet. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0SetLastOutPacketReady(void); -#else -#define USB_Ep0SetLastOutPacketReady() \ - USB_WRITE_BYTE(E0CSR, (E0CSR_SOPRDY__SET | E0CSR_DATAEND__SET)) -#endif - -/***************************************************************************//** - * @brief Sends a stall on Endpoint 0 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0SendStall(void); -#else -#define USB_Ep0SendStall() USB_WRITE_BYTE(E0CSR, E0CSR_SDSTL__SET) -#endif - -/***************************************************************************//** - * @brief Clears sent stall condition on Endpoint 0 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0ClearSentStall(void); -#else -#define USB_Ep0ClearSentStall() USB_WRITE_BYTE(E0CSR, 0) -#endif - -/***************************************************************************//** - * @brief Sets InPacketReady on Endpoint 0 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_Ep0SetInPacketReady(void); -#else -#define USB_Ep0SetInPacketReady() USB_WRITE_BYTE(E0CSR, E0CSR_INPRDY__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Start-of-Frame Interrupt - * @param CMINT_snapshot - * Snapshot of the CMINT register taken previously with the - * @ref USB_GetCommonInts() function. - * @return TRUE if Start-of-Frame Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsSofIntActive(uint8_t CMINT_snapshot); -#else -#define USB_IsSofIntActive(CMINT_snapshot) ((CMINT_snapshot) & CMINT_SOF__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Reset Interrupt - * @param CMINT_snapshot - * Snapshot of the CMINT register taken previously with the - * @ref USB_GetCommonInts() function. - * @return TRUE if USB Reset Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsResetIntActive(uint8_t CMINT_snapshot); -#else -#define USB_IsResetIntActive(CMINT_snapshot) \ - ((CMINT_snapshot) & CMINT_RSTINT__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Resume Interrupt - * @param CMINT_snapshot - * Snapshot of the CMINT register taken previously with the - * @ref USB_GetCommonInts() function. - * @return TRUE if USB Resume Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsResumeIntActive(uint8_t CMINT_snapshot); -#else -#define USB_IsResumeIntActive(CMINT_snapshot) \ - ((CMINT_snapshot) & CMINT_RSUINT__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Suspend Interrupt - * @param CMINT_snapshot - * Snapshot of the CMINT register taken previously with the - * @ref USB_GetCommonInts() function. - * @return TRUE if USB Suspend Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsSuspendIntActive(uint8_t CMINT_snapshot); -#else -#define USB_IsSuspendIntActive(CMINT_snapshot) \ - ((CMINT_snapshot) & CMINT_SUSINT__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 0 Interrupt - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @return TRUE if USB Endpoint 0 Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsEp0IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_IsEp0IntActive(IN1INT_snapshot) \ - ((IN1INT_snapshot) & IN1INT_EP0__SET) -#endif - -/***************************************************************************//** - * @brief Returns 1 if any USB IN Interrupt is active - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @return TRUE if any USB IN Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsInIntActive(uint8_t IN1INT_snapshot); -#else -#define USB_IsInIntActive(IN1INT_snapshot) \ - ((IN1INT_snapshot) & (IN1INT_IN1__SET | IN1INT_IN2__SET | IN1INT_IN3__SET)) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 1 IN Interrupt - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @return TRUE if USB Endpoint 1 IN Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsIn1IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_IsIn1IntActive(IN1INT_snapshot) \ - ((IN1INT_snapshot) & IN1INT_IN1__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 2 IN Interrupt - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @return TRUE if USB Endpoint 2 IN Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsIn2IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_IsIn2IntActive(IN1INT_snapshot) \ - ((IN1INT_snapshot) & IN1INT_IN2__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 3 IN Interrupt - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @return TRUE if USB Endpoint 3 IN Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsIn3IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_IsIn3IntActive(IN1INT_snapshot) \ - ((IN1INT_snapshot) & IN1INT_IN3__SET) -#endif - -/***************************************************************************//** - * @brief Returns 1 if any USB Endpoint OUT Interrupt is active - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @return TRUE if any USB OUT Interrupt is active, FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsOutIntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_IsOutIntActive(OUT1INT_snapshot) \ - ((OUT1INT_snapshot) \ - & (OUT1INT_OUT1__SET | OUT1INT_OUT2__SET | OUT1INT_OUT3__SET)) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 1 OUT Interrupt - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @return TRUE if USB Endpoint 1 OUT Interrupt is active, - * FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsOut1IntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_IsOut1IntActive(OUT1INT_snapshot) \ - ((OUT1INT_snapshot) & OUT1INT_OUT1__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 2 OUT Interrupt - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @return TRUE if USB Endpoint 2 OUT Interrupt is active, - * FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsOut2IntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_IsOut2IntActive(OUT1INT_snapshot) \ - ((OUT1INT_snapshot) & OUT1INT_OUT2__SET) -#endif - -/***************************************************************************//** - * @brief Returns state of USB Endpoint 3 OUT Interrupt - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @return TRUE if USB Endpoint 3 OUT Interrupt is active, - * FALSE otherwise. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern bool USB_IsOut3IntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_IsOut3IntActive(OUT1INT_snapshot) \ - ((OUT1INT_snapshot) & OUT1INT_OUT3__SET) -#endif - -/***************************************************************************//** - * @brief Sets the suspend interrupt flag to active - * @param CMINT_snapshot - * Snapshot of the CMINT register taken previously with the - * @ref USB_GetCommonInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetSuspendIntActive(uint8_t CMINT_snapshot); -#else -#define USB_SetSuspendIntActive(CMINT_snapshot) \ - (CMINT_snapshot |= CMINT_SUSINT__SET) -#endif - -/***************************************************************************//** - * @brief Sets the EP0 interrupt flag to active - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetEp0IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_SetEp0IntActive(IN1INT_snapshot) \ - (IN1INT_snapshot |= IN1INT_EP0__SET) -#endif - -/***************************************************************************//** - * @brief Sets the IN 1 interrupt flag to active - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetIn1IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_SetIn1IntActive(IN1INT_snapshot) \ - (IN1INT_snapshot |= IN1INT_IN1__SET) -#endif - -/***************************************************************************//** - * @brief Sets the IN 12interrupt flag to active - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetIn2IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_SetIn2IntActive(IN1INT_snapshot) \ - (IN1INT_snapshot |= IN1INT_IN2__SET) -#endif - -/***************************************************************************//** - * @brief Sets the IN 3 interrupt flag to active - * @param IN1INT_snapshot - * Snapshot of the IN1INT register taken previously with the - * @ref USB_GetInInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetIn3IntActive(uint8_t IN1INT_snapshot); -#else -#define USB_SetIn3IntActive(IN1INT_snapshot) \ - (IN1INT_snapshot |= IN1INT_IN3__SET) -#endif - -/***************************************************************************//** - * @brief Sets the OUT 1 interrupt flag to active - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetOut1IntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_SetOut1IntActive(OUT1INT_snapshot) \ - (OUT1INT_snapshot |= OUT1INT_OUT1__SET) -#endif - -/***************************************************************************//** - * @brief Sets the OUT 2 interrupt flag to active - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetOut2IntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_SetOut2IntActive(OUT1INT_snapshot) \ - (OUT1INT_snapshot |= OUT1INT_OUT2__SET) -#endif - -/***************************************************************************//** - * @brief Sets the OUT 3 interrupt flag to active - * @param OUT1INT_snapshot - * Snapshot of the OUT1INT register taken previously with the - * @ref USB_GetOutInts() function. - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetOut3IntActive(uint8_t OUT1INT_snapshot); -#else -#define USB_SetOut3IntActive(OUT1INT_snapshot) \ - (OUT1INT_snapshot |= OUT1INT_OUT3__SET) -#endif - -/***************************************************************************//** - * @brief Enables USB Start-of-Frame, Reset, Resume, and - * Suspend Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableDeviceInts(void); -#else -#define USB_EnableDeviceInts() \ - USB_WRITE_BYTE(CMIE, \ - (CMIE_SOFE__ENABLED \ - | CMIE_RSTINTE__ENABLED \ - | CMIE_RSUINTE__ENABLED \ - | CMIE_SUSINTE__ENABLED)); -#endif - -/***************************************************************************//** - * @brief Enables USB Start-of-Frame Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableSofInt(void); -#else -#define USB_EnableSofInt() USB_SET_BITS(CMIE, CMIE_SOFE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Start-of-Frame Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableSofInt(void); -#else -#define USB_DisableSofInt() USB_CLEAR_BITS(CMIE, CMIE_SOFE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Reset Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableResetInt(void); -#else -#define USB_EnableResetInt() USB_SET_BITS(CMIE, CMIE_RSTINTE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Reset Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableResetInt(void); -#else -#define USB_DisableResetInt() USB_CLEAR_BITS(CMIE, CMIE_RSTINTE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Resume Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableResumeInt(void); -#else -#define USB_EnableResumeInt() USB_SET_BITS(CMIE, CMIE_RSUINTE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Resume Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableResumeInt(void); -#else -#define USB_DisableResumeInt() USB_CLEAR_BITS(CMIE, CMIE_RSUINTE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Suspend Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableSuspendInt(void); -#else -#define USB_EnableSuspendInt() USB_SET_BITS(CMIE, CMIE_SUSINTE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Suspend Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableSuspendInt(void); -#else -#define USB_DisableSuspendInt() USB_CLEAR_BITS(CMIE, CMIE_SUSINTE__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 0 Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableEp0Int(void); -#else -#define USB_EnableEp0Int() USB_SET_BITS(IN1IE, IN1IE_EP0E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 0 Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableEp0Int(void); -#else -#define USB_DisableEp0Int() USB_CLEAR_BITS(IN1IE, IN1IE_EP0E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 1 IN Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableIn1Int(void); -#else -#define USB_EnableIn1Int() USB_SET_BITS(IN1IE, IN1IE_IN1E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 1 IN Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableIn1Int(void); -#else -#define USB_DisableIn1Int() USB_CLEAR_BITS(IN1IE, IN1IE_IN1E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 2 IN Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableIn2Int(void); -#else -#define USB_EnableIn2Int() USB_SET_BITS(IN1IE, IN1IE_IN2E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 2 IN Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableIn2Int(void); -#else -#define USB_DisableIn2Int() USB_CLEAR_BITS(IN1IE, IN1IE_IN2E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 3 IN Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableIn3Int(void); -#else -#define USB_EnableIn3Int() USB_SET_BITS(IN1IE, IN1IE_IN3E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 3 IN Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableIn3Int(void); -#else -#define USB_DisableIn3Int() USB_CLEAR_BITS(IN1IE, IN1IE_IN3E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 1 OUT Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableOut1Int(void); -#else -#define USB_EnableOut1Int() USB_SET_BITS(OUT1IE, OUT1IE_OUT1E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 1 OUT Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableOut1Int(void); -#else -#define USB_DisableOut1Int() USB_CLEAR_BITS(OUT1IE, OUT1IE_OUT1E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 2 OUT Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableOut2Int(void); -#else -#define USB_EnableOut2Int() USB_SET_BITS(OUT1IE, OUT1IE_OUT2E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 2 OUT Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableOut2Int(void); -#else -#define USB_DisableOut2Int() USB_CLEAR_BITS(OUT1IE, OUT1IE_OUT2E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 3 OUT Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableOut3Int(void); -#else -#define USB_EnableOut3Int() USB_SET_BITS(OUT1IE, OUT1IE_OUT3E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 3 OUT Interrupts - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableOut3Int(void); -#else -#define USB_DisableOut3Int() USB_CLEAR_BITS(OUT1IE, OUT1IE_OUT3E__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 1 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableEp1(void); -#else -#define USB_EnableEp1() USB_SET_BITS(EENABLE, EENABLE_EEN1__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 1 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableEp1(void); -#else -#define USB_DisableEp1() USB_CLEAR_BITS(EENABLE, EENABLE_EEN1__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 2 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableEp2(void); -#else -#define USB_EnableEp2() USB_SET_BITS(EENABLE, EENABLE_EEN2__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 2 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableEp2(void); -#else -#define USB_DisableEp2() USB_CLEAR_BITS(EENABLE, EENABLE_EEN2__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables USB Endpoint 3 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableEp3(void); -#else -#define USB_EnableEp3() USB_SET_BITS(EENABLE, EENABLE_EEN3__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables USB Endpoint 3 - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableEp3(void); -#else -#define USB_DisableEp3() USB_CLEAR_BITS(EENABLE, EENABLE_EEN3__ENABLED); -#endif - -/***************************************************************************//** - * @brief Configures Endpoint N for OUT - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnDirectionOut(void); -#else -#define USB_EpnDirectionOut() USB_CLEAR_BITS(EINCSRH, EINCSRH_DIRSEL__IN); -#endif - -/***************************************************************************//** - * @brief Configures Endpoint N for IN - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnDirectionIn(void); -#else -#define USB_EpnDirectionIn() USB_SET_BITS(EINCSRH, EINCSRH_DIRSEL__IN); -#endif - -/***************************************************************************//** - * @brief Enables split mode on Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnEnableSplitMode(void); -#else -#define USB_EpnEnableSplitMode() \ - USB_SET_BITS(EINCSRH, EINCSRH_SPLIT__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables split mode Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnDisableSplitMode(void); -#else -#define USB_EpnDisableSplitMode() \ - USB_CLEAR_BITS(EINCSRH, EINCSRH_SPLIT__ENABLED); -#endif - -/***************************************************************************//** - * @brief Resets the IN endpoint data toggle to '0' - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInClearDataToggle(void); -#else -#define USB_EpnInClearDataToggle() USB_SET_BITS(EINCSRL, EINCSRL_CLRDT__BMASK); -#endif - -/***************************************************************************//** - * @brief Clears sent stall condition on Endpoint N IN - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInClearSentStall(void); -#else -#define USB_EpnInClearSentStall() USB_WRITE_BYTE(EINCSRL, 0); -#endif - -/***************************************************************************//** - * @brief Sends a stall for each IN token on Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInStall(void); -#else -#define USB_EpnInStall() USB_WRITE_BYTE(EINCSRL, EINCSRL_SDSTL__SET); -#endif - -/***************************************************************************//** - * @brief Stops stalling for each IN token on Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInEndStall(void); -#else -#define USB_EpnInEndStall() USB_WRITE_BYTE(EINCSRL, 0); -#endif - -/***************************************************************************//** - * @brief Stops stalling for each IN token on Endpoint N and clears - * the data toggle - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInEndStallAndClearDataToggle(void); -#else -#define USB_EpnInEndStallAndClearDataToggle() \ - USB_WRITE_BYTE(EINCSRL, EINCSRL_CLRDT__BMASK); -#endif - -/***************************************************************************//** - * @brief Flushes In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInFlush(void); -#else -#define USB_EpnInFlush() \ - do \ - { \ - USB_WRITE_BYTE(EINCSRL, EINCSRL_FLUSH__SET); \ - do \ - { \ - USB_READ_BYTE(EINCSRL); \ - } while (USB0DAT & EINCSRL_FLUSH__SET); \ - } while (0); -#endif - -/***************************************************************************//** - * @brief Clears underrun condition on In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInClearUnderrun(void); -#else -#define USB_EpnInClearUnderrun() USB_CLEAR_BITS(EINCSRL, EINCSRL_UNDRUN__SET); -#endif - -/***************************************************************************//** - * @brief Sets InPacketReady on In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnSetInPacketReady(void); -#else -#define USB_EpnSetInPacketReady() USB_SET_BITS(EINCSRL, EINCSRL_INPRDY__SET); -#endif - -/***************************************************************************//** - * @brief Enables double buffering on In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInEnableDoubleBuffer(void); -#else -#define USB_EpnInEnableDoubleBuffer() \ - USB_SET_BITS(EINCSRH, EINCSRH_DBIEN__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables double buffering on In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInDisableDoubleBuffer(void); -#else -#define USB_EpnInDisableDoubleBuffer() \ - USB_CLEAR_BITS(EINCSRH, EINCSRH_DBIEN__ENABLED); -#endif - -/***************************************************************************//** - * @brief Configures In Endpoint N for Interrupt/Bulk Mode - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInEnableInterruptBulkMode(void); -#else -#define USB_EpnInEnableInterruptBulkMode() \ - USB_CLEAR_BITS(EINCSRH, EINCSRH_ISO__ENABLED); -#endif - -/***************************************************************************//** - * @brief Configures In Endpoint N for Isochronous Mode - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInEnableIsochronousMode(void); -#else -#define USB_EpnInEnableIsochronousMode() \ - USB_SET_BITS(EINCSRH, EINCSRH_ISO__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables forced data toggle on In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInEnableForcedDataToggle(void); -#else -#define USB_EpnInEnableForcedDataToggle() \ - USB_SET_BITS(EINCSRH, EINCSRH_FCDT__ALWAYS_TOGGLE); -#endif - -/***************************************************************************//** - * @brief Disables forced data toggle on In Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnInDisableForcedDataToggle(void); -#else -#define USB_EpnInDisableForcedDataToggle() \ - USB_CLEAR_BITS(EINCSRH, EINCSRH_FCDT__ALWAYS_TOGGLE); -#endif - -/***************************************************************************//** - * @brief Resets the OUT endpoint data toggle to '0' - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutClearDataToggle(void); -#else -#define USB_EpnOutClearDataToggle() \ - USB_SET_BITS(EOUTCSRL, EOUTCSRL_CLRDT__BMASK); -#endif - -/***************************************************************************//** - * @brief Clears sent stall condition on Endpoint N OUT - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutClearSentStall(void); -#else -#define USB_EpnOutClearSentStall() \ - USB_CLEAR_BITS(EOUTCSRL, EOUTCSRL_STSTL__BMASK); -#endif - -/***************************************************************************//** - * @brief Sends a stall for each OUT token on Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutStall(void); -#else -#define USB_EpnOutStall() \ - USB_SET_BITS(EOUTCSRL, EOUTCSRL_SDSTL__SET); -#endif - -/***************************************************************************//** - * @brief Stops stalling for each OUT token on Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutEndStall(void); -#else -#define USB_EpnOutEndStall() USB_CLEAR_BITS(EOUTCSRL, EOUTCSRL_SDSTL__SET); -#endif - -/***************************************************************************//** - * @brief Stops stalling for each OUT token on Endpoint N and clears - * the data toggle - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutEndStallAndClearDataToggle(void); -#else -#define USB_EpnOutEndStallAndClearDataToggle() \ - do \ - { \ - USB_READ_BYTE(EOUTCSRL); \ - USB0DAT &= ~EOUTCSRL_SDSTL__SET; \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0DAT |= EOUTCSRL_CLRDT__BMASK; \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - } while (0); -#endif - -/***************************************************************************//** - * @brief Flushes OUT Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutFlush(void); -#else -#define USB_EpnOutFlush() \ - do \ - { \ - USB_WRITE_BYTE(EOUTCSRL, EOUTCSRL_FLUSH__SET); \ - do \ - { \ - USB_READ_BYTE(EOUTCSRL); \ - } while (USB0DAT & EOUTCSRL_FLUSH__SET); \ - } while (0); -#endif - -/***************************************************************************//** - * @brief Clears overrun condition on OUT Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutClearOverrun(void); -#else -#define USB_EpnOutClearOverrun() USB_CLEAR_BITS(EOUTCSRL, EOUTCSRL_OVRUN__SET); -#endif - -/***************************************************************************//** - * @brief Clears OutPacketReady on Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnClearOutPacketReady(void); -#else -#define USB_EpnClearOutPacketReady() \ - USB_CLEAR_BITS(EOUTCSRL, EOUTCSRL_OPRDY__SET); -#endif - -/***************************************************************************//** - * @brief Enables double buffering on OUT Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutEnableDoubleBuffer(void); -#else -#define USB_EpnOutEnableDoubleBuffer() \ - USB_SET_BITS(EOUTCSRH, EOUTCSRH_DBIEN__ENABLED); -#endif - -/***************************************************************************//** - * @brief Disables double buffering on OUT Endpoint N - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutDisableDoubleBuffer(void); -#else -#define USB_EpnOutDisableDoubleBuffer() \ - USB_CLEAR_BITS(EOUTCSRH, EOUTCSRH_DBIEN__ENABLED); -#endif - -/***************************************************************************//** - * @brief Configures OUT Endpoint N for Interrupt/Bulk Mode - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutEnableInterruptBulkMode(void); -#else -#define USB_EpnOutEnableInterruptBulkMode() \ - USB_CLEAR_BITS(EOUTCSRH, EOUTCSRH_ISO__ENABLED); -#endif - -/***************************************************************************//** - * @brief Configures OUT Endpoint N for Isochronous Mode - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EpnOutEnableIsochronousMode(void); -#else -#define USB_EpnOutEnableIsochronousMode() \ - USB_SET_BITS(EOUTCSRH, EOUTCSRH_ISO__ENABLED); -#endif - -/***************************************************************************//** - * @brief Enables FIFO read - * @param fifoNum - * FIFO to read - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableReadFIFO(uint8_t fifoNum); -#else -#define USB_EnableReadFIFO(fifoNum) \ - do \ - { \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0ADR = (USB0ADR_BUSY__SET \ - | USB0ADR_AUTORD__ENABLED \ - | (FIFO0 | fifoNum)); \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Disables FIFO read - * @param fifoNum - * FIFO that was read from - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableReadFIFO(uint8_t fifoNum); -#else -#define USB_DisableReadFIFO(fifoNum) -#endif - -/***************************************************************************//** - * @brief Reads a byte from the FIFO - * @param readDat - * Memory location to write the byte read from the FIFO - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_GetFIFOByte(uint8_t * readDat); -#else -#define USB_GetFIFOByte(readDat) \ - do \ - { \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - readDat = USB0DAT; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Reads the last byte from the FIFO - * @details The last read must be done with the AUTORD bit cleared. - * This prevents the read from triggering another read - * immediately thereafter. - * @param readDat - * Memory location to write the byte read from the FIFO - * @param fifoNum - * FIFO to read - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_GetLastFIFOByte(uint8_t * readDat, uint8_t fifoNum); -#else -#define USB_GetLastFIFOByte(readDat, fifoNum) \ - do \ - { \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0ADR = (FIFO0 | fifoNum);\ - readDat = USB0DAT; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Enables FIFO write - * @param fifoNum - * FIFO to write - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_EnableWriteFIFO(uint8_t fifoNum); -#else -#define USB_EnableWriteFIFO(fifoNum) \ - do \ - { \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0ADR = (FIFO0 | fifoNum); \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Disables FIFO write - * @param fifoNum - * FIFO that was written to - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_DisableWriteFIFO(uint8_t fifoNum); -#else -#define USB_DisableWriteFIFO(fifoNum) -#endif - -/***************************************************************************//** - * @brief Writes a byte to the FIFO - * @param writeDat - * Data to write to the FIFO - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SetFIFOByte(uint8_t writeDat); -#else -#define USB_SetFIFOByte(writeDat) \ - do \ - { \ - while (USB0ADR & USB0ADR_BUSY__SET) {} \ - USB0DAT = writeDat; \ - } while (0) -#endif - -/***************************************************************************//** - * @brief Saves the current SFR page - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_SaveSfrPage(); -#else -#define USB_SaveSfrPage() uint8_t SfrPageSave = SFRPAGE -#endif - -/***************************************************************************//** - * @brief Restores the SFR page - * @note @ref USB_SaveSfrPage() must be called before calling this macro - * @note This function is implemented as a macro. - ******************************************************************************/ -#ifdef IS_DOXYGEN -extern void USB_RestoreSfrPage(); -#else -#define USB_RestoreSfrPage() SFRPAGE = SfrPageSave -#endif - -// ------------------------------- -// Function Prototypes - -/***************************************************************************//** - * @brief Writes a value to INDEX - * @param epsel - * Endpoint index to target - ******************************************************************************/ -void USB_SetIndex(uint8_t epsel); - -/***************************************************************************//** - * @brief Reads the USB common interrupt register - * @return Value of CMINT - ******************************************************************************/ -uint8_t USB_GetCommonInts(void); - -/***************************************************************************//** - * @brief Reads the USB in interrupt register - * @return Value of IN1INT - ******************************************************************************/ -uint8_t USB_GetInInts(void); - -/***************************************************************************//** - * @brief Reads the out interrupt register - * @return Value of OUT1INT - ******************************************************************************/ -uint8_t USB_GetOutInts(void); - -/***************************************************************************//** - * @brief Reads the value in INDEX - * @return Value of INDEX - ******************************************************************************/ -uint8_t USB_GetIndex(void); - -/***************************************************************************//** - * @brief Determines if the USB is currently suspended - * @return TRUE if USB is in suspend mode - ******************************************************************************/ -bool USB_IsSuspended(void); - -/***************************************************************************//** - * @brief Gets Setup End state - * @return TRUE when a control transaction end before software has - * set the DATAEND bit. - ******************************************************************************/ -bool USB_GetSetupEnd(void); - -/***************************************************************************//** - * @brief Determines if STALL was send on Endpoint 0 - * @return TRUE after a STALL was sent on Endpoint 0 - ******************************************************************************/ -bool USB_Ep0SentStall(void); - -/***************************************************************************//** - * @brief Determines if Out Packet Ready is set on Endpoint 0 - * @return TRUE if Out Packet Ready is set on Endpoint 0 - ******************************************************************************/ -bool USB_Ep0InPacketReady(void); - -/***************************************************************************//** - * @brief Determines if In Packet Ready is set on Endpoint 0 - * @return TRUE if In Packet Ready is set on Endpoint 0 - ******************************************************************************/ -bool USB_Ep0OutPacketReady(void); - -/***************************************************************************//** - * @brief Gets Endpoint 0 data count - * @return Number of received data bytes in the Endpoint 0 FIFO - ******************************************************************************/ -uint8_t USB_Ep0GetCount(void); - -/***************************************************************************//** - * @brief Checks if stall was sent on IN Endpoint N - * @return TRUE if stall was sent on IN Endpoint N, FALSE otherwise - ******************************************************************************/ -bool USB_EpnInGetSentStall(void); - -/***************************************************************************//** - * @brief Checks if stall was sent on OUT Endpoint N - * @return TRUE if stall was sent on OUT Endpoint N, FALSE otherwise - ******************************************************************************/ -bool USB_EpnGetInPacketReady(void); - -/***************************************************************************//** - * @brief Checks if stall was sent on OUT Endpoint N - * @return TRUE if stall was sent on OUT Endpoint N, FALSE otherwise - ******************************************************************************/ -bool USB_EpnOutGetSentStall(void); - -/***************************************************************************//** - * @brief Gets OutPacketReady on OUT Endpoint N - * @return TRUE if OUTPacketReady is set, FALSE otherwise - ******************************************************************************/ -bool USB_EpnGetOutPacketReady(void); - -/***************************************************************************//** - * @brief Gets number of bytes in the OUT FIFO - * OUT packet - * @return Number of bytes in the FIFO from the last received - * packet - ******************************************************************************/ -uint16_t USB_EpOutGetCount(void); - -/***************************************************************************//** - * @brief Reads the USB frame number - * @return The frame number on the most recent SOF packet - ******************************************************************************/ -uint16_t USB_GetSofNumber(void); - -/***************************************************************************//** - * @brief Aborts pending IN transactions on the selected endpoint - * @param fifoNum - * Endpoint to abort - ******************************************************************************/ -void USB_AbortInEp(uint8_t fifoNum); - -/***************************************************************************//** - * @brief Aborts pending OUT transactions on the selected endpoint - * @param fifoNum - * Endpoint to abort - ******************************************************************************/ -void USB_AbortOutEp(uint8_t fifoNum); - -/***************************************************************************//** - * @brief Activates the selected endpoint - * @param ep - * Endpoint to access - * @param packetSize - * Maximum packet size for endpoint - * @param inDir - * Set to 1 if endpoint is IN, 0 if it is OUT - * @param splitMode - * Set to 1 if endpoint is in split mode, 0 if it is not - * @param isoMode - * Set to 1 if endpoint is in isochronous mode, 0 if it is not - ******************************************************************************/ -void USB_ActivateEp(uint8_t ep, - uint16_t packetSize, - bool inDir, - bool splitMode, - bool isoMode); - -/** @} (end addtogroup usb_0_runtime USB0 Runtime API) */ -/** @} (end addtogroup usb_0_group USB0 Driver) */ - -// ----------------------------------------------------------------------------- -// Error Checking - -// ------------------------------- -// Verify that the maximum packet size specified for an endpoint is not too -// large for that endpoint - -#ifdef SLAB_USB_EP1IN_USED - #if SLAB_USB_EP1IN_USED - #if SLAB_USB_EP1IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #error Isochronous transfers are not supported on Endpoint 1. - #else // #if SLAB_USB_EP1IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP1IN_MAX_PACKET_SIZE > 64 - #error EP1IN packet size too large. Interrupt/Bulk packet size must be 64 bytes or less. - #endif // #if SLAB_USB_EP1IN_MAX_PACKET_SIZE > 64 - #endif // #if SLAB_USB_EP1IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #endif // #if SLAB_USB_EP1IN_USED -#endif // #ifdef SLAB_USB_EP1IN_USED - -#ifdef SLAB_USB_EP1OUT_USED - #if SLAB_USB_EP1OUT_USED - #if SLAB_USB_EP1OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #error Isochronous transfers are not supported on Endpoint 1. - #else // #if SLAB_USB_EP1OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP1OUT_MAX_PACKET_SIZE > 64 - #error EP1OUT packet size too large. Interrupt/Bulk packet size must be 64 bytes or less. - #endif // #if SLAB_USB_EP1OUT_MAX_PACKET_SIZE > 64 - #endif // #if SLAB_USB_EP1OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #endif // #if SLAB_USB_EP1OUT_USED -#endif // #ifdef SLAB_USB_EP1OUT_USED - -#ifdef SLAB_USB_EP2IN_USED - #if SLAB_USB_EP2IN_USED - #if SLAB_USB_EP2IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #error Isochronous transfers are not supported on Endpoint 2. - #else // #if SLAB_USB_EP2IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP2IN_MAX_PACKET_SIZE > 64 - #error EP2IN packet size too large. Interrupt/Bulk packet size must be 64 bytes or less. - #endif // #if SLAB_USB_EP2IN_MAX_PACKET_SIZE > 64 - #endif // #if SLAB_USB_EP2IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #endif // #if SLAB_USB_EP2IN_USED -#endif // #ifdef SLAB_USB_EP2IN_USED - -#ifdef SLAB_USB_EP2OUT_USED - #if SLAB_USB_EP2OUT_USED - #if SLAB_USB_EP2OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #error Isochronous transfers are not supported on Endpoint 2. - #else // #if SLAB_USB_EP2OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP2OUT_MAX_PACKET_SIZE > 64 - #error EP2OUT packet size too large. Interrupt/Bulk packet size must be 64 bytes or less. - #endif // #if SLAB_USB_EP2OUT_MAX_PACKET_SIZE > 64 - #endif // #if SLAB_USB_EP2OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #endif // #if SLAB_USB_EP2OUT_USED -#endif // #ifdef SLAB_USB_EP2OUT_USED - -#ifdef SLAB_USB_EP3IN_USED - #if SLAB_USB_EP3IN_USED - #if SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP3OUT_USED - #if SLAB_USB_EP3IN_MAX_PACKET_SIZE > 256 - #error EP3IN packet size too large. FIFO 3 split mode packet size must be 256 bytes or less. - #endif // #if SLAB_USB_EP3IN_MAX_PACKET_SIZE > 256 - #else // #if SLAB_USB_EP3OUT_USED - #if SLAB_USB_EP3IN_MAX_PACKET_SIZE > 512 - #error EP3IN packet size too large. FIFO 3 packet size must be 512 bytes or less. - #endif // #if SLAB_USB_EP3IN_MAX_PACKET_SIZE > 512 - #endif // #if SLAB_USB_EP3OUT_USED - #else // #if SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP3IN_MAX_PACKET_SIZE > 64 - #error EP3IN packet size too large. Interrupt/Bulk packet size must be 64 bytes or less. - #endif // #if SLAB_USB_EP3IN_MAX_PACKET_SIZE > 64 - #endif // #if SLAB_USB_EP3IN_TRANSFER_TYPE == USB_EPTYPE_ISOC - #endif // #if SLAB_USB_EP3IN_USED -#endif // #ifdef SLAB_USB_EP3IN_USED - -#ifdef SLAB_USB_EP3OUT_USED - #if SLAB_USB_EP3OUT_USED - #if SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP3IN_USED - #if SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 256 - #error EP3OUT packet size too large. FIFO 3 split mode packet size must be 256 bytes or less. - #endif // #if SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 256 - #else // #if SLAB_USB_EP3IN_USED - #if SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 512 - #error EP3OUT packet size too large. FIFO 3 packet size must be 512 bytes or less. - #endif // #if SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 512 - #endif // #if SLAB_USB_EP3IN_USED - #else // #if SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #if SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 64 - #error EP3OUT packet size too large. Interrupt/Bulk packet size must be 64 bytes or less. - #endif // #if SLAB_USB_EP3OUT_MAX_PACKET_SIZE > 64 - #endif // #if SLAB_USB_EP3OUT_TRANSFER_TYPE == USB_EPTYPE_ISOC - #endif // #if SLAB_USB_EP3OUT_USED -#endif // #ifdef SLAB_USB_EP3OUT_USED - -#endif // __SILICON_LABS_EFM8_USB_0_H__ diff --git a/targets/efm8/lib/efm8ub1/peripheralDrivers/src/usb_0.c b/targets/efm8/lib/efm8ub1/peripheralDrivers/src/usb_0.c deleted file mode 100644 index 9c44e3f..0000000 --- a/targets/efm8/lib/efm8ub1/peripheralDrivers/src/usb_0.c +++ /dev/null @@ -1,232 +0,0 @@ -/**************************************************************************//** - * Copyright (c) 2015 by Silicon Laboratories Inc. All rights reserved. - * - * http://developer.silabs.com/legal/version/v11/Silicon_Labs_Software_License_Agreement.txt - *****************************************************************************/ - -#include "usb_0.h" -#include -#include - -/** @addtogroup usb_0_runtime USB0 Runtime API */ - -// ----------------------------------------------------------------------------- -// Functions - -// ------------------------------- -// Utility Functions - -/**************************************************************************//** - * @brief Reads a 16-bit indirect USB register value - * @param regAddr - * Address of high byte of 16-bit USB indirect register to read - * @return 16-bit register value - *****************************************************************************/ -static uint16_t USB_GetShortRegister(uint8_t regAddr) -{ - uint16_t retVal; - - USB_READ_BYTE(regAddr); - retVal = (USB0DAT << 8); - USB_READ_BYTE((regAddr - 1)); - retVal |= USB0DAT; - - return retVal; -} - -// ------------------------------- -// USB0 Peripheral Driver Functions - -void USB_SetIndex(uint8_t epsel) -{ - USB_WRITE_BYTE(INDEX, epsel); -} - -uint8_t USB_GetCommonInts(void) -{ - USB_READ_BYTE(CMINT); - return USB0DAT; -} - -uint8_t USB_GetInInts(void) -{ - USB_READ_BYTE(IN1INT); - return USB0DAT; -} - -uint8_t USB_GetOutInts(void) -{ - USB_READ_BYTE(OUT1INT); - return USB0DAT; -} - -uint8_t USB_GetIndex(void) -{ - USB_READ_BYTE(INDEX); - return USB0DAT; -} - -bool USB_IsSuspended(void) -{ - USB_READ_BYTE(POWER); - return USB0DAT & POWER_SUSMD__SUSPENDED; -} - -bool USB_GetSetupEnd(void) -{ - USB_READ_BYTE(E0CSR); - return USB0DAT & E0CSR_SUEND__SET; -} - -bool USB_Ep0SentStall(void) -{ - USB_READ_BYTE(E0CSR); - return USB0DAT & E0CSR_STSTL__SET; -} - -bool USB_Ep0OutPacketReady(void) -{ - USB_READ_BYTE(E0CSR); - return USB0DAT & E0CSR_OPRDY__SET; -} - -bool USB_Ep0InPacketReady(void) -{ - USB_READ_BYTE(E0CSR); - return USB0DAT & E0CSR_INPRDY__SET; -} - -uint8_t USB_Ep0GetCount(void) -{ - USB_READ_BYTE(E0CNT); - return USB0DAT; -} - -bool USB_EpnInGetSentStall(void) -{ - USB_READ_BYTE(EINCSRL); - return (bool)(USB0DAT & EINCSRL_STSTL__SET); -} - -void USB_AbortInEp(uint8_t fifoNum) -{ - USB_SetIndex(fifoNum); - USB_EpnInFlush(); - USB_EpnInFlush(); -} - -bool USB_EpnOutGetSentStall(void) -{ - USB_READ_BYTE(EOUTCSRL); - return (bool)(USB0DAT & EOUTCSRL_STSTL__SET); -} - -bool USB_EpnGetOutPacketReady(void) -{ - USB_READ_BYTE(EOUTCSRL); - return (bool)(USB0DAT & EOUTCSRL_OPRDY__SET); -} - -uint16_t USB_EpOutGetCount(void) -{ - return USB_GetShortRegister(EOUTCNTH); -} - -void USB_AbortOutEp(uint8_t fifoNum) -{ - USB_SetIndex(fifoNum); - USB_EpnOutFlush(); - USB_EpnOutFlush(); -} - -void USB_ActivateEp(uint8_t ep, - uint16_t packetSize, - bool inDir, - bool splitMode, - bool isoMode) -{ - uint8_t CSRH_mask = 0; - uint16_t fifoSize; - - USB_SetIndex(ep); - - // Determine the available fifoSize for a given endpoint based on the - // splitMode setting - fifoSize = (splitMode == true) ? (16 << ep) : (32 << ep); - - if (packetSize <= fifoSize) - { - CSRH_mask |= EINCSRH_DBIEN__ENABLED; - } - - if (isoMode == true) - { - CSRH_mask |= EINCSRH_ISO__ENABLED; - } - - if (inDir == true) - { - CSRH_mask |= EINCSRH_DIRSEL__IN; - - if (splitMode == true) - { - CSRH_mask |= EINCSRH_SPLIT__ENABLED; - } - USB_WRITE_BYTE(EINCSRL, EINCSRL_CLRDT__BMASK); - USB_WRITE_BYTE(EINCSRH, CSRH_mask); - } - else // OUT - { - USB_WRITE_BYTE(EOUTCSRL, EOUTCSRL_CLRDT__BMASK); - USB_WRITE_BYTE(EOUTCSRH, CSRH_mask); - - if (splitMode == false) - { - USB_WRITE_BYTE(EINCSRH, 0); - } - } -} - -uint16_t USB_GetSofNumber(void) -{ - return USB_GetShortRegister(FRAMEH); -} - -bool USB_GetIntsEnabled(void) -{ - SFRPAGE = PG2_PAGE; - return (bool)(EIE2 & EIE2_EUSB0__ENABLED); -} - -bool USB_IsPrefetchEnabled(void) -{ - SFRPAGE = PG2_PAGE; - return (bool)(PFE0CN & PFE0CN_PFEN__ENABLED); -} - -bool USB_IsRegulatorEnabled(void) -{ - SFRPAGE = PG3_PAGE; - return !(REG1CN & REG1CN_REG1ENB__DISABLED); -} - -void USB_SuspendOscillator(void) -{ - uint8_t clkSelSave = CLKSEL & 0x7F; - - CLKSEL = (CLKSEL_CLKDIV__SYSCLK_DIV_8 | CLKSEL_CLKSL__HFOSC0); - SFRPAGE = LEGACY_PAGE; - PCON1 |= PCON1_SUSPEND__SUSPEND; - CLKSEL = clkSelSave; - - // If the target frequency is over 24MHz, our write to CLKSEL will be ignored. - // If this is the case we need to do two writes: one to 24 MHz followed by the - // actual value. - if ((CLKSEL & 0x7F) != clkSelSave) - { - CLKSEL = (CLKSEL_CLKDIV__SYSCLK_DIV_1 | CLKSEL_CLKSL__HFOSC0); - CLKSEL = clkSelSave; - } -} - -/** @} (end addtogroup usb_0_runtime USB0 Runtime API) */ diff --git a/targets/efm8/src/InitDevice.c b/targets/efm8/src/InitDevice.c deleted file mode 100644 index fcec7fb..0000000 --- a/targets/efm8/src/InitDevice.c +++ /dev/null @@ -1,580 +0,0 @@ -//========================================================= -// src/InitDevice.c: generated by Hardware Configurator -// -// This file will be regenerated when saving a document. -// leave the sections inside the "$[...]" comment tags alone -// or they will be overwritten! -//========================================================= - -// USER INCLUDES -#include -#include "InitDevice.h" - -// USER PROTOTYPES -// USER FUNCTIONS - -// $[Library Includes] -#include "efm8_usb.h" -#include "descriptors.h" -#include "usb_0.h" -// [Library Includes]$ - -//============================================================================== -// enter_DefaultMode_from_RESET -//============================================================================== -extern void enter_DefaultMode_from_RESET(void) { - // $[Config Calls] - // Save the SFRPAGE - uint8_t SFRPAGE_save = SFRPAGE; - WDT_0_enter_DefaultMode_from_RESET(); - PORTS_0_enter_DefaultMode_from_RESET(); - PORTS_1_enter_DefaultMode_from_RESET(); - PBCFG_0_enter_DefaultMode_from_RESET(); - LFOSC_0_enter_DefaultMode_from_RESET(); - CIP51_0_enter_DefaultMode_from_RESET(); - CLOCK_0_enter_DefaultMode_from_RESET(); - TIMER01_0_enter_DefaultMode_from_RESET(); - TIMER16_2_enter_DefaultMode_from_RESET(); - TIMER16_3_enter_DefaultMode_from_RESET(); - TIMER_SETUP_0_enter_DefaultMode_from_RESET(); - SPI_0_enter_DefaultMode_from_RESET(); - UART_0_enter_DefaultMode_from_RESET(); - INTERRUPT_0_enter_DefaultMode_from_RESET(); - USBLIB_0_enter_DefaultMode_from_RESET(); - // Restore the SFRPAGE - SFRPAGE = SFRPAGE_save; - // [Config Calls]$ - -} - -extern void INTERRUPT_0_enter_DefaultMode_from_RESET(void) { - // $[EIE1 - Extended Interrupt Enable 1] - // [EIE1 - Extended Interrupt Enable 1]$ - - // $[EIE2 - Extended Interrupt Enable 2] - // [EIE2 - Extended Interrupt Enable 2]$ - - // $[EIP1H - Extended Interrupt Priority 1 High] - // [EIP1H - Extended Interrupt Priority 1 High]$ - - // $[EIP1 - Extended Interrupt Priority 1 Low] - // [EIP1 - Extended Interrupt Priority 1 Low]$ - - // $[EIP2 - Extended Interrupt Priority 2] - // [EIP2 - Extended Interrupt Priority 2]$ - - // $[EIP2H - Extended Interrupt Priority 2 High] - // [EIP2H - Extended Interrupt Priority 2 High]$ - - // $[IE - Interrupt Enable] - /*********************************************************************** - - Enable each interrupt according to its individual mask setting - - Disable external interrupt 0 - - Disable external interrupt 1 - - Disable all SPI0 interrupts - - Disable all Timer 0 interrupt - - Disable all Timer 1 interrupt - - Disable Timer 2 interrupt - - Disable UART0 interrupt - ***********************************************************************/ - IE = IE_EA__ENABLED | IE_EX0__DISABLED | IE_EX1__DISABLED - | IE_ESPI0__DISABLED | IE_ET0__DISABLED | IE_ET1__DISABLED - | IE_ET2__DISABLED | IE_ES0__DISABLED; - // [IE - Interrupt Enable]$ - - // $[IP - Interrupt Priority] - // [IP - Interrupt Priority]$ - - // $[IPH - Interrupt Priority High] - // [IPH - Interrupt Priority High]$ - -} - -extern void USBLIB_0_enter_DefaultMode_from_RESET(void) { - // $[USBD Init] - USBD_Init (&initstruct); - // [USBD Init]$ - -} - -extern void CLOCK_0_enter_DefaultMode_from_RESET(void) { - // $[HFOSC1 Setup] - // Ensure SYSCLK is > 24 MHz before switching to HFOSC1 - SFRPAGE = 0x00; - CLKSEL = CLKSEL_CLKSL__HFOSC0 | CLKSEL_CLKDIV__SYSCLK_DIV_1; - while ((CLKSEL & CLKSEL_DIVRDY__BMASK) == CLKSEL_DIVRDY__NOT_READY) - ; - // [HFOSC1 Setup]$ - - // $[CLKSEL - Clock Select] - /*********************************************************************** - - Clock derived from the Internal High Frequency Oscillator 1 - - SYSCLK is equal to selected clock source divided by 1 - ***********************************************************************/ - CLKSEL = CLKSEL_CLKSL__HFOSC1 | CLKSEL_CLKDIV__SYSCLK_DIV_1; - while ((CLKSEL & CLKSEL_DIVRDY__BMASK) == CLKSEL_DIVRDY__NOT_READY) - ; - // [CLKSEL - Clock Select]$ - -} - -extern void WDT_0_enter_DefaultMode_from_RESET(void) { - // $[WDTCN - Watchdog Timer Control] - SFRPAGE = 0x00; - //Disable Watchdog with key sequence - WDTCN = 0xDE; //First key - WDTCN = 0xAD; //Second key - // [WDTCN - Watchdog Timer Control]$ - -} - -extern void CIP51_0_enter_DefaultMode_from_RESET(void) { - // $[PFE0CN - Prefetch Engine Control] - /*********************************************************************** - - Enable the prefetch engine - - SYSCLK < 50 MHz - ***********************************************************************/ - SFRPAGE = 0x10; - PFE0CN = PFE0CN_PFEN__ENABLED | PFE0CN_FLRT__SYSCLK_BELOW_50_MHZ; - // [PFE0CN - Prefetch Engine Control]$ - -} - -extern void PBCFG_0_enter_DefaultMode_from_RESET(void) { - // $[XBR2 - Port I/O Crossbar 2] - /*********************************************************************** - - Weak Pullups enabled - - Crossbar enabled - - UART1 I/O unavailable at Port pin - - UART1 RTS1 unavailable at Port pin - - UART1 CTS1 unavailable at Port pin - ***********************************************************************/ - XBR2 = XBR2_WEAKPUD__PULL_UPS_ENABLED | XBR2_XBARE__ENABLED - | XBR2_URT1E__DISABLED | XBR2_URT1RTSE__DISABLED - | XBR2_URT1CTSE__DISABLED; - // [XBR2 - Port I/O Crossbar 2]$ - - // $[PRTDRV - Port Drive Strength] - // [PRTDRV - Port Drive Strength]$ - - // $[XBR0 - Port I/O Crossbar 0] - /*********************************************************************** - - UART0 TX0, RX0 routed to Port pins P0.4 and P0.5 - - SPI I/O routed to Port pins - - SMBus 0 I/O unavailable at Port pins - - CP0 unavailable at Port pin - - Asynchronous CP0 unavailable at Port pin - - CP1 unavailable at Port pin - - Asynchronous CP1 unavailable at Port pin - - SYSCLK unavailable at Port pin - ***********************************************************************/ - XBR0 = XBR0_URT0E__ENABLED | XBR0_SPI0E__ENABLED | XBR0_SMB0E__DISABLED - | XBR0_CP0E__DISABLED | XBR0_CP0AE__DISABLED | XBR0_CP1E__DISABLED - | XBR0_CP1AE__DISABLED | XBR0_SYSCKE__DISABLED; - // [XBR0 - Port I/O Crossbar 0]$ - - // $[XBR1 - Port I/O Crossbar 1] - // [XBR1 - Port I/O Crossbar 1]$ - -} - -extern void TIMER_SETUP_0_enter_DefaultMode_from_RESET(void) { - // $[CKCON0 - Clock Control 0] - /*********************************************************************** - - System clock divided by 4 - - Counter/Timer 0 uses the clock defined by the prescale field, SCA - - Timer 2 high byte uses the clock defined by T2XCLK in TMR2CN0 - - Timer 2 low byte uses the clock defined by T2XCLK in TMR2CN0 - - Timer 3 high byte uses the clock defined by T3XCLK in TMR3CN0 - - Timer 3 low byte uses the clock defined by T3XCLK in TMR3CN0 - - Timer 1 uses the system clock - ***********************************************************************/ - CKCON0 = CKCON0_SCA__SYSCLK_DIV_4 | CKCON0_T0M__PRESCALE - | CKCON0_T2MH__EXTERNAL_CLOCK | CKCON0_T2ML__EXTERNAL_CLOCK - | CKCON0_T3MH__EXTERNAL_CLOCK | CKCON0_T3ML__EXTERNAL_CLOCK - | CKCON0_T1M__SYSCLK; - // [CKCON0 - Clock Control 0]$ - - // $[CKCON1 - Clock Control 1] - // [CKCON1 - Clock Control 1]$ - - // $[TMOD - Timer 0/1 Mode] - /*********************************************************************** - - Mode 0, 13-bit Counter/Timer - - Mode 2, 8-bit Counter/Timer with Auto-Reload - - Timer Mode - - Timer 0 enabled when TR0 = 1 irrespective of INT0 logic level - - Timer Mode - - Timer 1 enabled when TR1 = 1 irrespective of INT1 logic level - ***********************************************************************/ - TMOD = TMOD_T0M__MODE0 | TMOD_T1M__MODE2 | TMOD_CT0__TIMER - | TMOD_GATE0__DISABLED | TMOD_CT1__TIMER | TMOD_GATE1__DISABLED; - // [TMOD - Timer 0/1 Mode]$ - - // $[TCON - Timer 0/1 Control] - /*********************************************************************** - - Start Timer 1 running - ***********************************************************************/ - TCON |= TCON_TR1__RUN; - // [TCON - Timer 0/1 Control]$ - -} - -extern void UARTE_1_enter_DefaultMode_from_RESET(void) { - // $[SBCON1 - UART1 Baud Rate Generator Control] - /*********************************************************************** - - Enable the baud rate generator - - Prescaler = 8 - ***********************************************************************/ - SFRPAGE = 0x20; - SBCON1 = SBCON1_BREN__ENABLED | SBCON1_BPS__DIV_BY_8; - // [SBCON1 - UART1 Baud Rate Generator Control]$ - - // $[SMOD1 - UART1 Mode] - // [SMOD1 - UART1 Mode]$ - - // $[UART1FCN0 - UART1 FIFO Control 0] - // [UART1FCN0 - UART1 FIFO Control 0]$ - - // $[SBRLH1 - UART1 Baud Rate Generator High Byte] - /*********************************************************************** - - UART1 Baud Rate Reload High = 0xFF - ***********************************************************************/ - SBRLH1 = (0xFF << SBRLH1_BRH__SHIFT); - // [SBRLH1 - UART1 Baud Rate Generator High Byte]$ - - // $[SBRLL1 - UART1 Baud Rate Generator Low Byte] - /*********************************************************************** - - UART1 Baud Rate Reload Low = 0xE6 - ***********************************************************************/ - SBRLL1 = (0xE6 << SBRLL1_BRL__SHIFT); - // [SBRLL1 - UART1 Baud Rate Generator Low Byte]$ - - // $[UART1LIN - UART1 LIN Configuration] - // [UART1LIN - UART1 LIN Configuration]$ - - // $[SCON1 - UART1 Serial Port Control] - /*********************************************************************** - - UART1 reception enabled - ***********************************************************************/ - SCON1 |= SCON1_REN__RECEIVE_ENABLED; - // [SCON1 - UART1 Serial Port Control]$ - - // $[UART1FCN1 - UART1 FIFO Control 1] - // [UART1FCN1 - UART1 FIFO Control 1]$ - -} - -extern void TIMER16_2_enter_DefaultMode_from_RESET(void) { - // $[Timer Initialization] - // Save Timer Configuration - uint8_t TMR2CN0_TR2_save; - TMR2CN0_TR2_save = TMR2CN0 & TMR2CN0_TR2__BMASK; - // Stop Timer - TMR2CN0 &= ~(TMR2CN0_TR2__BMASK); - // [Timer Initialization]$ - - // $[TMR2CN1 - Timer 2 Control 1] - // [TMR2CN1 - Timer 2 Control 1]$ - - // $[TMR2CN0 - Timer 2 Control] - // [TMR2CN0 - Timer 2 Control]$ - - // $[TMR2H - Timer 2 High Byte] - // [TMR2H - Timer 2 High Byte]$ - - // $[TMR2L - Timer 2 Low Byte] - // [TMR2L - Timer 2 Low Byte]$ - - // $[TMR2RLH - Timer 2 Reload High Byte] - /*********************************************************************** - - Timer 2 Reload High Byte = 0x63 - ***********************************************************************/ - TMR2RLH = (0x63 << TMR2RLH_TMR2RLH__SHIFT); - // [TMR2RLH - Timer 2 Reload High Byte]$ - - // $[TMR2RLL - Timer 2 Reload Low Byte] - /*********************************************************************** - - Timer 2 Reload Low Byte = 0xC0 - ***********************************************************************/ - TMR2RLL = (0xC0 << TMR2RLL_TMR2RLL__SHIFT); - // [TMR2RLL - Timer 2 Reload Low Byte]$ - - // $[TMR2CN0] - // [TMR2CN0]$ - - // $[Timer Restoration] - // Restore Timer Configuration - TMR2CN0 |= TMR2CN0_TR2_save; - // [Timer Restoration]$ - -} - -extern void TIMER16_3_enter_DefaultMode_from_RESET(void) { - // $[Timer Initialization] - // Save Timer Configuration - uint8_t TMR3CN0_TR3_save; - TMR3CN0_TR3_save = TMR3CN0 & TMR3CN0_TR3__BMASK; - // Stop Timer - TMR3CN0 &= ~(TMR3CN0_TR3__BMASK); - // [Timer Initialization]$ - - // $[TMR3CN1 - Timer 3 Control 1] - // [TMR3CN1 - Timer 3 Control 1]$ - - // $[TMR3CN0 - Timer 3 Control] - /*********************************************************************** - - Timer 3 clock is the low-frequency oscillator divided by 8 - ***********************************************************************/ - TMR3CN0 |= TMR3CN0_T3XCLK__LFOSC_DIV_8; - // [TMR3CN0 - Timer 3 Control]$ - - // $[TMR3H - Timer 3 High Byte] - // [TMR3H - Timer 3 High Byte]$ - - // $[TMR3L - Timer 3 Low Byte] - // [TMR3L - Timer 3 Low Byte]$ - - // $[TMR3RLH - Timer 3 Reload High Byte] - // [TMR3RLH - Timer 3 Reload High Byte]$ - - // $[TMR3RLL - Timer 3 Reload Low Byte] - // [TMR3RLL - Timer 3 Reload Low Byte]$ - - // $[TMR3CN0] - /*********************************************************************** - - Start Timer 3 running - ***********************************************************************/ - TMR3CN0 |= TMR3CN0_TR3__RUN; - // [TMR3CN0]$ - - // $[Timer Restoration] - // Restore Timer Configuration - TMR3CN0 |= TMR3CN0_TR3_save; - // [Timer Restoration]$ - -} - -extern void PORTS_0_enter_DefaultMode_from_RESET(void) { - // $[P0 - Port 0 Pin Latch] - // [P0 - Port 0 Pin Latch]$ - - // $[P0MDOUT - Port 0 Output Mode] - /*********************************************************************** - - P0.0 output is open-drain - - P0.1 output is open-drain - - P0.2 output is open-drain - - P0.3 output is open-drain - - P0.4 output is push-pull - - P0.5 output is open-drain - - P0.6 output is open-drain - - P0.7 output is push-pull - ***********************************************************************/ - P0MDOUT = P0MDOUT_B0__OPEN_DRAIN | P0MDOUT_B1__OPEN_DRAIN - | P0MDOUT_B2__OPEN_DRAIN | P0MDOUT_B3__OPEN_DRAIN - | P0MDOUT_B4__PUSH_PULL | P0MDOUT_B5__OPEN_DRAIN - | P0MDOUT_B6__OPEN_DRAIN | P0MDOUT_B7__PUSH_PULL; - // [P0MDOUT - Port 0 Output Mode]$ - - // $[P0MDIN - Port 0 Input Mode] - // [P0MDIN - Port 0 Input Mode]$ - - // $[P0SKIP - Port 0 Skip] - /*********************************************************************** - - P0.0 pin is skipped by the crossbar - - P0.1 pin is skipped by the crossbar - - P0.2 pin is skipped by the crossbar - - P0.3 pin is skipped by the crossbar - - P0.4 pin is not skipped by the crossbar - - P0.5 pin is not skipped by the crossbar - - P0.6 pin is not skipped by the crossbar - - P0.7 pin is not skipped by the crossbar - ***********************************************************************/ - P0SKIP = P0SKIP_B0__SKIPPED | P0SKIP_B1__SKIPPED | P0SKIP_B2__SKIPPED - | P0SKIP_B3__SKIPPED | P0SKIP_B4__NOT_SKIPPED - | P0SKIP_B5__NOT_SKIPPED | P0SKIP_B6__NOT_SKIPPED - | P0SKIP_B7__NOT_SKIPPED; - // [P0SKIP - Port 0 Skip]$ - - // $[P0MASK - Port 0 Mask] - // [P0MASK - Port 0 Mask]$ - - // $[P0MAT - Port 0 Match] - // [P0MAT - Port 0 Match]$ - -} - -extern void PORTS_1_enter_DefaultMode_from_RESET(void) { - - // $[P1 - Port 1 Pin Latch] - /*********************************************************************** - - P1.0 is high. Set P1.0 to drive or float high - - P1.1 is high. Set P1.1 to drive or float high - - P1.2 is low. Set P1.2 to drive low - - P1.3 is high. Set P1.3 to drive or float high - - P1.4 is high. Set P1.4 to drive or float high - - P1.5 is high. Set P1.5 to drive or float high - - P1.6 is high. Set P1.6 to drive or float high - - P1.7 is high. Set P1.7 to drive or float high - ***********************************************************************/ - P1 = P1_B0__HIGH | P1_B1__HIGH | P1_B2__LOW | P1_B3__HIGH | P1_B4__HIGH - | P1_B5__HIGH | P1_B6__HIGH | P1_B7__HIGH; - // [P1 - Port 1 Pin Latch]$ - - // $[P1MDOUT - Port 1 Output Mode] - /*********************************************************************** - - P1.0 output is open-drain - - P1.1 output is push-pull - - P1.2 output is open-drain - - P1.3 output is open-drain - - P1.4 output is push-pull - - P1.5 output is push-pull - - P1.6 output is push-pull - - P1.7 output is open-drain - ***********************************************************************/ - P1MDOUT = P1MDOUT_B0__OPEN_DRAIN | P1MDOUT_B1__PUSH_PULL - | P1MDOUT_B2__OPEN_DRAIN | P1MDOUT_B3__OPEN_DRAIN - | P1MDOUT_B4__PUSH_PULL | P1MDOUT_B5__PUSH_PULL - | P1MDOUT_B6__PUSH_PULL | P1MDOUT_B7__OPEN_DRAIN; - // [P1MDOUT - Port 1 Output Mode]$ - - // $[P1MDIN - Port 1 Input Mode] - // [P1MDIN - Port 1 Input Mode]$ - - // $[P1SKIP - Port 1 Skip] - // [P1SKIP - Port 1 Skip]$ - - // $[P1MASK - Port 1 Mask] - // [P1MASK - Port 1 Mask]$ - - // $[P1MAT - Port 1 Match] - // [P1MAT - Port 1 Match]$ - -} - -extern void PORTS_2_enter_DefaultMode_from_RESET(void) { - - // $[P2 - Port 2 Pin Latch] - /*********************************************************************** - - P2.0 is low. Set P2.0 to drive low - - P2.1 is high. Set P2.1 to drive or float high - - P2.2 is high. Set P2.2 to drive or float high - - P2.3 is high. Set P2.3 to drive or float high - ***********************************************************************/ - P2 = P2_B0__LOW | P2_B1__HIGH | P2_B2__HIGH | P2_B3__HIGH; - // [P2 - Port 2 Pin Latch]$ - - // $[P2MDOUT - Port 2 Output Mode] - /*********************************************************************** - - P2.0 output is push-pull - - P2.1 output is open-drain - - P2.2 output is open-drain - - P2.3 output is open-drain - ***********************************************************************/ - P2MDOUT = P2MDOUT_B0__PUSH_PULL | P2MDOUT_B1__OPEN_DRAIN - | P2MDOUT_B2__OPEN_DRAIN | P2MDOUT_B3__OPEN_DRAIN; - // [P2MDOUT - Port 2 Output Mode]$ - - // $[P2MDIN - Port 2 Input Mode] - // [P2MDIN - Port 2 Input Mode]$ - - // $[P2SKIP - Port 2 Skip] - // [P2SKIP - Port 2 Skip]$ - - // $[P2MASK - Port 2 Mask] - // [P2MASK - Port 2 Mask]$ - - // $[P2MAT - Port 2 Match] - // [P2MAT - Port 2 Match]$ - -} - -extern void TIMER01_0_enter_DefaultMode_from_RESET(void) { - // $[Timer Initialization] - //Save Timer Configuration - uint8_t TCON_save; - TCON_save = TCON; - //Stop Timers - TCON &= ~TCON_TR0__BMASK & ~TCON_TR1__BMASK; - - // [Timer Initialization]$ - - // $[TH0 - Timer 0 High Byte] - // [TH0 - Timer 0 High Byte]$ - - // $[TL0 - Timer 0 Low Byte] - // [TL0 - Timer 0 Low Byte]$ - - // $[TH1 - Timer 1 High Byte] - /*********************************************************************** - - Timer 1 High Byte = 0x30 - ***********************************************************************/ - TH1 = (0x30 << TH1_TH1__SHIFT); - // [TH1 - Timer 1 High Byte]$ - - // $[TL1 - Timer 1 Low Byte] - // [TL1 - Timer 1 Low Byte]$ - - // $[Timer Restoration] - //Restore Timer Configuration - TCON |= (TCON_save & TCON_TR0__BMASK) | (TCON_save & TCON_TR1__BMASK); - - // [Timer Restoration]$ - -} - -extern void UART_0_enter_DefaultMode_from_RESET(void) { - // $[SCON0 - UART0 Serial Port Control] - /*********************************************************************** - - UART0 reception enabled - ***********************************************************************/ - SCON0 |= SCON0_REN__RECEIVE_ENABLED; - // [SCON0 - UART0 Serial Port Control]$ - -} - -extern void SPI_0_enter_DefaultMode_from_RESET(void) { - // $[SPI0CKR - SPI0 Clock Rate] - /*********************************************************************** - - SPI0 Clock Rate = 0x0B - ***********************************************************************/ - SPI0CKR = (0x0B << SPI0CKR_SPI0CKR__SHIFT); - // [SPI0CKR - SPI0 Clock Rate]$ - - // $[SPI0FCN0 - SPI0 FIFO Control 0] - // [SPI0FCN0 - SPI0 FIFO Control 0]$ - - // $[SPI0FCN1 - SPI0 FIFO Control 1] - // [SPI0FCN1 - SPI0 FIFO Control 1]$ - - // $[SPI0CFG - SPI0 Configuration] - // [SPI0CFG - SPI0 Configuration]$ - - // $[SPI0CN0 - SPI0 Control] - /*********************************************************************** - - Enable the SPI module - - 3-Wire Slave or 3-Wire Master Mode - ***********************************************************************/ - SPI0CN0 &= ~SPI0CN0_NSSMD__FMASK; - SPI0CN0 |= SPI0CN0_SPIEN__ENABLED; - // [SPI0CN0 - SPI0 Control]$ - -} - -extern void LFOSC_0_enter_DefaultMode_from_RESET(void) { - // $[LFO0CN - Low Frequency Oscillator Control] - /*********************************************************************** - - Internal L-F Oscillator Enabled - - Divide by 8 selected - ***********************************************************************/ - LFO0CN &= ~LFO0CN_OSCLD__FMASK; - LFO0CN |= LFO0CN_OSCLEN__ENABLED; - // [LFO0CN - Low Frequency Oscillator Control]$ - - // $[Wait for LFOSC Ready] - while ((LFO0CN & LFO0CN_OSCLRDY__BMASK) != LFO0CN_OSCLRDY__SET) - ; - // [Wait for LFOSC Ready]$ - -} - diff --git a/targets/efm8/src/SILABS_STARTUP.A51 b/targets/efm8/src/SILABS_STARTUP.A51 deleted file mode 100644 index bef2e8d..0000000 --- a/targets/efm8/src/SILABS_STARTUP.A51 +++ /dev/null @@ -1,203 +0,0 @@ -$NOMOD51 -;------------------------------------------------------------------------------ -; This file is part of the C51 Compiler package -; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc. -; Version 8.01 -; -; *** <<< Use Configuration Wizard in Context Menu >>> *** -;------------------------------------------------------------------------------ -; STARTUP.A51: This code is executed after processor reset. -; -; To translate this file use A51 with the following invocation: -; -; A51 STARTUP.A51 -; -; To link the modified STARTUP.OBJ file to your application use the following -; Lx51 invocation: -; -; Lx51 your object file list, STARTUP.OBJ controls -; -;------------------------------------------------------------------------------ -; -; User-defined Power-On Initialization of Memory -; -; With the following EQU statements the initialization of memory -; at processor reset can be defined: -; -; IDATALEN: IDATA memory size <0x0-0x100> -; Note: The absolute start-address of IDATA memory is always 0 -; The IDATA space overlaps physically the DATA and BIT areas. -IDATALEN EQU 80H -; -; XDATASTART: XDATA memory start address <0x0-0xFFFF> -; The absolute start address of XDATA memory -XDATASTART EQU 0 -; -; XDATALEN: XDATA memory size <0x0-0xFFFF> -; The length of XDATA memory in bytes. -XDATALEN EQU 0 -; -; PDATASTART: PDATA memory start address <0x0-0xFFFF> -; The absolute start address of PDATA memory -PDATASTART EQU 0H -; -; PDATALEN: PDATA memory size <0x0-0xFF> -; The length of PDATA memory in bytes. -PDATALEN EQU 0H -; -; -;------------------------------------------------------------------------------ -; -; Reentrant Stack Initialization -; -; The following EQU statements define the stack pointer for reentrant -; functions and initialized it: -; -; Stack Space for reentrant functions in the SMALL model. -; IBPSTACK: Enable SMALL model reentrant stack -; Stack space for reentrant functions in the SMALL model. -IBPSTACK EQU 0 ; set to 1 if small reentrant is used. -; IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF> -; Set the top of the stack to the highest location. -IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1 -; -; -; Stack Space for reentrant functions in the LARGE model. -; XBPSTACK: Enable LARGE model reentrant stack -; Stack space for reentrant functions in the LARGE model. -XBPSTACK EQU 0 ; set to 1 if large reentrant is used. -; XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF> -; Set the top of the stack to the highest location. -XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1 -; -; -; Stack Space for reentrant functions in the COMPACT model. -; PBPSTACK: Enable COMPACT model reentrant stack -; Stack space for reentrant functions in the COMPACT model. -PBPSTACK EQU 0 ; set to 1 if compact reentrant is used. -; -; PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF> -; Set the top of the stack to the highest location. -PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1 -; -; -;------------------------------------------------------------------------------ -; -; Memory Page for Using the Compact Model with 64 KByte xdata RAM -; Compact Model Page Definition -; -; Define the XDATA page used for PDATA variables. -; PPAGE must conform with the PPAGE set in the linker invocation. -; -; Enable pdata memory page initalization -PPAGEENABLE EQU 0 ; set to 1 if pdata object are used. -; -; PPAGE number <0x0-0xFF> -; uppermost 256-byte address of the page used for PDATA variables. -PPAGE EQU 0 -; -; SFR address which supplies uppermost address byte <0x0-0xFF> -; most 8051 variants use P2 as uppermost address byte -PPAGE_SFR DATA 0A0H -; -; -;------------------------------------------------------------------------------ - -; Standard SFR Symbols -ACC DATA 0E0H -B DATA 0F0H -SP DATA 81H -DPL DATA 82H -DPH DATA 83H - - NAME ?C_STARTUP - - -?C_C51STARTUP SEGMENT CODE -?STACK SEGMENT IDATA - - RSEG ?STACK - DS 1 - - EXTRN CODE (?C_START) - PUBLIC ?C_STARTUP - - CSEG AT 0 -?C_STARTUP: LJMP STARTUP1 - - RSEG ?C_C51STARTUP - -STARTUP1: - -$IF (SILABS_STARTUP = 1) -EXTRN CODE (SiLabs_Startup) - LCALL SiLabs_Startup -$ENDIF - -IF IDATALEN <> 0 - MOV R0,#IDATALEN - 1 - CLR A -IDATALOOP: MOV @R0,A - DJNZ R0,IDATALOOP -ENDIF - -IF XDATALEN <> 0 - MOV DPTR,#XDATASTART - MOV R7,#LOW (XDATALEN) - IF (LOW (XDATALEN)) <> 0 - MOV R6,#(HIGH (XDATALEN)) +1 - ELSE - MOV R6,#HIGH (XDATALEN) - ENDIF - CLR A -XDATALOOP: MOVX @DPTR,A - INC DPTR - DJNZ R7,XDATALOOP - DJNZ R6,XDATALOOP -ENDIF - -IF PPAGEENABLE <> 0 - MOV PPAGE_SFR,#PPAGE -ENDIF - -IF PDATALEN <> 0 - MOV R0,#LOW (PDATASTART) - MOV R7,#LOW (PDATALEN) - CLR A -PDATALOOP: MOVX @R0,A - INC R0 - DJNZ R7,PDATALOOP -ENDIF - -IF IBPSTACK <> 0 -EXTRN DATA (?C_IBP) - - MOV ?C_IBP,#LOW IBPSTACKTOP -ENDIF - -IF XBPSTACK <> 0 -EXTRN DATA (?C_XBP) - - MOV ?C_XBP,#HIGH XBPSTACKTOP - MOV ?C_XBP+1,#LOW XBPSTACKTOP -ENDIF - -IF PBPSTACK <> 0 -EXTRN DATA (?C_PBP) - MOV ?C_PBP,#LOW PBPSTACKTOP -ENDIF - - MOV SP,#?STACK-1 - -; This code is required if you use L51_BANK.A51 with Banking Mode 4 -; Code Banking -; Select Bank 0 for L51_BANK.A51 Mode 4 -$IF (USE_BANKING = 1) -; Initialize bank mechanism to code bank 0 when using L51_BANK.A51 with Banking Mode 4. -EXTRN CODE (?B_SWITCH0) - CALL ?B_SWITCH0 ; init bank mechanism to code bank 0 -$ENDIF -; - LJMP ?C_START - - END diff --git a/targets/efm8/src/callback.c b/targets/efm8/src/callback.c deleted file mode 100644 index aaa54d9..0000000 --- a/targets/efm8/src/callback.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include -#include -#include -#include "printing.h" -#include "descriptors.h" -#include "app.h" - -#define UNUSED(expr) do { (void)(expr); } while (0) - -#define HID_INTERFACE_INDEX 0 - -uint8_t tmpBuffer; - - - -void USBD_ResetCb(void) { -// cprints("USBD_ResetCb\r\n"); -// u2f_print_ev("USBD_ResetCb\r\n"); -} - - -void USBD_DeviceStateChangeCb(USBD_State_TypeDef oldState, - USBD_State_TypeDef newState) { - -// cprints("USBD_DeviceStateChangeCb\r\n"); - UNUSED(oldState); - UNUSED(newState); - -// u2f_print_ev("USBD_DeviceStateChangeCb\r\n"); -} - -bool USBD_IsSelfPoweredCb(void) { -// cprints("USBD_IsSelfPoweredCb\r\n"); - return false; -} - -// Necessary routine for USB HID -USB_Status_TypeDef USBD_SetupCmdCb( - SI_VARIABLE_SEGMENT_POINTER(setup, USB_Setup_TypeDef, MEM_MODEL_SEG)) { - - USB_Status_TypeDef retVal = USB_STATUS_REQ_UNHANDLED; - - - if ((setup->bmRequestType.Type == USB_SETUP_TYPE_STANDARD) - && (setup->bmRequestType.Direction == USB_SETUP_DIR_IN) - && (setup->bmRequestType.Recipient == USB_SETUP_RECIPIENT_INTERFACE)) { - // A HID device must extend the standard GET_DESCRIPTOR command - // with support for HID descriptors. - - switch (setup->bRequest) { - case GET_DESCRIPTOR: - if (setup->wIndex == 0) - { - if ((setup->wValue >> 8) == USB_HID_REPORT_DESCRIPTOR) { - - USBD_Write(EP0, ReportDescriptor0, - EFM8_MIN(sizeof(ReportDescriptor0), setup->wLength), - false); - retVal = USB_STATUS_OK; - - } else if ((setup->wValue >> 8) == USB_HID_DESCRIPTOR) { - - USBD_Write(EP0, (&configDesc[18]), - EFM8_MIN(USB_HID_DESCSIZE, setup->wLength), false); - retVal = USB_STATUS_OK; - - } - } - break; - } - } - else if ((setup->bmRequestType.Type == USB_SETUP_TYPE_CLASS) - && (setup->bmRequestType.Recipient == USB_SETUP_RECIPIENT_INTERFACE) - && (setup->wIndex == HID_INTERFACE_INDEX)) - { - // Implement the necessary HID class specific commands. - switch (setup->bRequest) - { - case USB_HID_SET_IDLE: - if (((setup->wValue & 0xFF) == 0) // Report ID - && (setup->wLength == 0) - && (setup->bmRequestType.Direction != USB_SETUP_DIR_IN)) - { - retVal = USB_STATUS_OK; - } - break; - - case USB_HID_GET_IDLE: - if ((setup->wValue == 0) // Report ID - && (setup->wLength == 1) - && (setup->bmRequestType.Direction == USB_SETUP_DIR_IN)) - { - tmpBuffer = 24; - USBD_Write(EP0, &tmpBuffer, 1, false); - retVal = USB_STATUS_OK; - } - break; - default: - break; - } - } - - return retVal; -} - - - - -uint16_t USBD_XferCompleteCb(uint8_t epAddr, USB_Status_TypeDef status, - uint16_t xferred, uint16_t remaining ) { - - UNUSED(status); - UNUSED(xferred); - UNUSED(remaining); - - if (epAddr == INPUT_ENDPOINT) - { - usb_transfer_complete(); - } - else if (epAddr == OUTPUT_ENDPOINT) - { - usb_writeback_complete(); - } - return 0; -} - - diff --git a/targets/efm8/src/descriptors.c b/targets/efm8/src/descriptors.c deleted file mode 100644 index dec482d..0000000 --- a/targets/efm8/src/descriptors.c +++ /dev/null @@ -1,183 +0,0 @@ -//============================================================================= -// src/descriptors.c: generated by Hardware Configurator -// -// This file is only generated if it does not exist. Modifications in this file -// will persist even if Configurator generates code. To refresh this file, -// you must first delete it and then regenerate code. -//============================================================================= -//----------------------------------------------------------------------------- -// Includes -//----------------------------------------------------------------------------- -#include -#include -#include -#include -#include -#include "descriptors.h" -#include "app.h" - -#ifdef __cplusplus -extern "C" { -#endif - -// HID Report Descriptor for Interface 0 -SI_SEGMENT_VARIABLE(ReportDescriptor0[34], - const uint8_t, - SI_SEG_CODE) = -{ - - 0x06, 0xd0, 0xf1,// USAGE_PAGE (FIDO Alliance) - 0x09, 0x01,// USAGE (Keyboard) - 0xa1, 0x01,// COLLECTION (Application) - - 0x09, 0x20, // USAGE (Input Report Data) - 0x15, 0x00, // LOGICAL_MINIMUM (0) - 0x26, 0xff, 0x00, // LOGICAL_MAXIMUM (255) - 0x75, 0x08, // REPORT_SIZE (8) - 0x95, HID_PACKET_SIZE, // REPORT_COUNT (64) - 0x81, 0x02, // INPUT (Data,Var,Abs) - 0x09, 0x21, // USAGE(Output Report Data) - 0x15, 0x00, // LOGICAL_MINIMUM (0) - 0x26, 0xff, 0x00, // LOGICAL_MAXIMUM (255) - 0x75, 0x08, // REPORT_SIZE (8) - 0x95, HID_PACKET_SIZE, // REPORT_COUNT (64) - 0x91, 0x02, // OUTPUT (Data,Var,Abs) - - - 0xc0,// END_COLLECTION - -}; -SI_SEGMENT_VARIABLE(deviceDesc[], - const USB_DeviceDescriptor_TypeDef, - SI_SEG_CODE) = -{ - USB_DEVICE_DESCSIZE, // bLength - USB_DEVICE_DESCRIPTOR,// bLength - htole16(0x0200),// bcdUSB - 0,// bDeviceClass - 0,// bDeviceSubClass - 0,// bDeviceProtocol - 64,// bMaxPacketSize - USB_VENDOR_ID,// idVendor - USB_PRODUCT_ID,// idProduct - htole16(0x0100),// bcdDevice - 1,// iManufacturer - 2,// iProduct - 3,// iSerialNumber - 1,// bNumConfigurations -}; - -SI_SEGMENT_VARIABLE(configDesc[], - const uint8_t, - SI_SEG_CODE) = -{ - USB_CONFIG_DESCSIZE, // bLength - USB_CONFIG_DESCRIPTOR,// bLength - 0x29,// wTotalLength(LSB) - 0x00,// wTotalLength(MSB) - 1,// bNumInterfaces - 1,// bConfigurationValue - 0,// iConfiguration - - CONFIG_DESC_BM_RESERVED_D7,// bmAttrib: Bus powered - - CONFIG_DESC_MAXPOWER_mA(100),// bMaxPower: 100 mA - - //Interface 0 Descriptor - USB_INTERFACE_DESCSIZE,// bLength - USB_INTERFACE_DESCRIPTOR,// bDescriptorType - 0,// bInterfaceNumber - 0,// bAlternateSetting - 2,// bNumEndpoints - 3,// bInterfaceClass: HID (Human Interface Device) - 0,// bInterfaceSubClass - 0,// bInterfaceProtocol - 4,// iInterface - - //HID Descriptor - USB_HID_DESCSIZE,// bLength - USB_HID_DESCRIPTOR,// bLength - 0x11,// bcdHID (LSB) - 0x01,// bcdHID (MSB) - 0,// bCountryCode - 1,// bNumDescriptors - USB_HID_REPORT_DESCRIPTOR,// bDescriptorType - sizeof( ReportDescriptor0 ),// wDescriptorLength(LSB) - sizeof( ReportDescriptor0 )>>8,// wDescriptorLength(MSB) - - //Endpoint 2 IN Descriptor - USB_ENDPOINT_DESCSIZE,// bLength - USB_ENDPOINT_DESCRIPTOR,// bDescriptorType - OUTPUT_ENDPOINT_NUM,// bEndpointAddress - USB_EPTYPE_INTR,// bAttrib - HID_PACKET_SIZE,// wMaxPacketSize (LSB) - 0x00,// wMaxPacketSize (MSB) - 5,// bInterval - - //Endpoint 3 OUT Descriptor - USB_ENDPOINT_DESCSIZE,// bLength - USB_ENDPOINT_DESCRIPTOR,// bDescriptorType - INPUT_ENDPOINT_NUM,// bEndpointAddress - USB_EPTYPE_INTR,// bAttrib - HID_PACKET_SIZE,// wMaxPacketSize (LSB) - 0x00,// wMaxPacketSize (MSB) - 5,// bInterval -}; - -#define LANG_STRING htole16( SLAB_USB_LANGUAGE ) -#define MFR_STRING 'S','i','l','i','c','o','n',' ','L','a','b','s','\0' -#define MFR_SIZE 13 - -#define SER_STRING '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F','\0' -#define SER_SIZE 17 -#define CFG_STRING 'C','o','n','f','i','g',' ','#','1','\0' -#define CFG_SIZE 10 -#ifdef BRIDGE_TO_WALLET -#define INT0_STRING 'E','O','S',' ','W','a','l','l','e','t','\0' -#define INT0_SIZE 11 -#define PROD_STRING 'E','O','S',' ','W','a','l','l','e','t','\0' -#define PROD_SIZE 11 -#else -#define INT0_STRING 'S','o','l','o',' ','K','e','y','\0' -#define INT0_SIZE 9 -#define PROD_STRING 'S','o','l','o',' ','K','e','y','\0' -#define PROD_SIZE 9 -#endif - -LANGID_STATIC_CONST_STRING_DESC( langDesc[], LANG_STRING ); -UTF16LE_PACKED_STATIC_CONST_STRING_DESC( mfrDesc[], MFR_STRING, MFR_SIZE); -UTF16LE_PACKED_STATIC_CONST_STRING_DESC( prodDesc[], PROD_STRING, PROD_SIZE); -UTF16LE_PACKED_STATIC_CONST_STRING_DESC( serDesc[], SER_STRING, SER_SIZE); -//UTF16LE_PACKED_STATIC_CONST_STRING_DESC( cfgDesc[], CFG_STRING, CFG_SIZE); -UTF16LE_PACKED_STATIC_CONST_STRING_DESC( int0Desc[], INT0_STRING, INT0_SIZE); - - - -//----------------------------------------------------------------------------- -SI_SEGMENT_POINTER(myUsbStringTable_USEnglish[], - static const USB_StringDescriptor_TypeDef, - const SI_SEG_CODE) = -{ - langDesc, - mfrDesc, - prodDesc, - serDesc, - int0Desc, - -}; - -//----------------------------------------------------------------------------- -SI_SEGMENT_VARIABLE(initstruct, - const USBD_Init_TypeDef, - SI_SEG_CODE) = -{ - deviceDesc, // deviceDescriptor - configDesc,// configDescriptor - myUsbStringTable_USEnglish,// stringDescriptors - 5// numberOfStrings -}; - -#ifdef __cplusplus -} -#endif - diff --git a/targets/efm8/src/eeprom.c b/targets/efm8/src/eeprom.c deleted file mode 100644 index e4025a3..0000000 --- a/targets/efm8/src/eeprom.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include -#include - -#include "eeprom.h" -#include "printing.h" - -char __erase_mem[3]; - -static void erase_ram() -{ - data uint16_t i; - data uint8_t xdata * clear = 0; - for (i=0; i<0x400;i++) - { - *(clear++) = 0x0; - } -} - - -void eeprom_init() -{ - uint8_t secbyte; - eeprom_read(0xFBFF,&secbyte,1); - if (secbyte == 0xff) - { - eeprom_erase(0xFBC0); - secbyte = -32; - eeprom_write(0xFBFF, &secbyte, 1); - erase_ram(); - // Reboot - cprints("rebooting\r\n"); - RSTSRC = (1<<4); - } - else - { -// cprints("no reboot\r\n"); - } -} - -void eeprom_read(uint16_t addr, uint8_t * buf, uint8_t len) -{ - uint8_t code * eepaddr = (uint8_t code *) addr; - bit old_int; - - while(len--) - { - old_int = IE_EA; - IE_EA = 0; - *buf++ = *eepaddr++; - IE_EA = old_int; - } -} - -void _eeprom_write(uint16_t addr, uint8_t * buf, uint8_t len, uint8_t flags) -{ - uint8_t xdata * data eepaddr = (uint8_t xdata *) addr; - bit old_int; - - while(len--) - { - old_int = IE_EA; - IE_EA = 0; - // Enable VDD monitor - VDM0CN = 0x80; - RSTSRC = 0x02; - - // unlock key - FLKEY = 0xA5; - FLKEY = 0xF1; - PSCTL |= flags; - - *eepaddr = *buf; - PSCTL &= ~flags; - IE_EA = old_int; - - eepaddr++; - buf++; - } -} diff --git a/targets/efm8/src/main.c b/targets/efm8/src/main.c deleted file mode 100644 index f163931..0000000 --- a/targets/efm8/src/main.c +++ /dev/null @@ -1,282 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include -#include "InitDevice.h" -#include "efm8_usb.h" -#include "uart_1.h" -#include "printing.h" -#include "eeprom.h" - -#define BUFFER_SIZE 12 - -#ifdef USING_DEVELOPMENT_BOARD -#define RW_PIN P2_B3 -#define BUSY_PIN P1_B2 -#define MSG_RDY_PIN P1_B1 -#else -#define RW_PIN P0_B1 -#define BUSY_PIN P0_B2 -#define MSG_RDY_PIN P0_B3 -#endif - -#define SIGNAL_WRITE_BSY() BUSY_PIN = 0 // Set P1 low -#define SIGNAL_WRITE_RDY() BUSY_PIN = 1 // Set P1 high - - - -data uint8_t write_ptr = 0; -data uint8_t read_ptr = 0; -data uint8_t i_ptr = 0; -data uint8_t count = 0; -data uint8_t writebackbuf_count = 0; - -uint8_t hidmsgbuf[64*BUFFER_SIZE]; -//uint8_t debugR[64]; -//uint8_t debugRi; -//uint8_t debugW[64]; -//uint8_t debugW2[64]; -//uint8_t debugWi; -data uint8_t writebackbuf[64]; - -void usb_transfer_complete() -{ - count++; -// memmove(debugR, hidmsgbuf + write_ptr*64, 64); -// debugRi = write_ptr; - write_ptr++; - - if (write_ptr == BUFFER_SIZE) - { - write_ptr = 0; - } - - -// MSG_RDY_INT_PIN = 0; -// MSG_RDY_INT_PIN = 1; - -} - -uint16_t USB_TX_COUNT = 0; - -void usb_writeback_complete() -{ -// if (USB_TX_COUNT >= 511/2) -// { -// USB_TX_COUNT -= 64; -// if (USB_TX_COUNT < 511) -// { -// SIGNAL_WRITE_RDY(); -// } -// } -// else -// { -// USB_TX_COUNT -= 64; -// } - USB_TX_COUNT -= 64; -} - -void spi_transfer_complete() -{ - - if (count > 0) count--; - i_ptr = 0; - read_ptr++; - if (read_ptr == BUFFER_SIZE) - { - read_ptr = 0; - } - -} - - - -void usb_write() -{ - data uint8_t errors = 0; - USB_TX_COUNT += 64; - while (USB_STATUS_OK != (USBD_Write(OUTPUT_ENDPOINT, writebackbuf, 64, true))) - { - delay(2); - if (errors++ > 30) - { - cprints("ERROR USB WRITE\r\n"); - break; - } - } -} -extern USBD_Device_TypeDef myUsbDevice; - -int main(void) { - data uint8_t k; - data uint16_t last_efm32_pin = 0; - uint16_t t1 = 0; - uint8_t lastcount = count; - - int reset; - data int lastwritecount = writebackbuf_count; - - enter_DefaultMode_from_RESET(); - - - eeprom_init(); - - - SCON0_TI = 1; -// P2_B0 = 1; - - MSG_RDY_PIN = 1; - - // enable SPI interrupts -// SPI0FCN1 = SPI0FCN1 | (1<<4); - IE_EA = 1; -// IE_ESPI0 = 1; - - SPI0FCN0 = SPI0FCN0 | (1<<2); // flush RX fifo - SPI0FCN0 = SPI0FCN0 | (1<<6); // flush TX fifo -// SPI0FCN0 &= ~3; // FIFO threshold 0x0 - SPI0FCN1 |= (1); // Enable RX fifo - -// cprints("hello,world\r\n"); - - - reset = RSTSRC; - cprintx("reset source: ", 1, reset); - if (reset != 0x10) - { - RSTSRC = (1<<4); - } - - MSG_RDY_PIN = 1; - SIGNAL_WRITE_BSY(); - - while (1) { - - if (RW_PIN == 0) - { - i_ptr = 0; - SPI0FCN0 |= (1<<6); // Flush TX fifo buffer - - while (SPI0CN0 & (1 << 1)) // While TX FIFO has room - SPI0DAT = (hidmsgbuf+read_ptr*64)[i_ptr++]; - - SIGNAL_WRITE_RDY(); - while (i_ptr<64) - { - while(! (SPI0CN0 & (1 << 1))) - ; - SPI0DAT = (hidmsgbuf+read_ptr*64)[i_ptr++]; - } - - while(RW_PIN == 0) - { - } - -// cprints(">> "); -// dump_hex(hidmsgbuf+read_ptr*64,64); - spi_transfer_complete(); - if (count == 0) - { - MSG_RDY_PIN = 1; - } - - SPI0FCN0 = SPI0FCN0 | (1<<2); // flush RX fifo - - while ((SPI0CFG & (0x1)) == 0) - { - k = SPI0DAT; - } - - SIGNAL_WRITE_BSY(); - - - } - else - { - // Did we RX data and have room? - if ((SPI0CFG & (0x1)) == 0 && USB_TX_COUNT < 511/2) - { - - writebackbuf[writebackbuf_count++] = SPI0DAT; - SIGNAL_WRITE_RDY(); - - while(writebackbuf_count < 64) - { - while((SPI0CFG & (0x1)) == 1) - ; - writebackbuf[writebackbuf_count++] = SPI0DAT; - } - -// cprints("<< "); -// dump_hex(writebackbuf,64); - - usb_write(); - writebackbuf_count = 0; - SPI0FCN0 = SPI0FCN0 | (1<<2); // flush RX fifo - - SIGNAL_WRITE_BSY(); - } - } - - if (millis() - t1 > 1500) - { -#ifdef USING_DEVELOPMENT_BOARD - P1_B5 = k++&1; -#endif - t1 = millis(); - } -// if (!USBD_EpIsBusy(EP2OUT) && !USBD_EpIsBusy(EP3IN) && lastcount==count) - if (!USBD_EpIsBusy(INPUT_ENDPOINT) && lastcount==count) -// if (lastcount==count) - { -// cprintd("sched read to ",1,(int)(hidmsgbuf + write_ptr*64)); - if (count == BUFFER_SIZE) - { -// cprints("Warning, USB buffer full\r\n"); - } - else - { -// cprints("sched read\r\n"); - USBD_Read(INPUT_ENDPOINT, hidmsgbuf + write_ptr*64, 64, true); - } - } - -// cprints("it\r\n"); - - if (lastcount != count) - { - if (count > lastcount) - { -// cputd(debugRi); cprints(">> "); -// dump_hex(debugR,64); - MSG_RDY_PIN = 0; - } - else - { -// cputd(debugWi); cprints(">>>> "); -// dump_hex(debugW,64); -// dump_hex(debugW2,64); - } - lastcount = count; - } - - } -} diff --git a/targets/efm8/src/printing.c b/targets/efm8/src/printing.c deleted file mode 100644 index 8c7b5ad..0000000 --- a/targets/efm8/src/printing.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * printing.c - * - * Created on: Jun 25, 2018 - * Author: conor - */ - -#include -#include -#include -#include -#include "printing.h" - -void delay(uint16_t ms) -{ - uint16_t m1 = millis(); - while (millis() - m1 < ms) - ; -} -#ifdef USE_PRINTING -void putf(char c) -{ - uint8_t i; - SBUF0 = c; - // Blocking delay that works for 115200 baud on this device (<1ms) - for (i=0; i<200; i++){} - for (i=0; i<200; i++){} - for (i=0; i<190; i++){} -} - - - - -void dump_hex(uint8_t* hex, uint8_t len) -{ - uint8_t i; - uint8_t b; - const char lut[] = "0123456789abcdef"; - for (i=0 ; i < len ; i++) - { - b = ((*hex) & 0xf0)>>4; - putf(lut[b]); - b = ((*hex) & 0x0f); - putf(lut[b]); - putf(' '); - hex++; - } - cprints("\r\n"); -} - - -void cprints(char* d) -{ - while(*d) - { - // UART0 output queue - putf(*d++); - } -} - -static void int2str_reduce_n(char ** snum, uint32_t copy, uint8_t n) -{ - do - { - copy /= n; - ++*snum; - }while(copy); -} - - -static const char * __digits = "0123456789abcdef"; -static char xdata __int2str_buf[9]; - -static void int2str_map_n(char ** snum, uint32_t i, uint8_t n) -{ - int c = 0; - do - { - if (*snum <__int2str_buf) break; - *--*snum = __digits[i % n]; - i /= n; - }while(i); -} - -#define dint2str(i) __int2strn(i,10) -#define xint2str(i) __int2strn(i,16) - -char * __int2strn(int32_t i, uint8_t n) -{ - char * snum = __int2str_buf; - if (i<0) *snum++ = '-'; - int2str_reduce_n(&snum, i, n); - *snum = '\0'; - int2str_map_n(&snum, i, n); - return snum; -} - -void cputd(int32_t i) -{ - cprints(dint2str((int32_t)i)); -} - -void cputx(int32_t i) -{ - cprints(xint2str(i)); -} - -static void put_space() -{ - cprints(" "); -} -static void put_line() -{ - cprints("\r\n"); -} - -void cprintd(const char * tag, uint8_t c, ...) -{ - va_list args; - cprints(tag); - va_start(args,c); - while(c--) - { - cputd((int32_t)va_arg(args, int16_t)); - - } - put_line(); - va_end(args); -} - -void cprintl(const char * tag, uint8_t c, ...) -{ - va_list args; - cprints(tag); - va_start(args,c); - while(c--) - { - cputl(va_arg(args, int32_t)); - cprints(" "); - } - put_line(); - va_end(args); -} - -void cprintx(const char * tag, uint8_t c, ...) -{ - va_list args; - cprints(tag); - va_start(args,c); - while(c--) - { - cputx((int32_t)va_arg(args, uint16_t)); - cprints(" "); - } - put_line(); - va_end(args); -} - -void cprintb(const char * tag, uint8_t c, ...) -{ - va_list args; - cprints(tag); - va_start(args,c); - while(c--) - { - cputb(va_arg(args, uint8_t)); - put_space(); - } - put_line(); - va_end(args); -} - -void cprintlx(const char * tag, uint8_t c, ...) -{ - va_list args; - cprints(tag); - va_start(args,c); - while(c--) - { - cputlx(va_arg(args, int32_t)); - put_space(); - } - put_line(); - va_end(args); -} -#endif diff --git a/targets/nrf52840/Makefile b/targets/nrf52840/Makefile deleted file mode 100644 index e3bd1a0..0000000 --- a/targets/nrf52840/Makefile +++ /dev/null @@ -1,308 +0,0 @@ -PROJECT_NAME := blinky_pca10056 -TARGETS := nrf52840_xxaa -OUTPUT_DIRECTORY := _build - -SDK_ROOT := ./sdk_15.0.0 -PROJ_DIR := . - -$(OUTPUT_DIRECTORY)/nrf52840_xxaa.out: \ - LINKER_SCRIPT := blinky_gcc_nrf52.ld - -# Source files common to all targets -SRC_FILES += \ - $(SDK_ROOT)/modules/nrfx/mdk/gcc_startup_nrf52840.S \ - $(PROJ_DIR)/../main.c \ - $(PROJ_DIR)/usb.c \ - $(PROJ_DIR)/retarget.c \ - $(PROJ_DIR)/device.c \ - $(PROJ_DIR)/../util.c \ - $(PROJ_DIR)/../log.c \ - $(PROJ_DIR)/../stubs.c \ - $(PROJ_DIR)/../ctaphid.c \ - $(PROJ_DIR)/../ctap.c \ - $(PROJ_DIR)/../ctap_parse.c \ - $(PROJ_DIR)/../u2f.c \ - $(PROJ_DIR)/../test_power.c \ - \ - $(PROJ_DIR)/crypto.c \ - $(PROJ_DIR)/../crypto/sha256.c \ - $(PROJ_DIR)/../crypto/tiny-AES-c/aes.c \ - $(PROJ_DIR)/../crypto/micro-ecc/uECC.c \ - \ - $(SDK_ROOT)/components/boards/boards.c \ - $(SDK_ROOT)/components/libraries/util/app_error.c \ - $(SDK_ROOT)/components/libraries/util/app_error_handler_gcc.c \ - $(SDK_ROOT)/components/libraries/util/app_error_weak.c \ - $(SDK_ROOT)/components/libraries/util/app_util_platform.c \ - $(SDK_ROOT)/components/libraries/util/nrf_assert.c \ - $(SDK_ROOT)/components/libraries/strerror/nrf_strerror.c \ - $(SDK_ROOT)/modules/nrfx/mdk/system_nrf52840.c \ - $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT.c \ - $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT_printf.c \ - $(SDK_ROOT)/integration/nrfx/legacy/nrf_drv_clock.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_rtc.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_clock.c \ - \ - $(SDK_ROOT)/components/libraries/button/app_button.c \ - $(SDK_ROOT)/components/libraries/fifo/app_fifo.c \ - $(SDK_ROOT)/components/libraries/scheduler/app_scheduler.c \ - $(SDK_ROOT)/components/libraries/timer/app_timer.c \ - $(SDK_ROOT)/components/libraries/uart/app_uart_fifo.c \ - $(SDK_ROOT)/components/libraries/usbd/app_usbd.c \ - $(SDK_ROOT)/components/libraries/usbd/app_usbd_core.c \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/app_usbd_hid.c \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/generic/app_usbd_hid_generic.c \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/kbd/app_usbd_hid_kbd.c \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/mouse/app_usbd_hid_mouse.c \ - $(SDK_ROOT)/components/libraries/usbd/app_usbd_string_desc.c \ - $(SDK_ROOT)/external/fnmatch/fnmatch.c \ - $(SDK_ROOT)/components/libraries/hardfault/nrf52/handler/hardfault_handler_gcc.c \ - $(SDK_ROOT)/components/libraries/hardfault/hardfault_implementation.c \ - $(SDK_ROOT)/components/libraries/atomic_fifo/nrf_atfifo.c \ - $(SDK_ROOT)/components/libraries/atomic/nrf_atomic.c \ - $(SDK_ROOT)/components/libraries/balloc/nrf_balloc.c \ - $(SDK_ROOT)/components/libraries/experimental_memobj/nrf_memobj.c \ - $(SDK_ROOT)/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c \ - $(SDK_ROOT)/components/libraries/queue/nrf_queue.c \ - $(SDK_ROOT)/components/libraries/experimental_ringbuf/nrf_ringbuf.c \ - $(SDK_ROOT)/components/libraries/experimental_section_vars/nrf_section_iter.c \ - $(SDK_ROOT)/integration/nrfx/legacy/nrf_drv_power.c \ - $(SDK_ROOT)/components/drivers_nrf/usbd/nrf_drv_usbd.c \ - $(SDK_ROOT)/components/drivers_nrf/nrf_soc_nosd/nrf_nvic.c \ - $(SDK_ROOT)/components/drivers_nrf/nrf_soc_nosd/nrf_soc.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_gpiote.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_power.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_power_clock.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/prs/nrfx_prs.c \ - $(SDK_ROOT)/components/libraries/bsp/bsp.c \ - $(SDK_ROOT)/components/libraries/bsp/bsp_cli.c \ - \ - $(SDK_ROOT)/external/cifra_AES128-EAX/blockwise.c \ - $(SDK_ROOT)/external/cifra_AES128-EAX/cifra_cmac.c \ - $(SDK_ROOT)/external/cifra_AES128-EAX/cifra_eax_aes.c \ - $(SDK_ROOT)/external/cifra_AES128-EAX/eax.c \ - $(SDK_ROOT)/external/cifra_AES128-EAX/gf128.c \ - $(SDK_ROOT)/components/libraries/mem_manager/mem_manager.c \ - $(SDK_ROOT)/external/cifra_AES128-EAX/modes.c \ - $(SDK_ROOT)/external/fprintf/nrf_fprintf.c \ - $(SDK_ROOT)/external/fprintf/nrf_fprintf_format.c \ - $(SDK_ROOT)/integration/nrfx/legacy/nrf_drv_rng.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/prs/nrfx_prs.c \ - $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_rng.c \ - - - -# Include folders common to all targets -INC_FOLDERS += \ - $(SDK_ROOT)/components \ - $(SDK_ROOT)/components/libraries/experimental_memobj \ - $(SDK_ROOT)/components/libraries/experimental_section_vars \ - $(SDK_ROOT)/modules/nrfx/mdk \ - $(SDK_ROOT)/modules/nrfx/hal \ - $(SDK_ROOT)/components/libraries/balloc \ - $(SDK_ROOT)/components/libraries/experimental_log \ - $(SDK_ROOT)/components/libraries/experimental_log/src \ - $(SDK_ROOT)/components/libraries/delay \ - $(SDK_ROOT)/integration/nrfx \ - $(SDK_ROOT)/components/libraries/bsp \ - $(SDK_ROOT)/components/drivers_nrf/nrf_soc_nosd \ - $(SDK_ROOT)/components/libraries/strerror \ - $(SDK_ROOT)/components/boards \ - $(SDK_ROOT)/components/toolchain/cmsis/include \ - $(SDK_ROOT)/modules/nrfx \ - $(SDK_ROOT)/external/segger_rtt \ - $(PROJ_DIR) \ - $(PROJ_DIR)/.. \ - $(PROJ_DIR)/../tinycbor/src \ - \ - $(PROJ_DIR)/../crypto/ \ - $(PROJ_DIR)/../crypto/micro-ecc \ - $(PROJ_DIR)/../crypto/tiny-AES-c \ - \ - $(SDK_ROOT)/components/libraries/util \ - $(SDK_ROOT)/integration/nrfx/legacy \ - $(SDK_ROOT)/modules/nrfx/drivers/include \ - $(SDK_ROOT)/components/libraries/cli \ - $(SDK_ROOT)/components/libraries/scheduler \ - $(SDK_ROOT)/components/libraries/experimental_log \ - $(SDK_ROOT)/components/libraries/queue \ - $(SDK_ROOT)/components/libraries/pwr_mgmt \ - $(SDK_ROOT)/components/libraries/fifo \ - $(SDK_ROOT)/components/toolchain/cmsis/include \ - $(SDK_ROOT)/components/libraries/timer \ - $(SDK_ROOT)/components/libraries/bsp \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/generic \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/kbd \ - $(SDK_ROOT)/components/libraries/balloc \ - $(SDK_ROOT)/components/drivers_nrf/usbd \ - $(SDK_ROOT)/components/libraries/usbd/class/hid \ - $(SDK_ROOT)/components/libraries/hardfault/nrf52 \ - $(SDK_ROOT)/components/libraries/hardfault \ - $(SDK_ROOT)/components/libraries/uart \ - $(SDK_ROOT)/external/fnmatch \ - $(SDK_ROOT)/components/libraries/button \ - $(SDK_ROOT)/components/libraries/experimental_section_vars \ - $(SDK_ROOT)/integration/nrfx/legacy \ - $(SDK_ROOT)/components/libraries/usbd \ - $(SDK_ROOT)/components/libraries/mutex \ - $(PROJ_DIR) \ - $(SDK_ROOT)/components/libraries/experimental_log/src \ - $(SDK_ROOT)/components/libraries/delay \ - $(SDK_ROOT)/external/segger_rtt \ - $(SDK_ROOT)/components/libraries/atomic_fifo \ - $(SDK_ROOT)/components/libraries/experimental_ringbuf \ - $(SDK_ROOT)/components/libraries/atomic \ - $(SDK_ROOT)/components/boards \ - $(SDK_ROOT)/components/libraries/experimental_memobj \ - $(SDK_ROOT)/components/libraries/usbd/config \ - $(SDK_ROOT)/integration/nrfx \ - $(SDK_ROOT)/components/drivers_nrf/nrf_soc_nosd \ - $(SDK_ROOT)/components/libraries/usbd/class/hid/mouse \ - $(SDK_ROOT)/modules/nrfx/drivers/include \ - $(SDK_ROOT)/modules/nrfx/hal \ - $(SDK_ROOT)/external/fprintf \ - \ - $(SDK_ROOT)/external/fprintf \ - $(PROJ_DIR) \ - $(SDK_ROOT)/components/libraries/experimental_section_vars \ - $(SDK_ROOT)/components/libraries/experimental_log \ - $(SDK_ROOT)/components/libraries/experimental_memobj \ - $(SDK_ROOT)/components/libraries/stack_info \ - $(SDK_ROOT)/components/libraries/delay \ - $(SDK_ROOT)/external/nrf_oberon/include \ - $(SDK_ROOT)/components/libraries/crypto \ - $(SDK_ROOT)/components/toolchain/cmsis/include \ - $(SDK_ROOT)/components/libraries/balloc \ - $(SDK_ROOT)/components/libraries/mem_manager \ - $(SDK_ROOT)/external/nrf_oberon \ - $(SDK_ROOT)/components/libraries/atomic \ - $(SDK_ROOT)/components/libraries/strerror \ - $(SDK_ROOT)/integration/nrfx \ - $(SDK_ROOT)/modules/nrfx/drivers/include \ - $(SDK_ROOT)/external/mbedtls/include \ - $(SDK_ROOT)/components/libraries/experimental_log/src \ - $(SDK_ROOT)/components/libraries/util \ - $(SDK_ROOT)/modules/nrfx \ - $(SDK_ROOT)/components/drivers_nrf/nrf_soc_nosd \ - $(SDK_ROOT)/external/segger_rtt \ - $(SDK_ROOT)/modules/nrfx/mdk \ - $(SDK_ROOT)/modules/nrfx/hal \ - $(SDK_ROOT)/components/libraries/mutex \ - $(SDK_ROOT)/components/libraries/queue \ - $(SDK_ROOT)/integration/nrfx/legacy \ - $(SDK_ROOT)/external/cifra_AES128-EAX \ - $(SDK_ROOT)/components/boards \ - $(SDK_ROOT)/external/nrf_cc310/include \ - - -# Libraries common to all targets -LIB_FILES += $(SDK_ROOT)/external/nrf_cc310/lib/libnrf_cc310_0.9.9.a \ - $(PROJ_DIR)/../tinycbor/lib/libtinycbor.a - -# Optimization flags -OPT = -O3 -g3 -# Uncomment the line below to enable link time optimization -#OPT += -flto - -# C flags common to all targets -CFLAGS += $(OPT) -CFLAGS += -DBOARD_PCA10056 -CFLAGS += -DNRF52 -#CFLAGS += -DBSP_DEFINES_ONLY -CFLAGS += -DCONFIG_GPIO_AS_PINRESET -CFLAGS += -DFLOAT_ABI_HARD -CFLAGS += -DNRF52840_XXAA -#CFLAGS += -DSTUB_CTAPHID -#CFLAGS += -DSTUB_CTAP -CFLAGS += -DuECC_PLATFORM=5 -#CFLAGS += -DTEST_POWER -DTEST -CFLAGS += -std=gnu11 -CFLAGS += -mcpu=cortex-m4 -CFLAGS += -mthumb -mabi=aapcs -CFLAGS += -Wall -Wno-format -CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 -# keep every function in a separate section, this allows linker to discard unused ones -CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing -CFLAGS += -fno-builtin -fshort-enums -CFLAGS += -DNRF_CRYPTO_MAX_INSTANCE_COUNT=1 - -# C++ flags common to all targets -CXXFLAGS += $(OPT) - -# Assembler flags common to all targets -ASMFLAGS += -g3 -ASMFLAGS += -mcpu=cortex-m4 -ASMFLAGS += -mthumb -mabi=aapcs -ASMFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ASMFLAGS += -DBOARD_PCA10056 -ASMFLAGS += -DBSP_DEFINES_ONLY -ASMFLAGS += -DCONFIG_GPIO_AS_PINRESET -ASMFLAGS += -DFLOAT_ABI_HARD -ASMFLAGS += -DNRF52840_XXAA - -# Linker flags -LDFLAGS += $(OPT) -LDFLAGS += -mthumb -mabi=aapcs -L$(SDK_ROOT)/modules/nrfx/mdk -T$(LINKER_SCRIPT) -LDFLAGS += -mcpu=cortex-m4 -LDFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 -# let linker dump unused sections -LDFLAGS += -Wl,--gc-sections -# use newlib in nano version -LDFLAGS += --specs=nano.specs - -nrf52840_xxaa: CFLAGS += -D__HEAP_SIZE=8192 -nrf52840_xxaa: CFLAGS += -D__STACK_SIZE=8192 -nrf52840_xxaa: ASMFLAGS += -D__HEAP_SIZE=8192 -nrf52840_xxaa: ASMFLAGS += -D__STACK_SIZE=8192 - -# Add standard libraries at the very end of the linker input, after all objects -# that may need symbols provided by these libraries. -LIB_FILES += -lc -lnosys -lm - - -.PHONY: default help - -# Default target - first one defined -default: nrf52840_xxaa - -# Print all targets that can be built -help: - @echo following targets are available: - @echo nrf52840_xxaa - @echo sdk_config - starting external tool for editing sdk_config.h - @echo flash - flashing binary - -TEMPLATE_PATH := $(SDK_ROOT)/components/toolchain/gcc - - - -include $(TEMPLATE_PATH)/Makefile.common - -#include $(PROJ_DIR)/../tinycbor/Makefile - -#$(shell echo ) -#$(shell ) - -$(foreach target, $(TARGETS), $(call define_target, $(target))) - -.PHONY: flash erase - -cbor: - cd $(PROJ_DIR)/../tinycbor/ && make clean - cd $(PROJ_DIR)/../tinycbor/ && make CC="$(CC)" \ -LDFLAGS="-lc -lnosys --specs=nosys.specs -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs " \ -CFLAGS=" -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs -DFLOAT_ABI_HARD -std=gnu11" - -# Flash the program -flash: $(OUTPUT_DIRECTORY)/nrf52840_xxaa.hex - @echo Flashing: $< - nrfjprog -f nrf52 --program $< --sectorerase - nrfjprog -f nrf52 --reset - -erase: - nrfjprog -f nrf52 --eraseall - -SDK_CONFIG_FILE := ../config/sdk_config.h -CMSIS_CONFIG_TOOL := $(SDK_ROOT)/external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar -sdk_config: - java -jar $(CMSIS_CONFIG_TOOL) $(SDK_CONFIG_FILE) diff --git a/targets/nrf52840/app_config.h b/targets/nrf52840/app_config.h deleted file mode 100644 index 2dd1a56..0000000 --- a/targets/nrf52840/app_config.h +++ /dev/null @@ -1,45 +0,0 @@ -// segger_rtt - SEGGER RTT - -//========================================================== -// SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer. -// Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE -// or this value is actually used. It depends on which one is bigger. - -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 4096 -#endif - -// SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 16 -#endif - -// SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 8 -#endif - -// SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2 -#endif - -// SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full. - - -// The following modes are supported: -// - SKIP - Do not block, output nothing. -// - TRIM - Do not block, output as much as fits. -// - BLOCK - Wait until there is space in the buffer. -// <0=> SKIP -// <1=> TRIM -// <2=> BLOCK_IF_FIFO_FULL - -#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE -#define SEGGER_RTT_CONFIG_DEFAULT_MODE 1 - -#define APP_FIFO_ENABLED 2 - -#endif - - diff --git a/targets/nrf52840/blinky_gcc_nrf52.ld b/targets/nrf52840/blinky_gcc_nrf52.ld deleted file mode 100644 index f548a22..0000000 --- a/targets/nrf52840/blinky_gcc_nrf52.ld +++ /dev/null @@ -1,57 +0,0 @@ -/* Linker script to configure memory regions. */ - -SEARCH_DIR(.) -GROUP(-lgcc -lc -lnosys) - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x100000 - RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000 -} - -SECTIONS -{ -} - -SECTIONS -{ - . = ALIGN(4); - .mem_section_dummy_ram : - { - } - .log_dynamic_data : - { - PROVIDE(__start_log_dynamic_data = .); - KEEP(*(SORT(.log_dynamic_data*))) - PROVIDE(__stop_log_dynamic_data = .); - } > RAM - -} INSERT AFTER .data; - -SECTIONS -{ - .mem_section_dummy_rom : - { - } - .crypto_data : - { - PROVIDE(__start_crypto_data = .); - KEEP(*(SORT(.crypto_data*))) - PROVIDE(__stop_crypto_data = .); - } > FLASH - .log_const_data : - { - PROVIDE(__start_log_const_data = .); - KEEP(*(SORT(.log_const_data*))) - PROVIDE(__stop_log_const_data = .); - } > FLASH - .nrf_balloc : - { - PROVIDE(__start_nrf_balloc = .); - KEEP(*(.nrf_balloc)) - PROVIDE(__stop_nrf_balloc = .); - } > FLASH - -} INSERT AFTER .text - -INCLUDE "nrf_common.ld" diff --git a/targets/nrf52840/crypto.c b/targets/nrf52840/crypto.c deleted file mode 100644 index e8fd782..0000000 --- a/targets/nrf52840/crypto.c +++ /dev/null @@ -1,489 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * Wrapper for crypto implementation on device - * - * */ -#include -#include -#include - -#include "util.h" -#include "crypto.h" - -#include "sha256.h" -#include "uECC.h" -#include "aes.h" -#include "ctap.h" - -#include "ssi_pal_types.h" -#include "ssi_pal_mem.h" -#include "sns_silib.h" -#include "crys_ecpki_build.h" -#include "crys_ecpki_ecdsa.h" -#include "crys_ecpki_dh.h" -#include "crys_ecpki_kg.h" -#include "crys_ecpki_domain.h" -#include "crys_rnd.h" -#include "nrf52840.h" - - -const uint8_t attestation_cert_der[]; -const uint16_t attestation_cert_der_size; -const uint8_t attestation_key[]; -const uint16_t attestation_key_size; - - - -/*static SHA256_CTX sha256_ctx;*/ - -struct CRYS_HASHUserContext_t sha256_ctx; - -const CRYS_ECPKI_Domain_t* _es256_curve; -CRYS_RND_State_t rndState_ptr; -CRYS_RND_WorkBuff_t rndWorkBuff_ptr; - - - - -static const uint8_t * _signing_key = NULL; - -// Secrets for testing only -static uint8_t master_secret[32] = "\x00\x11\x22\x33\x44\x55\x66\x77\x88\x99\xaa\xbb\xcc\xdd\xee\xff" - "\xff\xee\xdd\xcc\xbb\xaa\x99\x88\x77\x66\x55\x44\x33\x22\x11\x00"; - -static uint8_t transport_secret[32] = "\x10\x01\x22\x33\x44\x55\x66\x77\x87\x90\x0a\xbb\x3c\xd8\xee\xff" - "\xff\xee\x8d\x1c\x3b\xfa\x99\x88\x77\x86\x55\x44\xd3\xff\x33\x00"; - - - -void crypto_sha256_init() -{ - /*sha256_init(&sha256_ctx);*/ - int ret = CRYS_HASH_Init(&sha256_ctx, CRYS_HASH_SHA256_mode); - if (ret != CRYS_OK ) - { - printf("sha init fail\n"); - exit(1); - } -} - -void crypto_reset_master_secret() -{ - ctap_generate_rng(master_secret, 32); -} - - -void crypto_sha256_update(uint8_t * data, size_t len) -{ - /*sha256_update(&sha256_ctx, data, len);*/ - int ret = CRYS_HASH_Update(&sha256_ctx, data, len); - if (ret != CRYS_OK ) - { - printf("sha update fail\n"); - exit(1); - } - -} - -void crypto_sha256_update_secret() -{ - /*sha256_update(&sha256_ctx, master_secret, 32);*/ - int ret = CRYS_HASH_Update(&sha256_ctx, master_secret, 32); - if (ret != CRYS_OK ) - { - printf("sha update secret fail\n"); - exit(1); - } -} - -void crypto_sha256_final(uint8_t * hash) -{ - /*sha256_final(&sha256_ctx, hash);*/ - int ret = CRYS_HASH_Finish(&sha256_ctx, (uint32_t*)hash); - if (ret != CRYS_OK ) - { - printf("sha finish fail\n"); - exit(1); - } - - -} - - -void crypto_sha256_hmac_init(uint8_t * key, uint32_t klen, uint8_t * hmac) -{ - uint8_t buf[64]; - int i; - memset(buf, 0, sizeof(buf)); - - if (key == CRYPTO_MASTER_KEY) - { - key = master_secret; - klen = sizeof(master_secret); - } - - if(klen > 64) - { - printf("Error, key size must be <= 64\n"); - exit(1); - } - - memmove(buf, key, klen); - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = buf[i] ^ 0x36; - } - - crypto_sha256_init(); - crypto_sha256_update(buf, 64); -} - -void crypto_sha256_hmac_final(uint8_t * key, uint32_t klen, uint8_t * hmac) -{ - uint8_t buf[64]; - int i; - crypto_sha256_final(hmac); - memset(buf, 0, sizeof(buf)); - if (key == CRYPTO_MASTER_KEY) - { - key = master_secret; - klen = sizeof(master_secret); - } - - - if(klen > 64) - { - printf("Error, key size must be <= 64\n"); - exit(1); - } - memmove(buf, key, klen); - - for (i = 0; i < sizeof(buf); i++) - { - buf[i] = buf[i] ^ 0x5c; - } - - crypto_sha256_init(); - crypto_sha256_update(buf, 64); - crypto_sha256_update(hmac, 32); - crypto_sha256_final(hmac); -} - - -void crypto_ecc256_init() -{ - int ret; - NVIC_EnableIRQ(CRYPTOCELL_IRQn); - NRF_CRYPTOCELL->ENABLE = 1; - - ret = SaSi_LibInit(); - if (ret != SA_SILIB_RET_OK) { - printf("Failed SaSi_LibInit - ret = 0x%x\n", ret); - exit(1); - } - - memset(&rndState_ptr, 0, sizeof(CRYS_RND_State_t)); - memset(&rndWorkBuff_ptr, 0, sizeof(CRYS_RND_WorkBuff_t)); - - - ret = CRYS_RndInit(&rndState_ptr, &rndWorkBuff_ptr); - if (ret != SA_SILIB_RET_OK) { - printf("Failed CRYS_RndInit - ret = 0x%x\n", ret); - exit(1); - } - - _es256_curve = CRYS_ECPKI_GetEcDomain(CRYS_ECPKI_DomainID_secp256r1); - - // - uECC_set_rng((uECC_RNG_Function)ctap_generate_rng); - // -} - - -void crypto_ecc256_load_attestation_key() -{ - _signing_key = attestation_key; -} - -void crypto_ecc256_sign(uint8_t * data, int len, uint8_t * sig) -{ - CRYS_ECPKI_UserPrivKey_t UserPrivKey; - CRYS_ECDSA_SignUserContext_t SignUserContext; - uint32_t sigsz = 64; - int ret = CRYS_ECPKI_BuildPrivKey(_es256_curve, - _signing_key, - 32, - &UserPrivKey); - - if (ret != SA_SILIB_RET_OK){ - printf(" CRYS_ECPKI_BuildPrivKey failed with 0x%x \n",ret); - exit(1); - } - - ret = CRYS_ECDSA_Sign(&rndState_ptr, - CRYS_RND_GenerateVector, - &SignUserContext, - &UserPrivKey, - CRYS_ECPKI_AFTER_HASH_SHA256_mode, - data, - len, - sig, - &sigsz); - - if (ret != SA_SILIB_RET_OK){ - printf(" CRYS_ECDSA_Sign failed with 0x%x \n",ret); - exit(1); - } -} - - -/*int uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, uECC_Curve curve);*/ -void derive_private_key_pair(uint8_t * data, int len, uint8_t * data2, int len2, uint8_t * privkey, uint8_t * pubkey); -void crypto_ecc256_derive_public_key(uint8_t * data, int len, uint8_t * x, uint8_t * y) -{ - uint8_t privkey[32]; - uint8_t pubkey[64]; - - derive_private_key_pair(data,len,NULL,0,privkey,pubkey); - - /*memset(pubkey,0,sizeof(pubkey));*/ - /*uECC_compute_public_key(privkey, pubkey, uECC_secp256r1());*/ - memmove(x,pubkey,32); - memmove(y,pubkey+32,32); -} - - -void crypto_ecc256_load_key(uint8_t * data, int len, uint8_t * data2, int len2) -{ - static uint8_t privkey[32]; - generate_private_key(data,len,data2,len2,privkey); - _signing_key = privkey; -} - -void crypto_ecc256_make_key_pair(uint8_t * pubkey, uint8_t * privkey) -{ - CRYS_ECPKI_UserPrivKey_t nrfpriv; - CRYS_ECPKI_UserPublKey_t nrfpub; - CRYS_ECPKI_KG_TempData_t tmp; - uint8_t pubkey1[65]; - int ret; - uint32_t sz; - - ret = CRYS_ECPKI_GenKeyPair(&rndState_ptr, - CRYS_RND_GenerateVector, - _es256_curve, - &nrfpriv, &nrfpub, &tmp, NULL); - - if (ret != SA_SILIB_RET_OK){ - printf(" gen key failed with 0x%x \n",ret); - exit(1); - } - - sz = 32; - CRYS_ECPKI_ExportPrivKey(&nrfpriv, privkey, &sz); - sz = 65; - CRYS_ECPKI_ExportPublKey(&nrfpub,CRYS_EC_PointUncompressed, pubkey1, &sz); - memmove(pubkey, pubkey1+1, 64); - -} - -void crypto_ecc256_shared_secret(const uint8_t * pubkey, const uint8_t * privkey, uint8_t * shared_secret) -{ - if (uECC_shared_secret(pubkey, privkey, shared_secret, uECC_secp256r1()) != 1) - { - printf("Error, uECC_shared_secret failed\n"); - exit(1); - } - -} - -uint8_t fixed_vector_hmac[32]; -int fixed_vector_iter = 31; -uint32_t fixed_vector(void * rng, uint16_t sz, uint8_t * out) -{ - while(sz--) - { - *out++ = fixed_vector_hmac[fixed_vector_iter--]; - if (fixed_vector_iter == -1) - { - fixed_vector_iter = 31; - } - } - return 0; -} - -void derive_private_key_pair(uint8_t * data, int len, uint8_t * data2, int len2, uint8_t * privkey, uint8_t * pubkey) -{ - CRYS_ECPKI_UserPrivKey_t nrfpriv; - CRYS_ECPKI_UserPublKey_t nrfpub; - CRYS_ECPKI_KG_TempData_t tmp; - uint32_t ret; - uint32_t sz; - int i; - uint8_t pubkey1[65]; - - crypto_sha256_hmac_init(CRYPTO_MASTER_KEY, 0, privkey); - crypto_sha256_update(data, len); - crypto_sha256_update(data2, len2); - crypto_sha256_update(master_secret, 32); - crypto_sha256_hmac_final(CRYPTO_MASTER_KEY, 0, privkey); - - memmove(fixed_vector_hmac, privkey, 32); - fixed_vector_iter=31; - - /*privkey[31] += 1;*/ - for (i = 31; i > -1; i++) - { - privkey[i] += 1; - if (privkey[i] != 0) - break; - } - - // There isn't a CC310 function for calculating a public key from a private, - // so to get around it, we can "fix" the RNG input to GenKeyPair - - if(pubkey != NULL) - { - ret = CRYS_ECPKI_GenKeyPair(&rndState_ptr, - fixed_vector, - /*CRYS_RND_GenerateVector,*/ - _es256_curve, - &nrfpriv, &nrfpub, &tmp, NULL); - - if (ret != SA_SILIB_RET_OK){ - printf(" gen key failed with 0x%x \n",ret); - exit(1); - } - - /*sz = 32;*/ - /*ret = CRYS_ECPKI_ExportPrivKey(&nrfpriv, privkey, &sz);*/ - /*if (ret != 0)*/ - /*{*/ - /*printf("privkey export fail\n");*/ - /*exit(1);*/ - /*}*/ - - - sz = 65; - ret = CRYS_ECPKI_ExportPublKey(&nrfpub,CRYS_EC_PointUncompressed , pubkey1, &sz); - if (ret != 0 || sz != 65) - { - printf("pubkey export fail 0x%04x\n",ret); - exit(1); - } - if (pubkey1[0] != 0x04) - { - printf("pubkey uncompressed export fail 0x%02x\n",(int)pubkey1[0]); - exit(1); - } - memmove(pubkey, pubkey1+1 , 64); - } -} - -void generate_private_key(uint8_t * data, int len, uint8_t * data2, int len2, uint8_t * privkey) -{ - derive_private_key_pair(data,len,data2,len2,privkey,NULL); -} - -struct AES_ctx aes_ctx; -void crypto_aes256_init(uint8_t * key, uint8_t * nonce) -{ - if (key == CRYPTO_TRANSPORT_KEY) - { - AES_init_ctx(&aes_ctx, transport_secret); - } - else - { - AES_init_ctx(&aes_ctx, key); - } - if (nonce == NULL) - { - memset(aes_ctx.Iv, 0, 16); - } - else - { - memmove(aes_ctx.Iv, nonce, 16); - } -} - -// prevent round key recomputation -void crypto_aes256_reset_iv(uint8_t * nonce) -{ - if (nonce == NULL) - { - memset(aes_ctx.Iv, 0, 16); - } - else - { - memmove(aes_ctx.Iv, nonce, 16); - } -} - -void crypto_aes256_decrypt(uint8_t * buf, int length) -{ - AES_CBC_decrypt_buffer(&aes_ctx, buf, length); -} - -void crypto_aes256_encrypt(uint8_t * buf, int length) -{ - AES_CBC_encrypt_buffer(&aes_ctx, buf, length); -} - - -const uint8_t attestation_cert_der[] = -"\x30\x82\x01\xfb\x30\x82\x01\xa1\xa0\x03\x02\x01\x02\x02\x01\x00\x30\x0a\x06\x08" -"\x2a\x86\x48\xce\x3d\x04\x03\x02\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13" -"\x02\x55\x53\x31\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x10\x30\x0e" -"\x06\x03\x55\x04\x0a\x0c\x07\x54\x45\x53\x54\x20\x43\x41\x30\x20\x17\x0d\x31\x38" -"\x30\x35\x31\x30\x30\x33\x30\x36\x32\x30\x5a\x18\x0f\x32\x30\x36\x38\x30\x34\x32" -"\x37\x30\x33\x30\x36\x32\x30\x5a\x30\x7c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13" -"\x02\x55\x53\x31\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x0f\x30\x0d" -"\x06\x03\x55\x04\x07\x0c\x06\x4c\x61\x75\x72\x65\x6c\x31\x15\x30\x13\x06\x03\x55" -"\x04\x0a\x0c\x0c\x54\x45\x53\x54\x20\x43\x4f\x4d\x50\x41\x4e\x59\x31\x22\x30\x20" -"\x06\x03\x55\x04\x0b\x0c\x19\x41\x75\x74\x68\x65\x6e\x74\x69\x63\x61\x74\x6f\x72" -"\x20\x41\x74\x74\x65\x73\x74\x61\x74\x69\x6f\x6e\x31\x14\x30\x12\x06\x03\x55\x04" -"\x03\x0c\x0b\x63\x6f\x6e\x6f\x72\x70\x70\x2e\x63\x6f\x6d\x30\x59\x30\x13\x06\x07" -"\x2a\x86\x48\xce\x3d\x02\x01\x06\x08\x2a\x86\x48\xce\x3d\x03\x01\x07\x03\x42\x00" -"\x04\x45\xa9\x02\xc1\x2e\x9c\x0a\x33\xfa\x3e\x84\x50\x4a\xb8\x02\xdc\x4d\xb9\xaf" -"\x15\xb1\xb6\x3a\xea\x8d\x3f\x03\x03\x55\x65\x7d\x70\x3f\xb4\x02\xa4\x97\xf4\x83" -"\xb8\xa6\xf9\x3c\xd0\x18\xad\x92\x0c\xb7\x8a\x5a\x3e\x14\x48\x92\xef\x08\xf8\xca" -"\xea\xfb\x32\xab\x20\xa3\x62\x30\x60\x30\x46\x06\x03\x55\x1d\x23\x04\x3f\x30\x3d" -"\xa1\x30\xa4\x2e\x30\x2c\x31\x0b\x30\x09\x06\x03\x55\x04\x06\x13\x02\x55\x53\x31" -"\x0b\x30\x09\x06\x03\x55\x04\x08\x0c\x02\x4d\x44\x31\x10\x30\x0e\x06\x03\x55\x04" -"\x0a\x0c\x07\x54\x45\x53\x54\x20\x43\x41\x82\x09\x00\xf7\xc9\xec\x89\xf2\x63\x94" -"\xd9\x30\x09\x06\x03\x55\x1d\x13\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04" -"\x04\x03\x02\x04\xf0\x30\x0a\x06\x08\x2a\x86\x48\xce\x3d\x04\x03\x02\x03\x48\x00" -"\x30\x45\x02\x20\x18\x38\xb0\x45\x03\x69\xaa\xa7\xb7\x38\x62\x01\xaf\x24\x97\x5e" -"\x7e\x74\x64\x1b\xa3\x7b\xf7\xe6\xd3\xaf\x79\x28\xdb\xdc\xa5\x88\x02\x21\x00\xcd" -"\x06\xf1\xe3\xab\x16\x21\x8e\xd8\xc0\x14\xaf\x09\x4f\x5b\x73\xef\x5e\x9e\x4b\xe7" -"\x35\xeb\xdd\x9b\x6d\x8f\x7d\xf3\xc4\x3a\xd7"; - - -const uint16_t attestation_cert_der_size = sizeof(attestation_cert_der)-1; - - -const uint8_t attestation_key[] = "\xcd\x67\xaa\x31\x0d\x09\x1e\xd1\x6e\x7e\x98\x92\xaa\x07\x0e\x19\x94\xfc\xd7\x14\xae\x7c\x40\x8f\xb9\x46\xb7\x2e\x5f\xe7\x5d\x30"; -const uint16_t attestation_key_size = sizeof(attestation_key)-1; - - diff --git a/targets/nrf52840/device.c b/targets/nrf52840/device.c deleted file mode 100644 index e279b21..0000000 --- a/targets/nrf52840/device.c +++ /dev/null @@ -1,286 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -/* - * Device specific functionality here - * */ -#define DEBUG -#include -#include -#include - -#include "nrf.h" -#include "nrf_error.h" -#include "nrf_drv_power.h" -#include "nrf_strerror.h" -#include "nrf_drv_rtc.h" -#include "nrf_drv_clock.h" -#include "nrf_drv_usbd.h" -#include "nrf_gpio.h" -#include "bsp.h" - -#include "app_error.h" -#include "app_fifo.h" - -#include "util.h" -#include "usb.h" -#include "device.h" -#include "cbor.h" -#include "log.h" - - - -extern int _SEGGER_TERM; - - -void set_output_terminal(uint32_t term) -{ - _SEGGER_TERM = term; -} - -void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info) -{ - error_info_t * e = (error_info_t *)info; - printf("Error: %d: %s at %d:%s\n",e->err_code, nrf_strerror_get(e->err_code), e->line_num, e->p_file_name); - while(1) - ; -} - - -void log_resetreason(void) -{ - /* Reset reason */ - uint32_t rr = nrf_power_resetreas_get(); - printf("Reset reasons:\n"); - if (0 == rr) - { - printf("- NONE\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_RESETPIN_MASK)) - { - printf("- RESETPIN\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_DOG_MASK )) - { - printf("- DOG\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_SREQ_MASK )) - { - printf("- SREQ\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_LOCKUP_MASK )) - { - printf("- LOCKUP\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_OFF_MASK )) - { - printf("- OFF\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_LPCOMP_MASK )) - { - printf("- LPCOMP\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_DIF_MASK )) - { - printf("- DIF\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_NFC_MASK )) - { - printf("- NFC\n"); - } - if (0 != (rr & NRF_POWER_RESETREAS_VBUS_MASK )) - { - printf("- VBUS\n"); - } -} - - -static const nrf_drv_rtc_t rtc = NRF_DRV_RTC_INSTANCE(0); /**< Declaring an instance of nrf_drv_rtc for RTC0. */ -uint64_t millis() -{ - return (uint64_t)nrf_drv_rtc_counter_get(&rtc); -} - - - -static void rtc_config(void) -{ - uint32_t err_code; - - //Initialize RTC instance - nrf_drv_rtc_config_t config = NRF_DRV_RTC_DEFAULT_CONFIG; - config.prescaler = 32; - err_code = nrf_drv_rtc_init(&rtc, &config, NULL); - APP_ERROR_CHECK(err_code); - - //Power on RTC instance - nrf_drv_rtc_enable(&rtc); -} - -static void init_power_clock(void) -{ - ret_code_t ret; - /* Initializing power and clock */ - ret = nrf_drv_clock_init(); - APP_ERROR_CHECK(ret); - ret = nrf_drv_power_init(NULL); - APP_ERROR_CHECK(ret); - nrf_drv_clock_hfclk_request(NULL); - nrf_drv_clock_lfclk_request(NULL); - while (!(nrf_drv_clock_hfclk_is_running() && - nrf_drv_clock_lfclk_is_running())) - { - /* Just waiting */ - } -} - -void device_init() -{ - if ((nrf_power_resetreas_get() & NRF_POWER_RESETREAS_RESETPIN_MASK) == 0) - { - // Hard reset. this is for engineering A sample to work for USB ... - nrf_power_resetreas_clear(nrf_power_resetreas_get()); - nrf_gpio_cfg_output(NRF_GPIO_PIN_MAP(0,31)); - nrf_gpio_pin_clear(NRF_GPIO_PIN_MAP(0,31)); - while (1) - ; - } - nrf_power_resetreas_clear(nrf_power_resetreas_get()); - - set_output_terminal(0); - init_power_clock(); - rtc_config(); - usbhid_init(); - - srand(millis()); - - nrf_gpio_cfg_output(LED_1); - nrf_gpio_cfg_output(LED_2); - nrf_gpio_cfg_output(LED_3); - nrf_gpio_cfg_output(LED_4); - - nrf_gpio_pin_toggle(LED_2); - nrf_gpio_pin_toggle(LED_3); -} - - - - -static uint8_t fifo_buf[1024]; -app_fifo_t USBHID_RECV_FIFO; - -void usbhid_init() -{ -#ifndef TEST_POWER - app_fifo_init(&USBHID_RECV_FIFO, fifo_buf, sizeof(fifo_buf)); - usb_init(); -#endif -} - -// Receive 64 byte USB HID message, don't block, return size of packet, return 0 if nothing -#ifndef TEST_POWER -int usbhid_recv(uint8_t * msg) -{ - uint32_t size = 64; - app_fifo_read(&USBHID_RECV_FIFO, msg, &size); - return size; -} -#endif - - -// Send 64 byte USB HID message -void usbhid_send(uint8_t * msg) -{ - static nrf_drv_usbd_transfer_t transfer; - transfer.p_data.tx = msg; - transfer.size = 64; - while (nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPIN1)) - ; - nrf_drv_usbd_ep_transfer( - NRF_DRV_USBD_EPIN1, - &transfer); -} - -void usbhid_close() -{ -} - - -void main_loop_delay() -{ - // no delay on embedded system -} - -void heartbeat() -{ - nrf_gpio_pin_toggle(LED_1); - nrf_gpio_pin_toggle(LED_2); - nrf_gpio_pin_toggle(LED_3); - nrf_gpio_pin_toggle(LED_4); -} - -#ifndef TEST_POWER -void ctaphid_write_block(uint8_t * data) -{ - printf1(TAG_DUMP,"<< "); dump_hex1(TAG_DUMP,data, 64); - usbhid_send(data); -} -#endif - - -int ctap_user_presence_test() -{ - return 1; -} - -int ctap_user_verification(uint8_t arg) -{ - return 1; -} - - -uint32_t ctap_atomic_count(int sel) -{ - static uint32_t counter1 = 25; - static uint32_t counter2 = 25; - /*return 713;*/ - if (sel == 0) - { - printf1(TAG_RED,"counter1: %d\n", counter1); - return counter1++; - } - else - { - return counter2++; - } -} - -int ctap_generate_rng(uint8_t * dst, size_t num) -{ - int i; - for (i = 0; i < num; i++) - { - *dst++ = (uint8_t)rand(); - } - return 1; -} - - diff --git a/targets/nrf52840/list.py b/targets/nrf52840/list.py deleted file mode 100644 index a25fe11..0000000 --- a/targets/nrf52840/list.py +++ /dev/null @@ -1,42 +0,0 @@ -# -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# -from fido2.hid import CtapHidDevice -from fido2.client import Fido2Client -from fido2.pyu2f import hidtransport -import sys -from random import randint -import array - - -# Locate a device -for d in CtapHidDevice.list_devices(): - print(d) -#selector = hidtransport.HidUsageSelector -#for d in hidtransport.hid.Enumerate(): - #print('1',d) - #if selector(d): - #try: - #dev = hidtransport.hid.Open(d['path']) - #print('2',dev) - #except OSError: - ## Insufficient permissions to access device - #pass diff --git a/targets/nrf52840/main.c b/targets/nrf52840/main.c deleted file mode 100644 index f4c7703..0000000 --- a/targets/nrf52840/main.c +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup blinky_example_main main.c - * @{ - * @ingroup blinky_example - * @brief Blinky Example Application main file. - * - * This file contains the source code for a sample application to blink LEDs. - * - */ -#define DEBUG -#include -#include -#include - -#include "nrf.h" -#include "nrf_delay.h" - -#include "boards.h" - -#include "device.h" -#include "time.h" -#include "util.h" - - - -int main(void) -{ - /* Configure board. */ - uint8_t hidmsg[64]; - uint32_t count = 0; - uint32_t beat = 0; - uint32_t t1 = 0; - - - printf("hello FIDO2\r\n"); - device_init(); - - while(1) - { - if (millis() - t1 > 1000) - { - printf("heartbeat %ld\n", beat++); - t1 = millis(); - } - - if (usbhid_recv(hidmsg) > 0) - { - printf("%d>> ",count++); dump_hex(hidmsg,sizeof(hidmsg)); - - /*ctaphid_handle_packet(hidmsg);*/ - memset(hidmsg, 0, sizeof(hidmsg)); - } - - /*u2f_hid_check_timeouts();*/ - - main_loop_delay(); - } - -} - - diff --git a/targets/nrf52840/pyserial.py b/targets/nrf52840/pyserial.py deleted file mode 100644 index b5db196..0000000 --- a/targets/nrf52840/pyserial.py +++ /dev/null @@ -1,39 +0,0 @@ -#!/usr/bin/python -# -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# -import serial, sys -from sys import argv - -if len(argv) not in [2,3]: - print('usage: %s [baud-rate]' % argv[0]) - sys.exit(1) - -baud = 115200 -if len(argv) > 2: - baud = int(argv[2]) - -ser = serial.Serial(argv[1],baud) - -print('reading..') -sys.stdout.flush() -while True: - sys.stdout.write(ser.read()) diff --git a/targets/nrf52840/retarget.c b/targets/nrf52840/retarget.c deleted file mode 100644 index 37e6bca..0000000 --- a/targets/nrf52840/retarget.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ -#include "nrf.h" -#include "SEGGER_RTT.h" - -int _SEGGER_TERM = 0; - -void set_logging_tag(uint32_t tag) -{ - int term = 0; - while (tag) - { - if (tag & 1) - break; - term++; - tag = tag >> 1; - } - - _SEGGER_TERM = term; -} - -#if defined(__CC_ARM) -int fgetc(FILE * p_file) -{ - return '0'; -} - -int fputc(int ch, FILE * p_file) -{ - SEGGER_RTT_PutChar(_SEGGER_TERM, ch); - return ch; -} - -#elif defined(__GNUC__) && defined(__SES_ARM) - -int __getchar(FILE * p_file) -{ - return '0'; -} - -int __putchar(int ch, FILE * p_file) -{ - SEGGER_RTT_PutChar(_SEGGER_TERM, ch); - return ch; -} -#elif defined(__GNUC__) && !defined(__SES_ARM) - -int _write(int file, const char * p_char, int len) -{ - int i; - static int lastterm = -1; - /*char buf[2];*/ - /*buf[1] = 0;*/ - - UNUSED_PARAMETER(file); - - if (_SEGGER_TERM != lastterm) - { - SEGGER_RTT_SetTerminal(_SEGGER_TERM); - lastterm = _SEGGER_TERM; - } - - for (i = 0; i < len; i++) - { - /*buf[0] = *p_char++;*/ - SEGGER_RTT_PutChar(0, *p_char++); - /*SEGGER_RTT_TerminalOut(_SEGGER_TERM, buf);*/ - } - - return len; -} - -int _read(int file, char * p_char, int len) -{ - *p_char = '0'; - return 1; -} - -#else -/*#elif defined(__ICCARM__)*/ -#error "No read/write for printing implemented for compiler" -#endif - diff --git a/targets/nrf52840/sdk_config.h b/targets/nrf52840/sdk_config.h deleted file mode 100644 index d7e409c..0000000 --- a/targets/nrf52840/sdk_config.h +++ /dev/null @@ -1,12131 +0,0 @@ -/** - * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - - - -#ifndef SDK_CONFIG_H -#define SDK_CONFIG_H -// <<< Use Configuration Wizard in Context Menu >>>\n -#include "app_config.h" - - - -// nRF_BLE - -//========================================================== -// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module - - -#ifndef BLE_ADVERTISING_ENABLED -#define BLE_ADVERTISING_ENABLED 0 -#endif - -// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands - - -#ifndef BLE_DTM_ENABLED -#define BLE_DTM_ENABLED 0 -#endif - -// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library - - -#ifndef BLE_RACP_ENABLED -#define BLE_RACP_ENABLED 0 -#endif - -// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) -//========================================================== -#ifndef NRF_BLE_QWR_ENABLED -#define NRF_BLE_QWR_ENABLED 0 -#endif -// NRF_BLE_QWR_MAX_ATTR - Maximum number of attribute handles that can be registered. This number must be adjusted according to the number of attributes for which Queued Writes will be enabled. If it is zero, the module will reject all Queued Write requests. -#ifndef NRF_BLE_QWR_MAX_ATTR -#define NRF_BLE_QWR_MAX_ATTR 0 -#endif - -// - -// PEER_MANAGER_ENABLED - peer_manager - Peer Manager -//========================================================== -#ifndef PEER_MANAGER_ENABLED -#define PEER_MANAGER_ENABLED 0 -#endif -// PM_MAX_REGISTRANTS - Number of event handlers that can be registered. -#ifndef PM_MAX_REGISTRANTS -#define PM_MAX_REGISTRANTS 3 -#endif - -// PM_FLASH_BUFFERS - Number of internal buffers for flash operations. -// Decrease this value to lower RAM usage. - -#ifndef PM_FLASH_BUFFERS -#define PM_FLASH_BUFFERS 2 -#endif - -// PM_CENTRAL_ENABLED - Enable/disable central-specific Peer Manager functionality. - - -// Enable/disable central-specific Peer Manager functionality. - -#ifndef PM_CENTRAL_ENABLED -#define PM_CENTRAL_ENABLED 1 -#endif - -// PM_SERVICE_CHANGED_ENABLED - Enable/disable the service changed management for GATT server in Peer Manager. - - -// If not using a GATT server, or using a server wihout a service changed characteristic, -// disable this to save code space. - -#ifndef PM_SERVICE_CHANGED_ENABLED -#define PM_SERVICE_CHANGED_ENABLED 1 -#endif - -// PM_PEER_RANKS_ENABLED - Enable/disable the peer rank management in Peer Manager. - - -// Set this to false to save code space if not using the peer rank API. - -#ifndef PM_PEER_RANKS_ENABLED -#define PM_PEER_RANKS_ENABLED 1 -#endif - -// - -// -//========================================================== - -// nRF_BLE_Services - -//========================================================== -// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client - - -#ifndef BLE_ANCS_C_ENABLED -#define BLE_ANCS_C_ENABLED 0 -#endif - -// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client - - -#ifndef BLE_ANS_C_ENABLED -#define BLE_ANS_C_ENABLED 0 -#endif - -// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client - - -#ifndef BLE_BAS_C_ENABLED -#define BLE_BAS_C_ENABLED 0 -#endif - -// BLE_BAS_ENABLED - ble_bas - Battery Service -//========================================================== -#ifndef BLE_BAS_ENABLED -#define BLE_BAS_ENABLED 0 -#endif -// BLE_BAS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef BLE_BAS_CONFIG_LOG_ENABLED -#define BLE_BAS_CONFIG_LOG_ENABLED 0 -#endif -// BLE_BAS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef BLE_BAS_CONFIG_LOG_LEVEL -#define BLE_BAS_CONFIG_LOG_LEVEL 3 -#endif - -// BLE_BAS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef BLE_BAS_CONFIG_INFO_COLOR -#define BLE_BAS_CONFIG_INFO_COLOR 0 -#endif - -// BLE_BAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef BLE_BAS_CONFIG_DEBUG_COLOR -#define BLE_BAS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service - - -#ifndef BLE_CSCS_ENABLED -#define BLE_CSCS_ENABLED 0 -#endif - -// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client - - -#ifndef BLE_CTS_C_ENABLED -#define BLE_CTS_C_ENABLED 0 -#endif - -// BLE_DIS_ENABLED - ble_dis - Device Information Service - - -#ifndef BLE_DIS_ENABLED -#define BLE_DIS_ENABLED 0 -#endif - -// BLE_GLS_ENABLED - ble_gls - Glucose Service - - -#ifndef BLE_GLS_ENABLED -#define BLE_GLS_ENABLED 0 -#endif - -// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service - - -#ifndef BLE_HIDS_ENABLED -#define BLE_HIDS_ENABLED 0 -#endif - -// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client - - -#ifndef BLE_HRS_C_ENABLED -#define BLE_HRS_C_ENABLED 0 -#endif - -// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service - - -#ifndef BLE_HRS_ENABLED -#define BLE_HRS_ENABLED 0 -#endif - -// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service - - -#ifndef BLE_HTS_ENABLED -#define BLE_HTS_ENABLED 0 -#endif - -// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client - - -#ifndef BLE_IAS_C_ENABLED -#define BLE_IAS_C_ENABLED 0 -#endif - -// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service -//========================================================== -#ifndef BLE_IAS_ENABLED -#define BLE_IAS_ENABLED 0 -#endif -// BLE_IAS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef BLE_IAS_CONFIG_LOG_ENABLED -#define BLE_IAS_CONFIG_LOG_ENABLED 0 -#endif -// BLE_IAS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef BLE_IAS_CONFIG_LOG_LEVEL -#define BLE_IAS_CONFIG_LOG_LEVEL 3 -#endif - -// BLE_IAS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef BLE_IAS_CONFIG_INFO_COLOR -#define BLE_IAS_CONFIG_INFO_COLOR 0 -#endif - -// BLE_IAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef BLE_IAS_CONFIG_DEBUG_COLOR -#define BLE_IAS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client - - -#ifndef BLE_LBS_C_ENABLED -#define BLE_LBS_C_ENABLED 0 -#endif - -// BLE_LBS_ENABLED - ble_lbs - LED Button Service - - -#ifndef BLE_LBS_ENABLED -#define BLE_LBS_ENABLED 0 -#endif - -// BLE_LLS_ENABLED - ble_lls - Link Loss Service - - -#ifndef BLE_LLS_ENABLED -#define BLE_LLS_ENABLED 0 -#endif - -// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service - - -#ifndef BLE_NUS_C_ENABLED -#define BLE_NUS_C_ENABLED 0 -#endif - -// BLE_NUS_ENABLED - ble_nus - Nordic UART Service -//========================================================== -#ifndef BLE_NUS_ENABLED -#define BLE_NUS_ENABLED 0 -#endif -// BLE_NUS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef BLE_NUS_CONFIG_LOG_ENABLED -#define BLE_NUS_CONFIG_LOG_ENABLED 0 -#endif -// BLE_NUS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef BLE_NUS_CONFIG_LOG_LEVEL -#define BLE_NUS_CONFIG_LOG_LEVEL 3 -#endif - -// BLE_NUS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef BLE_NUS_CONFIG_INFO_COLOR -#define BLE_NUS_CONFIG_INFO_COLOR 0 -#endif - -// BLE_NUS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef BLE_NUS_CONFIG_DEBUG_COLOR -#define BLE_NUS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client - - -#ifndef BLE_RSCS_C_ENABLED -#define BLE_RSCS_C_ENABLED 0 -#endif - -// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service - - -#ifndef BLE_RSCS_ENABLED -#define BLE_RSCS_ENABLED 0 -#endif - -// BLE_TPS_ENABLED - ble_tps - TX Power Service - - -#ifndef BLE_TPS_ENABLED -#define BLE_TPS_ENABLED 0 -#endif - -// -//========================================================== - -// nRF_Core - -//========================================================== -// NRF_MPU_ENABLED - nrf_mpu - Module for MPU -//========================================================== -#ifndef NRF_MPU_ENABLED -#define NRF_MPU_ENABLED 0 -#endif -// NRF_MPU_CLI_CMDS - Enable CLI commands specific to the module - - -#ifndef NRF_MPU_CLI_CMDS -#define NRF_MPU_CLI_CMDS 0 -#endif - -// - -// NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Module for Protecting Stack -//========================================================== -#ifndef NRF_STACK_GUARD_ENABLED -#define NRF_STACK_GUARD_ENABLED 0 -#endif -// NRF_STACK_GUARD_CONFIG_SIZE - Size of stack guard - -// <5=> 32 bytes -// <6=> 64 bytes -// <7=> 128 bytes -// <8=> 256 bytes -// <9=> 512 bytes -// <10=> 1024 bytes -// <11=> 2048 bytes -// <12=> 4096 bytes - -#ifndef NRF_STACK_GUARD_CONFIG_SIZE -#define NRF_STACK_GUARD_CONFIG_SIZE 7 -#endif - -// - -// -//========================================================== - -// nRF_Crypto - -//========================================================== -// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library -//========================================================== -#ifndef NRF_CRYPTO_ENABLED -#define NRF_CRYPTO_ENABLED 1 -#endif -// NRF_CRYPTO_ALLOCATOR - Memory allocator - - -// Choose memory allocator used by nrf_crypto. Default is alloca if possible or nrf_malloc otherwise. If 'User macros' are selected then user have to create 'nrf_crypto_allocator.h' file containing NRF_CRYPTO_ALLOC, NRF_CRYPTO_FREE and NRF_CRYPTO_ALLOC_ON_STACK -// <0=> Default -// <1=> User macros -// <2=> On stack (alloca) -// <3=> C dynamic memory (malloc) -// <4=> SDK Memory Manager (nrf_malloc) - -#ifndef NRF_CRYPTO_ALLOCATOR -#define NRF_CRYPTO_ALLOCATOR 0 -#endif - -// nrf_crypto_rng - RNG Configuration - -//========================================================== -// NRF_CRYPTO_RNG_STATIC_MEMORY_BUFFERS_ENABLED - Use static memory buffers for context and temporary init buffer. - - -// Always recommended when using the nRF HW RNG as the context and temporary buffers are small. Consider disabling if using the CC310 RNG in a RAM constrained application. In this case, memory must be provided to nrf_crypto_rng_init, or it can be allocated internally provided that NRF_CRYPTO_ALLOCATOR does not allocate memory on the stack. - -#ifndef NRF_CRYPTO_RNG_STATIC_MEMORY_BUFFERS_ENABLED -#define NRF_CRYPTO_RNG_STATIC_MEMORY_BUFFERS_ENABLED 1 -#endif - -// NRF_CRYPTO_RNG_AUTO_INIT_ENABLED - Initialize the RNG module automatically when nrf_crypto is initialized. - - -// Automatic initialization is only supported with static or internally allocated context and temporary memory. - -#ifndef NRF_CRYPTO_RNG_AUTO_INIT_ENABLED -#define NRF_CRYPTO_RNG_AUTO_INIT_ENABLED 1 -#endif - -// -//========================================================== - -// NRF_CRYPTO_BACKEND_CC310_BL_ENABLED - Enable the ARM Cryptocell CC310 reduced backend. - -// The CC310 hardware-accelerated cryptography backend with reduced functionality and footprint (only available on nRF52840). -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310_BL. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED 0 -#endif - -// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310_BL. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED - CC310_BL SHA-256 hash functionality. - - -// CC310_BL backend implementation for hardware-accelerated SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED - nrf_cc310_bl hash outputs digests in little endian - - -// Makes the nRF SH hash functions output digests in little endian format. Only for use in nRF SDK DFU! - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED 0 -#endif - -// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED - nrf_cc310_bl buffers to RAM before running hash operation - - -// Enabling this makes hashing of addresses in FLASH range possible. Size of buffer allocated for hashing is set by NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED 0 -#endif - -// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - nrf_cc310_bl hash outputs digests in little endian -// Makes the nrf_cc310_bl hash functions output digests in little endian format. Only for use in nRF SDK DFU! - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE -#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE 4096 -#endif - -// NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED - Enable non-standard little endian byte order in nrf_cc310_bl ECC functions. - - -// This affects parameters for all nrf_cc310_bl ECC APIs (raw keys, signature, digest). Only for use in nRF SDK DFU! - -#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED 0 -#endif - -// - -// NRF_CRYPTO_BACKEND_CC310_ENABLED - Enable the ARM Cryptocell CC310 backend. - -// The CC310 hardware-accelerated cryptography backend (only available on nRF52840). -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_CC310_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ENABLED 1 -#endif -// NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED - Enable the AES CBC mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED - Enable the AES CTR mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED - Enable the AES ECB mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED - Enable the AES CBC_MAC mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED - Enable the AES CMAC mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED - Enable the AES CCM mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED - Enable the AES CCM* mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED - Enable the secp160r1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED - Enable the secp160r2 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED - Enable the secp192r1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED - Enable the secp384r1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED - Enable the secp521r1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED - Enable the secp160k1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED - Enable the secp192k1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED - Enable the secp224k1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED - Enable the secp256k1 elliptic curve support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED - CC310 SHA-256 hash functionality. - - -// CC310 backend implementation for hardware-accelerated SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED - CC310 SHA-512 hash functionality - - -// CC310 backend implementation for SHA-512 (in software). - -#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED - CC310 HMAC using SHA-256 - - -// CC310 backend implementation for HMAC using hardware-accelerated SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED - CC310 HMAC using SHA-512 - - -// CC310 backend implementation for HMAC using SHA-512 (in software). - -#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED - Enable RNG support using CC310. - - -#ifndef NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED -#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED 1 -#endif - -// - -// NRF_CRYPTO_BACKEND_CIFRA_ENABLED - Enable the Cifra backend. -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_CIFRA_ENABLED -#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED - Enable the AES EAX mode using Cifra. - - -#ifndef NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED -#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED 1 -#endif - -// - -// NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED - Enable the mbed TLS backend. -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED - Enable the AES CBC mode mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED - Enable the AES CTR mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED - Enable the AES CFB mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED - Enable the AES ECB mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED - Enable the AES CBC MAC mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED - Enable the AES CMAC mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED - Enable the AES CCM mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED - Enable the AES GCM mode using mbed TLS. - - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve - - -// Enable this setting if you need secp192r1 (NIST 192-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve - - -// Enable this setting if you need secp224r1 (NIST 224-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve - - -// Enable this setting if you need secp256r1 (NIST 256-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED - Enable secp384r1 (NIST 384-bit) curve - - -// Enable this setting if you need secp384r1 (NIST 384-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED - Enable secp521r1 (NIST 521-bit) curve - - -// Enable this setting if you need secp521r1 (NIST 521-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED - Enable secp192k1 (Koblitz 192-bit) curve - - -// Enable this setting if you need secp192k1 (Koblitz 192-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED - Enable secp224k1 (Koblitz 224-bit) curve - - -// Enable this setting if you need secp224k1 (Koblitz 224-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve - - -// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED - Enable bp256r1 (Brainpool 256-bit) curve - - -// Enable this setting if you need bp256r1 (Brainpool 256-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED - Enable bp384r1 (Brainpool 384-bit) curve - - -// Enable this setting if you need bp384r1 (Brainpool 384-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED - Enable bp512r1 (Brainpool 512-bit) curve - - -// Enable this setting if you need bp512r1 (Brainpool 512-bit) support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED - Enable Curve25519 curve - - -// Enable this setting if you need Curve25519 support using MBEDTLS - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED - Enable mbed TLS SHA-256 hash functionality. - - -// mbed TLS backend implementation for SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED - Enable mbed TLS SHA-512 hash functionality. - - -// mbed TLS backend implementation for SHA-512. - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED - Enable mbed TLS HMAC using SHA-256. - - -// mbed TLS backend implementation for HMAC using SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED - Enable mbed TLS HMAC using SHA-512. - - -// mbed TLS backend implementation for HMAC using SHA-512. - -#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED -#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1 -#endif - -// - -// NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED - Enable the micro-ecc backend. -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve - - -// Enable this setting if you need secp192r1 (NIST 192-bit) support using micro-ecc - -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve - - -// Enable this setting if you need secp224r1 (NIST 224-bit) support using micro-ecc - -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve - - -// Enable this setting if you need secp256r1 (NIST 256-bit) support using micro-ecc - -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve - - -// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using micro-ecc - -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED - Always trust raw public key (it will cause a security issue if the public key comes from an untrusted source) - - -// Enable this setting if you want to reduce flash usage. Only for use in nRF SDK DFU! Never enable it if the raw public key comes from an untrusted source. - -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED 0 -#endif - -// NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED - Enable non-standard little endian byte order. - - -// This affects parameters for all ECC API (raw keys, signature, digest, shared secret). Only for use in nRF SDK DFU! - -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED -#define NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED 0 -#endif - -// - -// NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED - Enable the nRF HW RNG backend. - -// The nRF HW backend provide access to RNG peripheral in nRF5x devices. -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED -#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED - Enable mbed TLS CTR-DRBG algorithm. - - -// Enable mbed TLS CTR-DRBG standardized by NIST (NIST SP 800-90A Rev. 1). The nRF HW RNG is used as an entropy source for seeding. - -#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED -#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED 1 -#endif - -// - -// NRF_CRYPTO_BACKEND_NRF_SW_ENABLED - Enable the legacy nRFx sw for crypto. - -// The nRF SW cryptography backend (only used in bootloader context). -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_NRF_SW_ENABLED -#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED - nRF SW hash backend support for SHA-256 - - -// The nRF SW backend provide access to nRF SDK legacy hash implementation of SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED - nRF SW hash outputs digests in little endian - - -// Makes the nRF SH hash functions output digests in little endian format. Only for use in nRF SDK DFU! - -#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED -#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED 1 -#endif - -// - -// NRF_CRYPTO_BACKEND_OBERON_ENABLED - Enable the Oberon backend - -// The Oberon backend -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_OBERON_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_ENABLED 0 -#endif -// NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using Oberon. - - -#ifndef NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED - Enable secp256r1 curve - - -// Enable this setting if you need secp256r1 curve support using Oberon library - -#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED - Enable Curve25519 ECDH - - -// Enable this setting if you need Curve25519 ECDH support using Oberon library - -#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED - Enable Ed25519 signature scheme - - -// Enable this setting if you need Ed25519 support using Oberon library - -#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED - Oberon SHA-256 hash functionality - - -// Oberon backend implementation for SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED - Oberon SHA-512 hash functionality - - -// Oberon backend implementation for SHA-512. - -#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED - Oberon HMAC using SHA-256 - - -// Oberon backend implementation for HMAC using SHA-256. - -#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED 1 -#endif - -// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED - Oberon HMAC using SHA-512 - - -// Oberon backend implementation for HMAC using SHA-512. - -#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED -#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED 1 -#endif - -// - -// - -// -//========================================================== - -// nRF_DFU - -//========================================================== -// ble_dfu - Device Firmware Update - -//========================================================== -// BLE_DFU_ENABLED - Enable DFU Service. - - -#ifndef BLE_DFU_ENABLED -#define BLE_DFU_ENABLED 0 -#endif - -// NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS - Buttonless DFU supports bonds. - - -#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS -#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0 -#endif - -// -//========================================================== - -// -//========================================================== - -// nRF_Drivers - -//========================================================== -// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer -//========================================================== -#ifndef CLOCK_ENABLED -#define CLOCK_ENABLED 1 -#endif -// CLOCK_CONFIG_LF_SRC - LF Clock Source - -// <0=> RC -// <1=> XTAL -// <2=> Synth - -#ifndef CLOCK_CONFIG_LF_SRC -#define CLOCK_CONFIG_LF_SRC 1 -#endif - -// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef CLOCK_CONFIG_IRQ_PRIORITY -#define CLOCK_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver - legacy layer -//========================================================== -#ifndef COMP_ENABLED -#define COMP_ENABLED 0 -#endif -// COMP_CONFIG_REF - Reference voltage - -// <0=> Internal 1.2V -// <1=> Internal 1.8V -// <2=> Internal 2.4V -// <4=> VDD -// <7=> ARef - -#ifndef COMP_CONFIG_REF -#define COMP_CONFIG_REF 1 -#endif - -// COMP_CONFIG_MAIN_MODE - Main mode - -// <0=> Single ended -// <1=> Differential - -#ifndef COMP_CONFIG_MAIN_MODE -#define COMP_CONFIG_MAIN_MODE 0 -#endif - -// COMP_CONFIG_SPEED_MODE - Speed mode - -// <0=> Low power -// <1=> Normal -// <2=> High speed - -#ifndef COMP_CONFIG_SPEED_MODE -#define COMP_CONFIG_SPEED_MODE 2 -#endif - -// COMP_CONFIG_HYST - Hystheresis - -// <0=> No -// <1=> 50mV - -#ifndef COMP_CONFIG_HYST -#define COMP_CONFIG_HYST 0 -#endif - -// COMP_CONFIG_ISOURCE - Current Source - -// <0=> Off -// <1=> 2.5 uA -// <2=> 5 uA -// <3=> 10 uA - -#ifndef COMP_CONFIG_ISOURCE -#define COMP_CONFIG_ISOURCE 0 -#endif - -// COMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef COMP_CONFIG_INPUT -#define COMP_CONFIG_INPUT 0 -#endif - -// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef COMP_CONFIG_IRQ_PRIORITY -#define COMP_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver - legacy layer - - -#ifndef EGU_ENABLED -#define EGU_ENABLED 0 -#endif - -// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer -//========================================================== -#ifndef GPIOTE_ENABLED -#define GPIOTE_ENABLED 1 -#endif -// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins -#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4 -#endif - -// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef GPIOTE_CONFIG_IRQ_PRIORITY -#define GPIOTE_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver - legacy layer -//========================================================== -#ifndef I2S_ENABLED -#define I2S_ENABLED 0 -#endif -// I2S_CONFIG_SCK_PIN - SCK pin <0-31> - - -#ifndef I2S_CONFIG_SCK_PIN -#define I2S_CONFIG_SCK_PIN 31 -#endif - -// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> - - -#ifndef I2S_CONFIG_LRCK_PIN -#define I2S_CONFIG_LRCK_PIN 30 -#endif - -// I2S_CONFIG_MCK_PIN - MCK pin -#ifndef I2S_CONFIG_MCK_PIN -#define I2S_CONFIG_MCK_PIN 255 -#endif - -// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> - - -#ifndef I2S_CONFIG_SDOUT_PIN -#define I2S_CONFIG_SDOUT_PIN 29 -#endif - -// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> - - -#ifndef I2S_CONFIG_SDIN_PIN -#define I2S_CONFIG_SDIN_PIN 28 -#endif - -// I2S_CONFIG_MASTER - Mode - -// <0=> Master -// <1=> Slave - -#ifndef I2S_CONFIG_MASTER -#define I2S_CONFIG_MASTER 0 -#endif - -// I2S_CONFIG_FORMAT - Format - -// <0=> I2S -// <1=> Aligned - -#ifndef I2S_CONFIG_FORMAT -#define I2S_CONFIG_FORMAT 0 -#endif - -// I2S_CONFIG_ALIGN - Alignment - -// <0=> Left -// <1=> Right - -#ifndef I2S_CONFIG_ALIGN -#define I2S_CONFIG_ALIGN 0 -#endif - -// I2S_CONFIG_SWIDTH - Sample width (bits) - -// <0=> 8 -// <1=> 16 -// <2=> 24 - -#ifndef I2S_CONFIG_SWIDTH -#define I2S_CONFIG_SWIDTH 1 -#endif - -// I2S_CONFIG_CHANNELS - Channels - -// <0=> Stereo -// <1=> Left -// <2=> Right - -#ifndef I2S_CONFIG_CHANNELS -#define I2S_CONFIG_CHANNELS 1 -#endif - -// I2S_CONFIG_MCK_SETUP - MCK behavior - -// <0=> Disabled -// <2147483648=> 32MHz/2 -// <1342177280=> 32MHz/3 -// <1073741824=> 32MHz/4 -// <805306368=> 32MHz/5 -// <671088640=> 32MHz/6 -// <536870912=> 32MHz/8 -// <402653184=> 32MHz/10 -// <369098752=> 32MHz/11 -// <285212672=> 32MHz/15 -// <268435456=> 32MHz/16 -// <201326592=> 32MHz/21 -// <184549376=> 32MHz/23 -// <142606336=> 32MHz/30 -// <138412032=> 32MHz/31 -// <134217728=> 32MHz/32 -// <100663296=> 32MHz/42 -// <68157440=> 32MHz/63 -// <34340864=> 32MHz/125 - -#ifndef I2S_CONFIG_MCK_SETUP -#define I2S_CONFIG_MCK_SETUP 536870912 -#endif - -// I2S_CONFIG_RATIO - MCK/LRCK ratio - -// <0=> 32x -// <1=> 48x -// <2=> 64x -// <3=> 96x -// <4=> 128x -// <5=> 192x -// <6=> 256x -// <7=> 384x -// <8=> 512x - -#ifndef I2S_CONFIG_RATIO -#define I2S_CONFIG_RATIO 2000 -#endif - -// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef I2S_CONFIG_IRQ_PRIORITY -#define I2S_CONFIG_IRQ_PRIORITY 7 -#endif - -// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef I2S_CONFIG_LOG_ENABLED -#define I2S_CONFIG_LOG_ENABLED 0 -#endif -// I2S_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef I2S_CONFIG_LOG_LEVEL -#define I2S_CONFIG_LOG_LEVEL 3 -#endif - -// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_INFO_COLOR -#define I2S_CONFIG_INFO_COLOR 0 -#endif - -// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_DEBUG_COLOR -#define I2S_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver - legacy layer -//========================================================== -#ifndef LPCOMP_ENABLED -#define LPCOMP_ENABLED 0 -#endif -// LPCOMP_CONFIG_REFERENCE - Reference voltage - -// <0=> Supply 1/8 -// <1=> Supply 2/8 -// <2=> Supply 3/8 -// <3=> Supply 4/8 -// <4=> Supply 5/8 -// <5=> Supply 6/8 -// <6=> Supply 7/8 -// <8=> Supply 1/16 (nRF52) -// <9=> Supply 3/16 (nRF52) -// <10=> Supply 5/16 (nRF52) -// <11=> Supply 7/16 (nRF52) -// <12=> Supply 9/16 (nRF52) -// <13=> Supply 11/16 (nRF52) -// <14=> Supply 13/16 (nRF52) -// <15=> Supply 15/16 (nRF52) -// <7=> External Ref 0 -// <65543=> External Ref 1 - -#ifndef LPCOMP_CONFIG_REFERENCE -#define LPCOMP_CONFIG_REFERENCE 3 -#endif - -// LPCOMP_CONFIG_DETECTION - Detection - -// <0=> Crossing -// <1=> Up -// <2=> Down - -#ifndef LPCOMP_CONFIG_DETECTION -#define LPCOMP_CONFIG_DETECTION 2 -#endif - -// LPCOMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef LPCOMP_CONFIG_INPUT -#define LPCOMP_CONFIG_INPUT 0 -#endif - -// LPCOMP_CONFIG_HYST - Hysteresis - - -#ifndef LPCOMP_CONFIG_HYST -#define LPCOMP_CONFIG_HYST 0 -#endif - -// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef LPCOMP_CONFIG_IRQ_PRIORITY -#define LPCOMP_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver -//========================================================== -#ifndef NRFX_CLOCK_ENABLED -#define NRFX_CLOCK_ENABLED 1 -#endif -// NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source - -// <0=> RC -// <1=> XTAL -// <2=> Synth - -#ifndef NRFX_CLOCK_CONFIG_LF_SRC -#define NRFX_CLOCK_CONFIG_LF_SRC 1 -#endif - -// NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_CLOCK_CONFIG_IRQ_PRIORITY -#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED -#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL -#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR -#define NRFX_CLOCK_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR -#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver -//========================================================== -#ifndef NRFX_COMP_ENABLED -#define NRFX_COMP_ENABLED 0 -#endif -// NRFX_COMP_CONFIG_REF - Reference voltage - -// <0=> Internal 1.2V -// <1=> Internal 1.8V -// <2=> Internal 2.4V -// <4=> VDD -// <7=> ARef - -#ifndef NRFX_COMP_CONFIG_REF -#define NRFX_COMP_CONFIG_REF 1 -#endif - -// NRFX_COMP_CONFIG_MAIN_MODE - Main mode - -// <0=> Single ended -// <1=> Differential - -#ifndef NRFX_COMP_CONFIG_MAIN_MODE -#define NRFX_COMP_CONFIG_MAIN_MODE 0 -#endif - -// NRFX_COMP_CONFIG_SPEED_MODE - Speed mode - -// <0=> Low power -// <1=> Normal -// <2=> High speed - -#ifndef NRFX_COMP_CONFIG_SPEED_MODE -#define NRFX_COMP_CONFIG_SPEED_MODE 2 -#endif - -// NRFX_COMP_CONFIG_HYST - Hystheresis - -// <0=> No -// <1=> 50mV - -#ifndef NRFX_COMP_CONFIG_HYST -#define NRFX_COMP_CONFIG_HYST 0 -#endif - -// NRFX_COMP_CONFIG_ISOURCE - Current Source - -// <0=> Off -// <1=> 2.5 uA -// <2=> 5 uA -// <3=> 10 uA - -#ifndef NRFX_COMP_CONFIG_ISOURCE -#define NRFX_COMP_CONFIG_ISOURCE 0 -#endif - -// NRFX_COMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_COMP_CONFIG_INPUT -#define NRFX_COMP_CONFIG_INPUT 0 -#endif - -// NRFX_COMP_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_COMP_CONFIG_IRQ_PRIORITY -#define NRFX_COMP_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_COMP_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_COMP_CONFIG_LOG_ENABLED -#define NRFX_COMP_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_COMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_COMP_CONFIG_LOG_LEVEL -#define NRFX_COMP_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_COMP_CONFIG_INFO_COLOR -#define NRFX_COMP_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_COMP_CONFIG_DEBUG_COLOR -#define NRFX_COMP_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver -//========================================================== -#ifndef NRFX_GPIOTE_ENABLED -#define NRFX_GPIOTE_ENABLED 1 -#endif -// NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins -#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 -#endif - -// NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY -#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED -#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL -#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR -#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR -#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver -//========================================================== -#ifndef NRFX_I2S_ENABLED -#define NRFX_I2S_ENABLED 0 -#endif -// NRFX_I2S_CONFIG_SCK_PIN - SCK pin <0-31> - - -#ifndef NRFX_I2S_CONFIG_SCK_PIN -#define NRFX_I2S_CONFIG_SCK_PIN 31 -#endif - -// NRFX_I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> - - -#ifndef NRFX_I2S_CONFIG_LRCK_PIN -#define NRFX_I2S_CONFIG_LRCK_PIN 30 -#endif - -// NRFX_I2S_CONFIG_MCK_PIN - MCK pin -#ifndef NRFX_I2S_CONFIG_MCK_PIN -#define NRFX_I2S_CONFIG_MCK_PIN 255 -#endif - -// NRFX_I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> - - -#ifndef NRFX_I2S_CONFIG_SDOUT_PIN -#define NRFX_I2S_CONFIG_SDOUT_PIN 29 -#endif - -// NRFX_I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> - - -#ifndef NRFX_I2S_CONFIG_SDIN_PIN -#define NRFX_I2S_CONFIG_SDIN_PIN 28 -#endif - -// NRFX_I2S_CONFIG_MASTER - Mode - -// <0=> Master -// <1=> Slave - -#ifndef NRFX_I2S_CONFIG_MASTER -#define NRFX_I2S_CONFIG_MASTER 0 -#endif - -// NRFX_I2S_CONFIG_FORMAT - Format - -// <0=> I2S -// <1=> Aligned - -#ifndef NRFX_I2S_CONFIG_FORMAT -#define NRFX_I2S_CONFIG_FORMAT 0 -#endif - -// NRFX_I2S_CONFIG_ALIGN - Alignment - -// <0=> Left -// <1=> Right - -#ifndef NRFX_I2S_CONFIG_ALIGN -#define NRFX_I2S_CONFIG_ALIGN 0 -#endif - -// NRFX_I2S_CONFIG_SWIDTH - Sample width (bits) - -// <0=> 8 -// <1=> 16 -// <2=> 24 - -#ifndef NRFX_I2S_CONFIG_SWIDTH -#define NRFX_I2S_CONFIG_SWIDTH 1 -#endif - -// NRFX_I2S_CONFIG_CHANNELS - Channels - -// <0=> Stereo -// <1=> Left -// <2=> Right - -#ifndef NRFX_I2S_CONFIG_CHANNELS -#define NRFX_I2S_CONFIG_CHANNELS 1 -#endif - -// NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior - -// <0=> Disabled -// <2147483648=> 32MHz/2 -// <1342177280=> 32MHz/3 -// <1073741824=> 32MHz/4 -// <805306368=> 32MHz/5 -// <671088640=> 32MHz/6 -// <536870912=> 32MHz/8 -// <402653184=> 32MHz/10 -// <369098752=> 32MHz/11 -// <285212672=> 32MHz/15 -// <268435456=> 32MHz/16 -// <201326592=> 32MHz/21 -// <184549376=> 32MHz/23 -// <142606336=> 32MHz/30 -// <138412032=> 32MHz/31 -// <134217728=> 32MHz/32 -// <100663296=> 32MHz/42 -// <68157440=> 32MHz/63 -// <34340864=> 32MHz/125 - -#ifndef NRFX_I2S_CONFIG_MCK_SETUP -#define NRFX_I2S_CONFIG_MCK_SETUP 536870912 -#endif - -// NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio - -// <0=> 32x -// <1=> 48x -// <2=> 64x -// <3=> 96x -// <4=> 128x -// <5=> 192x -// <6=> 256x -// <7=> 384x -// <8=> 512x - -#ifndef NRFX_I2S_CONFIG_RATIO -#define NRFX_I2S_CONFIG_RATIO 2000 -#endif - -// NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_I2S_CONFIG_IRQ_PRIORITY -#define NRFX_I2S_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_I2S_CONFIG_LOG_ENABLED -#define NRFX_I2S_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_I2S_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_I2S_CONFIG_LOG_LEVEL -#define NRFX_I2S_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_I2S_CONFIG_INFO_COLOR -#define NRFX_I2S_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR -#define NRFX_I2S_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_LPCOMP_ENABLED - nrfx_lpcomp - LPCOMP peripheral driver -//========================================================== -#ifndef NRFX_LPCOMP_ENABLED -#define NRFX_LPCOMP_ENABLED 0 -#endif -// NRFX_LPCOMP_CONFIG_REFERENCE - Reference voltage - -// <0=> Supply 1/8 -// <1=> Supply 2/8 -// <2=> Supply 3/8 -// <3=> Supply 4/8 -// <4=> Supply 5/8 -// <5=> Supply 6/8 -// <6=> Supply 7/8 -// <8=> Supply 1/16 (nRF52) -// <9=> Supply 3/16 (nRF52) -// <10=> Supply 5/16 (nRF52) -// <11=> Supply 7/16 (nRF52) -// <12=> Supply 9/16 (nRF52) -// <13=> Supply 11/16 (nRF52) -// <14=> Supply 13/16 (nRF52) -// <15=> Supply 15/16 (nRF52) -// <7=> External Ref 0 -// <65543=> External Ref 1 - -#ifndef NRFX_LPCOMP_CONFIG_REFERENCE -#define NRFX_LPCOMP_CONFIG_REFERENCE 3 -#endif - -// NRFX_LPCOMP_CONFIG_DETECTION - Detection - -// <0=> Crossing -// <1=> Up -// <2=> Down - -#ifndef NRFX_LPCOMP_CONFIG_DETECTION -#define NRFX_LPCOMP_CONFIG_DETECTION 2 -#endif - -// NRFX_LPCOMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_LPCOMP_CONFIG_INPUT -#define NRFX_LPCOMP_CONFIG_INPUT 0 -#endif - -// NRFX_LPCOMP_CONFIG_HYST - Hysteresis - - -#ifndef NRFX_LPCOMP_CONFIG_HYST -#define NRFX_LPCOMP_CONFIG_HYST 0 -#endif - -// NRFX_LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY -#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED -#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_LPCOMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL -#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_LPCOMP_CONFIG_INFO_COLOR -#define NRFX_LPCOMP_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_LPCOMP_CONFIG_DEBUG_COLOR -#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver -//========================================================== -#ifndef NRFX_PDM_ENABLED -#define NRFX_PDM_ENABLED 0 -#endif -// NRFX_PDM_CONFIG_MODE - Mode - -// <0=> Stereo -// <1=> Mono - -#ifndef NRFX_PDM_CONFIG_MODE -#define NRFX_PDM_CONFIG_MODE 1 -#endif - -// NRFX_PDM_CONFIG_EDGE - Edge - -// <0=> Left falling -// <1=> Left rising - -#ifndef NRFX_PDM_CONFIG_EDGE -#define NRFX_PDM_CONFIG_EDGE 0 -#endif - -// NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency - -// <134217728=> 1000k -// <138412032=> 1032k (default) -// <142606336=> 1067k - -#ifndef NRFX_PDM_CONFIG_CLOCK_FREQ -#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032 -#endif - -// NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_PDM_CONFIG_IRQ_PRIORITY -#define NRFX_PDM_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_PDM_CONFIG_LOG_ENABLED -#define NRFX_PDM_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_PDM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_PDM_CONFIG_LOG_LEVEL -#define NRFX_PDM_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_PDM_CONFIG_INFO_COLOR -#define NRFX_PDM_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR -#define NRFX_PDM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver -//========================================================== -#ifndef NRFX_POWER_ENABLED -#define NRFX_POWER_ENABLED 1 -#endif -// NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_POWER_CONFIG_IRQ_PRIORITY -#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator - - -// This settings means only that components for DCDC regulator are installed and it can be enabled. - -#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN -#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0 -#endif - -// NRFX_POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator - - -// This settings means only that components for DCDC regulator are installed and it can be enabled. - -#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV -#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0 -#endif - -// - -// NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator -//========================================================== -#ifndef NRFX_PPI_ENABLED -#define NRFX_PPI_ENABLED 0 -#endif -// NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_PPI_CONFIG_LOG_ENABLED -#define NRFX_PPI_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_PPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_PPI_CONFIG_LOG_LEVEL -#define NRFX_PPI_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_PPI_CONFIG_INFO_COLOR -#define NRFX_PPI_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_PPI_CONFIG_DEBUG_COLOR -#define NRFX_PPI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver -//========================================================== -#ifndef NRFX_PWM_ENABLED -#define NRFX_PWM_ENABLED 0 -#endif -// NRFX_PWM0_ENABLED - Enable PWM0 instance - - -#ifndef NRFX_PWM0_ENABLED -#define NRFX_PWM0_ENABLED 0 -#endif - -// NRFX_PWM1_ENABLED - Enable PWM1 instance - - -#ifndef NRFX_PWM1_ENABLED -#define NRFX_PWM1_ENABLED 0 -#endif - -// NRFX_PWM2_ENABLED - Enable PWM2 instance - - -#ifndef NRFX_PWM2_ENABLED -#define NRFX_PWM2_ENABLED 0 -#endif - -// NRFX_PWM3_ENABLED - Enable PWM3 instance - - -#ifndef NRFX_PWM3_ENABLED -#define NRFX_PWM3_ENABLED 0 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> - - -#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> - - -#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> - - -#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> - - -#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz - -#ifndef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK -#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode - -// <0=> Up -// <1=> Up and Down - -#ifndef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE -#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value -#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE -#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode - -// <0=> Common -// <1=> Grouped -// <2=> Individual -// <3=> Waveform - -#ifndef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE -#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode - -// <0=> Auto -// <1=> Triggered - -#ifndef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE -#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0 -#endif - -// NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_PWM_CONFIG_LOG_ENABLED -#define NRFX_PWM_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_PWM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_PWM_CONFIG_LOG_LEVEL -#define NRFX_PWM_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_PWM_CONFIG_INFO_COLOR -#define NRFX_PWM_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR -#define NRFX_PWM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_QDEC_ENABLED - nrfx_qdec - QDEC peripheral driver -//========================================================== -#ifndef NRFX_QDEC_ENABLED -#define NRFX_QDEC_ENABLED 0 -#endif -// NRFX_QDEC_CONFIG_REPORTPER - Report period - -// <0=> 10 Samples -// <1=> 40 Samples -// <2=> 80 Samples -// <3=> 120 Samples -// <4=> 160 Samples -// <5=> 200 Samples -// <6=> 240 Samples -// <7=> 280 Samples - -#ifndef NRFX_QDEC_CONFIG_REPORTPER -#define NRFX_QDEC_CONFIG_REPORTPER 0 -#endif - -// NRFX_QDEC_CONFIG_SAMPLEPER - Sample period - -// <0=> 128 us -// <1=> 256 us -// <2=> 512 us -// <3=> 1024 us -// <4=> 2048 us -// <5=> 4096 us -// <6=> 8192 us -// <7=> 16384 us - -#ifndef NRFX_QDEC_CONFIG_SAMPLEPER -#define NRFX_QDEC_CONFIG_SAMPLEPER 7 -#endif - -// NRFX_QDEC_CONFIG_PIO_A - A pin <0-31> - - -#ifndef NRFX_QDEC_CONFIG_PIO_A -#define NRFX_QDEC_CONFIG_PIO_A 31 -#endif - -// NRFX_QDEC_CONFIG_PIO_B - B pin <0-31> - - -#ifndef NRFX_QDEC_CONFIG_PIO_B -#define NRFX_QDEC_CONFIG_PIO_B 31 -#endif - -// NRFX_QDEC_CONFIG_PIO_LED - LED pin <0-31> - - -#ifndef NRFX_QDEC_CONFIG_PIO_LED -#define NRFX_QDEC_CONFIG_PIO_LED 31 -#endif - -// NRFX_QDEC_CONFIG_LEDPRE - LED pre -#ifndef NRFX_QDEC_CONFIG_LEDPRE -#define NRFX_QDEC_CONFIG_LEDPRE 511 -#endif - -// NRFX_QDEC_CONFIG_LEDPOL - LED polarity - -// <0=> Active low -// <1=> Active high - -#ifndef NRFX_QDEC_CONFIG_LEDPOL -#define NRFX_QDEC_CONFIG_LEDPOL 1 -#endif - -// NRFX_QDEC_CONFIG_DBFEN - Debouncing enable - - -#ifndef NRFX_QDEC_CONFIG_DBFEN -#define NRFX_QDEC_CONFIG_DBFEN 0 -#endif - -// NRFX_QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable - - -#ifndef NRFX_QDEC_CONFIG_SAMPLE_INTEN -#define NRFX_QDEC_CONFIG_SAMPLE_INTEN 0 -#endif - -// NRFX_QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_QDEC_CONFIG_IRQ_PRIORITY -#define NRFX_QDEC_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED -#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_QDEC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL -#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_QDEC_CONFIG_INFO_COLOR -#define NRFX_QDEC_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_QDEC_CONFIG_DEBUG_COLOR -#define NRFX_QDEC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver -//========================================================== -#ifndef NRFX_QSPI_ENABLED -#define NRFX_QSPI_ENABLED 0 -#endif -// NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> - - -#ifndef NRFX_QSPI_CONFIG_SCK_DELAY -#define NRFX_QSPI_CONFIG_SCK_DELAY 1 -#endif - -// NRFX_QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. -#ifndef NRFX_QSPI_CONFIG_XIP_OFFSET -#define NRFX_QSPI_CONFIG_XIP_OFFSET 0 -#endif - -// NRFX_QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. - -// <0=> FastRead -// <1=> Read2O -// <2=> Read2IO -// <3=> Read4O -// <4=> Read4IO - -#ifndef NRFX_QSPI_CONFIG_READOC -#define NRFX_QSPI_CONFIG_READOC 0 -#endif - -// NRFX_QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. - -// <0=> PP -// <1=> PP2O -// <2=> PP4O -// <3=> PP4IO - -#ifndef NRFX_QSPI_CONFIG_WRITEOC -#define NRFX_QSPI_CONFIG_WRITEOC 0 -#endif - -// NRFX_QSPI_CONFIG_ADDRMODE - Addressing mode. - -// <0=> 24bit -// <1=> 32bit - -#ifndef NRFX_QSPI_CONFIG_ADDRMODE -#define NRFX_QSPI_CONFIG_ADDRMODE 0 -#endif - -// NRFX_QSPI_CONFIG_MODE - SPI mode. - -// <0=> Mode 0 -// <1=> Mode 1 - -#ifndef NRFX_QSPI_CONFIG_MODE -#define NRFX_QSPI_CONFIG_MODE 0 -#endif - -// NRFX_QSPI_CONFIG_FREQUENCY - Frequency divider. - -// <0=> 32MHz/1 -// <1=> 32MHz/2 -// <2=> 32MHz/3 -// <3=> 32MHz/4 -// <4=> 32MHz/5 -// <5=> 32MHz/6 -// <6=> 32MHz/7 -// <7=> 32MHz/8 -// <8=> 32MHz/9 -// <9=> 32MHz/10 -// <10=> 32MHz/11 -// <11=> 32MHz/12 -// <12=> 32MHz/13 -// <13=> 32MHz/14 -// <14=> 32MHz/15 -// <15=> 32MHz/16 - -#ifndef NRFX_QSPI_CONFIG_FREQUENCY -#define NRFX_QSPI_CONFIG_FREQUENCY 15 -#endif - -// NRFX_QSPI_PIN_SCK - SCK pin value. -#ifndef NRFX_QSPI_PIN_SCK -#define NRFX_QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// NRFX_QSPI_PIN_CSN - CSN pin value. -#ifndef NRFX_QSPI_PIN_CSN -#define NRFX_QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// NRFX_QSPI_PIN_IO0 - IO0 pin value. -#ifndef NRFX_QSPI_PIN_IO0 -#define NRFX_QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// NRFX_QSPI_PIN_IO1 - IO1 pin value. -#ifndef NRFX_QSPI_PIN_IO1 -#define NRFX_QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// NRFX_QSPI_PIN_IO2 - IO2 pin value. -#ifndef NRFX_QSPI_PIN_IO2 -#define NRFX_QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// NRFX_QSPI_PIN_IO3 - IO3 pin value. -#ifndef NRFX_QSPI_PIN_IO3 -#define NRFX_QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// NRFX_QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_QSPI_CONFIG_IRQ_PRIORITY -#define NRFX_QSPI_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver -//========================================================== -#ifndef NRFX_RNG_ENABLED -#define NRFX_RNG_ENABLED 0 -#endif -// NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction - - -#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION -#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1 -#endif - -// NRFX_RNG_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY -#define NRFX_RNG_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_RNG_CONFIG_LOG_ENABLED -#define NRFX_RNG_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_RNG_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_RNG_CONFIG_LOG_LEVEL -#define NRFX_RNG_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_RNG_CONFIG_INFO_COLOR -#define NRFX_RNG_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR -#define NRFX_RNG_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver -//========================================================== -#ifndef NRFX_RTC_ENABLED -#define NRFX_RTC_ENABLED 0 -#endif -// NRFX_RTC0_ENABLED - Enable RTC0 instance - - -#ifndef NRFX_RTC0_ENABLED -#define NRFX_RTC0_ENABLED 1 -#endif - -// NRFX_RTC1_ENABLED - Enable RTC1 instance - - -#ifndef NRFX_RTC1_ENABLED -#define NRFX_RTC1_ENABLED 0 -#endif - -// NRFX_RTC2_ENABLED - Enable RTC2 instance - - -#ifndef NRFX_RTC2_ENABLED -#define NRFX_RTC2_ENABLED 0 -#endif - -// NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt -#ifndef NRFX_RTC_MAXIMUM_LATENCY_US -#define NRFX_RTC_MAXIMUM_LATENCY_US 2000 -#endif - -// NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> - - -#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY -#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768 -#endif - -// NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering - - -#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE -#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0 -#endif - -// NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_RTC_CONFIG_LOG_ENABLED -#define NRFX_RTC_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_RTC_CONFIG_LOG_LEVEL -#define NRFX_RTC_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_RTC_CONFIG_INFO_COLOR -#define NRFX_RTC_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR -#define NRFX_RTC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver -//========================================================== -#ifndef NRFX_SAADC_ENABLED -#define NRFX_SAADC_ENABLED 0 -#endif -// NRFX_SAADC_CONFIG_RESOLUTION - Resolution - -// <0=> 8 bit -// <1=> 10 bit -// <2=> 12 bit -// <3=> 14 bit - -#ifndef NRFX_SAADC_CONFIG_RESOLUTION -#define NRFX_SAADC_CONFIG_RESOLUTION 1 -#endif - -// NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period - -// <0=> Disabled -// <1=> 2x -// <2=> 4x -// <3=> 8x -// <4=> 16x -// <5=> 32x -// <6=> 64x -// <7=> 128x -// <8=> 256x - -#ifndef NRFX_SAADC_CONFIG_OVERSAMPLE -#define NRFX_SAADC_CONFIG_OVERSAMPLE 0 -#endif - -// NRFX_SAADC_CONFIG_LP_MODE - Enabling low power mode - - -#ifndef NRFX_SAADC_CONFIG_LP_MODE -#define NRFX_SAADC_CONFIG_LP_MODE 0 -#endif - -// NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_SAADC_CONFIG_IRQ_PRIORITY -#define NRFX_SAADC_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED -#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_SAADC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL -#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SAADC_CONFIG_INFO_COLOR -#define NRFX_SAADC_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR -#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver -//========================================================== -#ifndef NRFX_SPIM_ENABLED -#define NRFX_SPIM_ENABLED 0 -#endif -// NRFX_SPIM0_ENABLED - Enable SPIM0 instance - - -#ifndef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED 0 -#endif - -// NRFX_SPIM1_ENABLED - Enable SPIM1 instance - - -#ifndef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED 0 -#endif - -// NRFX_SPIM2_ENABLED - Enable SPIM2 instance - - -#ifndef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED 0 -#endif - -// NRFX_SPIM3_ENABLED - Enable SPIM3 instance - - -#ifndef NRFX_SPIM3_ENABLED -#define NRFX_SPIM3_ENABLED 0 -#endif - -// NRFX_SPIM_EXTENDED_ENABLED - Enable extended SPIM features - - -#ifndef NRFX_SPIM_EXTENDED_ENABLED -#define NRFX_SPIM_EXTENDED_ENABLED 0 -#endif - -// NRFX_SPIM_MISO_PULL_CFG - MISO pin pull configuration. - -// <0=> NRF_GPIO_PIN_NOPULL -// <1=> NRF_GPIO_PIN_PULLDOWN -// <3=> NRF_GPIO_PIN_PULLUP - -#ifndef NRFX_SPIM_MISO_PULL_CFG -#define NRFX_SPIM_MISO_PULL_CFG 1 -#endif - -// NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED -#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_SPIM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL -#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_SPIM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SPIM_CONFIG_INFO_COLOR -#define NRFX_SPIM_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_SPIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR -#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver -//========================================================== -#ifndef NRFX_SPIS_ENABLED -#define NRFX_SPIS_ENABLED 0 -#endif -// NRFX_SPIS0_ENABLED - Enable SPIS0 instance - - -#ifndef NRFX_SPIS0_ENABLED -#define NRFX_SPIS0_ENABLED 0 -#endif - -// NRFX_SPIS1_ENABLED - Enable SPIS1 instance - - -#ifndef NRFX_SPIS1_ENABLED -#define NRFX_SPIS1_ENABLED 0 -#endif - -// NRFX_SPIS2_ENABLED - Enable SPIS2 instance - - -#ifndef NRFX_SPIS2_ENABLED -#define NRFX_SPIS2_ENABLED 0 -#endif - -// NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> - - -#ifndef NRFX_SPIS_DEFAULT_DEF -#define NRFX_SPIS_DEFAULT_DEF 255 -#endif - -// NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> - - -#ifndef NRFX_SPIS_DEFAULT_ORC -#define NRFX_SPIS_DEFAULT_ORC 255 -#endif - -// NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED -#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL -#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SPIS_CONFIG_INFO_COLOR -#define NRFX_SPIS_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR -#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver -//========================================================== -#ifndef NRFX_SPI_ENABLED -#define NRFX_SPI_ENABLED 0 -#endif -// NRFX_SPI0_ENABLED - Enable SPI0 instance - - -#ifndef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 0 -#endif - -// NRFX_SPI1_ENABLED - Enable SPI1 instance - - -#ifndef NRFX_SPI1_ENABLED -#define NRFX_SPI1_ENABLED 0 -#endif - -// NRFX_SPI2_ENABLED - Enable SPI2 instance - - -#ifndef NRFX_SPI2_ENABLED -#define NRFX_SPI2_ENABLED 0 -#endif - -// NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration. - -// <0=> NRF_GPIO_PIN_NOPULL -// <1=> NRF_GPIO_PIN_PULLDOWN -// <3=> NRF_GPIO_PIN_PULLUP - -#ifndef NRFX_SPI_MISO_PULL_CFG -#define NRFX_SPI_MISO_PULL_CFG 1 -#endif - -// NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_SPI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_SPI_CONFIG_LOG_ENABLED -#define NRFX_SPI_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_SPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_SPI_CONFIG_LOG_LEVEL -#define NRFX_SPI_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SPI_CONFIG_INFO_COLOR -#define NRFX_SPI_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SPI_CONFIG_DEBUG_COLOR -#define NRFX_SPI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator -//========================================================== -#ifndef NRFX_SWI_ENABLED -#define NRFX_SWI_ENABLED 0 -#endif -// NRFX_EGU_ENABLED - Enable EGU support - - -#ifndef NRFX_EGU_ENABLED -#define NRFX_EGU_ENABLED 0 -#endif - -// NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver - - -#ifndef NRFX_SWI0_DISABLED -#define NRFX_SWI0_DISABLED 0 -#endif - -// NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver - - -#ifndef NRFX_SWI1_DISABLED -#define NRFX_SWI1_DISABLED 0 -#endif - -// NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver - - -#ifndef NRFX_SWI2_DISABLED -#define NRFX_SWI2_DISABLED 0 -#endif - -// NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver - - -#ifndef NRFX_SWI3_DISABLED -#define NRFX_SWI3_DISABLED 0 -#endif - -// NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver - - -#ifndef NRFX_SWI4_DISABLED -#define NRFX_SWI4_DISABLED 0 -#endif - -// NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver - - -#ifndef NRFX_SWI5_DISABLED -#define NRFX_SWI5_DISABLED 0 -#endif - -// NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_SWI_CONFIG_LOG_ENABLED -#define NRFX_SWI_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_SWI_CONFIG_LOG_LEVEL -#define NRFX_SWI_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SWI_CONFIG_INFO_COLOR -#define NRFX_SWI_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR -#define NRFX_SWI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver -//========================================================== -#ifndef NRFX_TIMER_ENABLED -#define NRFX_TIMER_ENABLED 0 -#endif -// NRFX_TIMER0_ENABLED - Enable TIMER0 instance - - -#ifndef NRFX_TIMER0_ENABLED -#define NRFX_TIMER0_ENABLED 0 -#endif - -// NRFX_TIMER1_ENABLED - Enable TIMER1 instance - - -#ifndef NRFX_TIMER1_ENABLED -#define NRFX_TIMER1_ENABLED 0 -#endif - -// NRFX_TIMER2_ENABLED - Enable TIMER2 instance - - -#ifndef NRFX_TIMER2_ENABLED -#define NRFX_TIMER2_ENABLED 0 -#endif - -// NRFX_TIMER3_ENABLED - Enable TIMER3 instance - - -#ifndef NRFX_TIMER3_ENABLED -#define NRFX_TIMER3_ENABLED 0 -#endif - -// NRFX_TIMER4_ENABLED - Enable TIMER4 instance - - -#ifndef NRFX_TIMER4_ENABLED -#define NRFX_TIMER4_ENABLED 0 -#endif - -// NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz -// <8=> 62.5 kHz -// <9=> 31.25 kHz - -#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY -#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0 -#endif - -// NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation - -// <0=> Timer -// <1=> Counter - -#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE -#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0 -#endif - -// NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width - -// <0=> 16 bit -// <1=> 8 bit -// <2=> 24 bit -// <3=> 32 bit - -#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH -#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 -#endif - -// NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED -#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL -#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TIMER_CONFIG_INFO_COLOR -#define NRFX_TIMER_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR -#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver -//========================================================== -#ifndef NRFX_TWIM_ENABLED -#define NRFX_TWIM_ENABLED 0 -#endif -// NRFX_TWIM0_ENABLED - Enable TWIM0 instance - - -#ifndef NRFX_TWIM0_ENABLED -#define NRFX_TWIM0_ENABLED 0 -#endif - -// NRFX_TWIM1_ENABLED - Enable TWIM1 instance - - -#ifndef NRFX_TWIM1_ENABLED -#define NRFX_TWIM1_ENABLED 0 -#endif - -// NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency - -// <26738688=> 100k -// <67108864=> 250k -// <104857600=> 400k - -#ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY -#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688 -#endif - -// NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit - - -#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 -#endif - -// NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED -#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL -#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TWIM_CONFIG_INFO_COLOR -#define NRFX_TWIM_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR -#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver -//========================================================== -#ifndef NRFX_TWIS_ENABLED -#define NRFX_TWIS_ENABLED 0 -#endif -// NRFX_TWIS0_ENABLED - Enable TWIS0 instance - - -#ifndef NRFX_TWIS0_ENABLED -#define NRFX_TWIS0_ENABLED 0 -#endif - -// NRFX_TWIS1_ENABLED - Enable TWIS1 instance - - -#ifndef NRFX_TWIS1_ENABLED -#define NRFX_TWIS1_ENABLED 0 -#endif - -// NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once - - -// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. - -#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY -#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 -#endif - -// NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode - - -// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. - -#ifndef NRFX_TWIS_NO_SYNC_MODE -#define NRFX_TWIS_NO_SYNC_MODE 0 -#endif - -// NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 -#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 -#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0 -#endif - -// NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 -#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 -#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0 -#endif - -// NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up - -#ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL -#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0 -#endif - -// NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up - -#ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL -#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0 -#endif - -// NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED -#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL -#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TWIS_CONFIG_INFO_COLOR -#define NRFX_TWIS_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR -#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver -//========================================================== -#ifndef NRFX_TWI_ENABLED -#define NRFX_TWI_ENABLED 0 -#endif -// NRFX_TWI0_ENABLED - Enable TWI0 instance - - -#ifndef NRFX_TWI0_ENABLED -#define NRFX_TWI0_ENABLED 0 -#endif - -// NRFX_TWI1_ENABLED - Enable TWI1 instance - - -#ifndef NRFX_TWI1_ENABLED -#define NRFX_TWI1_ENABLED 0 -#endif - -// NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency - -// <26738688=> 100k -// <67108864=> 250k -// <104857600=> 400k - -#ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY -#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688 -#endif - -// NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit - - -#ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 -#endif - -// NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_TWI_CONFIG_LOG_ENABLED -#define NRFX_TWI_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_TWI_CONFIG_LOG_LEVEL -#define NRFX_TWI_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TWI_CONFIG_INFO_COLOR -#define NRFX_TWI_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_TWI_CONFIG_DEBUG_COLOR -#define NRFX_TWI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver -//========================================================== -#ifndef NRFX_UARTE_ENABLED -#define NRFX_UARTE_ENABLED 0 -#endif -// NRFX_UARTE0_ENABLED - Enable UARTE0 instance -#ifndef NRFX_UARTE0_ENABLED -#define NRFX_UARTE0_ENABLED 0 -#endif - -// NRFX_UARTE1_ENABLED - Enable UARTE1 instance -#ifndef NRFX_UARTE1_ENABLED -#define NRFX_UARTE1_ENABLED 0 -#endif - -// NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC -#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 -#endif - -// NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity - -// <0=> Excluded -// <14=> Included - -#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY -#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 -#endif - -// NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <8388608=> 31250 baud -// <10289152=> 38400 baud -// <15007744=> 56000 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud - -#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE -#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 -#endif - -// NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED -#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL -#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_UARTE_CONFIG_INFO_COLOR -#define NRFX_UARTE_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR -#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver -//========================================================== -#ifndef NRFX_UART_ENABLED -#define NRFX_UART_ENABLED 0 -#endif -// NRFX_UART0_ENABLED - Enable UART0 instance -#ifndef NRFX_UART0_ENABLED -#define NRFX_UART0_ENABLED 0 -#endif - -// NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC -#define NRFX_UART_DEFAULT_CONFIG_HWFC 0 -#endif - -// NRFX_UART_DEFAULT_CONFIG_PARITY - Parity - -// <0=> Excluded -// <14=> Included - -#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY -#define NRFX_UART_DEFAULT_CONFIG_PARITY 0 -#endif - -// NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3866624=> 14400 baud -// <5152768=> 19200 baud -// <7729152=> 28800 baud -// <8388608=> 31250 baud -// <10309632=> 38400 baud -// <15007744=> 56000 baud -// <15462400=> 57600 baud -// <20615168=> 76800 baud -// <30924800=> 115200 baud -// <61845504=> 230400 baud -// <67108864=> 250000 baud -// <123695104=> 460800 baud -// <247386112=> 921600 baud -// <268435456=> 1000000 baud - -#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE -#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 -#endif - -// NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_UART_CONFIG_LOG_ENABLED -#define NRFX_UART_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_UART_CONFIG_LOG_LEVEL -#define NRFX_UART_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_UART_CONFIG_INFO_COLOR -#define NRFX_UART_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_UART_CONFIG_DEBUG_COLOR -#define NRFX_UART_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver -//========================================================== -#ifndef NRFX_WDT_ENABLED -#define NRFX_WDT_ENABLED 0 -#endif -// NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode - -// <1=> Run in SLEEP, Pause in HALT -// <8=> Pause in SLEEP, Run in HALT -// <9=> Run in SLEEP and HALT -// <0=> Pause in SLEEP and HALT - -#ifndef NRFX_WDT_CONFIG_BEHAVIOUR -#define NRFX_WDT_CONFIG_BEHAVIOUR 1 -#endif - -// NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> - - -#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE -#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 -#endif - -// NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority - -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY -#define NRFX_WDT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRFX_WDT_CONFIG_LOG_ENABLED -#define NRFX_WDT_CONFIG_LOG_ENABLED 0 -#endif -// NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRFX_WDT_CONFIG_LOG_LEVEL -#define NRFX_WDT_CONFIG_LOG_LEVEL 3 -#endif - -// NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_WDT_CONFIG_INFO_COLOR -#define NRFX_WDT_CONFIG_INFO_COLOR 0 -#endif - -// NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR -#define NRFX_WDT_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer -//========================================================== -#ifndef PDM_ENABLED -#define PDM_ENABLED 0 -#endif -// PDM_CONFIG_MODE - Mode - -// <0=> Stereo -// <1=> Mono - -#ifndef PDM_CONFIG_MODE -#define PDM_CONFIG_MODE 1 -#endif - -// PDM_CONFIG_EDGE - Edge - -// <0=> Left falling -// <1=> Left rising - -#ifndef PDM_CONFIG_EDGE -#define PDM_CONFIG_EDGE 0 -#endif - -// PDM_CONFIG_CLOCK_FREQ - Clock frequency - -// <134217728=> 1000k -// <138412032=> 1032k (default) -// <142606336=> 1067k - -#ifndef PDM_CONFIG_CLOCK_FREQ -#define PDM_CONFIG_CLOCK_FREQ 138412032 -#endif - -// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef PDM_CONFIG_IRQ_PRIORITY -#define PDM_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer -//========================================================== -#ifndef POWER_ENABLED -#define POWER_ENABLED 1 -#endif -// POWER_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef POWER_CONFIG_IRQ_PRIORITY -#define POWER_CONFIG_IRQ_PRIORITY 7 -#endif - -// POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator - - -// This settings means only that components for DCDC regulator are installed and it can be enabled. - -#ifndef POWER_CONFIG_DEFAULT_DCDCEN -#define POWER_CONFIG_DEFAULT_DCDCEN 0 -#endif - -// POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator - - -// This settings means only that components for DCDC regulator are installed and it can be enabled. - -#ifndef POWER_CONFIG_DEFAULT_DCDCENHV -#define POWER_CONFIG_DEFAULT_DCDCENHV 0 -#endif - -// - -// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - legacy layer - - -#ifndef PPI_ENABLED -#define PPI_ENABLED 0 -#endif - -// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer -//========================================================== -#ifndef PWM_ENABLED -#define PWM_ENABLED 0 -#endif -// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN -#define PWM_DEFAULT_CONFIG_OUT0_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN -#define PWM_DEFAULT_CONFIG_OUT1_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN -#define PWM_DEFAULT_CONFIG_OUT2_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN -#define PWM_DEFAULT_CONFIG_OUT3_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz - -#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK -#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4 -#endif - -// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode - -// <0=> Up -// <1=> Up and Down - -#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE -#define PWM_DEFAULT_CONFIG_COUNT_MODE 0 -#endif - -// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value -#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE -#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000 -#endif - -// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode - -// <0=> Common -// <1=> Grouped -// <2=> Individual -// <3=> Waveform - -#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE -#define PWM_DEFAULT_CONFIG_LOAD_MODE 0 -#endif - -// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode - -// <0=> Auto -// <1=> Triggered - -#ifndef PWM_DEFAULT_CONFIG_STEP_MODE -#define PWM_DEFAULT_CONFIG_STEP_MODE 0 -#endif - -// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY -#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// PWM0_ENABLED - Enable PWM0 instance - - -#ifndef PWM0_ENABLED -#define PWM0_ENABLED 0 -#endif - -// PWM1_ENABLED - Enable PWM1 instance - - -#ifndef PWM1_ENABLED -#define PWM1_ENABLED 0 -#endif - -// PWM2_ENABLED - Enable PWM2 instance - - -#ifndef PWM2_ENABLED -#define PWM2_ENABLED 0 -#endif - -// PWM3_ENABLED - Enable PWM3 instance - - -#ifndef PWM3_ENABLED -#define PWM3_ENABLED 0 -#endif - -// - -// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer -//========================================================== -#ifndef QDEC_ENABLED -#define QDEC_ENABLED 0 -#endif -// QDEC_CONFIG_REPORTPER - Report period - -// <0=> 10 Samples -// <1=> 40 Samples -// <2=> 80 Samples -// <3=> 120 Samples -// <4=> 160 Samples -// <5=> 200 Samples -// <6=> 240 Samples -// <7=> 280 Samples - -#ifndef QDEC_CONFIG_REPORTPER -#define QDEC_CONFIG_REPORTPER 0 -#endif - -// QDEC_CONFIG_SAMPLEPER - Sample period - -// <0=> 128 us -// <1=> 256 us -// <2=> 512 us -// <3=> 1024 us -// <4=> 2048 us -// <5=> 4096 us -// <6=> 8192 us -// <7=> 16384 us - -#ifndef QDEC_CONFIG_SAMPLEPER -#define QDEC_CONFIG_SAMPLEPER 7 -#endif - -// QDEC_CONFIG_PIO_A - A pin <0-31> - - -#ifndef QDEC_CONFIG_PIO_A -#define QDEC_CONFIG_PIO_A 31 -#endif - -// QDEC_CONFIG_PIO_B - B pin <0-31> - - -#ifndef QDEC_CONFIG_PIO_B -#define QDEC_CONFIG_PIO_B 31 -#endif - -// QDEC_CONFIG_PIO_LED - LED pin <0-31> - - -#ifndef QDEC_CONFIG_PIO_LED -#define QDEC_CONFIG_PIO_LED 31 -#endif - -// QDEC_CONFIG_LEDPRE - LED pre -#ifndef QDEC_CONFIG_LEDPRE -#define QDEC_CONFIG_LEDPRE 511 -#endif - -// QDEC_CONFIG_LEDPOL - LED polarity - -// <0=> Active low -// <1=> Active high - -#ifndef QDEC_CONFIG_LEDPOL -#define QDEC_CONFIG_LEDPOL 1 -#endif - -// QDEC_CONFIG_DBFEN - Debouncing enable - - -#ifndef QDEC_CONFIG_DBFEN -#define QDEC_CONFIG_DBFEN 0 -#endif - -// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable - - -#ifndef QDEC_CONFIG_SAMPLE_INTEN -#define QDEC_CONFIG_SAMPLE_INTEN 0 -#endif - -// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef QDEC_CONFIG_IRQ_PRIORITY -#define QDEC_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer -//========================================================== -#ifndef QSPI_ENABLED -#define QSPI_ENABLED 0 -#endif -// QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> - - -#ifndef QSPI_CONFIG_SCK_DELAY -#define QSPI_CONFIG_SCK_DELAY 1 -#endif - -// QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. -#ifndef QSPI_CONFIG_XIP_OFFSET -#define QSPI_CONFIG_XIP_OFFSET 0 -#endif - -// QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. - -// <0=> FastRead -// <1=> Read2O -// <2=> Read2IO -// <3=> Read4O -// <4=> Read4IO - -#ifndef QSPI_CONFIG_READOC -#define QSPI_CONFIG_READOC 0 -#endif - -// QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. - -// <0=> PP -// <1=> PP2O -// <2=> PP4O -// <3=> PP4IO - -#ifndef QSPI_CONFIG_WRITEOC -#define QSPI_CONFIG_WRITEOC 0 -#endif - -// QSPI_CONFIG_ADDRMODE - Addressing mode. - -// <0=> 24bit -// <1=> 32bit - -#ifndef QSPI_CONFIG_ADDRMODE -#define QSPI_CONFIG_ADDRMODE 0 -#endif - -// QSPI_CONFIG_MODE - SPI mode. - -// <0=> Mode 0 -// <1=> Mode 1 - -#ifndef QSPI_CONFIG_MODE -#define QSPI_CONFIG_MODE 0 -#endif - -// QSPI_CONFIG_FREQUENCY - Frequency divider. - -// <0=> 32MHz/1 -// <1=> 32MHz/2 -// <2=> 32MHz/3 -// <3=> 32MHz/4 -// <4=> 32MHz/5 -// <5=> 32MHz/6 -// <6=> 32MHz/7 -// <7=> 32MHz/8 -// <8=> 32MHz/9 -// <9=> 32MHz/10 -// <10=> 32MHz/11 -// <11=> 32MHz/12 -// <12=> 32MHz/13 -// <13=> 32MHz/14 -// <14=> 32MHz/15 -// <15=> 32MHz/16 - -#ifndef QSPI_CONFIG_FREQUENCY -#define QSPI_CONFIG_FREQUENCY 15 -#endif - -// QSPI_PIN_SCK - SCK pin value. -#ifndef QSPI_PIN_SCK -#define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_CSN - CSN pin value. -#ifndef QSPI_PIN_CSN -#define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO0 - IO0 pin value. -#ifndef QSPI_PIN_IO0 -#define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO1 - IO1 pin value. -#ifndef QSPI_PIN_IO1 -#define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO2 - IO2 pin value. -#ifndef QSPI_PIN_IO2 -#define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO3 - IO3 pin value. -#ifndef QSPI_PIN_IO3 -#define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef QSPI_CONFIG_IRQ_PRIORITY -#define QSPI_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer -//========================================================== -#ifndef RNG_ENABLED -#define RNG_ENABLED 0 -#endif -// RNG_CONFIG_ERROR_CORRECTION - Error correction - - -#ifndef RNG_CONFIG_ERROR_CORRECTION -#define RNG_CONFIG_ERROR_CORRECTION 1 -#endif - -// RNG_CONFIG_POOL_SIZE - Pool size -#ifndef RNG_CONFIG_POOL_SIZE -#define RNG_CONFIG_POOL_SIZE 64 -#endif - -// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef RNG_CONFIG_IRQ_PRIORITY -#define RNG_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer -//========================================================== -#ifndef RTC_ENABLED -#define RTC_ENABLED 1 -#endif -// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> - - -#ifndef RTC_DEFAULT_CONFIG_FREQUENCY -#define RTC_DEFAULT_CONFIG_FREQUENCY 32768 -#endif - -// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering - - -#ifndef RTC_DEFAULT_CONFIG_RELIABLE -#define RTC_DEFAULT_CONFIG_RELIABLE 0 -#endif - -// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY -#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// RTC0_ENABLED - Enable RTC0 instance - - -#ifndef RTC0_ENABLED -#define RTC0_ENABLED 1 -#endif - -// RTC1_ENABLED - Enable RTC1 instance - - -#ifndef RTC1_ENABLED -#define RTC1_ENABLED 0 -#endif - -// RTC2_ENABLED - Enable RTC2 instance - - -#ifndef RTC2_ENABLED -#define RTC2_ENABLED 0 -#endif - -// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt -#ifndef NRF_MAXIMUM_LATENCY_US -#define NRF_MAXIMUM_LATENCY_US 2000 -#endif - -// - -// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer -//========================================================== -#ifndef SAADC_ENABLED -#define SAADC_ENABLED 0 -#endif -// SAADC_CONFIG_RESOLUTION - Resolution - -// <0=> 8 bit -// <1=> 10 bit -// <2=> 12 bit -// <3=> 14 bit - -#ifndef SAADC_CONFIG_RESOLUTION -#define SAADC_CONFIG_RESOLUTION 1 -#endif - -// SAADC_CONFIG_OVERSAMPLE - Sample period - -// <0=> Disabled -// <1=> 2x -// <2=> 4x -// <3=> 8x -// <4=> 16x -// <5=> 32x -// <6=> 64x -// <7=> 128x -// <8=> 256x - -#ifndef SAADC_CONFIG_OVERSAMPLE -#define SAADC_CONFIG_OVERSAMPLE 0 -#endif - -// SAADC_CONFIG_LP_MODE - Enabling low power mode - - -#ifndef SAADC_CONFIG_LP_MODE -#define SAADC_CONFIG_LP_MODE 0 -#endif - -// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef SAADC_CONFIG_IRQ_PRIORITY -#define SAADC_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer -//========================================================== -#ifndef SPIS_ENABLED -#define SPIS_ENABLED 0 -#endif -// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// SPIS_DEFAULT_MODE - Mode - -// <0=> MODE_0 -// <1=> MODE_1 -// <2=> MODE_2 -// <3=> MODE_3 - -#ifndef SPIS_DEFAULT_MODE -#define SPIS_DEFAULT_MODE 0 -#endif - -// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order - -// <0=> MSB first -// <1=> LSB first - -#ifndef SPIS_DEFAULT_BIT_ORDER -#define SPIS_DEFAULT_BIT_ORDER 0 -#endif - -// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> - - -#ifndef SPIS_DEFAULT_DEF -#define SPIS_DEFAULT_DEF 255 -#endif - -// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> - - -#ifndef SPIS_DEFAULT_ORC -#define SPIS_DEFAULT_ORC 255 -#endif - -// SPIS0_ENABLED - Enable SPIS0 instance - - -#ifndef SPIS0_ENABLED -#define SPIS0_ENABLED 0 -#endif - -// SPIS1_ENABLED - Enable SPIS1 instance - - -#ifndef SPIS1_ENABLED -#define SPIS1_ENABLED 0 -#endif - -// SPIS2_ENABLED - Enable SPIS2 instance - - -#ifndef SPIS2_ENABLED -#define SPIS2_ENABLED 0 -#endif - -// - -// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer -//========================================================== -#ifndef SPI_ENABLED -#define SPI_ENABLED 0 -#endif -// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY -#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRF_SPI_DRV_MISO_PULLUP_CFG - MISO PIN pull-up configuration. - -// <0=> NRF_GPIO_PIN_NOPULL -// <1=> NRF_GPIO_PIN_PULLDOWN -// <3=> NRF_GPIO_PIN_PULLUP - -#ifndef NRF_SPI_DRV_MISO_PULLUP_CFG -#define NRF_SPI_DRV_MISO_PULLUP_CFG 1 -#endif - -// SPI0_ENABLED - Enable SPI0 instance -//========================================================== -#ifndef SPI0_ENABLED -#define SPI0_ENABLED 0 -#endif -// SPI0_USE_EASY_DMA - Use EasyDMA - - -#ifndef SPI0_USE_EASY_DMA -#define SPI0_USE_EASY_DMA 1 -#endif - -// - -// SPI1_ENABLED - Enable SPI1 instance -//========================================================== -#ifndef SPI1_ENABLED -#define SPI1_ENABLED 0 -#endif -// SPI1_USE_EASY_DMA - Use EasyDMA - - -#ifndef SPI1_USE_EASY_DMA -#define SPI1_USE_EASY_DMA 1 -#endif - -// - -// SPI2_ENABLED - Enable SPI2 instance -//========================================================== -#ifndef SPI2_ENABLED -#define SPI2_ENABLED 0 -#endif -// SPI2_USE_EASY_DMA - Use EasyDMA - - -#ifndef SPI2_USE_EASY_DMA -#define SPI2_USE_EASY_DMA 1 -#endif - -// - -// - -// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer -//========================================================== -#ifndef TIMER_ENABLED -#define TIMER_ENABLED 0 -#endif -// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz -// <8=> 62.5 kHz -// <9=> 31.25 kHz - -#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY -#define TIMER_DEFAULT_CONFIG_FREQUENCY 0 -#endif - -// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation - -// <0=> Timer -// <1=> Counter - -#ifndef TIMER_DEFAULT_CONFIG_MODE -#define TIMER_DEFAULT_CONFIG_MODE 0 -#endif - -// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width - -// <0=> 16 bit -// <1=> 8 bit -// <2=> 24 bit -// <3=> 32 bit - -#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH -#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 -#endif - -// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY -#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// TIMER0_ENABLED - Enable TIMER0 instance - - -#ifndef TIMER0_ENABLED -#define TIMER0_ENABLED 0 -#endif - -// TIMER1_ENABLED - Enable TIMER1 instance - - -#ifndef TIMER1_ENABLED -#define TIMER1_ENABLED 0 -#endif - -// TIMER2_ENABLED - Enable TIMER2 instance - - -#ifndef TIMER2_ENABLED -#define TIMER2_ENABLED 0 -#endif - -// TIMER3_ENABLED - Enable TIMER3 instance - - -#ifndef TIMER3_ENABLED -#define TIMER3_ENABLED 0 -#endif - -// TIMER4_ENABLED - Enable TIMER4 instance - - -#ifndef TIMER4_ENABLED -#define TIMER4_ENABLED 0 -#endif - -// - -// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer -//========================================================== -#ifndef TWIS_ENABLED -#define TWIS_ENABLED 0 -#endif -// TWIS0_ENABLED - Enable TWIS0 instance - - -#ifndef TWIS0_ENABLED -#define TWIS0_ENABLED 0 -#endif - -// TWIS1_ENABLED - Enable TWIS1 instance - - -#ifndef TWIS1_ENABLED -#define TWIS1_ENABLED 0 -#endif - -// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once - - -// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. - -#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY -#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 -#endif - -// TWIS_NO_SYNC_MODE - Remove support for synchronous mode - - -// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. - -#ifndef TWIS_NO_SYNC_MODE -#define TWIS_NO_SYNC_MODE 0 -#endif - -// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 -#ifndef TWIS_DEFAULT_CONFIG_ADDR0 -#define TWIS_DEFAULT_CONFIG_ADDR0 0 -#endif - -// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 -#ifndef TWIS_DEFAULT_CONFIG_ADDR1 -#define TWIS_DEFAULT_CONFIG_ADDR1 0 -#endif - -// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up - -#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL -#define TWIS_DEFAULT_CONFIG_SCL_PULL 0 -#endif - -// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up - -#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL -#define TWIS_DEFAULT_CONFIG_SDA_PULL 0 -#endif - -// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer -//========================================================== -#ifndef TWI_ENABLED -#define TWI_ENABLED 0 -#endif -// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency - -// <26738688=> 100k -// <67108864=> 250k -// <104857600=> 400k - -#ifndef TWI_DEFAULT_CONFIG_FREQUENCY -#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 -#endif - -// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init - - -#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT -#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 -#endif - -// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit - - -#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 -#endif - -// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY -#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// TWI0_ENABLED - Enable TWI0 instance -//========================================================== -#ifndef TWI0_ENABLED -#define TWI0_ENABLED 0 -#endif -// TWI0_USE_EASY_DMA - Use EasyDMA (if present) - - -#ifndef TWI0_USE_EASY_DMA -#define TWI0_USE_EASY_DMA 0 -#endif - -// - -// TWI1_ENABLED - Enable TWI1 instance -//========================================================== -#ifndef TWI1_ENABLED -#define TWI1_ENABLED 0 -#endif -// TWI1_USE_EASY_DMA - Use EasyDMA (if present) - - -#ifndef TWI1_USE_EASY_DMA -#define TWI1_USE_EASY_DMA 0 -#endif - -// - -// - -// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer -//========================================================== -#ifndef UART_ENABLED -#define UART_ENABLED 0 -#endif -// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef UART_DEFAULT_CONFIG_HWFC -#define UART_DEFAULT_CONFIG_HWFC 0 -#endif - -// UART_DEFAULT_CONFIG_PARITY - Parity - -// <0=> Excluded -// <14=> Included - -#ifndef UART_DEFAULT_CONFIG_PARITY -#define UART_DEFAULT_CONFIG_PARITY 0 -#endif - -// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud - -#ifndef UART_DEFAULT_CONFIG_BAUDRATE -#define UART_DEFAULT_CONFIG_BAUDRATE 30801920 -#endif - -// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY -#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA - - -#ifndef UART_EASY_DMA_SUPPORT -#define UART_EASY_DMA_SUPPORT 1 -#endif - -// UART_LEGACY_SUPPORT - Driver supporting Legacy mode - - -#ifndef UART_LEGACY_SUPPORT -#define UART_LEGACY_SUPPORT 1 -#endif - -// UART0_ENABLED - Enable UART0 instance -//========================================================== -#ifndef UART0_ENABLED -#define UART0_ENABLED 0 -#endif -// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA - - -#ifndef UART0_CONFIG_USE_EASY_DMA -#define UART0_CONFIG_USE_EASY_DMA 1 -#endif - -// - -// UART1_ENABLED - Enable UART1 instance -//========================================================== -#ifndef UART1_ENABLED -#define UART1_ENABLED 0 -#endif -// - -// - -// USBD_ENABLED - nrf_drv_usbd - USB driver -//========================================================== -#ifndef USBD_ENABLED -#define USBD_ENABLED 1 -#endif -// USBD_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef USBD_CONFIG_IRQ_PRIORITY -#define USBD_CONFIG_IRQ_PRIORITY 7 -#endif - -// USBD_CONFIG_DMASCHEDULER_MODE - USBD SMA scheduler working scheme - -// <0=> Prioritized access -// <1=> Round Robin - -#ifndef USBD_CONFIG_DMASCHEDULER_MODE -#define USBD_CONFIG_DMASCHEDULER_MODE 0 -#endif - -// - -// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver - legacy layer -//========================================================== -#ifndef WDT_ENABLED -#define WDT_ENABLED 0 -#endif -// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode - -// <1=> Run in SLEEP, Pause in HALT -// <8=> Pause in SLEEP, Run in HALT -// <9=> Run in SLEEP and HALT -// <0=> Pause in SLEEP and HALT - -#ifndef WDT_CONFIG_BEHAVIOUR -#define WDT_CONFIG_BEHAVIOUR 1 -#endif - -// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> - - -#ifndef WDT_CONFIG_RELOAD_VALUE -#define WDT_CONFIG_RELOAD_VALUE 2000 -#endif - -// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef WDT_CONFIG_IRQ_PRIORITY -#define WDT_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// -//========================================================== - -// nRF_Drivers_External - -//========================================================== -// NRF_TWI_SENSOR_ENABLED - nrf_twi_sensor - nRF TWI Sensor module - - -#ifndef NRF_TWI_SENSOR_ENABLED -#define NRF_TWI_SENSOR_ENABLED 0 -#endif - -// -//========================================================== - -// nRF_Libraries - -//========================================================== -// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher - - -#ifndef APP_GPIOTE_ENABLED -#define APP_GPIOTE_ENABLED 0 -#endif - -// APP_PWM_ENABLED - app_pwm - PWM functionality - - -#ifndef APP_PWM_ENABLED -#define APP_PWM_ENABLED 0 -#endif - -// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler -//========================================================== -#ifndef APP_SCHEDULER_ENABLED -#define APP_SCHEDULER_ENABLED 0 -#endif -// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature - - -#ifndef APP_SCHEDULER_WITH_PAUSE -#define APP_SCHEDULER_WITH_PAUSE 0 -#endif - -// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling - - -#ifndef APP_SCHEDULER_WITH_PROFILER -#define APP_SCHEDULER_WITH_PROFILER 0 -#endif - -// - -// APP_SDCARD_ENABLED - app_sdcard - SD/MMC card support using SPI -//========================================================== -#ifndef APP_SDCARD_ENABLED -#define APP_SDCARD_ENABLED 0 -#endif -// APP_SDCARD_SPI_INSTANCE - SPI instance used - -// <0=> 0 -// <1=> 1 -// <2=> 2 - -#ifndef APP_SDCARD_SPI_INSTANCE -#define APP_SDCARD_SPI_INSTANCE 0 -#endif - -// APP_SDCARD_FREQ_INIT - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef APP_SDCARD_FREQ_INIT -#define APP_SDCARD_FREQ_INIT 67108864 -#endif - -// APP_SDCARD_FREQ_DATA - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef APP_SDCARD_FREQ_DATA -#define APP_SDCARD_FREQ_DATA 1073741824 -#endif - -// - -// APP_TIMER_ENABLED - app_timer - Application timer functionality -//========================================================== -#ifndef APP_TIMER_ENABLED -#define APP_TIMER_ENABLED 1 -#endif -// APP_TIMER_CONFIG_RTC_FREQUENCY - Configure RTC prescaler. - -// <0=> 32768 Hz -// <1=> 16384 Hz -// <3=> 8192 Hz -// <7=> 4096 Hz -// <15=> 2048 Hz -// <31=> 1024 Hz - -#ifndef APP_TIMER_CONFIG_RTC_FREQUENCY -#define APP_TIMER_CONFIG_RTC_FREQUENCY 0 -#endif - -// APP_TIMER_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef APP_TIMER_CONFIG_IRQ_PRIORITY -#define APP_TIMER_CONFIG_IRQ_PRIORITY 7 -#endif - -// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. -// Size of the queue depends on how many timers are used -// in the system, how often timers are started and overall -// system latency. If queue size is too small app_timer calls -// will fail. - -#ifndef APP_TIMER_CONFIG_OP_QUEUE_SIZE -#define APP_TIMER_CONFIG_OP_QUEUE_SIZE 10 -#endif - -// APP_TIMER_CONFIG_USE_SCHEDULER - Enable scheduling app_timer events to app_scheduler - - -#ifndef APP_TIMER_CONFIG_USE_SCHEDULER -#define APP_TIMER_CONFIG_USE_SCHEDULER 0 -#endif - -// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on - - -// If option is enabled RTC is kept running even if there is no active timers. -// This option can be used when app_timer is used for timestamping. - -#ifndef APP_TIMER_KEEPS_RTC_ACTIVE -#define APP_TIMER_KEEPS_RTC_ACTIVE 0 -#endif - -// App Timer Legacy configuration - Legacy configuration. - -//========================================================== -// APP_TIMER_WITH_PROFILER - Enable app_timer profiling - - -#ifndef APP_TIMER_WITH_PROFILER -#define APP_TIMER_WITH_PROFILER 0 -#endif - -// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. - - -#ifndef APP_TIMER_CONFIG_SWI_NUMBER -#define APP_TIMER_CONFIG_SWI_NUMBER 0 -#endif - -// -//========================================================== - -// - -// APP_USBD_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class - - -#ifndef APP_USBD_AUDIO_ENABLED -#define APP_USBD_AUDIO_ENABLED 0 -#endif - -// APP_USBD_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class - - -#ifndef APP_USBD_CDC_ACM_ENABLED -#define APP_USBD_CDC_ACM_ENABLED 0 -#endif - -// APP_USBD_ENABLED - app_usbd - USB Device library -//========================================================== -#ifndef APP_USBD_ENABLED -#define APP_USBD_ENABLED 1 -#endif -// APP_USBD_VID - Vendor ID <0x0000-0xFFFF> - - -// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ - -#ifndef APP_USBD_VID -#define APP_USBD_VID 0 -#endif - -// APP_USBD_PID - Product ID <0x0000-0xFFFF> - - -// Selected Product ID - -#ifndef APP_USBD_PID -#define APP_USBD_PID 0 -#endif - -// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99> - - -// Device version, will be converted automatically to BCD notation. Use just decimal values. - -#ifndef APP_USBD_DEVICE_VER_MAJOR -#define APP_USBD_DEVICE_VER_MAJOR 1 -#endif - -// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99> - - -// Device version, will be converted automatically to BCD notation. Use just decimal values. - -#ifndef APP_USBD_DEVICE_VER_MINOR -#define APP_USBD_DEVICE_VER_MINOR 0 -#endif - -// APP_USBD_CONFIG_SELF_POWERED - Self powered - - -#ifndef APP_USBD_CONFIG_SELF_POWERED -#define APP_USBD_CONFIG_SELF_POWERED 1 -#endif - -// APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps <0-500> - - -#ifndef APP_USBD_CONFIG_MAX_POWER -#define APP_USBD_CONFIG_MAX_POWER 500 -#endif - -// APP_USBD_CONFIG_POWER_EVENTS_PROCESS - Process power events - - -// Enable processing power events in USB event handler. - -#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS -#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1 -#endif - -// APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue - -// This is the default configuration when all the events are placed into internal queue. -// Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts. -// Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context. -// Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable. -//========================================================== -#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE -#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1 -#endif -// APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of event queue <16-64> - - -// The size of the queue for the events that would be processed in the main loop. - -#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE -#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32 -#endif - -// APP_USBD_CONFIG_SOF_HANDLING_MODE - Change SOF events handling mode. - - -// Normal queue - SOF events are pushed normally into event queue. -// Compress queue - SOF events are counted and binded with other events or executed when queue is empty. -// This prevents queue from filling with SOF events. -// Interrupt - SOF events are processed in interrupt. -// <0=> Normal queue -// <1=> Compress queue -// <2=> Interrupt - -#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE -#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1 -#endif - -// - -// APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE - Provide a function that generates timestamps for logs based on the current SOF - - -// The function app_usbd_sof_timestamp_get will be implemented if the logger is enabled. -// Use it when initializing the logger. -// SOF processing will be always enabled when this configuration parameter is active. -// Notice that this option is configured outside of APP_USBD_CONFIG_LOG_ENABLED. -// This means that it will work even if the logging in this very module is disabled. - -#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE -#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0 -#endif - -// APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module -//========================================================== -#ifndef APP_USBD_CONFIG_LOG_ENABLED -#define APP_USBD_CONFIG_LOG_ENABLED 0 -#endif -// APP_USBD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_USBD_CONFIG_LOG_LEVEL -#define APP_USBD_CONFIG_LOG_LEVEL 3 -#endif - -// APP_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_CONFIG_INFO_COLOR -#define APP_USBD_CONFIG_INFO_COLOR 0 -#endif - -// APP_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_CONFIG_DEBUG_COLOR -#define APP_USBD_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// - -// APP_USBD_HID_ENABLED - app_usbd_hid - USB HID class - - -#ifndef APP_USBD_HID_ENABLED -#define APP_USBD_HID_ENABLED 1 -#endif - -// APP_USBD_HID_GENERIC_ENABLED - app_usbd_hid_generic - USB HID generic - - -#ifndef APP_USBD_HID_GENERIC_ENABLED -#define APP_USBD_HID_GENERIC_ENABLED 1 -#endif - -// APP_USBD_HID_KBD_ENABLED - app_usbd_hid_kbd - USB HID keyboard - - -#ifndef APP_USBD_HID_KBD_ENABLED -#define APP_USBD_HID_KBD_ENABLED 1 -#endif - -// APP_USBD_HID_MOUSE_ENABLED - app_usbd_hid_mouse - USB HID mouse - - -#ifndef APP_USBD_HID_MOUSE_ENABLED -#define APP_USBD_HID_MOUSE_ENABLED 1 -#endif - -// APP_USBD_MSC_ENABLED - app_usbd_msc - USB MSC class - - -#ifndef APP_USBD_MSC_ENABLED -#define APP_USBD_MSC_ENABLED 0 -#endif - -// CRC16_ENABLED - crc16 - CRC16 calculation routines - - -#ifndef CRC16_ENABLED -#define CRC16_ENABLED 0 -#endif - -// CRC32_ENABLED - crc32 - CRC32 calculation routines - - -#ifndef CRC32_ENABLED -#define CRC32_ENABLED 0 -#endif - -// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library - - -#ifndef ECC_ENABLED -#define ECC_ENABLED 0 -#endif - -// FDS_ENABLED - fds - Flash data storage module -//========================================================== -#ifndef FDS_ENABLED -#define FDS_ENABLED 0 -#endif -// Pages - Virtual page settings - -// Configure the number of virtual pages to use and their size. -//========================================================== -// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. -// One of the virtual pages is reserved by the system for garbage collection. -// Therefore, the minimum is two virtual pages: one page to store data and one page to be used by the system for garbage collection. -// The total amount of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES * @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes. - -#ifndef FDS_VIRTUAL_PAGES -#define FDS_VIRTUAL_PAGES 3 -#endif - -// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual flash page. - - -// Expressed in number of 4-byte words. -// By default, a virtual page is the same size as a physical page. -// The size of a virtual page must be a multiple of the size of a physical page. -// <1024=> 1024 -// <2048=> 2048 - -#ifndef FDS_VIRTUAL_PAGE_SIZE -#define FDS_VIRTUAL_PAGE_SIZE 1024 -#endif - -// -//========================================================== - -// Backend - Backend configuration - -// Configure which nrf_fstorage backend is used by FDS to write to flash. -//========================================================== -// FDS_BACKEND - FDS flash backend. - - -// NRF_FSTORAGE_SD uses the nrf_fstorage_sd backend implementation using the SoftDevice API. Use this if you have a SoftDevice present. -// NRF_FSTORAGE_NVMC uses the nrf_fstorage_nvmc implementation. Use this setting if you don't use the SoftDevice. -// <1=> NRF_FSTORAGE_NVMC -// <2=> NRF_FSTORAGE_SD - -#ifndef FDS_BACKEND -#define FDS_BACKEND 2 -#endif - -// -//========================================================== - -// Queue - Queue settings - -//========================================================== -// FDS_OP_QUEUE_SIZE - Size of the internal queue. -// Increase this value if you frequently get synchronous FDS_ERR_NO_SPACE_IN_QUEUES errors. - -#ifndef FDS_OP_QUEUE_SIZE -#define FDS_OP_QUEUE_SIZE 4 -#endif - -// -//========================================================== - -// CRC - CRC functionality - -//========================================================== -// FDS_CRC_CHECK_ON_READ - Enable CRC checks. - -// Save a record's CRC when it is written to flash and check it when the record is opened. -// Records with an incorrect CRC can still be 'seen' by the user using FDS functions, but they cannot be opened. -// Additionally, they will not be garbage collected until they are deleted. -//========================================================== -#ifndef FDS_CRC_CHECK_ON_READ -#define FDS_CRC_CHECK_ON_READ 0 -#endif -// FDS_CRC_CHECK_ON_WRITE - Perform a CRC check on newly written records. - - -// Perform a CRC check on newly written records. -// This setting can be used to make sure that the record data was not altered while being written to flash. -// <1=> Enabled -// <0=> Disabled - -#ifndef FDS_CRC_CHECK_ON_WRITE -#define FDS_CRC_CHECK_ON_WRITE 0 -#endif - -// - -// -//========================================================== - -// Users - Number of users - -//========================================================== -// FDS_MAX_USERS - Maximum number of callbacks that can be registered. -#ifndef FDS_MAX_USERS -#define FDS_MAX_USERS 4 -#endif - -// -//========================================================== - -// - -// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release -//========================================================== -#ifndef HARDFAULT_HANDLER_ENABLED -#define HARDFAULT_HANDLER_ENABLED 0 -#endif -// HARDFAULT_HANDLER_GDB_PSP_BACKTRACE - Bypass the GDB problem with multiple stack pointers backtrace - - -// There is a known bug in GDB which causes it to incorrectly backtrace the code -// when multiple stack pointers are used (main and process stack pointers). -// This option enables the fix for that problem and allows to see the proper backtrace info. -// It makes it possible to trace the code to the exact point where a HardFault appeared. -// This option requires additional commands and may temporarily switch MSP stack to store data on PSP space. -// This is an optional parameter - enable it while debugging. -// Before a HardFault handler exits, the stack will be reverted to its previous value. - -#ifndef HARDFAULT_HANDLER_GDB_PSP_BACKTRACE -#define HARDFAULT_HANDLER_GDB_PSP_BACKTRACE 1 -#endif - -// - -// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI -//========================================================== -#ifndef HCI_MEM_POOL_ENABLED -#define HCI_MEM_POOL_ENABLED 0 -#endif -// HCI_TX_BUF_SIZE - TX buffer size in bytes. -#ifndef HCI_TX_BUF_SIZE -#define HCI_TX_BUF_SIZE 600 -#endif - -// HCI_RX_BUF_SIZE - RX buffer size in bytes. -#ifndef HCI_RX_BUF_SIZE -#define HCI_RX_BUF_SIZE 600 -#endif - -// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. -#ifndef HCI_RX_BUF_QUEUE_SIZE -#define HCI_RX_BUF_QUEUE_SIZE 4 -#endif - -// - -// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI -//========================================================== -#ifndef HCI_SLIP_ENABLED -#define HCI_SLIP_ENABLED 0 -#endif -// HCI_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud - -#ifndef HCI_UART_BAUDRATE -#define HCI_UART_BAUDRATE 30801920 -#endif - -// HCI_UART_FLOW_CONTROL - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef HCI_UART_FLOW_CONTROL -#define HCI_UART_FLOW_CONTROL 0 -#endif - -// HCI_UART_RX_PIN - UART RX pin -#ifndef HCI_UART_RX_PIN -#define HCI_UART_RX_PIN 31 -#endif - -// HCI_UART_TX_PIN - UART TX pin -#ifndef HCI_UART_TX_PIN -#define HCI_UART_TX_PIN 31 -#endif - -// HCI_UART_RTS_PIN - UART RTS pin -#ifndef HCI_UART_RTS_PIN -#define HCI_UART_RTS_PIN 31 -#endif - -// HCI_UART_CTS_PIN - UART CTS pin -#ifndef HCI_UART_CTS_PIN -#define HCI_UART_CTS_PIN 31 -#endif - -// - -// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport -//========================================================== -#ifndef HCI_TRANSPORT_ENABLED -#define HCI_TRANSPORT_ENABLED 0 -#endif -// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. -#ifndef HCI_MAX_PACKET_SIZE_IN_BITS -#define HCI_MAX_PACKET_SIZE_IN_BITS 8000 -#endif - -// - -// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module - - -#ifndef LED_SOFTBLINK_ENABLED -#define LED_SOFTBLINK_ENABLED 0 -#endif - -// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module - - -#ifndef LOW_POWER_PWM_ENABLED -#define LOW_POWER_PWM_ENABLED 0 -#endif - -// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator -//========================================================== -#ifndef MEM_MANAGER_ENABLED -#define MEM_MANAGER_ENABLED 1 -#endif -// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> - - -#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT -#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1 -#endif - -// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. -// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE -#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32 -#endif - -// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> - - -#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT -#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. -// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE -#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256 -#endif - -// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> - - -#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT -#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. -// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE -#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256 -#endif - -// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> - - -#ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT -#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. -// Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE -#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320 -#endif - -// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> - - -#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT -#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. -// Size of each memory blocks identified as 'extra extra large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE -#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444 -#endif - -// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> - - -#ifndef MEMORY_MANAGER_XSMALL_BLOCK_COUNT -#define MEMORY_MANAGER_XSMALL_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. -// Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XSMALL_BLOCK_SIZE -#define MEMORY_MANAGER_XSMALL_BLOCK_SIZE 64 -#endif - -// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> - - -#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_COUNT -#define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. -// Size of each memory blocks identified as 'extra extra small' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_SIZE -#define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE 32 -#endif - -// MEM_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef MEM_MANAGER_CONFIG_LOG_ENABLED -#define MEM_MANAGER_CONFIG_LOG_ENABLED 0 -#endif -// MEM_MANAGER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef MEM_MANAGER_CONFIG_LOG_LEVEL -#define MEM_MANAGER_CONFIG_LOG_LEVEL 3 -#endif - -// MEM_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef MEM_MANAGER_CONFIG_INFO_COLOR -#define MEM_MANAGER_CONFIG_INFO_COLOR 0 -#endif - -// MEM_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef MEM_MANAGER_CONFIG_DEBUG_COLOR -#define MEM_MANAGER_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. - - -#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK -#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0 -#endif - -// - -// NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module -//========================================================== -#ifndef NRF_BALLOC_ENABLED -#define NRF_BALLOC_ENABLED 1 -#endif -// NRF_BALLOC_CONFIG_DEBUG_ENABLED - Enables debug mode in the module. -//========================================================== -#ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED -#define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0 -#endif -// NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> - - -#ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS -#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1 -#endif - -// NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> - - -#ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS -#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS 1 -#endif - -// NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED - Enables basic checks in this module. - - -#ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED -#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0 -#endif - -// NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED - Enables double memory free check in this module. - - -#ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED -#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0 -#endif - -// NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED - Enables free memory corruption check in this module. - - -#ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED -#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0 -#endif - -// NRF_BALLOC_CLI_CMDS - Enable CLI commands specific to the module - - -#ifndef NRF_BALLOC_CLI_CMDS -#define NRF_BALLOC_CLI_CMDS 0 -#endif - -// - -// - -// NRF_CSENSE_ENABLED - nrf_csense - Capacitive sensor module -//========================================================== -#ifndef NRF_CSENSE_ENABLED -#define NRF_CSENSE_ENABLED 0 -#endif -// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. -#ifndef NRF_CSENSE_PAD_HYSTERESIS -#define NRF_CSENSE_PAD_HYSTERESIS 15 -#endif - -// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. -#ifndef NRF_CSENSE_PAD_DEVIATION -#define NRF_CSENSE_PAD_DEVIATION 70 -#endif - -// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. -#ifndef NRF_CSENSE_MIN_PAD_VALUE -#define NRF_CSENSE_MIN_PAD_VALUE 20 -#endif - -// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. -#ifndef NRF_CSENSE_MAX_PADS_NUMBER -#define NRF_CSENSE_MAX_PADS_NUMBER 20 -#endif - -// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. -#ifndef NRF_CSENSE_MAX_VALUE -#define NRF_CSENSE_MAX_VALUE 1000 -#endif - -// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. -// This is used when capacitive sensor does not use COMP. - -#ifndef NRF_CSENSE_OUTPUT_PIN -#define NRF_CSENSE_OUTPUT_PIN 26 -#endif - -// - -// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor low-level module -//========================================================== -#ifndef NRF_DRV_CSENSE_ENABLED -#define NRF_DRV_CSENSE_ENABLED 0 -#endif -// USE_COMP - Use the comparator to implement the capacitive sensor driver. - -// Due to Anomaly 84, COMP I_SOURCE is not functional. It has too high a varation. -//========================================================== -#ifndef USE_COMP -#define USE_COMP 0 -#endif -// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). -#ifndef TIMER0_FOR_CSENSE -#define TIMER0_FOR_CSENSE 1 -#endif - -// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). -#ifndef TIMER1_FOR_CSENSE -#define TIMER1_FOR_CSENSE 2 -#endif - -// MEASUREMENT_PERIOD - Single measurement period. -// Time of a single measurement can be calculated as -// T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). -// I_SOURCE, VUP, and VDOWN are values used to initialize COMP and C is the capacitance of the used pad. - -#ifndef MEASUREMENT_PERIOD -#define MEASUREMENT_PERIOD 20 -#endif - -// - -// - -// NRF_FPRINTF_ENABLED - nrf_fprintf - fprintf function. - - -#ifndef NRF_FPRINTF_ENABLED -#define NRF_FPRINTF_ENABLED 1 -#endif - -// NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library -//========================================================== -#ifndef NRF_FSTORAGE_ENABLED -#define NRF_FSTORAGE_ENABLED 0 -#endif -// nrf_fstorage - Common settings - -// Common settings to all fstorage implementations -//========================================================== -// NRF_FSTORAGE_PARAM_CHECK_DISABLED - Disable user input validation - - -// If selected, use ASSERT to validate user input. -// This effectively removes user input validation in production code. -// Recommended setting: OFF, only enable this setting if size is a major concern. - -#ifndef NRF_FSTORAGE_PARAM_CHECK_DISABLED -#define NRF_FSTORAGE_PARAM_CHECK_DISABLED 0 -#endif - -// -//========================================================== - -// nrf_fstorage_sd - Implementation using the SoftDevice - -// Configuration options for the fstorage implementation using the SoftDevice -//========================================================== -// NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations -// Increase this value if API calls frequently return the error @ref NRF_ERROR_NO_MEM. - -#ifndef NRF_FSTORAGE_SD_QUEUE_SIZE -#define NRF_FSTORAGE_SD_QUEUE_SIZE 4 -#endif - -// NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy -// Increase this value if events frequently return the @ref NRF_ERROR_TIMEOUT error. -// The SoftDevice might fail to schedule flash access due to high BLE activity. - -#ifndef NRF_FSTORAGE_SD_MAX_RETRIES -#define NRF_FSTORAGE_SD_MAX_RETRIES 8 -#endif - -// NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation -// This value must be a multiple of four. -// Lowering this value can increase the chances of the SoftDevice being able to execute flash operations in between radio activity. -// This value is bound by the maximum number of bytes that can be written to flash in a single call to @ref sd_flash_write. -// That is 1024 bytes for nRF51 ICs and 4096 bytes for nRF52 ICs. - -#ifndef NRF_FSTORAGE_SD_MAX_WRITE_SIZE -#define NRF_FSTORAGE_SD_MAX_WRITE_SIZE 4096 -#endif - -// -//========================================================== - -// - -// NRF_GFX_ENABLED - nrf_gfx - GFX module - - -#ifndef NRF_GFX_ENABLED -#define NRF_GFX_ENABLED 0 -#endif - -// NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module - - -#ifndef NRF_MEMOBJ_ENABLED -#define NRF_MEMOBJ_ENABLED 1 -#endif - -// NRF_PWR_MGMT_ENABLED - nrf_pwr_mgmt - Power management module -//========================================================== -#ifndef NRF_PWR_MGMT_ENABLED -#define NRF_PWR_MGMT_ENABLED 0 -#endif -// NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED - Enables pin debug in the module. - -// Selected pin will be set when CPU is in sleep mode. -//========================================================== -#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED -#define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED 0 -#endif -// NRF_PWR_MGMT_SLEEP_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef NRF_PWR_MGMT_SLEEP_DEBUG_PIN -#define NRF_PWR_MGMT_SLEEP_DEBUG_PIN 31 -#endif - -// - -// NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED - Enables CPU usage monitor. - - -// Module will trace percentage of CPU usage in one second intervals. - -#ifndef NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED -#define NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED 0 -#endif - -// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED - Enable standby timeout. -//========================================================== -#ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED -#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED 0 -#endif -// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). -// Shutdown procedure will begin no earlier than after this number of seconds. - -#ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S -#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S 3 -#endif - -// - -// NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED - Enables FPU event cleaning. - - -#ifndef NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED -#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 0 -#endif - -// NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY - Blocked shutdown procedure will be retried every second. - - -#ifndef NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY -#define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY 0 -#endif - -// NRF_PWR_MGMT_CONFIG_USE_SCHEDULER - Module will use @ref app_scheduler. - - -#ifndef NRF_PWR_MGMT_CONFIG_USE_SCHEDULER -#define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER 0 -#endif - -// NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. -// The number of stages of the shutdown process. - -#ifndef NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT -#define NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT 3 -#endif - -// - -// NRF_QUEUE_ENABLED - nrf_queue - Queue module -//========================================================== -#ifndef NRF_QUEUE_ENABLED -#define NRF_QUEUE_ENABLED 0 -#endif -// NRF_QUEUE_CLI_CMDS - Enable CLI commands specific to the module - - -#ifndef NRF_QUEUE_CLI_CMDS -#define NRF_QUEUE_CLI_CMDS 0 -#endif - -// - -// NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator - - -#ifndef NRF_SECTION_ITER_ENABLED -#define NRF_SECTION_ITER_ENABLED 1 -#endif - -// NRF_SORTLIST_ENABLED - nrf_sortlist - Sorted list - - -#ifndef NRF_SORTLIST_ENABLED -#define NRF_SORTLIST_ENABLED 0 -#endif - -// NRF_SPI_MNGR_ENABLED - nrf_spi_mngr - SPI transaction manager - - -#ifndef NRF_SPI_MNGR_ENABLED -#define NRF_SPI_MNGR_ENABLED 0 -#endif - -// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. - - -#ifndef NRF_STRERROR_ENABLED -#define NRF_STRERROR_ENABLED 1 -#endif - -// NRF_TWI_MNGR_ENABLED - nrf_twi_mngr - TWI transaction manager - - -#ifndef NRF_TWI_MNGR_ENABLED -#define NRF_TWI_MNGR_ENABLED 0 -#endif - -// SLIP_ENABLED - slip - SLIP encoding and decoding - - -#ifndef SLIP_ENABLED -#define SLIP_ENABLED 0 -#endif - -// TASK_MANAGER_ENABLED - task_manager - Task manager. -//========================================================== -#ifndef TASK_MANAGER_ENABLED -#define TASK_MANAGER_ENABLED 0 -#endif -// TASK_MANAGER_CLI_CMDS - Enable CLI commands specific to the module - - -#ifndef TASK_MANAGER_CLI_CMDS -#define TASK_MANAGER_CLI_CMDS 0 -#endif - -// TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created -#ifndef TASK_MANAGER_CONFIG_MAX_TASKS -#define TASK_MANAGER_CONFIG_MAX_TASKS 2 -#endif - -// TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) -#ifndef TASK_MANAGER_CONFIG_STACK_SIZE -#define TASK_MANAGER_CONFIG_STACK_SIZE 1024 -#endif - -// TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED - Enable stack profiling. - - -#ifndef TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED -#define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED 1 -#endif - -// TASK_MANAGER_CONFIG_STACK_GUARD - Configures stack guard. - -// <0=> Disabled -// <4=> 32 bytes -// <5=> 64 bytes -// <6=> 128 bytes -// <7=> 256 bytes -// <8=> 512 bytes - -#ifndef TASK_MANAGER_CONFIG_STACK_GUARD -#define TASK_MANAGER_CONFIG_STACK_GUARD 7 -#endif - -// - -// app_button - buttons handling module - -//========================================================== -// BUTTON_ENABLED - Enables Button module - - -#ifndef BUTTON_ENABLED -#define BUTTON_ENABLED 1 -#endif - -// BUTTON_HIGH_ACCURACY_ENABLED - Enables GPIOTE high accuracy for buttons - - -#ifndef BUTTON_HIGH_ACCURACY_ENABLED -#define BUTTON_HIGH_ACCURACY_ENABLED 0 -#endif - -// -//========================================================== - -// nrf_cli - Command line interface - -//========================================================== -// NRF_CLI_ENABLED - Enable/disable the CLI module. - - -#ifndef NRF_CLI_ENABLED -#define NRF_CLI_ENABLED 0 -#endif - -// NRF_CLI_ARGC_MAX - Maximum number of parameters passed to the command handler. -#ifndef NRF_CLI_ARGC_MAX -#define NRF_CLI_ARGC_MAX 12 -#endif - -// NRF_CLI_BUILD_IN_CMDS_ENABLED - CLI built-in commands. - - -#ifndef NRF_CLI_BUILD_IN_CMDS_ENABLED -#define NRF_CLI_BUILD_IN_CMDS_ENABLED 1 -#endif - -// NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for a single command. -#ifndef NRF_CLI_CMD_BUFF_SIZE -#define NRF_CLI_CMD_BUFF_SIZE 128 -#endif - -// NRF_CLI_ECHO_STATUS - CLI echo status. If set, echo is ON. - - -#ifndef NRF_CLI_ECHO_STATUS -#define NRF_CLI_ECHO_STATUS 1 -#endif - -// NRF_CLI_WILDCARD_ENABLED - Enable wildcard functionality for CLI commands. - - -#ifndef NRF_CLI_WILDCARD_ENABLED -#define NRF_CLI_WILDCARD_ENABLED 0 -#endif - -// NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. -#ifndef NRF_CLI_PRINTF_BUFF_SIZE -#define NRF_CLI_PRINTF_BUFF_SIZE 23 -#endif - -// NRF_CLI_HISTORY_ENABLED - Enable CLI history mode. -//========================================================== -#ifndef NRF_CLI_HISTORY_ENABLED -#define NRF_CLI_HISTORY_ENABLED 1 -#endif -// NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history. -#ifndef NRF_CLI_HISTORY_ELEMENT_SIZE -#define NRF_CLI_HISTORY_ELEMENT_SIZE 32 -#endif - -// NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects. -#ifndef NRF_CLI_HISTORY_ELEMENT_COUNT -#define NRF_CLI_HISTORY_ELEMENT_COUNT 8 -#endif - -// - -// NRF_CLI_VT100_COLORS_ENABLED - CLI VT100 colors. - - -#ifndef NRF_CLI_VT100_COLORS_ENABLED -#define NRF_CLI_VT100_COLORS_ENABLED 1 -#endif - -// NRF_CLI_STATISTICS_ENABLED - Enable CLI statistics. - - -#ifndef NRF_CLI_STATISTICS_ENABLED -#define NRF_CLI_STATISTICS_ENABLED 1 -#endif - -// NRF_CLI_LOG_BACKEND - Enable logger backend interface. - - -#ifndef NRF_CLI_LOG_BACKEND -#define NRF_CLI_LOG_BACKEND 1 -#endif - -// NRF_CLI_USES_TASK_MANAGER_ENABLED - Enable CLI to use task_manager - - -#ifndef NRF_CLI_USES_TASK_MANAGER_ENABLED -#define NRF_CLI_USES_TASK_MANAGER_ENABLED 0 -#endif - -// -//========================================================== - -// -//========================================================== - -// nRF_Log - -//========================================================== -// NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED - nrf_log_str_formatter - Log string formatter - - -#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED -#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1 -#endif - -// nrf_log - Logger - -//========================================================== -// NRF_LOG_ENABLED - Logging module for nRF5 SDK -//========================================================== -#ifndef NRF_LOG_ENABLED -#define NRF_LOG_ENABLED 0 -#endif -// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string -//========================================================== -#ifndef NRF_LOG_USES_COLORS -#define NRF_LOG_USES_COLORS 0 -#endif -// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LOG_COLOR_DEFAULT -#define NRF_LOG_COLOR_DEFAULT 0 -#endif - -// NRF_LOG_ERROR_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LOG_ERROR_COLOR -#define NRF_LOG_ERROR_COLOR 2 -#endif - -// NRF_LOG_WARNING_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LOG_WARNING_COLOR -#define NRF_LOG_WARNING_COLOR 4 -#endif - -// - -// NRF_LOG_DEFAULT_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_LOG_DEFAULT_LEVEL -#define NRF_LOG_DEFAULT_LEVEL 3 -#endif - -// NRF_LOG_DEFERRED - Enable deffered logger. - - -// Log data is buffered and can be processed in idle. - -#ifndef NRF_LOG_DEFERRED -#define NRF_LOG_DEFERRED 1 -#endif - -// NRF_LOG_BUFSIZE - Size of the buffer for storing logs (in bytes). - - -// Must be power of 2 and multiple of 4. -// If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum. -// <128=> 128 -// <256=> 256 -// <512=> 512 -// <1024=> 1024 -// <2048=> 2048 -// <4096=> 4096 -// <8192=> 8192 -// <16384=> 16384 - -#ifndef NRF_LOG_BUFSIZE -#define NRF_LOG_BUFSIZE 1024 -#endif - -// NRF_LOG_ALLOW_OVERFLOW - Configures behavior when circular buffer is full. - - -// If set then oldest logs are overwritten. Otherwise a -// marker is injected informing about overflow. - -#ifndef NRF_LOG_ALLOW_OVERFLOW -#define NRF_LOG_ALLOW_OVERFLOW 1 -#endif - -// NRF_LOG_USES_TIMESTAMP - Enable timestamping - -// Function for getting the timestamp is provided by the user -//========================================================== -#ifndef NRF_LOG_USES_TIMESTAMP -#define NRF_LOG_USES_TIMESTAMP 0 -#endif -// NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) -#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY -#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 32768 -#endif - -// - -// NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. - - -#ifndef NRF_LOG_FILTERS_ENABLED -#define NRF_LOG_FILTERS_ENABLED 0 -#endif - -// NRF_LOG_CLI_CMDS - Enable CLI commands for the module. - - -#ifndef NRF_LOG_CLI_CMDS -#define NRF_LOG_CLI_CMDS 0 -#endif - -// Log message pool - Configuration of log message pool - -//========================================================== -// NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. -// If a small value is set, then performance of logs processing -// is degraded because data is fragmented. Bigger value impacts -// RAM memory utilization. The size is set to fit a message with -// a timestamp and up to 2 arguments in a single memory object. - -#ifndef NRF_LOG_MSGPOOL_ELEMENT_SIZE -#define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20 -#endif - -// NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects -// If a small value is set, then it may lead to a deadlock -// in certain cases if backend has high latency and holds -// multiple messages for long time. Bigger value impacts -// RAM memory usage. - -#ifndef NRF_LOG_MSGPOOL_ELEMENT_COUNT -#define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8 -#endif - -// -//========================================================== - -// - -// nrf_log module configuration - -//========================================================== -// nrf_log in nRF_Core - -//========================================================== -// NRF_MPU_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_MPU_CONFIG_LOG_ENABLED -#define NRF_MPU_CONFIG_LOG_ENABLED 0 -#endif -// NRF_MPU_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_MPU_CONFIG_LOG_LEVEL -#define NRF_MPU_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_MPU_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_MPU_CONFIG_INFO_COLOR -#define NRF_MPU_CONFIG_INFO_COLOR 0 -#endif - -// NRF_MPU_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_MPU_CONFIG_DEBUG_COLOR -#define NRF_MPU_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_STACK_GUARD_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_STACK_GUARD_CONFIG_LOG_ENABLED -#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0 -#endif -// NRF_STACK_GUARD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL -#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_STACK_GUARD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR -#define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0 -#endif - -// NRF_STACK_GUARD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR -#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// TASK_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TASK_MANAGER_CONFIG_LOG_ENABLED -#define TASK_MANAGER_CONFIG_LOG_ENABLED 0 -#endif -// TASK_MANAGER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TASK_MANAGER_CONFIG_LOG_LEVEL -#define TASK_MANAGER_CONFIG_LOG_LEVEL 3 -#endif - -// TASK_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TASK_MANAGER_CONFIG_INFO_COLOR -#define TASK_MANAGER_CONFIG_INFO_COLOR 0 -#endif - -// TASK_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR -#define TASK_MANAGER_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// -//========================================================== - -// nrf_log in nRF_Drivers - -//========================================================== -// CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef CLOCK_CONFIG_LOG_ENABLED -#define CLOCK_CONFIG_LOG_ENABLED 0 -#endif -// CLOCK_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef CLOCK_CONFIG_LOG_LEVEL -#define CLOCK_CONFIG_LOG_LEVEL 3 -#endif - -// CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef CLOCK_CONFIG_INFO_COLOR -#define CLOCK_CONFIG_INFO_COLOR 0 -#endif - -// CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef CLOCK_CONFIG_DEBUG_COLOR -#define CLOCK_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// COMP_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef COMP_CONFIG_LOG_ENABLED -#define COMP_CONFIG_LOG_ENABLED 0 -#endif -// COMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef COMP_CONFIG_LOG_LEVEL -#define COMP_CONFIG_LOG_LEVEL 3 -#endif - -// COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMP_CONFIG_INFO_COLOR -#define COMP_CONFIG_INFO_COLOR 0 -#endif - -// COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMP_CONFIG_DEBUG_COLOR -#define COMP_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef GPIOTE_CONFIG_LOG_ENABLED -#define GPIOTE_CONFIG_LOG_ENABLED 0 -#endif -// GPIOTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef GPIOTE_CONFIG_LOG_LEVEL -#define GPIOTE_CONFIG_LOG_LEVEL 3 -#endif - -// GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef GPIOTE_CONFIG_INFO_COLOR -#define GPIOTE_CONFIG_INFO_COLOR 0 -#endif - -// GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef GPIOTE_CONFIG_DEBUG_COLOR -#define GPIOTE_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef LPCOMP_CONFIG_LOG_ENABLED -#define LPCOMP_CONFIG_LOG_ENABLED 0 -#endif -// LPCOMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef LPCOMP_CONFIG_LOG_LEVEL -#define LPCOMP_CONFIG_LOG_LEVEL 3 -#endif - -// LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef LPCOMP_CONFIG_INFO_COLOR -#define LPCOMP_CONFIG_INFO_COLOR 0 -#endif - -// LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef LPCOMP_CONFIG_DEBUG_COLOR -#define LPCOMP_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// PDM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef PDM_CONFIG_LOG_ENABLED -#define PDM_CONFIG_LOG_ENABLED 0 -#endif -// PDM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef PDM_CONFIG_LOG_LEVEL -#define PDM_CONFIG_LOG_LEVEL 3 -#endif - -// PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PDM_CONFIG_INFO_COLOR -#define PDM_CONFIG_INFO_COLOR 0 -#endif - -// PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PDM_CONFIG_DEBUG_COLOR -#define PDM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// PPI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef PPI_CONFIG_LOG_ENABLED -#define PPI_CONFIG_LOG_ENABLED 0 -#endif -// PPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef PPI_CONFIG_LOG_LEVEL -#define PPI_CONFIG_LOG_LEVEL 3 -#endif - -// PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PPI_CONFIG_INFO_COLOR -#define PPI_CONFIG_INFO_COLOR 0 -#endif - -// PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PPI_CONFIG_DEBUG_COLOR -#define PPI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// PWM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef PWM_CONFIG_LOG_ENABLED -#define PWM_CONFIG_LOG_ENABLED 0 -#endif -// PWM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef PWM_CONFIG_LOG_LEVEL -#define PWM_CONFIG_LOG_LEVEL 3 -#endif - -// PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PWM_CONFIG_INFO_COLOR -#define PWM_CONFIG_INFO_COLOR 0 -#endif - -// PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PWM_CONFIG_DEBUG_COLOR -#define PWM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef QDEC_CONFIG_LOG_ENABLED -#define QDEC_CONFIG_LOG_ENABLED 0 -#endif -// QDEC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef QDEC_CONFIG_LOG_LEVEL -#define QDEC_CONFIG_LOG_LEVEL 3 -#endif - -// QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef QDEC_CONFIG_INFO_COLOR -#define QDEC_CONFIG_INFO_COLOR 0 -#endif - -// QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef QDEC_CONFIG_DEBUG_COLOR -#define QDEC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// RNG_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef RNG_CONFIG_LOG_ENABLED -#define RNG_CONFIG_LOG_ENABLED 0 -#endif -// RNG_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef RNG_CONFIG_LOG_LEVEL -#define RNG_CONFIG_LOG_LEVEL 3 -#endif - -// RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RNG_CONFIG_INFO_COLOR -#define RNG_CONFIG_INFO_COLOR 0 -#endif - -// RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RNG_CONFIG_DEBUG_COLOR -#define RNG_CONFIG_DEBUG_COLOR 0 -#endif - -// RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. - - -#ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED -#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 -#endif - -// - -// RTC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef RTC_CONFIG_LOG_ENABLED -#define RTC_CONFIG_LOG_ENABLED 0 -#endif -// RTC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef RTC_CONFIG_LOG_LEVEL -#define RTC_CONFIG_LOG_LEVEL 3 -#endif - -// RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RTC_CONFIG_INFO_COLOR -#define RTC_CONFIG_INFO_COLOR 0 -#endif - -// RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RTC_CONFIG_DEBUG_COLOR -#define RTC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SAADC_CONFIG_LOG_ENABLED -#define SAADC_CONFIG_LOG_ENABLED 0 -#endif -// SAADC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SAADC_CONFIG_LOG_LEVEL -#define SAADC_CONFIG_LOG_LEVEL 3 -#endif - -// SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SAADC_CONFIG_INFO_COLOR -#define SAADC_CONFIG_INFO_COLOR 0 -#endif - -// SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SAADC_CONFIG_DEBUG_COLOR -#define SAADC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SPIS_CONFIG_LOG_ENABLED -#define SPIS_CONFIG_LOG_ENABLED 0 -#endif -// SPIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SPIS_CONFIG_LOG_LEVEL -#define SPIS_CONFIG_LOG_LEVEL 3 -#endif - -// SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPIS_CONFIG_INFO_COLOR -#define SPIS_CONFIG_INFO_COLOR 0 -#endif - -// SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPIS_CONFIG_DEBUG_COLOR -#define SPIS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// SPI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SPI_CONFIG_LOG_ENABLED -#define SPI_CONFIG_LOG_ENABLED 0 -#endif -// SPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SPI_CONFIG_LOG_LEVEL -#define SPI_CONFIG_LOG_LEVEL 3 -#endif - -// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_INFO_COLOR -#define SPI_CONFIG_INFO_COLOR 0 -#endif - -// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_DEBUG_COLOR -#define SPI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TIMER_CONFIG_LOG_ENABLED -#define TIMER_CONFIG_LOG_ENABLED 0 -#endif -// TIMER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TIMER_CONFIG_LOG_LEVEL -#define TIMER_CONFIG_LOG_LEVEL 3 -#endif - -// TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TIMER_CONFIG_INFO_COLOR -#define TIMER_CONFIG_INFO_COLOR 0 -#endif - -// TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TIMER_CONFIG_DEBUG_COLOR -#define TIMER_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TWIS_CONFIG_LOG_ENABLED -#define TWIS_CONFIG_LOG_ENABLED 0 -#endif -// TWIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TWIS_CONFIG_LOG_LEVEL -#define TWIS_CONFIG_LOG_LEVEL 3 -#endif - -// TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWIS_CONFIG_INFO_COLOR -#define TWIS_CONFIG_INFO_COLOR 0 -#endif - -// TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWIS_CONFIG_DEBUG_COLOR -#define TWIS_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// TWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TWI_CONFIG_LOG_ENABLED -#define TWI_CONFIG_LOG_ENABLED 0 -#endif -// TWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TWI_CONFIG_LOG_LEVEL -#define TWI_CONFIG_LOG_LEVEL 3 -#endif - -// TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWI_CONFIG_INFO_COLOR -#define TWI_CONFIG_INFO_COLOR 0 -#endif - -// TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWI_CONFIG_DEBUG_COLOR -#define TWI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// UART_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef UART_CONFIG_LOG_ENABLED -#define UART_CONFIG_LOG_ENABLED 0 -#endif -// UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef UART_CONFIG_LOG_LEVEL -#define UART_CONFIG_LOG_LEVEL 3 -#endif - -// UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef UART_CONFIG_INFO_COLOR -#define UART_CONFIG_INFO_COLOR 0 -#endif - -// UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef UART_CONFIG_DEBUG_COLOR -#define UART_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// USBD_CONFIG_LOG_ENABLED - Enable logging in the module -//========================================================== -#ifndef USBD_CONFIG_LOG_ENABLED -#define USBD_CONFIG_LOG_ENABLED 0 -#endif -// USBD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef USBD_CONFIG_LOG_LEVEL -#define USBD_CONFIG_LOG_LEVEL 3 -#endif - -// USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef USBD_CONFIG_INFO_COLOR -#define USBD_CONFIG_INFO_COLOR 0 -#endif - -// USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef USBD_CONFIG_DEBUG_COLOR -#define USBD_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// WDT_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef WDT_CONFIG_LOG_ENABLED -#define WDT_CONFIG_LOG_ENABLED 0 -#endif -// WDT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef WDT_CONFIG_LOG_LEVEL -#define WDT_CONFIG_LOG_LEVEL 3 -#endif - -// WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef WDT_CONFIG_INFO_COLOR -#define WDT_CONFIG_INFO_COLOR 0 -#endif - -// WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef WDT_CONFIG_DEBUG_COLOR -#define WDT_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// -//========================================================== - -// nrf_log in nRF_Libraries - -//========================================================== -// APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef APP_TIMER_CONFIG_LOG_ENABLED -#define APP_TIMER_CONFIG_LOG_ENABLED 0 -#endif -// APP_TIMER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_TIMER_CONFIG_LOG_LEVEL -#define APP_TIMER_CONFIG_LOG_LEVEL 3 -#endif - -// APP_TIMER_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. - - -// If module generates a lot of logs, initial log level can -// be decreased to prevent flooding. Severity level can be -// increased on instance basis. -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL -#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3 -#endif - -// APP_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_TIMER_CONFIG_INFO_COLOR -#define APP_TIMER_CONFIG_INFO_COLOR 0 -#endif - -// APP_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_TIMER_CONFIG_DEBUG_COLOR -#define APP_TIMER_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED -#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0 -#endif -// APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL -#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3 -#endif - -// APP_USBD_CDC_ACM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR -#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0 -#endif - -// APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR -#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED -#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0 -#endif -// APP_USBD_DUMMY_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL -#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3 -#endif - -// APP_USBD_DUMMY_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR -#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0 -#endif - -// APP_USBD_DUMMY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR -#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED -#define APP_USBD_MSC_CONFIG_LOG_ENABLED 0 -#endif -// APP_USBD_MSC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL -#define APP_USBD_MSC_CONFIG_LOG_LEVEL 3 -#endif - -// APP_USBD_MSC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR -#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 -#endif - -// APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR -#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED -#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0 -#endif -// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL -#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3 -#endif - -// APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR -#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0 -#endif - -// APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR -#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED -#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0 -#endif -// NRF_ATFIFO_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL -#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL -#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3 -#endif - -// NRF_ATFIFO_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR -#define NRF_ATFIFO_CONFIG_INFO_COLOR 0 -#endif - -// NRF_ATFIFO_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR -#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_BALLOC_CONFIG_LOG_ENABLED -#define NRF_BALLOC_CONFIG_LOG_ENABLED 0 -#endif -// NRF_BALLOC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_BALLOC_CONFIG_LOG_LEVEL -#define NRF_BALLOC_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. - - -// If module generates a lot of logs, initial log level can -// be decreased to prevent flooding. Severity level can be -// increased on instance basis. -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL -#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3 -#endif - -// NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_BALLOC_CONFIG_INFO_COLOR -#define NRF_BALLOC_CONFIG_INFO_COLOR 0 -#endif - -// NRF_BALLOC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR -#define NRF_BALLOC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED -#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0 -#endif -// NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL -#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_CLI_BLE_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR -#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0 -#endif - -// NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR -#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED -#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0 -#endif -// NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL -#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR -#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0 -#endif - -// NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR -#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED -#define NRF_CLI_UART_CONFIG_LOG_ENABLED 0 -#endif -// NRF_CLI_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL -#define NRF_CLI_UART_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_CLI_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_CLI_UART_CONFIG_INFO_COLOR -#define NRF_CLI_UART_CONFIG_INFO_COLOR 0 -#endif - -// NRF_CLI_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR -#define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED -#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0 -#endif -// NRF_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL -#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR -#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0 -#endif - -// NRF_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR -#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED -#define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0 -#endif -// NRF_MEMOBJ_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL -#define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_MEMOBJ_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR -#define NRF_MEMOBJ_CONFIG_INFO_COLOR 0 -#endif - -// NRF_MEMOBJ_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR -#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_PWR_MGMT_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_PWR_MGMT_CONFIG_LOG_ENABLED -#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0 -#endif -// NRF_PWR_MGMT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL -#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_PWR_MGMT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR -#define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0 -#endif - -// NRF_PWR_MGMT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR -#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED -#define NRF_QUEUE_CONFIG_LOG_ENABLED 0 -#endif -// NRF_QUEUE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL -#define NRF_QUEUE_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL -#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3 -#endif - -// NRF_QUEUE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_QUEUE_CONFIG_INFO_COLOR -#define NRF_QUEUE_CONFIG_INFO_COLOR 0 -#endif - -// NRF_QUEUE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR -#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module. -//========================================================== -#ifndef NRF_SDH_ANT_LOG_ENABLED -#define NRF_SDH_ANT_LOG_ENABLED 0 -#endif -// NRF_SDH_ANT_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_SDH_ANT_LOG_LEVEL -#define NRF_SDH_ANT_LOG_LEVEL 3 -#endif - -// NRF_SDH_ANT_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_ANT_INFO_COLOR -#define NRF_SDH_ANT_INFO_COLOR 0 -#endif - -// NRF_SDH_ANT_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_ANT_DEBUG_COLOR -#define NRF_SDH_ANT_DEBUG_COLOR 0 -#endif - -// - -// NRF_SDH_BLE_LOG_ENABLED - Enable logging in SoftDevice handler (BLE) module. -//========================================================== -#ifndef NRF_SDH_BLE_LOG_ENABLED -#define NRF_SDH_BLE_LOG_ENABLED 1 -#endif -// NRF_SDH_BLE_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_SDH_BLE_LOG_LEVEL -#define NRF_SDH_BLE_LOG_LEVEL 3 -#endif - -// NRF_SDH_BLE_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_BLE_INFO_COLOR -#define NRF_SDH_BLE_INFO_COLOR 0 -#endif - -// NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_BLE_DEBUG_COLOR -#define NRF_SDH_BLE_DEBUG_COLOR 0 -#endif - -// - -// NRF_SDH_LOG_ENABLED - Enable logging in SoftDevice handler module. -//========================================================== -#ifndef NRF_SDH_LOG_ENABLED -#define NRF_SDH_LOG_ENABLED 1 -#endif -// NRF_SDH_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_SDH_LOG_LEVEL -#define NRF_SDH_LOG_LEVEL 3 -#endif - -// NRF_SDH_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_INFO_COLOR -#define NRF_SDH_INFO_COLOR 0 -#endif - -// NRF_SDH_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_DEBUG_COLOR -#define NRF_SDH_DEBUG_COLOR 0 -#endif - -// - -// NRF_SDH_SOC_LOG_ENABLED - Enable logging in SoftDevice handler (SoC) module. -//========================================================== -#ifndef NRF_SDH_SOC_LOG_ENABLED -#define NRF_SDH_SOC_LOG_ENABLED 1 -#endif -// NRF_SDH_SOC_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_SDH_SOC_LOG_LEVEL -#define NRF_SDH_SOC_LOG_LEVEL 3 -#endif - -// NRF_SDH_SOC_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_SOC_INFO_COLOR -#define NRF_SDH_SOC_INFO_COLOR 0 -#endif - -// NRF_SDH_SOC_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SDH_SOC_DEBUG_COLOR -#define NRF_SDH_SOC_DEBUG_COLOR 0 -#endif - -// - -// NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED -#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0 -#endif -// NRF_SORTLIST_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL -#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_SORTLIST_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR -#define NRF_SORTLIST_CONFIG_INFO_COLOR 0 -#endif - -// NRF_SORTLIST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR -#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED -#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0 -#endif -// NRF_TWI_SENSOR_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL -#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3 -#endif - -// NRF_TWI_SENSOR_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR -#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0 -#endif - -// NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR -#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// -//========================================================== - -// nrf_log in nRF_Serialization - -//========================================================== -// SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED -#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0 -#endif -// SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL -#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3 -#endif - -// SER_HAL_TRANSPORT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR -#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0 -#endif - -// SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR -#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// -//========================================================== - -// -//========================================================== - -// -//========================================================== - -// -//========================================================== - -// nRF_NFC - -//========================================================== -// NFC_AC_REC_ENABLED - nfc_ac_rec - NFC NDEF Alternative Carrier record encoder - - -#ifndef NFC_AC_REC_ENABLED -#define NFC_AC_REC_ENABLED 0 -#endif - -// NFC_AC_REC_PARSER_ENABLED - nfc_ac_rec_parser - Alternative Carrier record parser - - -#ifndef NFC_AC_REC_PARSER_ENABLED -#define NFC_AC_REC_PARSER_ENABLED 0 -#endif - -// NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - AD data for OOB pairing encoder -//========================================================== -#ifndef NFC_BLE_OOB_ADVDATA_ENABLED -#define NFC_BLE_OOB_ADVDATA_ENABLED 0 -#endif -// ADVANCED_ADVDATA_SUPPORT - Non-mandatory AD types for BLE OOB pairing are encoded inside the NDEF message (e.g. service UUIDs) - -// <1=> Enabled -// <0=> Disabled - -#ifndef ADVANCED_ADVDATA_SUPPORT -#define ADVANCED_ADVDATA_SUPPORT 0 -#endif - -// - -// NFC_BLE_OOB_ADVDATA_PARSER_ENABLED - nfc_ble_oob_advdata_parser - BLE OOB pairing AD data parser - - -#ifndef NFC_BLE_OOB_ADVDATA_PARSER_ENABLED -#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED 0 -#endif - -// NFC_BLE_PAIR_LIB_ENABLED - nfc_ble_pair_lib - Library parameters -//========================================================== -#ifndef NFC_BLE_PAIR_LIB_ENABLED -#define NFC_BLE_PAIR_LIB_ENABLED 0 -#endif -// NFC_BLE_PAIR_LIB_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_BLE_PAIR_LIB_LOG_ENABLED -#define NFC_BLE_PAIR_LIB_LOG_ENABLED 0 -#endif -// NFC_BLE_PAIR_LIB_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_BLE_PAIR_LIB_LOG_LEVEL -#define NFC_BLE_PAIR_LIB_LOG_LEVEL 3 -#endif - -// NFC_BLE_PAIR_LIB_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_BLE_PAIR_LIB_INFO_COLOR -#define NFC_BLE_PAIR_LIB_INFO_COLOR 0 -#endif - -// NFC_BLE_PAIR_LIB_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_BLE_PAIR_LIB_DEBUG_COLOR -#define NFC_BLE_PAIR_LIB_DEBUG_COLOR 0 -#endif - -// - -// NFC_BLE_PAIR_LIB_SECURITY_PARAMETERS - Common Peer Manager security parameters. - -//========================================================== -// BLE_NFC_SEC_PARAM_BOND - Enables device bonding. - -// If bonding is enabled at least one of the BLE_NFC_SEC_PARAM_KDIST options must be enabled. -//========================================================== -#ifndef BLE_NFC_SEC_PARAM_BOND -#define BLE_NFC_SEC_PARAM_BOND 1 -#endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. - - -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 -#endif - -// BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - - -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 -#endif - -// BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - - -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 -#endif - -// BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. - - -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 -#endif - -// - -// BLE_NFC_SEC_PARAM_MIN_KEY_SIZE - Minimal size of a security key. - -// <7=> 7 -// <8=> 8 -// <9=> 9 -// <10=> 10 -// <11=> 11 -// <12=> 12 -// <13=> 13 -// <14=> 14 -// <15=> 15 -// <16=> 16 - -#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE -#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7 -#endif - -// BLE_NFC_SEC_PARAM_MAX_KEY_SIZE - Maximal size of a security key. - -// <7=> 7 -// <8=> 8 -// <9=> 9 -// <10=> 10 -// <11=> 11 -// <12=> 12 -// <13=> 13 -// <14=> 14 -// <15=> 15 -// <16=> 16 - -#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE -#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16 -#endif - -// -//========================================================== - -// - -// NFC_BLE_PAIR_MSG_ENABLED - nfc_ble_pair_msg - NDEF message for OOB pairing encoder - - -#ifndef NFC_BLE_PAIR_MSG_ENABLED -#define NFC_BLE_PAIR_MSG_ENABLED 0 -#endif - -// NFC_CH_COMMON_ENABLED - nfc_ble_pair_common - OOB pairing common data - - -#ifndef NFC_CH_COMMON_ENABLED -#define NFC_CH_COMMON_ENABLED 0 -#endif - -// NFC_EP_OOB_REC_ENABLED - nfc_ep_oob_rec - EP record for BLE pairing encoder - - -#ifndef NFC_EP_OOB_REC_ENABLED -#define NFC_EP_OOB_REC_ENABLED 0 -#endif - -// NFC_HS_REC_ENABLED - nfc_hs_rec - Handover Select NDEF record encoder - - -#ifndef NFC_HS_REC_ENABLED -#define NFC_HS_REC_ENABLED 0 -#endif - -// NFC_LE_OOB_REC_ENABLED - nfc_le_oob_rec - LE record for BLE pairing encoder - - -#ifndef NFC_LE_OOB_REC_ENABLED -#define NFC_LE_OOB_REC_ENABLED 0 -#endif - -// NFC_LE_OOB_REC_PARSER_ENABLED - nfc_le_oob_rec_parser - LE record parser - - -#ifndef NFC_LE_OOB_REC_PARSER_ENABLED -#define NFC_LE_OOB_REC_PARSER_ENABLED 0 -#endif - -// NFC_NDEF_LAUNCHAPP_MSG_ENABLED - nfc_launchapp_msg - Encoding data for NDEF Application Launching message for NFC Tag - - -#ifndef NFC_NDEF_LAUNCHAPP_MSG_ENABLED -#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED 0 -#endif - -// NFC_NDEF_LAUNCHAPP_REC_ENABLED - nfc_launchapp_rec - Encoding data for NDEF Application Launching record for NFC Tag - - -#ifndef NFC_NDEF_LAUNCHAPP_REC_ENABLED -#define NFC_NDEF_LAUNCHAPP_REC_ENABLED 0 -#endif - -// NFC_NDEF_MSG_ENABLED - nfc_ndef_msg - NFC NDEF Message generator module -//========================================================== -#ifndef NFC_NDEF_MSG_ENABLED -#define NFC_NDEF_MSG_ENABLED 0 -#endif -// NFC_NDEF_MSG_TAG_TYPE - NFC Tag Type - -// <2=> Type 2 Tag -// <4=> Type 4 Tag - -#ifndef NFC_NDEF_MSG_TAG_TYPE -#define NFC_NDEF_MSG_TAG_TYPE 2 -#endif - -// - -// NFC_NDEF_MSG_PARSER_ENABLED - nfc_ndef_msg_parser - NFC NDEF message parser module -//========================================================== -#ifndef NFC_NDEF_MSG_PARSER_ENABLED -#define NFC_NDEF_MSG_PARSER_ENABLED 0 -#endif -// NFC_NDEF_MSG_PARSER_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_NDEF_MSG_PARSER_LOG_ENABLED -#define NFC_NDEF_MSG_PARSER_LOG_ENABLED 0 -#endif -// NFC_NDEF_MSG_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_NDEF_MSG_PARSER_LOG_LEVEL -#define NFC_NDEF_MSG_PARSER_LOG_LEVEL 3 -#endif - -// NFC_NDEF_MSG_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_NDEF_MSG_PARSER_INFO_COLOR -#define NFC_NDEF_MSG_PARSER_INFO_COLOR 0 -#endif - -// - -// - -// NFC_NDEF_RECORD_ENABLED - nfc_ndef_record - NFC NDEF Record generator module - - -#ifndef NFC_NDEF_RECORD_ENABLED -#define NFC_NDEF_RECORD_ENABLED 0 -#endif - -// NFC_NDEF_RECORD_PARSER_ENABLED - nfc_ndef_record_parser - NFC NDEF Record parser module -//========================================================== -#ifndef NFC_NDEF_RECORD_PARSER_ENABLED -#define NFC_NDEF_RECORD_PARSER_ENABLED 0 -#endif -// NFC_NDEF_RECORD_PARSER_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_NDEF_RECORD_PARSER_LOG_ENABLED -#define NFC_NDEF_RECORD_PARSER_LOG_ENABLED 0 -#endif -// NFC_NDEF_RECORD_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_NDEF_RECORD_PARSER_LOG_LEVEL -#define NFC_NDEF_RECORD_PARSER_LOG_LEVEL 3 -#endif - -// NFC_NDEF_RECORD_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_NDEF_RECORD_PARSER_INFO_COLOR -#define NFC_NDEF_RECORD_PARSER_INFO_COLOR 0 -#endif - -// - -// - -// NFC_NDEF_TEXT_RECORD_ENABLED - nfc_text_rec - Encoding data for a text record for NFC Tag - - -#ifndef NFC_NDEF_TEXT_RECORD_ENABLED -#define NFC_NDEF_TEXT_RECORD_ENABLED 0 -#endif - -// NFC_NDEF_URI_MSG_ENABLED - nfc_uri_msg - Encoding data for NDEF message with URI record for NFC Tag - - -#ifndef NFC_NDEF_URI_MSG_ENABLED -#define NFC_NDEF_URI_MSG_ENABLED 0 -#endif - -// NFC_NDEF_URI_REC_ENABLED - nfc_uri_rec - Encoding data for a URI record for NFC Tag - - -#ifndef NFC_NDEF_URI_REC_ENABLED -#define NFC_NDEF_URI_REC_ENABLED 0 -#endif - -// NFC_T2T_HAL_ENABLED - nfc_t2t_hal - Hardware Abstraction Layer for NFC library. -//========================================================== -#ifndef NFC_T2T_HAL_ENABLED -#define NFC_T2T_HAL_ENABLED 0 -#endif -// NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NFCT_CONFIG_IRQ_PRIORITY -#define NFCT_CONFIG_IRQ_PRIORITY 7 -#endif - -// HAL_NFC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef HAL_NFC_CONFIG_LOG_ENABLED -#define HAL_NFC_CONFIG_LOG_ENABLED 0 -#endif -// HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef HAL_NFC_CONFIG_LOG_LEVEL -#define HAL_NFC_CONFIG_LOG_LEVEL 3 -#endif - -// HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_INFO_COLOR -#define HAL_NFC_CONFIG_INFO_COLOR 0 -#endif - -// HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_DEBUG_COLOR -#define HAL_NFC_CONFIG_DEBUG_COLOR 0 -#endif - -// HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef HAL_NFC_CONFIG_LOG_LEVEL -#define HAL_NFC_CONFIG_LOG_LEVEL 3 -#endif - -// HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_INFO_COLOR -#define HAL_NFC_CONFIG_INFO_COLOR 0 -#endif - -// HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_DEBUG_COLOR -#define HAL_NFC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// HAL_NFC_CONFIG_DEBUG_PIN_ENABLED - Enables pin debug in the module. -//========================================================== -#ifndef HAL_NFC_CONFIG_DEBUG_PIN_ENABLED -#define HAL_NFC_CONFIG_DEBUG_PIN_ENABLED 0 -#endif -// HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN -#define HAL_NFC_HCLOCK_ON_DEBUG_PIN 11 -#endif - -// HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN -#define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 12 -#endif - -// HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN -#define HAL_NFC_NFC_EVENT_DEBUG_PIN 24 -#endif - -// HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN -#define HAL_NFC_DETECT_EVENT_DEBUG_PIN 25 -#endif - -// HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN -#define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 28 -#endif - -// HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN -#define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 -#endif - -// HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN -#define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 -#endif - -// HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN -#define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN -#define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN -#define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 -#endif - -// - -// - -// NFC_T2T_PARSER_ENABLED - nfc_type_2_tag_parser - Parser for decoding Type 2 Tag data -//========================================================== -#ifndef NFC_T2T_PARSER_ENABLED -#define NFC_T2T_PARSER_ENABLED 0 -#endif -// NFC_T2T_PARSER_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_T2T_PARSER_LOG_ENABLED -#define NFC_T2T_PARSER_LOG_ENABLED 0 -#endif -// NFC_T2T_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_T2T_PARSER_LOG_LEVEL -#define NFC_T2T_PARSER_LOG_LEVEL 3 -#endif - -// NFC_T2T_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_T2T_PARSER_INFO_COLOR -#define NFC_T2T_PARSER_INFO_COLOR 0 -#endif - -// - -// - -// NFC_T4T_APDU_ENABLED - nfc_t4t_apdu - APDU encoder/decoder for Type 4 Tag -//========================================================== -#ifndef NFC_T4T_APDU_ENABLED -#define NFC_T4T_APDU_ENABLED 0 -#endif -// NFC_T4T_APDU_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_T4T_APDU_LOG_ENABLED -#define NFC_T4T_APDU_LOG_ENABLED 0 -#endif -// NFC_T4T_APDU_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_T4T_APDU_LOG_LEVEL -#define NFC_T4T_APDU_LOG_LEVEL 3 -#endif - -// NFC_T4T_APDU_LOG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_T4T_APDU_LOG_COLOR -#define NFC_T4T_APDU_LOG_COLOR 0 -#endif - -// - -// - -// NFC_T4T_CC_FILE_PARSER_ENABLED - nfc_t4t_cc_file - Capability Container file for Type 4 Tag -//========================================================== -#ifndef NFC_T4T_CC_FILE_PARSER_ENABLED -#define NFC_T4T_CC_FILE_PARSER_ENABLED 0 -#endif -// NFC_T4T_CC_FILE_PARSER_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_T4T_CC_FILE_PARSER_LOG_ENABLED -#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED 0 -#endif -// NFC_T4T_CC_FILE_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_T4T_CC_FILE_PARSER_LOG_LEVEL -#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL 3 -#endif - -// NFC_T4T_CC_FILE_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_T4T_CC_FILE_PARSER_INFO_COLOR -#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR 0 -#endif - -// - -// - -// NFC_T4T_HAL_ENABLED - nfc_t4t_hal - Hardware Abstraction Layer for NFC library. -//========================================================== -#ifndef NFC_T4T_HAL_ENABLED -#define NFC_T4T_HAL_ENABLED 0 -#endif -// NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef NFCT_CONFIG_IRQ_PRIORITY -#define NFCT_CONFIG_IRQ_PRIORITY 7 -#endif - -// HAL_NFC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef HAL_NFC_CONFIG_LOG_ENABLED -#define HAL_NFC_CONFIG_LOG_ENABLED 0 -#endif -// HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef HAL_NFC_CONFIG_LOG_LEVEL -#define HAL_NFC_CONFIG_LOG_LEVEL 3 -#endif - -// HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_INFO_COLOR -#define HAL_NFC_CONFIG_INFO_COLOR 0 -#endif - -// HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_DEBUG_COLOR -#define HAL_NFC_CONFIG_DEBUG_COLOR 0 -#endif - -// HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef HAL_NFC_CONFIG_LOG_LEVEL -#define HAL_NFC_CONFIG_LOG_LEVEL 3 -#endif - -// HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_INFO_COLOR -#define HAL_NFC_CONFIG_INFO_COLOR 0 -#endif - -// HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef HAL_NFC_CONFIG_DEBUG_COLOR -#define HAL_NFC_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// HAL_NFC_CONFIG_DEBUG_PIN_ENABLED - Enables pin debug in the module. -//========================================================== -#ifndef HAL_NFC_CONFIG_DEBUG_PIN_ENABLED -#define HAL_NFC_CONFIG_DEBUG_PIN_ENABLED 0 -#endif -// HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN -#define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 -#endif - -// HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN -#define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 -#endif - -// HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN -#define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN -#define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN -#define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN -#define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 -#endif - -// HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN -#define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 -#endif - -// HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN -#define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN -#define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 -#endif - -// HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected - -#ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN -#define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 -#endif - -// - -// - -// NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED - nfc_t4t_hl_detection_procedures - NDEF Detection Procedure for Type 4 Tag -//========================================================== -#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED -#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED 0 -#endif -// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED -#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED 0 -#endif -// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL -#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL 3 -#endif - -// NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR -#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR 0 -#endif - -// - -// APDU_BUFF_SIZE - Size (in bytes) of the buffer for APDU storage -#ifndef APDU_BUFF_SIZE -#define APDU_BUFF_SIZE 250 -#endif - -// CC_STORAGE_BUFF_SIZE - Size (in bytes) of the buffer for CC file storage -#ifndef CC_STORAGE_BUFF_SIZE -#define CC_STORAGE_BUFF_SIZE 64 -#endif - -// - -// NFC_T4T_TLV_BLOCK_PARSER_ENABLED - nfc_t4t_tlv_block - TLV block for Type 4 Tag -//========================================================== -#ifndef NFC_T4T_TLV_BLOCK_PARSER_ENABLED -#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED 0 -#endif -// NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED -#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED 0 -#endif -// NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL -#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL 3 -#endif - -// NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR -#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR 0 -#endif - -// - -// - -// -//========================================================== - -// nRF_SoftDevice - -//========================================================== -// NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler -//========================================================== -#ifndef NRF_SDH_BLE_ENABLED -#define NRF_SDH_BLE_ENABLED 0 -#endif -// BLE Stack configuration - Stack configuration parameters - -// The SoftDevice handler will configure the stack with these parameters when calling @ref nrf_sdh_ble_default_cfg_set. -// Other libraries might depend on these values; keep them up-to-date even if you are not explicitely calling @ref nrf_sdh_ble_default_cfg_set. -//========================================================== -// NRF_SDH_BLE_GAP_DATA_LENGTH <27-251> - - -// Requested BLE GAP data length to be negotiated. - -#ifndef NRF_SDH_BLE_GAP_DATA_LENGTH -#define NRF_SDH_BLE_GAP_DATA_LENGTH 27 -#endif - -// NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. -#ifndef NRF_SDH_BLE_PERIPHERAL_LINK_COUNT -#define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT 0 -#endif - -// NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. -#ifndef NRF_SDH_BLE_CENTRAL_LINK_COUNT -#define NRF_SDH_BLE_CENTRAL_LINK_COUNT 0 -#endif - -// NRF_SDH_BLE_TOTAL_LINK_COUNT - Total link count. -// Maximum number of total concurrent connections using the default configuration. - -#ifndef NRF_SDH_BLE_TOTAL_LINK_COUNT -#define NRF_SDH_BLE_TOTAL_LINK_COUNT 1 -#endif - -// NRF_SDH_BLE_GAP_EVENT_LENGTH - GAP event length. -// The time set aside for this connection on every connection interval in 1.25 ms units. - -#ifndef NRF_SDH_BLE_GAP_EVENT_LENGTH -#define NRF_SDH_BLE_GAP_EVENT_LENGTH 6 -#endif - -// NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. -#ifndef NRF_SDH_BLE_GATT_MAX_MTU_SIZE -#define NRF_SDH_BLE_GATT_MAX_MTU_SIZE 23 -#endif - -// NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. -#ifndef NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE -#define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE 1408 -#endif - -// NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. -#ifndef NRF_SDH_BLE_VS_UUID_COUNT -#define NRF_SDH_BLE_VS_UUID_COUNT 0 -#endif - -// NRF_SDH_BLE_SERVICE_CHANGED - Include the Service Changed characteristic in the Attribute Table. - - -#ifndef NRF_SDH_BLE_SERVICE_CHANGED -#define NRF_SDH_BLE_SERVICE_CHANGED 0 -#endif - -// -//========================================================== - -// BLE Observers - Observers and priority levels - -//========================================================== -// NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. -// This setting configures the number of priority levels available for BLE event handlers. -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_BLE_OBSERVER_PRIO_LEVELS -#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 4 -#endif - -// BLE Observers priorities - Invididual priorities - -//========================================================== -// BLE_ADV_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Advertising module. - -#ifndef BLE_ADV_BLE_OBSERVER_PRIO -#define BLE_ADV_BLE_OBSERVER_PRIO 1 -#endif - -// BLE_ANCS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Apple Notification Service Client. - -#ifndef BLE_ANCS_C_BLE_OBSERVER_PRIO -#define BLE_ANCS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_ANS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Alert Notification Service Client. - -#ifndef BLE_ANS_C_BLE_OBSERVER_PRIO -#define BLE_ANS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_BAS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Battery Service. - -#ifndef BLE_BAS_BLE_OBSERVER_PRIO -#define BLE_BAS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_BAS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Battery Service Client. - -#ifndef BLE_BAS_C_BLE_OBSERVER_PRIO -#define BLE_BAS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_BPS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Blood Pressure Service. - -#ifndef BLE_BPS_BLE_OBSERVER_PRIO -#define BLE_BPS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_CONN_PARAMS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Connection parameters module. - -#ifndef BLE_CONN_PARAMS_BLE_OBSERVER_PRIO -#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 1 -#endif - -// BLE_CONN_STATE_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Connection State module. - -#ifndef BLE_CONN_STATE_BLE_OBSERVER_PRIO -#define BLE_CONN_STATE_BLE_OBSERVER_PRIO 0 -#endif - -// BLE_CSCS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Cycling Speed and Cadence Service. - -#ifndef BLE_CSCS_BLE_OBSERVER_PRIO -#define BLE_CSCS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_CTS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Current Time Service Client. - -#ifndef BLE_CTS_C_BLE_OBSERVER_PRIO -#define BLE_CTS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_DB_DISC_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Database Discovery module. - -#ifndef BLE_DB_DISC_BLE_OBSERVER_PRIO -#define BLE_DB_DISC_BLE_OBSERVER_PRIO 1 -#endif - -// BLE_DFU_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the DFU Service. - -#ifndef BLE_DFU_BLE_OBSERVER_PRIO -#define BLE_DFU_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_DIS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Device Information Client. - -#ifndef BLE_DIS_C_BLE_OBSERVER_PRIO -#define BLE_DIS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_GLS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Glucose Service. - -#ifndef BLE_GLS_BLE_OBSERVER_PRIO -#define BLE_GLS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_HIDS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Human Interface Device Service. - -#ifndef BLE_HIDS_BLE_OBSERVER_PRIO -#define BLE_HIDS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_HRS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Heart Rate Service. - -#ifndef BLE_HRS_BLE_OBSERVER_PRIO -#define BLE_HRS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_HRS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Heart Rate Service Client. - -#ifndef BLE_HRS_C_BLE_OBSERVER_PRIO -#define BLE_HRS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_HTS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Health Thermometer Service. - -#ifndef BLE_HTS_BLE_OBSERVER_PRIO -#define BLE_HTS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_IAS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Immediate Alert Service. - -#ifndef BLE_IAS_BLE_OBSERVER_PRIO -#define BLE_IAS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_IAS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Immediate Alert Service Client. - -#ifndef BLE_IAS_C_BLE_OBSERVER_PRIO -#define BLE_IAS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_LBS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the LED Button Service. - -#ifndef BLE_LBS_BLE_OBSERVER_PRIO -#define BLE_LBS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_LBS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the LED Button Service Client. - -#ifndef BLE_LBS_C_BLE_OBSERVER_PRIO -#define BLE_LBS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_LESC_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the BLE LESC module. - -#ifndef BLE_LESC_OBSERVER_PRIO -#define BLE_LESC_OBSERVER_PRIO 2 -#endif - -// BLE_LLS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Link Loss Service. - -#ifndef BLE_LLS_BLE_OBSERVER_PRIO -#define BLE_LLS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_LNS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Location Navigation Service. - -#ifndef BLE_LNS_BLE_OBSERVER_PRIO -#define BLE_LNS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_NUS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the UART Service. - -#ifndef BLE_NUS_BLE_OBSERVER_PRIO -#define BLE_NUS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_NUS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the UART Central Service. - -#ifndef BLE_NUS_C_BLE_OBSERVER_PRIO -#define BLE_NUS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_OTS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Object transfer service. - -#ifndef BLE_OTS_BLE_OBSERVER_PRIO -#define BLE_OTS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_OTS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Object transfer service client. - -#ifndef BLE_OTS_C_BLE_OBSERVER_PRIO -#define BLE_OTS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_RSCS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Running Speed and Cadence Service. - -#ifndef BLE_RSCS_BLE_OBSERVER_PRIO -#define BLE_RSCS_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_RSCS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Running Speed and Cadence Client. - -#ifndef BLE_RSCS_C_BLE_OBSERVER_PRIO -#define BLE_RSCS_C_BLE_OBSERVER_PRIO 2 -#endif - -// BLE_TPS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the TX Power Service. - -#ifndef BLE_TPS_BLE_OBSERVER_PRIO -#define BLE_TPS_BLE_OBSERVER_PRIO 2 -#endif - -// BSP_BTN_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Button Control module. - -#ifndef BSP_BTN_BLE_OBSERVER_PRIO -#define BSP_BTN_BLE_OBSERVER_PRIO 1 -#endif - -// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the NFC pairing library. - -#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO -#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 -#endif - -// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the NFC pairing library. - -#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO -#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 -#endif - -// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the NFC pairing library. - -#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO -#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 -#endif - -// NRF_BLE_BMS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Bond Management Service. - -#ifndef NRF_BLE_BMS_BLE_OBSERVER_PRIO -#define NRF_BLE_BMS_BLE_OBSERVER_PRIO 2 -#endif - -// NRF_BLE_CGMS_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Contiuon Glucose Monitoring Service. - -#ifndef NRF_BLE_CGMS_BLE_OBSERVER_PRIO -#define NRF_BLE_CGMS_BLE_OBSERVER_PRIO 2 -#endif - -// NRF_BLE_ES_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Eddystone module. - -#ifndef NRF_BLE_ES_BLE_OBSERVER_PRIO -#define NRF_BLE_ES_BLE_OBSERVER_PRIO 2 -#endif - -// NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the GATT Service Client. - -#ifndef NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO -#define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO 2 -#endif - -// NRF_BLE_GATT_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the GATT module. - -#ifndef NRF_BLE_GATT_BLE_OBSERVER_PRIO -#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 1 -#endif - -// NRF_BLE_QWR_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Queued writes module. - -#ifndef NRF_BLE_QWR_BLE_OBSERVER_PRIO -#define NRF_BLE_QWR_BLE_OBSERVER_PRIO 2 -#endif - -// PM_BLE_OBSERVER_PRIO - Priority with which BLE events are dispatched to the Peer Manager module. -#ifndef PM_BLE_OBSERVER_PRIO -#define PM_BLE_OBSERVER_PRIO 1 -#endif - -// -//========================================================== - -// -//========================================================== - - -// - -// NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler -//========================================================== -#ifndef NRF_SDH_ENABLED -#define NRF_SDH_ENABLED 0 -#endif -// Dispatch model - -// This setting configures how Stack events are dispatched to the application. -//========================================================== -// NRF_SDH_DISPATCH_MODEL - - -// NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context. -// NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler. -// NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually. -// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT -// <1=> NRF_SDH_DISPATCH_MODEL_APPSH -// <2=> NRF_SDH_DISPATCH_MODEL_POLLING - -#ifndef NRF_SDH_DISPATCH_MODEL -#define NRF_SDH_DISPATCH_MODEL 0 -#endif - -// -//========================================================== - -// Clock - SoftDevice clock configuration - -//========================================================== -// NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source. - -// <0=> NRF_CLOCK_LF_SRC_RC -// <1=> NRF_CLOCK_LF_SRC_XTAL -// <2=> NRF_CLOCK_LF_SRC_SYNTH - -#ifndef NRF_SDH_CLOCK_LF_SRC -#define NRF_SDH_CLOCK_LF_SRC 1 -#endif - -// NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. -#ifndef NRF_SDH_CLOCK_LF_RC_CTIV -#define NRF_SDH_CLOCK_LF_RC_CTIV 0 -#endif - -// NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. -// How often (in number of calibration intervals) the RC oscillator shall be calibrated -// if the temperature has not changed. - -#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV -#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0 -#endif - -// NRF_SDH_CLOCK_LF_ACCURACY - External clock accuracy used in the LL to compute timing. - -// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM -// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM -// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM -// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM -// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM -// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM -// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM -// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM -// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM -// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM -// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM -// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM - -#ifndef NRF_SDH_CLOCK_LF_ACCURACY -#define NRF_SDH_CLOCK_LF_ACCURACY 7 -#endif - -// -//========================================================== - -// SDH Observers - Observers and priority levels - -//========================================================== -// NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. -// This setting configures the number of priority levels available for the SoftDevice request event handlers. -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_REQ_OBSERVER_PRIO_LEVELS -#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2 -#endif - -// NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. -// This setting configures the number of priority levels available for the SoftDevice state event handlers. -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_STATE_OBSERVER_PRIO_LEVELS -#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2 -#endif - -// NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. -// This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC). -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_STACK_OBSERVER_PRIO_LEVELS -#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS 2 -#endif - - -// State Observers priorities - Invididual priorities - -//========================================================== -// CLOCK_CONFIG_STATE_OBSERVER_PRIO -// Priority with which state events are dispatched to the Clock driver. - -#ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO -#define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0 -#endif - -// POWER_CONFIG_STATE_OBSERVER_PRIO -// Priority with which state events are dispatched to the Power driver. - -#ifndef POWER_CONFIG_STATE_OBSERVER_PRIO -#define POWER_CONFIG_STATE_OBSERVER_PRIO 0 -#endif - -// RNG_CONFIG_STATE_OBSERVER_PRIO -// Priority with which state events are dispatched to this module. - -#ifndef RNG_CONFIG_STATE_OBSERVER_PRIO -#define RNG_CONFIG_STATE_OBSERVER_PRIO 0 -#endif - -// -//========================================================== - -// Stack Event Observers priorities - Invididual priorities - -//========================================================== -// NRF_SDH_ANT_STACK_OBSERVER_PRIO -// This setting configures the priority with which ANT events are processed with respect to other events coming from the stack. -// Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC. -// Zero is the highest priority. - -#ifndef NRF_SDH_ANT_STACK_OBSERVER_PRIO -#define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0 -#endif - -// NRF_SDH_BLE_STACK_OBSERVER_PRIO -// This setting configures the priority with which BLE events are processed with respect to other events coming from the stack. -// Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC. -// Zero is the highest priority. - -#ifndef NRF_SDH_BLE_STACK_OBSERVER_PRIO -#define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0 -#endif - -// NRF_SDH_SOC_STACK_OBSERVER_PRIO -// This setting configures the priority with which SoC events are processed with respect to other events coming from the stack. -// Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE. -// Zero is the highest priority. - -#ifndef NRF_SDH_SOC_STACK_OBSERVER_PRIO -#define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0 -#endif - -// -//========================================================== - -// -//========================================================== - - -// - -// NRF_SDH_SOC_ENABLED - nrf_sdh_soc - SoftDevice SoC event handler -//========================================================== -#ifndef NRF_SDH_SOC_ENABLED -#define NRF_SDH_SOC_ENABLED 0 -#endif -// SoC Observers - Observers and priority levels - -//========================================================== -// NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. -// This setting configures the number of priority levels available for the SoC event handlers. -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_SOC_OBSERVER_PRIO_LEVELS -#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS 2 -#endif - -// SoC Observers priorities - Invididual priorities - -//========================================================== -// BLE_ADV_SOC_OBSERVER_PRIO -// Priority with which SoC events are dispatched to the Advertising module. - -#ifndef BLE_ADV_SOC_OBSERVER_PRIO -#define BLE_ADV_SOC_OBSERVER_PRIO 1 -#endif - -// BLE_DFU_SOC_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the DFU Service. - -#ifndef BLE_DFU_SOC_OBSERVER_PRIO -#define BLE_DFU_SOC_OBSERVER_PRIO 1 -#endif - -// CLOCK_CONFIG_SOC_OBSERVER_PRIO -// Priority with which SoC events are dispatched to the Clock driver. - -#ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO -#define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0 -#endif - -// POWER_CONFIG_SOC_OBSERVER_PRIO -// Priority with which SoC events are dispatched to the Power driver. - -#ifndef POWER_CONFIG_SOC_OBSERVER_PRIO -#define POWER_CONFIG_SOC_OBSERVER_PRIO 0 -#endif - -// -//========================================================== - -// -//========================================================== - - -// - -// -//========================================================== - -// <<< end of configuration section >>> -#endif //SDK_CONFIG_H - diff --git a/targets/nrf52840/usb.c b/targets/nrf52840/usb.c deleted file mode 100644 index 51faca5..0000000 --- a/targets/nrf52840/usb.c +++ /dev/null @@ -1,1146 +0,0 @@ -/** - * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include -#include -#include "nrf.h" -#include "nrf_drv_usbd.h" -#include "nrf_drv_clock.h" -#include "nrf_gpio.h" -#include "nrf_delay.h" -#include "nrf_drv_power.h" -#include "nrf_log.h" -#include "nrf_log_ctrl.h" -#include "nrf_log_default_backends.h" -#include "app_timer.h" -#include "app_error.h" -#include "app_fifo.h" -#include "bsp.h" -#include "bsp_cli.h" -#include "nrf_cli.h" - -#include "util.h" -#include "log.h" -#include "usb.h" - -#define BTN_DATA_SEND 0 -#define BTN_DATA_KEY_RELEASE (bsp_event_t)(BSP_EVENT_KEY_LAST + 1) - -/** - * @brief Button used to simulate mouse move - * - * Every button press would move the cursor one step in the square. - */ -#define BTN_MOUSE_MOVE BSP_BOARD_BUTTON_0 -/** - * @brief Button for system OFF request - * - * This button would set the request for system OFF. - */ -#define BTN_SYSTEM_OFF BSP_BOARD_BUTTON_1 - -/** - * @brief Configuration status LED - * - * This LED would blink quickly (5 Hz) when device is not configured - * or slowly (1 Hz) when configured and working properly. - */ -#define LED_USB_STATUS BSP_BOARD_LED_0 -/** - * @brief Power detect LED - * - * The LED is ON when connection is detected on USB port. - * It is turned off when connection is removed. - */ -#define LED_USB_POWER BSP_BOARD_LED_1 - -/** - * @brief Running LED - * - * LED that turns on when program is not sleeping - */ -#define LED_RUNNING BSP_BOARD_LED_2 - -/** - * @brief Active LED - * - * LED that turns on when program is not in system OFF - */ -#define LED_ACTIVE BSP_BOARD_LED_3 - -/** - * @brief Enable power USB detection - * - * Configure if example supports USB port connection - */ -#ifndef USBD_POWER_DETECTION -#define USBD_POWER_DETECTION false -#endif - -/** - * @brief Startup delay - * - * Number of microseconds to start USBD after powering up. - * Kind of port insert debouncing. - */ -#define STARTUP_DELAY 100 - - -/** Maximum size of the packed transfered by EP0 */ -#define EP0_MAXPACKETSIZE NRF_DRV_USBD_EPSIZE - -/** Device descriptor */ -#define USBD_DEVICE_DESCRIPTOR \ - 0x12, /* bLength | size of descriptor */\ - 0x01, /* bDescriptorType | descriptor type */\ - 0x00, 0x02, /* bcdUSB | USB spec release (ver 2.0) */\ - 0x00, /* bDeviceClass ¦ class code (each interface specifies class information) */\ - 0x00, /* bDeviceSubClass ¦ device sub-class (must be set to 0 because class code is 0) */\ - 0x00, /* bDeviceProtocol | device protocol (no class specific protocol) */\ - EP0_MAXPACKETSIZE, /* bMaxPacketSize0 | maximum packet size (64 bytes) */\ - 0x15, 0x19, /* vendor ID (0x1915 Nordic) */\ - 0xAA, 0xAA, /* product ID (0x520A nRF52 HID mouse on nrf_drv) */\ - 0x05, 0x01, /* bcdDevice | final device release number in BCD Format */\ - USBD_STRING_MANUFACTURER_IX, /* iManufacturer | index of manufacturer string */\ - USBD_STRING_PRODUCT_IX, /* iProduct | index of product string */\ - USBD_STRING_SERIAL_IX, /* iSerialNumber | Serial Number string */\ - 0x01 /* bNumConfigurations | number of configurations */ - -/** Configuration descriptor */ -#define DEVICE_SELF_POWERED 0 -#define REMOTE_WU 1 - -#define USBD_CONFIG_DESCRIPTOR_SIZE 9 -#define USBD_CONFIG_DESCRIPTOR_FULL_SIZE (9 + (9 + 9 + 7 + 7)) -#define USBD_CONFIG_DESCRIPTOR \ - 0x09, /* bLength | length of descriptor */\ - 0x02, /* bDescriptorType | descriptor type (CONFIGURATION) */\ - USBD_CONFIG_DESCRIPTOR_FULL_SIZE, 0x00, /* wTotalLength | total length of descriptor(s) */\ - 0x01, /* bNumInterfaces */\ - 0x01, /* bConfigurationValue */\ - 0x00, /* index of string Configuration | configuration string index (not supported) */\ - 0x80| (((DEVICE_SELF_POWERED) ? 1U:0U)<<6) | (((REMOTE_WU) ? 1U:0U)<<5), /* bmAttributes */\ - 49 /* maximum power in steps of 2mA (98mA) */ - -#define USBD_INTERFACE0_DESCRIPTOR \ - 0x09, /* bLength */\ - 0x04, /* bDescriptorType | descriptor type (INTERFACE) */\ - 0x00, /* bInterfaceNumber */\ - 0x00, /* bAlternateSetting */\ - 0x02, /* bNumEndpoints | number of endpoints (1) */\ - 0x03, /* bInterfaceClass | interface class (3..defined by USB spec: HID) */\ - 0x00, /* bInterfaceSubClass |interface sub-class (0.. no boot interface) */\ - 0x00, /* bInterfaceProtocol | interface protocol (1..defined by USB spec: mouse) */\ - 0x00 /* interface string index (not supported) */ - -/** - * HID Table must normally be between Interface and EndPoint Descriptor - * as written in HID spec§7.1 but it doesn't work with OSR2.1 - */ -#define USBD_HID0_DESCRIPTOR \ - 0x09, /* bLength | length of descriptor (9 bytes) */\ - 0x21, /* bHIDDescriptor | descriptor type (HID) */\ - 0x11, 0x00, /* HID wBcdHID | Spec version 01.11 */\ - 0x00, /* bCountryCode | HW Target country */\ - 0x01, /* bNumDescriptors | Number of HID class descriptors to follow */\ - 0x22, /* bDescriptorType | Report descriptor type is 0x22 (report) */\ - (uint8_t)(USBD_MOUSE_REPORT_DESCRIPTOR_SIZE), /* Total length of Report descr., low byte */ \ - (uint8_t)(USBD_MOUSE_REPORT_DESCRIPTOR_SIZE / 256) /* Total length of Report descr., high byte */ - -#define USBD_ENDPOINT1_DESCRIPTOR \ - 0x07, /* bLength | length of descriptor (7 bytes) */\ - 0x05, /* bDescriptorType | descriptor type (ENDPOINT) */\ - 0x01, /* bEndpointAddress | endpoint address (IN endpoint, endpoint 1) */\ - 0x03, /* bmAttributes | endpoint attributes (interrupt) */\ - 0x40,0x00, /* bMaxPacketSizeLowByte,bMaxPacketSizeHighByte | maximum packet size (64 bytes) */\ - 0x08 /* bInterval | polling interval (10ms) */ - - -#define USBD_ENDPOINT2_DESCRIPTOR \ - 0x07, /* bLength | length of descriptor (7 bytes) */\ - 0x05, /* bDescriptorType | descriptor type (ENDPOINT) */\ - 0x81, /* bEndpointAddress | endpoint address (IN endpoint, endpoint 1) */\ - 0x03, /* bmAttributes | endpoint attributes (interrupt) */\ - 0x40,0x00, /* bMaxPacketSizeLowByte,bMaxPacketSizeHighByte | maximum packet size (64 bytes) */\ - 0x08 /* bInterval | polling interval (10ms) */ - - -/** - * String config descriptor - */ -#define USBD_STRING_LANG_IX 0x00 -#define USBD_STRING_LANG \ - 0x04, /* length of descriptor */\ - 0x03, /* descriptor type */\ - 0x09, /* */\ - 0x04 /* Supported LangID = 0x0409 (US-English) */ - -#define USBD_STRING_MANUFACTURER_IX 0x01 -#define USBD_STRING_MANUFACTURER \ - 16, /* length of descriptor (? bytes) */\ - 0x03, /* descriptor type */\ - 'N', 0x00, /* Define Unicode String "Nordic Semiconductor */\ - 'e', 0x00, \ - 'e', 0x00, \ - 'd', 0x00, \ - 'a', 0x00, \ - ' ', 0x00, \ - 'N', 0x00, - -#define USBD_STRING_PRODUCT_IX 0x02 -#define USBD_STRING_PRODUCT \ - 24, /* length of descriptor (? bytes) */\ - 0x03, /* descriptor type */\ - 'F', 0x00, /* generic unicode string for all devices */\ - 'I', 0x00, \ - 'D', 0x00, \ - 'O', 0x00, \ - '2', 0x00, \ - ' ', 0x00, \ - 'T', 0x00, \ - 'o', 0x00, \ - 'k', 0x00, \ - 'e', 0x00, \ - 'n', 0x00, \ - - -#define USBD_STRING_SERIAL_IX 0x00 - -#define USBD_MOUSE_REPORT_DESCRIPTOR_SIZE 34 -#define USBD_MOUSE_REPORT_DESCRIPTOR \ - 0x06, 0xd0, 0xf1,/* usage page (FIDO alliance). Global item */\ - 0x09, 0x01, /* usage (CTAPHID). Local item */\ - 0xA1, 0x01, /* collection (application) */\ - 0x09, 0x20, /* usage (FIDO_USAGE_DATA_IN) */\ - 0x15, 0x00, /* logical minimum (0) */\ - 0x26, 0xFF, 0x00,/* logical maximum (255) */\ - 0x75, 0x08, /* report size (8) */\ - 0x95, 0x40, /* report count (64) */\ - 0x81, 0x02, /* HID_Input (HID_Data | HID_Absolute | HID_Variable) */\ - 0x09, 0x21, /* usage (FIDO_USAGE_DATA_OUT) */\ - 0x15, 0x00, /* logical minimum (0) */\ - 0x26, 0xFF, 0x00,/* logical maximum (255) */\ - 0x75, 0x08, /* report size (8) */\ - 0x95, 0x40, /* report count (64) */\ - 0x91, 0x02, /* HID_Output (HID_Data | HID_Absolute | HID_Variable) */\ - 0xC0 /* End Collection */ - - -static const uint8_t get_descriptor_device[] = { - USBD_DEVICE_DESCRIPTOR -}; - -static const uint8_t get_descriptor_configuration[] = { - USBD_CONFIG_DESCRIPTOR, - USBD_INTERFACE0_DESCRIPTOR, - USBD_HID0_DESCRIPTOR, - USBD_ENDPOINT1_DESCRIPTOR, - USBD_ENDPOINT2_DESCRIPTOR -}; -static const uint8_t get_descriptor_string_lang[] = { - USBD_STRING_LANG -}; -static const uint8_t get_descriptor_string_manuf[] = { - USBD_STRING_MANUFACTURER -}; -static const uint8_t get_descriptor_string_prod[] = { - USBD_STRING_PRODUCT -}; -static const uint8_t get_descriptor_report_interface_0[] = { - USBD_MOUSE_REPORT_DESCRIPTOR -}; - -static const uint8_t get_config_resp_configured[] = {1}; -static const uint8_t get_config_resp_unconfigured[] = {0}; - -static const uint8_t get_status_device_resp_nrwu[] = { - ((DEVICE_SELF_POWERED) ? 1 : 0), //LSB first: self-powered, no remoteWk - 0 -}; -static const uint8_t get_status_device_resp_rwu[] = { - ((DEVICE_SELF_POWERED) ? 1 : 0) | 2, //LSB first: self-powered, remoteWk - 0 -}; - -static const uint8_t get_status_interface_resp[] = {0, 0}; -static const uint8_t get_status_ep_halted_resp[] = {1, 0}; -static const uint8_t get_status_ep_active_resp[] = {0, 0}; - - -#define GET_CONFIG_DESC_SIZE sizeof(get_descriptor_configuration) -#define GET_INTERFACE_DESC_SIZE 9 -#define GET_HID_DESC_SIZE 9 -#define GET_ENDPOINT_DESC_SIZE 7 - -#define get_descriptor_interface_0 \ - &get_descriptor_configuration[9] -#define get_descriptor_hid_0 \ - &get_descriptor_configuration[9+GET_INTERFACE_DESC_SIZE] -#define get_descriptor_endpoint_1 \ - &get_descriptor_configuration[9+GET_INTERFACE_DESC_SIZE+GET_HID_DESC_SIZE] -#define get_descriptor_endpoint_2 \ - &get_descriptor_configuration[9+GET_INTERFACE_DESC_SIZE+GET_HID_DESC_SIZE+7] - - -/** - * @brief USB configured flag - * - * The flag that is used to mark the fact that USB is configured and ready - * to transmit data - */ -static volatile bool m_usbd_configured = false; - - -/** - * @brief Mark the fact if remote wake up is enabled - * - * The internal flag that marks if host enabled the remote wake up functionality in this device. - */ -static -#if REMOTE_WU - volatile // Disallow optimization only if Remote wakeup is enabled -#endif -bool m_usbd_rwu_enabled = false; - -/** - * @brief Current mouse position - * - * The index of current mouse position that would be changed to real offset. - */ -static volatile uint8_t m_mouse_position = 0; - -/** - * @brief The flag for mouse position send pending - * - * Setting this flag means that USB endpoint is busy by sending - * last mouse position. - */ -static volatile bool m_send_mouse_position = false; - -/** - * @brief The requested suspend state - * - * The currently requested suspend state based on the events - * received from USBD library. - * If the value here is different than the @ref m_usbd_suspended - * the state changing would be processed inside main loop. - */ -static volatile bool m_usbd_suspend_state_req = false; - -/** - * @brief System OFF request flag - * - * This flag is used in button event processing and marks the fact that - * system OFF should be activated from main loop. - */ -static volatile bool m_system_off_req = false; - - -/** - * @brief Setup all the endpoints for selected configuration - * - * Function sets all the endpoints for specific configuration. - * - * @note - * Setting the configuration index 0 means technically disabling the HID interface. - * Such configuration should be set when device is starting or USB reset is detected. - * - * @param index Configuration index - * - * @retval NRF_ERROR_INVALID_PARAM Invalid configuration - * @retval NRF_SUCCESS Configuration successfully set - */ -static ret_code_t ep_configuration(uint8_t index) -{ - if ( index == 1 ) - { - nrf_drv_usbd_ep_dtoggle_clear(NRF_DRV_USBD_EPIN1); - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN1); - nrf_drv_usbd_ep_enable(NRF_DRV_USBD_EPIN1); - - nrf_drv_usbd_ep_dtoggle_clear(NRF_DRV_USBD_EPOUT1); - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPOUT1); - nrf_drv_usbd_ep_enable(NRF_DRV_USBD_EPOUT1); - - m_usbd_configured = true; - nrf_drv_usbd_setup_clear(); - } - else if ( index == 0 ) - { - nrf_drv_usbd_ep_disable(NRF_DRV_USBD_EPIN1); - m_usbd_configured = false; - nrf_drv_usbd_setup_clear(); - } - else - { - return NRF_ERROR_INVALID_PARAM; - } - return NRF_SUCCESS; -} - -/** - * @name Processing setup requests - * - * @{ - */ -/** - * @brief Respond on ep 0 - * - * Auxiliary function for sending respond on endpoint 0 - * @param[in] p_setup Pointer to setup data from current setup request. - * It would be used to calculate the size of data to send. - * @param[in] p_data Pointer to the data to send. - * @param[in] size Number of bytes to send. - * @note Data pointed by p_data has to be available till the USBD_EVT_BUFREADY event. - */ -static void respond_setup_data( - nrf_drv_usbd_setup_t const * const p_setup, - void const * p_data, size_t size) -{ - /* Check the size against required response size */ - if (size > p_setup->wLength) - { - size = p_setup->wLength; - } - ret_code_t ret; - nrf_drv_usbd_transfer_t transfer = - { - .p_data = {.tx = p_data}, - .size = size - }; - ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, &transfer); - if (ret != NRF_SUCCESS) - { - printf1(TAG_USB,"Transfer starting failed: %lu", (uint32_t)ret); - } - ASSERT(ret == NRF_SUCCESS); - UNUSED_VARIABLE(ret); -} - - -/** React to GetStatus */ -static void usbd_setup_GetStatus(nrf_drv_usbd_setup_t const * const p_setup) -{ - switch (p_setup->bmRequestType) - { - case 0x80: // Device - if (((p_setup->wIndex) & 0xff) == 0) - { - respond_setup_data( - p_setup, - m_usbd_rwu_enabled ? get_status_device_resp_rwu : get_status_device_resp_nrwu, - sizeof(get_status_device_resp_nrwu)); - return; - } - break; - case 0x81: // Interface - if (m_usbd_configured) // Respond only if configured - { - if (((p_setup->wIndex) & 0xff) == 0) // Only interface 0 supported - { - respond_setup_data( - p_setup, - get_status_interface_resp, - sizeof(get_status_interface_resp)); - return; - } - } - break; - case 0x82: // Endpoint - if (((p_setup->wIndex) & 0xff) == 0) // Endpoint 0 - { - respond_setup_data( - p_setup, - get_status_ep_active_resp, - sizeof(get_status_ep_active_resp)); - return; - } - if (m_usbd_configured) // Other endpoints responds if configured - { - if (((p_setup->wIndex) & 0xff) == NRF_DRV_USBD_EPIN1) - { - if (nrf_drv_usbd_ep_stall_check(NRF_DRV_USBD_EPIN1)) - { - respond_setup_data( - p_setup, - get_status_ep_halted_resp, - sizeof(get_status_ep_halted_resp)); - return; - } - else - { - respond_setup_data( - p_setup, - get_status_ep_active_resp, - sizeof(get_status_ep_active_resp)); - return; - } - } - if (((p_setup->wIndex) & 0xff) == NRF_DRV_USBD_EPOUT1) - { - if (nrf_drv_usbd_ep_stall_check(NRF_DRV_USBD_EPOUT1)) - { - respond_setup_data( - p_setup, - get_status_ep_halted_resp, - sizeof(get_status_ep_halted_resp)); - return; - } - else - { - respond_setup_data( - p_setup, - get_status_ep_active_resp, - sizeof(get_status_ep_active_resp)); - return; - } - } - - } - break; - default: - break; // Just go to stall - } - printf1(TAG_USB,"Unknown status: 0x%2x", p_setup->bmRequestType); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_ClearFeature(nrf_drv_usbd_setup_t const * const p_setup) -{ - if ((p_setup->bmRequestType) == 0x02) // standard request, recipient=endpoint - { - if ((p_setup->wValue) == 0) - { - if ((p_setup->wIndex) == NRF_DRV_USBD_EPIN1) - { - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN1); - nrf_drv_usbd_setup_clear(); - return; - } - } - } - else if ((p_setup->bmRequestType) == 0x0) // standard request, recipient=device - { - if (REMOTE_WU) - { - if ((p_setup->wValue) == 1) // Feature Wakeup - { - m_usbd_rwu_enabled = false; - nrf_drv_usbd_setup_clear(); - return; - } - } - } - printf1(TAG_USB,"Unknown feature to clear"); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_SetFeature(nrf_drv_usbd_setup_t const * const p_setup) -{ - if ((p_setup->bmRequestType) == 0x02) // standard request, recipient=endpoint - { - if ((p_setup->wValue) == 0) // Feature HALT - { - if ((p_setup->wIndex) == NRF_DRV_USBD_EPIN1) - { - nrf_drv_usbd_ep_stall(NRF_DRV_USBD_EPIN1); - nrf_drv_usbd_setup_clear(); - return; - } - } - } - else if ((p_setup->bmRequestType) == 0x0) // standard request, recipient=device - { - if (REMOTE_WU) - { - if ((p_setup->wValue) == 1) // Feature Wakeup - { - m_usbd_rwu_enabled = true; - nrf_drv_usbd_setup_clear(); - return; - } - } - } - printf1(TAG_USB, "Unknown feature to set"); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_GetDescriptor(nrf_drv_usbd_setup_t const * const p_setup) -{ - //determine which descriptor has been asked for - switch ((p_setup->wValue) >> 8) - { - case 1: // Device - if ((p_setup->bmRequestType) == 0x80) - { - respond_setup_data( - p_setup, - get_descriptor_device, - sizeof(get_descriptor_device)); - return; - } - break; - case 2: // Configuration - if ((p_setup->bmRequestType) == 0x80) - { - respond_setup_data( - p_setup, - get_descriptor_configuration, - GET_CONFIG_DESC_SIZE); - return; - } - break; - case 3: // String - if ((p_setup->bmRequestType) == 0x80) - { - // Select the string - switch ((p_setup->wValue) & 0xFF) - { - case USBD_STRING_LANG_IX: - respond_setup_data( - p_setup, - get_descriptor_string_lang, - sizeof(get_descriptor_string_lang)); - return; - case USBD_STRING_MANUFACTURER_IX: - respond_setup_data( - p_setup, - get_descriptor_string_manuf, - sizeof(get_descriptor_string_manuf)); - return; - case USBD_STRING_PRODUCT_IX: - respond_setup_data(p_setup, - get_descriptor_string_prod, - sizeof(get_descriptor_string_prod)); - return; - default: - break; - } - } - break; - case 4: // Interface - if ((p_setup->bmRequestType) == 0x80) - { - // Which interface? - if ((((p_setup->wValue) & 0xFF) == 0)) - { - respond_setup_data( - p_setup, - get_descriptor_interface_0, - GET_INTERFACE_DESC_SIZE); - return; - } - } - break; - case 5: // Endpoint - if ((p_setup->bmRequestType) == 0x80) - { - // Which endpoint? - printf1(TAG_USB,"endpoint descriptor: %d\n", ((p_setup->wValue) & 0xFF)); - if (((p_setup->wValue) & 0xFF) == 1) - { - respond_setup_data( - p_setup, - get_descriptor_endpoint_1, - GET_ENDPOINT_DESC_SIZE); - return; - } - // Which endpoint? - if (((p_setup->wValue) & 0xFF) == 2) - { - respond_setup_data( - p_setup, - get_descriptor_endpoint_2, - GET_ENDPOINT_DESC_SIZE); - return; - } - } - break; - case 0x21: // HID - if ((p_setup->bmRequestType) == 0x81) - { - // Which interface - if (((p_setup->wValue) & 0xFF) == 0) - { - respond_setup_data( - p_setup, - get_descriptor_hid_0, - GET_HID_DESC_SIZE); - return; - } - } - break; - case 0x22: // HID report - if ((p_setup->bmRequestType) == 0x81) - { - // Which interface? - if (((p_setup->wValue) & 0xFF) == 0) - { - respond_setup_data( - p_setup, - get_descriptor_report_interface_0, - sizeof(get_descriptor_report_interface_0)); - return; - } - } - break; - default: - break; // Not supported - go to stall - } - - printf1(TAG_USB,"Unknown : 0x%02x, type: 0x%02x or value: 0x%02x\n", - p_setup->wValue >> 8, - p_setup->bmRequestType, - p_setup->wValue & 0xFF); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_GetConfig(nrf_drv_usbd_setup_t const * const p_setup) -{ - if (m_usbd_configured) - { - respond_setup_data( - p_setup, - get_config_resp_configured, - sizeof(get_config_resp_configured)); - } - else - { - respond_setup_data( - p_setup, - get_config_resp_unconfigured, - sizeof(get_config_resp_unconfigured)); - } -} - -static void usbd_setup_SetConfig(nrf_drv_usbd_setup_t const * const p_setup) -{ - if ((p_setup->bmRequestType) == 0x00) - { - // accept only 0 and 1 - if (((p_setup->wIndex) == 0) && ((p_setup->wLength) == 0) && - ((p_setup->wValue) <= UINT8_MAX)) - { - if (NRF_SUCCESS == ep_configuration((uint8_t)(p_setup->wValue))) - { - nrf_drv_usbd_setup_clear(); - return; - } - } - } - printf1(TAG_USB,"Wrong configuration: Index: 0x%2x, Value: 0x%2x.", - p_setup->wIndex, - p_setup->wValue); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_SetIdle(nrf_drv_usbd_setup_t const * const p_setup) -{ - if (p_setup->bmRequestType == 0x21) - { - //accept any value - nrf_drv_usbd_setup_clear(); - return; - } - printf1(TAG_USB,"Set Idle wrong type: 0x%2x.", p_setup->bmRequestType); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_SetInterface( - nrf_drv_usbd_setup_t const * const p_setup) -{ - //no alternate setting is supported - STALL always - printf1(TAG_USB,"No alternate interfaces supported."); - nrf_drv_usbd_setup_stall(); -} - -static void usbd_setup_SetProtocol( - nrf_drv_usbd_setup_t const * const p_setup) -{ - if (p_setup->bmRequestType == 0x21) - { - //accept any value - nrf_drv_usbd_setup_clear(); - return; - } - printf1(TAG_USB,"Set Protocol wrong type: 0x%2x.", p_setup->bmRequestType); - nrf_drv_usbd_setup_stall(); -} - -/** @} */ /* End of processing setup requests functions */ - - - -static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) -{ - static uint8_t buf[64]; - uint32_t size; - nrf_drv_usbd_transfer_t transfer; - memset(&transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - - switch (p_event->type) - { - case NRF_DRV_USBD_EVT_SUSPEND: - printf1(TAG_USB,"SUSPEND state detected\n"); - m_usbd_suspend_state_req = true; - break; - case NRF_DRV_USBD_EVT_RESUME: - printf1(TAG_USB,"RESUMING from suspend\n"); - m_usbd_suspend_state_req = false; - break; - case NRF_DRV_USBD_EVT_WUREQ: - printf1(TAG_USB,"RemoteWU initiated\n"); - m_usbd_suspend_state_req = false; - break; - case NRF_DRV_USBD_EVT_RESET: - { - ret_code_t ret = ep_configuration(0); - ASSERT(ret == NRF_SUCCESS); - UNUSED_VARIABLE(ret); - m_usbd_suspend_state_req = false; - break; - } - case NRF_DRV_USBD_EVT_SOF: - { - static uint32_t cycle = 0; - ++cycle; - if ((cycle % (m_usbd_configured ? 500 : 100)) == 0) - { - bsp_board_led_invert(LED_USB_STATUS); - } - break; - } - case NRF_DRV_USBD_EVT_EPTRANSFER: - if (NRF_DRV_USBD_EPOUT1 == p_event->data.eptransfer.ep) - { - switch(p_event->data.eptransfer.status) - { - case NRF_USBD_EP_OK: - /*printf("NRF_USBD_EP_OK\n");*/ - /*printf(">> "); dump_hex(buf,64);*/ - size = 64; - app_fifo_write(&USBHID_RECV_FIFO, buf, &size); - if (size != 64) - { - printf2(TAG_ERR,"Error, USB FIFO is full\n"); - APP_ERROR_CHECK(NRF_ERROR_NO_MEM); - } - break; - case NRF_USBD_EP_WAITING: - /*printf("NRF_USBD_EP_WAITING\n");*/ - transfer.p_data.rx = buf; - transfer.size = nrf_drv_usbd_epout_size_get(NRF_DRV_USBD_EPOUT1);; - if (transfer.size > 64) - { - printf2(TAG_ERR,"Error, invalid transfer size\n"); - return; - } - nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT1, &transfer); - break; - case NRF_USBD_EP_OVERLOAD: - printf1(TAG_ERR,"NRF_USBD_EP_OVERLOAD\n"); - break; - case NRF_USBD_EP_ABORTED: - printf1(TAG_ERR,"NRF_USBD_EP_ABORTED\n"); - break; - default: - break; - } - - } - else if (NRF_DRV_USBD_EPIN0 == p_event->data.eptransfer.ep) - { - if (NRF_USBD_EP_OK == p_event->data.eptransfer.status) - { - if (!nrf_drv_usbd_errata_154()) - { - /* Transfer ok - allow status stage */ - nrf_drv_usbd_setup_clear(); - } - } - else if (NRF_USBD_EP_ABORTED == p_event->data.eptransfer.status) - { - /* Just ignore */ - printf1(TAG_USB,"Transfer aborted event on EPIN0\n"); - } - else - { - printf1(TAG_USB,"Transfer failed on EPIN0: %d", p_event->data.eptransfer.status); - nrf_drv_usbd_setup_stall(); - } - } - else if (NRF_DRV_USBD_EPOUT0 == p_event->data.eptransfer.ep) - { - /* NOTE: No EPOUT0 data transfers are used. - * The code is here as a pattern how to support such a transfer. */ - if (NRF_USBD_EP_OK == p_event->data.eptransfer.status) - { - /* NOTE: Data values or size may be tested here to decide if clear or stall. - * If errata 154 is present the data transfer is acknowledged by the hardware. */ - if (!nrf_drv_usbd_errata_154()) - { - /* Transfer ok - allow status stage */ - nrf_drv_usbd_setup_clear(); - } - } - else if (NRF_USBD_EP_ABORTED == p_event->data.eptransfer.status) - { - /* Just ignore */ - printf1(TAG_USB,"Transfer aborted event on EPOUT0\n"); - } - else - { - printf1(TAG_USB,"Transfer failed on EPOUT0: %d", p_event->data.eptransfer.status); - nrf_drv_usbd_setup_stall(); - } - } - else - { - /*printf("EP other: %d\n", p_event->data.eptransfer.ep);*/ - /* Nothing to do */ - } - break; - case NRF_DRV_USBD_EVT_SETUP: - { - nrf_drv_usbd_setup_t setup; - nrf_drv_usbd_setup_get(&setup); - switch (setup.bmRequest) - { - case 0x00: // GetStatus - usbd_setup_GetStatus(&setup); - break; - case 0x01: // CleartFeature - usbd_setup_ClearFeature(&setup); - break; - case 0x03: // SetFeature - usbd_setup_SetFeature(&setup); - break; - case 0x05: // SetAddress - //nothing to do, handled by hardware; but don't STALL - break; - case 0x06: // GetDescriptor - usbd_setup_GetDescriptor(&setup); - break; - case 0x08: // GetConfig - usbd_setup_GetConfig(&setup); - break; - case 0x09: // SetConfig - usbd_setup_SetConfig(&setup); - break; - //HID class - case 0x0A: // SetIdle - usbd_setup_SetIdle(&setup); - break; - case 0x0B: // SetProtocol or SetInterface - if (setup.bmRequestType == 0x01) // standard request, recipient=interface - { - usbd_setup_SetInterface(&setup); - } - else if (setup.bmRequestType == 0x21) // class request, recipient=interface - { - usbd_setup_SetProtocol(&setup); - } - else - { - printf1(TAG_USB,"Command 0xB. Unknown request: 0x%2x", setup.bmRequestType); - nrf_drv_usbd_setup_stall(); - } - break; - default: - printf1(TAG_USB,"Unknown request: 0x%2x", setup.bmRequest); - nrf_drv_usbd_setup_stall(); - return; - } - break; - } - default: - printf1(TAG_USB,"unknown usb event\n"); - break; - } -} - - - -static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) -{ - switch (event) - { - case NRF_DRV_POWER_USB_EVT_DETECTED: - printf1(TAG_USB,"USB power detected\n"); - if (!nrf_drv_usbd_is_enabled()) - { - nrf_drv_usbd_enable(); - } - break; - case NRF_DRV_POWER_USB_EVT_REMOVED: - printf1(TAG_USB,"USB power removed\n"); - m_usbd_configured = false; - m_send_mouse_position = false; - if (nrf_drv_usbd_is_started()) - { - nrf_drv_usbd_stop(); - } - if (nrf_drv_usbd_is_enabled()) - { - nrf_drv_usbd_disable(); - } - /* Turn OFF LEDs */ - bsp_board_led_off(LED_USB_STATUS); - bsp_board_led_off(LED_USB_POWER); - break; - case NRF_DRV_POWER_USB_EVT_READY: - printf1(TAG_USB,"USB ready\n"); - bsp_board_led_on(LED_USB_POWER); - if (!nrf_drv_usbd_is_started()) - { - nrf_drv_usbd_start(true); - } - break; - default: - ASSERT(false); - } -} - -void usb_init(void) -{ - ret_code_t ret; - - if (NRF_DRV_USBD_ERRATA_ENABLE) - { - nrf_drv_usbd_errata_104(); - nrf_drv_usbd_errata_154(); - } - - - /* USB work starts right here */ - ret = nrf_drv_usbd_init(usbd_event_handler); - APP_ERROR_CHECK(ret); - - /* Configure selected size of the packed on EP0 */ - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, EP0_MAXPACKETSIZE); - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, EP0_MAXPACKETSIZE); - - /* Configure LED and button */ - /*bsp_board_init(BSP_INIT_LEDS);*/ - /*bsp_board_led_on(LED_RUNNING);*/ - /*bsp_board_led_on(LED_ACTIVE);*/ - - - if (USBD_POWER_DETECTION) - { - /*printf("Using power detection\n");*/ - static const nrf_drv_power_usbevt_config_t config = - { - .handler = power_usb_event_handler - }; - ret = nrf_drv_power_usbevt_init(&config); - APP_ERROR_CHECK(ret); - } - else - { - /*printf("No USB power detection enabled\r\nStarting USB now\n");*/ - nrf_delay_us(STARTUP_DELAY*1000); - if (!nrf_drv_usbd_is_enabled()) - { - /*printf("enabling\n");*/ - nrf_drv_usbd_enable(); - /*printf("done\n");*/ - ret = ep_configuration(0); - APP_ERROR_CHECK(ret); - } - /* Wait for regulator power up */ - while (NRF_DRV_POWER_USB_STATE_CONNECTED - == - nrf_drv_power_usbstatus_get()) - { - /* Just waiting */ - } - - if (NRF_DRV_POWER_USB_STATE_READY == nrf_drv_power_usbstatus_get()) - { - if (!nrf_drv_usbd_is_started()) - { - nrf_drv_usbd_start(true); - } - } - else - { - nrf_drv_usbd_disable(); - } - } - - - /*while (true)*/ - /*{*/ - /*if (m_system_off_req)*/ - /*{*/ - /*printf("Going to system OFF\n");*/ - /*nrf_power_system_off();*/ - /*}*/ - /*if (m_usbd_suspended != m_usbd_suspend_state_req)*/ - /*{*/ - /*if (m_usbd_suspend_state_req)*/ - /*{*/ - /*m_usbd_suspended = nrf_drv_usbd_suspend();*/ - /*if (m_usbd_suspended)*/ - /*{*/ - /*}*/ - /*}*/ - /*else*/ - /*{*/ - /*m_usbd_suspended = false;*/ - /*}*/ - /*}*/ - - /*if (m_usbd_configured)*/ - /*{*/ - /*}*/ - - /*UNUSED_RETURN_VALUE(NRF_LOG_PROCESS());*/ - /*[>bsp_board_led_off(LED_RUNNING);<]*/ - /* Even if we miss an event enabling USB, - * USB event would wake us up. */ - /*__WFE();*/ - /*[> Clear SEV flag if CPU was woken up by event <]*/ - /*__SEV();*/ - /*__WFE();*/ - /*bsp_board_led_on(LED_RUNNING);*/ - /*}*/ -} diff --git a/targets/nrf52840/usbhid.c b/targets/nrf52840/usbhid.c deleted file mode 100644 index 8b13789..0000000 --- a/targets/nrf52840/usbhid.c +++ /dev/null @@ -1 +0,0 @@ - diff --git a/targets/stm32l432/Makefile b/targets/stm32l432/Makefile index 017998f..8634507 100644 --- a/targets/stm32l432/Makefile +++ b/targets/stm32l432/Makefile @@ -2,62 +2,69 @@ ifndef DEBUG DEBUG=0 endif -merge_hex=python ../../tools/solotool.py mergehex +APPMAKE=build/application.mk +BOOTMAKE=build/bootloader.mk + +merge_hex=../../tools/solotool.py mergehex + +.PHONY: all all-hacker all-locked debugboot-app debugboot-boot boot-sig-checking boot-no-sig build-release-locked build-release build-release build-hacker build-debugboot clean clean2 flash flash_dfu flashboot detach cbor test all: - $(MAKE) -f application.mk -j8 solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DFLASH_ROP=1' + $(MAKE) -f $(APPMAKE) -j8 solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DFLASH_ROP=1' all-hacker: - $(MAKE) -f application.mk -j8 solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DSOLO_HACKER -DFLASH_ROP=0' + $(MAKE) -f $(APPMAKE) -j8 solo.hex PREFIX=$(PREFIX) DEBUG=$(DEBUG) EXTRA_DEFINES='-DSOLO_HACKER -DFLASH_ROP=0' all-locked: - $(MAKE) -f application.mk -j8 solo.hex PREFIX=$(PREFIX) EXTRA_DEFINES='-DFLASH_ROP=2' + $(MAKE) -f $(APPMAKE) -j8 solo.hex PREFIX=$(PREFIX) EXTRA_DEFINES='-DFLASH_ROP=2' debugboot-app: - $(MAKE) -f application.mk -j8 solo.hex DEBUG=2 PREFIX=$(PREFIX)\ + $(MAKE) -f $(APPMAKE) -j8 solo.hex DEBUG=2 PREFIX=$(PREFIX) \ LDSCRIPT=linker/stm32l4xx_extra.ld EXTRA_DEFINES='-DAPPLICATION_START_PAGE=16 -DSOLO_HACKER' debugboot-boot: - $(MAKE) -f bootloader.mk -j8 bootloader.hex PREFIX=$(PREFIX) DEBUG=1 \ + $(MAKE) -f $(BOOTMAKE) -j8 bootloader.hex PREFIX=$(PREFIX) DEBUG=1 \ LDSCRIPT=linker/bootloader_stm32l4xx_extra.ld EXTRA_DEFINES='-DAPPLICATION_START_PAGE=16 -DSOLO_HACKER' boot-sig-checking: - $(MAKE) -f bootloader.mk -j8 bootloader.hex PREFIX=$(PREFIX) DEBUG=0 + $(MAKE) -f $(BOOTMAKE) -j8 bootloader.hex PREFIX=$(PREFIX) DEBUG=0 boot-no-sig: - $(MAKE) -f bootloader.mk -j8 bootloader.hex PREFIX=$(PREFIX) EXTRA_DEFINES='-DSOLO_HACKER' DEBUG=0 + $(MAKE) -f $(BOOTMAKE) -j8 bootloader.hex PREFIX=$(PREFIX) EXTRA_DEFINES='-DSOLO_HACKER' DEBUG=0 -build-release-locked: clean2 boot-sig-checking clean all-locked - $(merge_hex) solo.hex bootloader.hex all.hex +build-release-locked: cbor clean2 boot-sig-checking clean all-locked + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex rm -f solo.hex bootloader.hex # don't program solo.hex ... -build-release: clean2 boot-sig-checking clean all - $(merge_hex) solo.hex bootloader.hex all.hex +build-release: cbor clean2 boot-sig-checking clean all + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex -build-hacker: clean2 boot-no-sig clean all-hacker - $(merge_hex) solo.hex bootloader.hex all.hex +build-hacker: cbor clean2 boot-no-sig clean all-hacker + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex + +build-debugboot: clean2 debugboot-boot clean debugboot-app + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex clean: - $(MAKE) -f application.mk clean - $(MAKE) -f bootloader.mk clean + $(MAKE) -f $(APPMAKE) clean + $(MAKE) -f $(BOOTMAKE) clean clean2: - rm -f solo.hex bootloader.hex all.hex - $(MAKE) -f application.mk clean - $(MAKE) -f bootloader.mk clean - + rm -f solo.hex solo.map bootloader.hex bootloader.map all.hex + $(MAKE) -f $(APPMAKE) clean + $(MAKE) -f $(BOOTMAKE) clean flash: solo.hex bootloader.hex - $(merge_hex) solo.hex bootloader.hex all.hex + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex STM32_Programmer_CLI -c port=SWD -halt -e all --readunprotect STM32_Programmer_CLI -c port=SWD -halt -d all.hex -rst flash_dfu: solo.hex bootloader.hex - $(merge_hex) solo.hex bootloader.hex all.hex + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex # STM32_Programmer_CLI -c port=usb1 -halt -e all --readunprotect STM32_Programmer_CLI -c port=usb1 -halt -rdu -d all.hex flashboot: solo.hex bootloader.hex - $(merge_hex) solo.hex bootloader.hex all.hex + $(VENV) $(merge_hex) solo.hex bootloader.hex all.hex STM32_Programmer_CLI -c port=SWD -halt -e all --readunprotect STM32_Programmer_CLI -c port=SWD -halt -d bootloader.hex -rst @@ -72,4 +79,11 @@ solo.hex: echo "You need to build the application first." cbor: - $(MAKE) -f application.mk -j8 cbor + $(MAKE) -f $(APPMAKE) -j8 cbor + +test: + $(MAKE) build-release-locked + $(MAKE) build-release + $(MAKE) build-hacker + $(MAKE) build-debugboot + $(MAKE) clean2 diff --git a/targets/stm32l432/bootloader/bootloader.c b/targets/stm32l432/bootloader/bootloader.c index 999d92f..71cdbae 100644 --- a/targets/stm32l432/bootloader/bootloader.c +++ b/targets/stm32l432/bootloader/bootloader.c @@ -1,24 +1,10 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. + #include #include @@ -126,9 +112,10 @@ int is_bootloader_disabled() int bootloader_bridge(int klen, uint8_t * keyh) { static int has_erased = 0; - int i; BootloaderReq * req = (BootloaderReq * )keyh; +#ifndef SOLO_HACKER uint8_t hash[32]; +#endif uint8_t version = 1; uint16_t len = (req->lenh << 8) | (req->lenl); @@ -137,12 +124,14 @@ int bootloader_bridge(int klen, uint8_t * keyh) printf1(TAG_BOOT,"Invalid length %d / %d\r\n", len, klen-9); return CTAP1_ERR_INVALID_LENGTH; } - +#ifndef SOLO_HACKER uint8_t * pubkey = (uint8_t*)"\xd2\xa4\x2f\x8f\xb2\x31\x1c\xc1\xf7\x0c\x7e\x64\x32\xfb\xbb\xb4\xa3\xdd\x32\x20" "\x0f\x1b\x88\x9c\xda\x62\xc2\x83\x25\x93\xdd\xb8\x75\x9d\xf9\x86\xee\x03\x6c\xce" "\x34\x47\x71\x36\xb3\xb2\xad\x6d\x12\xb7\xbe\x49\x3e\x20\xa4\x61\xac\xc7\x71\xc7" "\x1f\xa8\x14\xf2"; + const struct uECC_Curve_t * curve = NULL; +#endif // Translate and enclose the requested address in the MCU flash space, starting from 0x8000000 uint32_t addr = ((*((uint32_t*)req->addr)) & 0xffffff) | 0x8000000; @@ -220,8 +209,12 @@ int bootloader_bridge(int klen, uint8_t * keyh) case BootVersion: has_erased = 0; printf1(TAG_BOOT, "BootVersion.\r\n"); + version = BOOT_VERSION_MAJ; + u2f_response_writeback(&version,1); + version = BOOT_VERSION_MIN; + u2f_response_writeback(&version,1); + version = BOOT_VERSION_PATCH; u2f_response_writeback(&version,1); - return 0; break; case BootReboot: printf1(TAG_BOOT, "BootReboot.\r\n"); diff --git a/targets/stm32l432/bootloader/bootloader.h b/targets/stm32l432/bootloader/bootloader.h index 22e5db3..9335f8d 100644 --- a/targets/stm32l432/bootloader/bootloader.h +++ b/targets/stm32l432/bootloader/bootloader.h @@ -1,27 +1,14 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. + #ifndef _APP_H_ #define _APP_H_ #include +#include "version.h" #define DEBUG_UART USART1 @@ -65,6 +52,8 @@ #define SKIP_BUTTON_CHECK_WITH_DELAY 0 #define SKIP_BUTTON_CHECK_FAST 1 +#define SOLO_PRODUCT_NAME "Solo Bootloader " VERSION + void printing_init(); void hw_init(void); diff --git a/targets/stm32l432/bootloader/main.c b/targets/stm32l432/bootloader/main.c index afdc15f..ad5cbf1 100644 --- a/targets/stm32l432/bootloader/main.c +++ b/targets/stm32l432/bootloader/main.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include @@ -53,11 +38,13 @@ void BOOT_boot(void) ((pFunction)bootAddress[1])(); } -int main(int argc, char * argv[]) +int main() { uint8_t hidmsg[64]; uint32_t t1 = 0; +#ifdef SOLO_HACKER uint32_t stboot_time = 0; +#endif uint32_t boot = 1; set_logging_mask( @@ -117,7 +104,9 @@ int main(int argc, char * argv[]) printf1(TAG_RED,"Not authorized to boot (%08x == %08lx)\r\n", AUTH_WORD_ADDR, *(uint32_t*)AUTH_WORD_ADDR); } +#ifdef SOLO_HACKER start_bootloader: +#endif usbhid_init(); printf1(TAG_GEN,"init usb\n"); diff --git a/targets/stm32l432/application.mk b/targets/stm32l432/build/application.mk similarity index 86% rename from targets/stm32l432/application.mk rename to targets/stm32l432/build/application.mk index 89ece0d..37c4ea5 100644 --- a/targets/stm32l432/application.mk +++ b/targets/stm32l432/build/application.mk @@ -1,7 +1,4 @@ -CC=$(PREFIX)arm-none-eabi-gcc -CP=$(PREFIX)arm-none-eabi-objcopy -SZ=$(PREFIX)arm-none-eabi-size -AR=$(PREFIX)arm-none-eabi-ar +include build/common.mk # ST related SRC = src/main.c src/init.c src/redirect.c src/flash.c src/rng.c src/led.c src/device.c @@ -13,6 +10,7 @@ SRC += $(wildcard lib/*.c) $(wildcard lib/usbd/*.c) SRC += ../../fido2/util.c ../../fido2/u2f.c ../../fido2/test_power.c SRC += ../../fido2/stubs.c ../../fido2/log.c ../../fido2/ctaphid.c ../../fido2/ctap.c SRC += ../../fido2/ctap_parse.c ../../fido2/main.c +SRC += ../../fido2/extensions/extensions.c ../../fido2/extensions/solo.c # Crypto libs SRC += ../../crypto/sha256/sha256.c ../../crypto/micro-ecc/uECC.c ../../crypto/tiny-AES-c/aes.c @@ -45,7 +43,7 @@ endif DEFINES = -DDEBUG_LEVEL=$(DEBUG) -D$(CHIP) -DAES256=1 -DUSE_FULL_LL_DRIVER -DAPP_CONFIG=\"app.h\" $(EXTRA_DEFINES) # DEFINES += -DTEST_SOLO_STM32 -DTEST -DTEST_FIFO=1 -CFLAGS=$(INC) -c $(DEFINES) -Wall -fdata-sections -ffunction-sections $(HW) -g +CFLAGS=$(INC) -c $(DEFINES) -Wall -Wextra -Wno-unused-parameter -Wno-missing-field-initializers -fdata-sections -ffunction-sections $(HW) -g $(VERSION_FLAGS) LDFLAGS_LIB=$(HW) $(SEARCH) -specs=nano.specs -specs=nosys.specs -Wl,--gc-sections -u _printf_float -lnosys LDFLAGS=$(HW) $(LDFLAGS_LIB) -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref -Wl,-Bstatic -ltinycbor @@ -71,7 +69,7 @@ all: $(TARGET).elf $(CP) -O ihex $^ $(TARGET).hex clean: - rm -f *.o src/*.o src/*.elf bootloader/*.o $(OBJ) + rm -f *.o src/*.o *.elf bootloader/*.o $(OBJ) cbor: diff --git a/targets/stm32l432/bootloader.mk b/targets/stm32l432/build/bootloader.mk similarity index 85% rename from targets/stm32l432/bootloader.mk rename to targets/stm32l432/build/bootloader.mk index 3931dde..24f2751 100644 --- a/targets/stm32l432/bootloader.mk +++ b/targets/stm32l432/build/bootloader.mk @@ -1,7 +1,4 @@ -CC=$(PREFIX)arm-none-eabi-gcc -CP=$(PREFIX)arm-none-eabi-objcopy -SZ=$(PREFIX)arm-none-eabi-size -AR=$(PREFIX)arm-none-eabi-ar +include build/common.mk # ST related SRC = bootloader/main.c bootloader/bootloader.c @@ -44,9 +41,9 @@ endif DEFINES = -DDEBUG_LEVEL=$(DEBUG) -D$(CHIP) -DAES256=1 -DUSE_FULL_LL_DRIVER -DAPP_CONFIG=\"bootloader.h\" $(EXTRA_DEFINES) # DEFINES += -DTEST_SOLO_STM32 -DTEST -DTEST_FIFO=1 -CFLAGS=$(INC) -c $(DEFINES) -Wall -fdata-sections -ffunction-sections $(HW) -g +CFLAGS=$(INC) -c $(DEFINES) -Wall -Wextra -Wno-unused-parameter -Wno-missing-field-initializers -fdata-sections -ffunction-sections $(HW) -g $(VERSION_FLAGS) LDFLAGS_LIB=$(HW) $(SEARCH) -specs=nano.specs -specs=nosys.specs -Wl,--gc-sections -lnosys -LDFLAGS=$(HW) $(LDFLAGS_LIB) -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref -Wl,-Bstatic +LDFLAGS=$(HW) $(LDFLAGS_LIB) -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref -Wl,-Bstatic .PRECIOUS: %.o @@ -71,4 +68,4 @@ all: $(TARGET).elf $(CP) -O ihex $^ $(TARGET).hex clean: - rm -f *.o src/*.o bootloader/*.o src/*.elf $(OBJ) + rm -f *.o src/*.o bootloader/*.o *.elf $(OBJ) diff --git a/targets/stm32l432/build/common.mk b/targets/stm32l432/build/common.mk new file mode 100644 index 0000000..854204d --- /dev/null +++ b/targets/stm32l432/build/common.mk @@ -0,0 +1,19 @@ +CC=$(PREFIX)arm-none-eabi-gcc +CP=$(PREFIX)arm-none-eabi-objcopy +SZ=$(PREFIX)arm-none-eabi-size +AR=$(PREFIX)arm-none-eabi-ar + +VERSION:=$(shell git describe --abbrev=0 ) +VERSION_FULL:=$(shell git describe) +VERSION_MAJ:=$(shell python -c 'print("$(VERSION)".split(".")[0])') +VERSION_MIN:=$(shell python -c 'print("$(VERSION)".split(".")[1])') +VERSION_PAT:=$(shell python -c 'print("$(VERSION)".split(".")[2])') + +VERSION_FLAGS= -DSOLO_VERSION_MAJ=$(VERSION_MAJ) -DSOLO_VERSION_MIN=$(VERSION_MIN) \ + -DSOLO_VERSION_PATCH=$(VERSION_PAT) -DVERSION=\"$(VERSION_FULL)\" + +_all: + echo $(VERSION_FULL) + echo $(VERSION_MAJ) + echo $(VERSION_MIN) + echo $(VERSION_PAT) diff --git a/targets/stm32l432/lib/usbd/usbd_cdc.c b/targets/stm32l432/lib/usbd/usbd_cdc.c index 64465e9..58d1301 100644 --- a/targets/stm32l432/lib/usbd/usbd_cdc.c +++ b/targets/stm32l432/lib/usbd/usbd_cdc.c @@ -143,13 +143,13 @@ static uint8_t USBD_CDC_DataOut (USBD_HandleTypeDef *pdev, static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev); -static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length); +//static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length); -static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length); +//static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length); -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); +//static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); +//static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); uint8_t *USBD_CDC_GetDeviceQualifierDescriptor (uint16_t *length); @@ -789,12 +789,12 @@ static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev) * @param length : pointer data length * @retval pointer to descriptor buffer */ -static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length) +/*static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length) { *length = sizeof (USBD_CDC_CfgFSDesc); return USBD_CDC_CfgFSDesc; } - +*/ /** * @brief USBD_CDC_GetHSCfgDesc * Return configuration descriptor @@ -802,12 +802,12 @@ static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length) * @param length : pointer data length * @retval pointer to descriptor buffer */ -static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length) +/*static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length) { *length = sizeof (USBD_CDC_CfgHSDesc); return USBD_CDC_CfgHSDesc; } - +*/ /** * @brief USBD_CDC_GetCfgDesc * Return configuration descriptor @@ -815,12 +815,12 @@ static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length) * @param length : pointer data length * @retval pointer to descriptor buffer */ -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length) +/*static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length) { *length = sizeof (USBD_CDC_OtherSpeedCfgDesc); return USBD_CDC_OtherSpeedCfgDesc; } - +*/ /** * @brief DeviceQualifierDescriptor * return Device Qualifier descriptor diff --git a/targets/stm32l432/lib/usbd/usbd_desc.c b/targets/stm32l432/lib/usbd/usbd_desc.c index 63c8e4a..88b920d 100644 --- a/targets/stm32l432/lib/usbd/usbd_desc.c +++ b/targets/stm32l432/lib/usbd/usbd_desc.c @@ -53,17 +53,10 @@ #define USBD_VID 0x0483 #define USBD_PID 0xA2CA #define USBD_LANGID_STRING 0x409 -#ifndef SOLO_HACKER -#define USBD_MANUFACTURER_STRING "Solo Keys" -#define USBD_PRODUCT_FS_STRING "Solo" -#define USBD_SERIAL_NUM "solocafebabe" -#else -#define USBD_MANUFACTURER_STRING "Solo Keys" -#define USBD_PRODUCT_FS_STRING "Solo HACKER (Unlocked)" -#ifndef USBD_SERIAL_NUM -#define USBD_SERIAL_NUM "Solo-Keys-Solo" -#endif -#endif +#define USBD_MANUFACTURER_STRING "SoloKeys" +#define USBD_PRODUCT_FS_STRING SOLO_PRODUCT_NAME +#define USBD_SERIAL_NUM "0123456789ABCDEF" + uint8_t *USBD_HID_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); uint8_t *USBD_HID_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); diff --git a/targets/stm32l432/lib/usbd/usbd_hid.c b/targets/stm32l432/lib/usbd/usbd_hid.c index a1950c3..bf32911 100644 --- a/targets/stm32l432/lib/usbd/usbd_hid.c +++ b/targets/stm32l432/lib/usbd/usbd_hid.c @@ -114,15 +114,10 @@ USBD_ClassTypeDef USBD_HID = NULL, - - NULL, - NULL, - NULL, - NULL, - // USBD_HID_GetFSCfgDesc, - // USBD_HID_GetFSCfgDesc, - // USBD_HID_GetFSCfgDesc, - // USBD_HID_GetDeviceQualifierDesc, + USBD_HID_GetFSCfgDesc, + USBD_HID_GetFSCfgDesc, + USBD_HID_GetFSCfgDesc, + USBD_HID_GetDeviceQualifierDesc, }; #define USBD_HID_CfgHSDesc USBD_HID_OtherSpeedCfgDesc diff --git a/targets/stm32l432/linker/stm32l4xx.ld b/targets/stm32l432/linker/stm32l4xx.ld index bc7424f..d44d5d6 100644 --- a/targets/stm32l432/linker/stm32l4xx.ld +++ b/targets/stm32l432/linker/stm32l4xx.ld @@ -41,7 +41,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Specify the memory areas */ MEMORY { -/* First 14 KB is bootloader */ +/* First 20 KB is bootloader */ FLASH (rx) : ORIGIN = 0x08005000, LENGTH = 198K-8 /* Leave out 38 Kb at end for data */ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K SRAM2 (rw) : ORIGIN = 0x10000000, LENGTH = 16K diff --git a/targets/stm32l432/src/app.h b/targets/stm32l432/src/app.h index c14a7ed..8be24fd 100644 --- a/targets/stm32l432/src/app.h +++ b/targets/stm32l432/src/app.h @@ -1,27 +1,13 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _APP_H_ #define _APP_H_ #include +#include "version.h" #define DEBUG_UART USART1 @@ -36,7 +22,7 @@ //#define USING_DEV_BOARD -//#define ENABLE_U2F_EXTENSIONS +#define ENABLE_U2F_EXTENSIONS #define ENABLE_U2F @@ -44,6 +30,13 @@ // #define DISABLE_CTAPHID_WINK // #define DISABLE_CTAPHID_CBOR + +#if defined(SOLO_HACKER) +#define SOLO_PRODUCT_NAME "Solo Hacker " VERSION +#else +#define SOLO_PRODUCT_NAME "Solo " VERSION +#endif + void printing_init(); void hw_init(void); @@ -53,10 +46,10 @@ void hw_init(void); // 0xRRGGBB #define LED_INIT_VALUE 0x000800 #define LED_WINK_VALUE 0x000010 -#define LED_MAX_SCALER 30 +#define LED_MAX_SCALER 15 #define LED_MIN_SCALER 1 // # of ms between each change in LED -#define HEARTBEAT_PERIOD 100 +#define HEARTBEAT_PERIOD 150 // Each LED channel will be multiplied by a integer between LED_MAX_SCALER // and LED_MIN_SCALER to cause the slow pulse. E.g. // #define LED_INIT_VALUE 0x301000 diff --git a/targets/stm32l432/src/attestation.c b/targets/stm32l432/src/attestation.c index 3fb74f6..72972f8 100644 --- a/targets/stm32l432/src/attestation.c +++ b/targets/stm32l432/src/attestation.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include "crypto.h" diff --git a/targets/stm32l432/src/crypto.c b/targets/stm32l432/src/crypto.c index fc68350..7de78fa 100644 --- a/targets/stm32l432/src/crypto.c +++ b/targets/stm32l432/src/crypto.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. /* * Wrapper for crypto implementation on device * @@ -114,7 +99,7 @@ void crypto_sha256_final(uint8_t * hash) void crypto_sha256_hmac_init(uint8_t * key, uint32_t klen, uint8_t * hmac) { uint8_t buf[64]; - int i; + unsigned int i; memset(buf, 0, sizeof(buf)); if (key == CRYPTO_MASTER_KEY) @@ -148,7 +133,7 @@ void crypto_sha256_hmac_init(uint8_t * key, uint32_t klen, uint8_t * hmac) void crypto_sha256_hmac_final(uint8_t * key, uint32_t klen, uint8_t * hmac) { uint8_t buf[64]; - int i; + unsigned int i; crypto_sha256_final(hmac); memset(buf, 0, sizeof(buf)); if (key == CRYPTO_MASTER_KEY) diff --git a/targets/stm32l432/src/device.c b/targets/stm32l432/src/device.c index 7bc5f48..59b19d6 100644 --- a/targets/stm32l432/src/device.c +++ b/targets/stm32l432/src/device.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include "device.h" #include "usbd_def.h" #include "stm32l4xx.h" @@ -42,6 +27,9 @@ #include "stm32l4xx_ll_iwdg.h" #include "usbd_cdc_if.h" +void wait_for_usb_tether(); + + uint32_t __90_ms = 0; uint32_t __device_status = 0; uint32_t __last_update = 0; @@ -75,7 +63,7 @@ uint32_t millis() return (((uint32_t)TIM6->CNT) + (__90_ms * 90)); } -void device_set_status(int status) +void device_set_status(uint32_t status) { __disable_irq(); __last_update = millis(); @@ -133,12 +121,12 @@ void usbhid_init() void wait_for_usb_tether() { - while (USBD_OK != CDC_Transmit_FS("tethered\r\n", 10) ) + while (USBD_OK != CDC_Transmit_FS((uint8_t*)"tethered\r\n", 10) ) ; - while (USBD_OK != CDC_Transmit_FS("tethered\r\n", 10) ) + while (USBD_OK != CDC_Transmit_FS((uint8_t*)"tethered\r\n", 10) ) ; delay(10); - while (USBD_OK != CDC_Transmit_FS("tethered\r\n", 10) ) + while (USBD_OK != CDC_Transmit_FS((uint8_t*)"tethered\r\n", 10) ) ; } @@ -184,7 +172,9 @@ void main_loop_delay() static int wink_time = 0; static uint32_t winkt1 = 0; +#ifdef LED_WINK_VALUE static uint32_t winkt2 = 0; +#endif void device_wink() { wink_time = 10; @@ -209,9 +199,14 @@ void heartbeat() val++; } - if (val > LED_MAX_SCALER || val < LED_MIN_SCALER) + if (val >= LED_MAX_SCALER || val <= LED_MIN_SCALER) { state = !state; + + if (val > LED_MAX_SCALER) + val = LED_MAX_SCALER; + if (val < LED_MIN_SCALER) + val = LED_MIN_SCALER; } #ifdef LED_WINK_VALUE @@ -463,7 +458,9 @@ led_rgb(0x001040); delay(50); +#if SKIP_BUTTON_CHECK_WITH_DELAY || SKIP_BUTTON_CHECK_FAST done: +#endif return 1; fail: diff --git a/targets/stm32l432/src/fifo.c b/targets/stm32l432/src/fifo.c index bfffefd..63b9b2c 100644 --- a/targets/stm32l432/src/fifo.c +++ b/targets/stm32l432/src/fifo.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include diff --git a/targets/stm32l432/src/fifo.h b/targets/stm32l432/src/fifo.h index eff39c5..af685e8 100644 --- a/targets/stm32l432/src/fifo.h +++ b/targets/stm32l432/src/fifo.h @@ -1,28 +1,13 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _FIFO_H_ #define _FIFO_H_ -#include APP_CONFIG +#include APP_CONFIG #ifndef TEST_FIFO #define TEST_FIFO 0 diff --git a/targets/stm32l432/src/flash.c b/targets/stm32l432/src/flash.c index 2b11c48..c37439d 100644 --- a/targets/stm32l432/src/flash.c +++ b/targets/stm32l432/src/flash.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include @@ -29,6 +14,11 @@ #include "log.h" #include "device.h" +static void flash_lock() +{ + FLASH->CR |= (1U<<31); +} + static void flash_unlock() { if (FLASH->CR & FLASH_CR_LOCK) @@ -143,7 +133,7 @@ void flash_write_dword(uint32_t addr, uint64_t data) void flash_write(uint32_t addr, uint8_t * data, size_t sz) { - int i; + unsigned int i; uint8_t buf[8]; while (FLASH->SR & (1<<16)) ; @@ -197,8 +187,3 @@ void flash_write_fast(uint32_t addr, uint32_t * data) __enable_irq(); } - -void flash_lock() -{ - FLASH->CR |= (1U<<31); -} diff --git a/targets/stm32l432/src/flash.h b/targets/stm32l432/src/flash.h index 2b587a6..5da975c 100644 --- a/targets/stm32l432/src/flash.h +++ b/targets/stm32l432/src/flash.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _FLASH_H_ #define _FLASH_H_ diff --git a/targets/stm32l432/src/init.c b/targets/stm32l432/src/init.c index daa81d0..b5bfedb 100644 --- a/targets/stm32l432/src/init.c +++ b/targets/stm32l432/src/init.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include "stm32l4xx.h" #include "stm32l4xx_ll_gpio.h" @@ -58,7 +43,9 @@ USBD_HandleTypeDef Solo_USBD_Device; static void LL_Init(void); void SystemClock_Config(void); static void MX_GPIO_Init(void); +#if DEBUG_LEVEL > 0 static void MX_USART1_UART_Init(void); +#endif static void MX_TIM2_Init(void); static void MX_TIM6_Init(void); static void MX_RNG_Init(void); @@ -208,7 +195,7 @@ void usb_init() // Enable USB Clock SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); - +#if DEBUG_LEVEL > 0 USBD_Composite_Set_Classes(&USBD_HID, &USBD_CDC); in_endpoint_to_class[HID_EPIN_ADDR & 0x7F] = 0; out_endpoint_to_class[HID_EPOUT_ADDR & 0x7F] = 0; @@ -222,6 +209,10 @@ void usb_init() // // USBD_RegisterClass(&Solo_USBD_Device, &USBD_CDC); USBD_CDC_RegisterInterface(&Solo_USBD_Device, &USBD_Interface_fops_FS); +#else + USBD_Init(&Solo_USBD_Device, &Solo_Desc, 0); + USBD_RegisterClass(&Solo_USBD_Device, &USBD_HID); +#endif USBD_Start(&Solo_USBD_Device); } @@ -298,6 +289,7 @@ static void MX_TIM2_Init(void) } +#if DEBUG_LEVEL > 0 /* USART1 init function */ static void MX_USART1_UART_Init(void) { @@ -335,6 +327,7 @@ static void MX_USART1_UART_Init(void) LL_USART_Enable(USART1); } +#endif /** Pinout Configuration */ diff --git a/targets/stm32l432/src/led.c b/targets/stm32l432/src/led.c index 0bae6d8..219a266 100644 --- a/targets/stm32l432/src/led.c +++ b/targets/stm32l432/src/led.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include @@ -29,27 +14,48 @@ #include "device.h" #include "log.h" +// normalization formula: 16.06*x^0.33 = (0%-100%) +// here values: value * 10 +uint8_t norm_k[] = { + 0, 80, 101, 115, 127, 137, 145, 153, 159, 166, + 172, 177, 182, 187, 192, 196, 200, 205, 208, 212, + 216, 219, 223, 226, 229, 232, 235, 238, 241, 245}; +#define norm_k_len sizeof(norm_k) + +uint32_t led_normalization(uint8_t value) +{ + if (value > norm_k_len - 1) + { + return value * 10; + } else { + return norm_k[value]; + } +} + void led_rgb(uint32_t hex) { - uint32_t r = hex >> 16; - uint32_t g = (hex >> 8)&0xff; - uint32_t b = hex & 0xff; + uint32_t r = led_normalization((hex >> 16) & 0xff); + uint32_t g = led_normalization((hex >> 8) & 0xff); + uint32_t b = led_normalization(hex & 0xff); // CCR2 == blue // CCR3 == red // CCR4 == green // map and scale colors - TIM2->CCR2 = 1000 - (b * 1000)/(256); - TIM2->CCR3 = 1000 - (r * 1000)/(256*6); - TIM2->CCR4 = 1000 - (g * 1000)/(256); + // normalization table values: value * 10 + TIM2->CCR2 = 1000 - (b * 100)/(256); + TIM2->CCR3 = 1000 - (r * 100)/(256*6); + TIM2->CCR4 = 1000 - (g * 100)/(256); } void led_test_colors() { // Should produce pulsing of various colors int i = 0; +#if DEBUG_LEVEL > 0 int j = 0; +#endif int inc = 1; uint32_t time = 0; #define update() do {\ diff --git a/targets/stm32l432/src/led.h b/targets/stm32l432/src/led.h index cc6b20a..54234a5 100644 --- a/targets/stm32l432/src/led.h +++ b/targets/stm32l432/src/led.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _LED_H_ #define _LED_H_ diff --git a/targets/stm32l432/src/main.c b/targets/stm32l432/src/main.c index e58f405..76b5632 100644 --- a/targets/stm32l432/src/main.c +++ b/targets/stm32l432/src/main.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include diff --git a/targets/stm32l432/src/memory_layout.h b/targets/stm32l432/src/memory_layout.h index 0f4de4b..71178dc 100644 --- a/targets/stm32l432/src/memory_layout.h +++ b/targets/stm32l432/src/memory_layout.h @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #ifndef _MEMORY_LAYOUT_H_ #define _MEMORY_LAYOUT_H_ diff --git a/targets/stm32l432/src/redirect.c b/targets/stm32l432/src/redirect.c index 8021d5e..3af360f 100644 --- a/targets/stm32l432/src/redirect.c +++ b/targets/stm32l432/src/redirect.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include "stm32l4xx_ll_usart.h" #include "usbd_cdc_if.h" diff --git a/targets/stm32l432/src/rng.c b/targets/stm32l432/src/rng.c index 8516af2..5adb474 100644 --- a/targets/stm32l432/src/rng.c +++ b/targets/stm32l432/src/rng.c @@ -1,24 +1,9 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. #include #include #include diff --git a/targets/stm32l432/src/rng.h b/targets/stm32l432/src/rng.h index 5cde3e3..b6cf64a 100644 --- a/targets/stm32l432/src/rng.h +++ b/targets/stm32l432/src/rng.h @@ -1,24 +1,10 @@ -/* - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ +// Copyright 2019 SoloKeys Developers +// +// Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +// copied, modified, or distributed except according to those terms. + #ifndef _RNG_H_ #define _RNG_H_ #include diff --git a/targets/stm32l432/src/version.h b/targets/stm32l432/src/version.h new file mode 100644 index 0000000..fcad14d --- /dev/null +++ b/targets/stm32l432/src/version.h @@ -0,0 +1,25 @@ +#ifndef _VERSION_H_ +#define _VERSION_H_ + + +#ifndef SOLO_VERSION_MAJ + +#define SOLO_VERSION_MAJ 0 +#define SOLO_VERSION_MIN 0 +#define SOLO_VERSION_PATCH 0 + +#endif + +#define BOOT_VERSION_MAJ 1 +#define BOOT_VERSION_MIN 0 +#define BOOT_VERSION_PATCH 0 + +#define __STR_HELPER(x) #x +#define __STR(x) __STR_HELPER(x) + +#ifndef VERSION +#define VERSION __STR(SOLO_VERSION_MAJ) "." __STR(SOLO_VERSION_MIN) "." __STR(SOLO_VERSION_PATCH) +#endif + + +#endif diff --git a/tools/convert_log_to_c.py b/tools/convert_log_to_c.py index 5d6d2fa..18976e6 100755 --- a/tools/convert_log_to_c.py +++ b/tools/convert_log_to_c.py @@ -1,26 +1,6 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# import sys from sys import argv @@ -34,7 +14,7 @@ nums = [] for x in log: parse = [] - for i in x.split(' '): + for i in x.split(" "): try: n = int(i, 16) parse.append(n) @@ -48,9 +28,9 @@ for x in log: hexlines = [] for l in nums: - s = '' + s = "" for x in l: - s += '\\x%02x' % x + s += "\\x%02x" % x hexlines.append(s) for x in hexlines: diff --git a/tools/ctap_test.py b/tools/ctap_test.py index fbd2180..7c71147 100755 --- a/tools/ctap_test.py +++ b/tools/ctap_test.py @@ -1,25 +1,12 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. +# Copyright 2019 SoloKeys Developers # -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. +# Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +# copied, modified, or distributed except according to those terms. # # Script for testing correctness of CTAP2/CTAP1 security token @@ -63,14 +50,14 @@ class Packet(object): class Tester: def __init__(self,): - self.origin = 'https://examplo.org' - self.host = 'examplo.org' + self.origin = "https://examplo.org" + self.host = "examplo.org" def find_device(self,): print(list(CtapHidDevice.list_devices())) dev = next(CtapHidDevice.list_devices(), None) if not dev: - raise RuntimeError('No FIDO device found') + raise RuntimeError("No FIDO device found") self.dev = dev self.client = Fido2Client(dev, self.origin) self.ctap = self.client.ctap2 @@ -79,23 +66,23 @@ class Tester: # cmd,resp = self.recv_raw() def send_data(self, cmd, data): - if type(data) != type(b''): - data = struct.pack('%dB' % len(data), *[ord(x) for x in data]) + if type(data) != type(b""): + data = struct.pack("%dB" % len(data), *[ord(x) for x in data]) with Timeout(1.0) as event: return self.dev.call(cmd, data, event) def send_raw(self, data, cid=None): if cid is None: cid = self.dev._dev.cid - elif type(cid) != type(b''): - cid = struct.pack('%dB' % len(cid), *[ord(x) for x in cid]) - if type(data) != type(b''): - data = struct.pack('%dB' % len(data), *[ord(x) for x in data]) + elif type(cid) != type(b""): + cid = struct.pack("%dB" % len(cid), *[ord(x) for x in cid]) + if type(data) != type(b""): + data = struct.pack("%dB" % len(data), *[ord(x) for x in data]) data = cid + data l = len(data) if l != 64: - pad = '\x00' * (64 - l) - pad = struct.pack('%dB' % len(pad), *[ord(x) for x in pad]) + pad = "\x00" * (64 - l) + pad = struct.pack("%dB" % len(pad), *[ord(x) for x in pad]) data = data + pad data = list(data) assert len(data) == 64 @@ -105,8 +92,8 @@ class Tester: return self.dev._dev.cid def set_cid(self, cid): - if type(cid) not in [type(b''), type(bytearray())]: - cid = struct.pack('%dB' % len(cid), *[ord(x) for x in cid]) + if type(cid) not in [type(b""), type(bytearray())]: + cid = struct.pack("%dB" % len(cid), *[ord(x) for x in cid]) self.dev._dev.cid = cid def recv_raw(self,): @@ -120,7 +107,7 @@ class Tester: if data[0] != 0: raise CtapError(data[0]) elif data[0] != err: - raise ValueError('Unexpected error: %02x' % data[0]) + raise ValueError("Unexpected error: %02x" % data[0]) def test_long_ping(self): amt = 1000 @@ -133,48 +120,48 @@ class Tester: # if (delt < 140 ): # raise RuntimeError('Fob is too fast (%d ms)' % delt) if delt > 555 * (amt / 1000): - raise RuntimeError('Fob is too slow (%d ms)' % delt) + raise RuntimeError("Fob is too slow (%d ms)" % delt) if r != pingdata: - raise ValueError('Ping data not echo\'d') - print('1000 byte ping time: %s ms' % delt) + raise ValueError("Ping data not echo'd") + print("1000 byte ping time: %s ms" % delt) except CtapError as e: - print('7609 byte Ping failed:', e) - raise RuntimeError('ping failed') - print('PASS: 7609 byte ping') + print("7609 byte Ping failed:", e) + raise RuntimeError("ping failed") + print("PASS: 7609 byte ping") # sys.flush(sys.sto) sys.stdout.flush() def test_hid(self, check_timeouts=False): if check_timeouts: - print('Test idle') + print("Test idle") try: cmd, resp = self.recv_raw() except socket.timeout: - print('Pass: Idle') + print("Pass: Idle") - print('Test init') - r = self.send_data(CTAPHID.INIT, '\x11\x11\x11\x11\x11\x11\x11\x11') + print("Test init") + r = self.send_data(CTAPHID.INIT, "\x11\x11\x11\x11\x11\x11\x11\x11") pingdata = os.urandom(100) try: r = self.send_data(CTAPHID.PING, pingdata) if r != pingdata: - raise ValueError('Ping data not echo\'d') + raise ValueError("Ping data not echo'd") except CtapError as e: - print('100 byte Ping failed:', e) - raise RuntimeError('ping failed') - print('PASS: 100 byte ping') + print("100 byte Ping failed:", e) + raise RuntimeError("ping failed") + print("PASS: 100 byte ping") self.test_long_ping() try: - r = self.send_data(CTAPHID.WINK, '') + r = self.send_data(CTAPHID.WINK, "") print(hexlify(r)) # assert(len(r) == 0) except CtapError as e: - print('wink failed:', e) - raise RuntimeError('wink failed') - print('PASS: wink') + print("wink failed:", e) + raise RuntimeError("wink failed") + print("PASS: wink") # try: # r = self.send_data(CTAPHID.WINK, 'we9gofrei8g') @@ -184,87 +171,87 @@ class Tester: # print('PASS: malformed wink') try: - r = self.send_data(CTAPHID.CBOR, '') + r = self.send_data(CTAPHID.CBOR, "") if len(r) > 1 or r[0] == 0: - raise RuntimeError('Cbor is supposed to have payload') + raise RuntimeError("Cbor is supposed to have payload") except CtapError as e: assert e.code == CtapError.ERR.INVALID_LENGTH - print('PASS: no data cbor') + print("PASS: no data cbor") try: - r = self.send_data(CTAPHID.MSG, '') + r = self.send_data(CTAPHID.MSG, "") print(hexlify(r)) if len(r) > 2: - raise RuntimeError('MSG is supposed to have payload') + raise RuntimeError("MSG is supposed to have payload") except CtapError as e: assert e.code == CtapError.ERR.INVALID_LENGTH - print('PASS: no data msg') + print("PASS: no data msg") try: - r = self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') + r = self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") except CtapError as e: - raise RuntimeError('resync fail: ', e) - print('PASS: resync') + raise RuntimeError("resync fail: ", e) + print("PASS: resync") try: - r = self.send_data(0x66, '') - raise RuntimeError('Invalid command did not return error') + r = self.send_data(0x66, "") + raise RuntimeError("Invalid command did not return error") except CtapError as e: assert e.code == CtapError.ERR.INVALID_COMMAND - print('PASS: invalid HID command') + print("PASS: invalid HID command") - print('Sending packet with too large of a length.') - self.send_raw('\x81\x1d\xba\x00') + print("Sending packet with too large of a length.") + self.send_raw("\x81\x1d\xba\x00") cmd, resp = self.recv_raw() self.check_error(resp, CtapError.ERR.INVALID_LENGTH) - print('PASS: invalid length') + print("PASS: invalid length") - r = self.send_data(CTAPHID.PING, '\x44' * 200) - print('Sending packets that skip a sequence number.') - self.send_raw('\x81\x04\x90') - self.send_raw('\x00') - self.send_raw('\x01') + r = self.send_data(CTAPHID.PING, "\x44" * 200) + print("Sending packets that skip a sequence number.") + self.send_raw("\x81\x04\x90") + self.send_raw("\x00") + self.send_raw("\x01") # skip 2 - self.send_raw('\x03') + self.send_raw("\x03") cmd, resp = self.recv_raw() self.check_error(resp, CtapError.ERR.INVALID_SEQ) if check_timeouts: cmd, resp = self.recv_raw() assert cmd == 0xBF # timeout - print('PASS: invalid sequence') + print("PASS: invalid sequence") - print('Resync and send ping') + print("Resync and send ping") try: - r = self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') + r = self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") pingdata = os.urandom(100) r = self.send_data(CTAPHID.PING, pingdata) if r != pingdata: - raise ValueError('Ping data not echo\'d') + raise ValueError("Ping data not echo'd") except CtapError as e: - raise RuntimeError('resync fail: ', e) - print('PASS: resync and ping') + raise RuntimeError("resync fail: ", e) + print("PASS: resync and ping") - print('Send ping and abort it') - self.send_raw('\x81\x04\x00') - self.send_raw('\x00') - self.send_raw('\x01') + print("Send ping and abort it") + self.send_raw("\x81\x04\x00") + self.send_raw("\x00") + self.send_raw("\x01") try: - r = self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') + r = self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") except CtapError as e: - raise RuntimeError('resync fail: ', e) - print('PASS: interrupt ping with resync') + raise RuntimeError("resync fail: ", e) + print("PASS: interrupt ping with resync") - print('Send ping and abort it with different cid, expect timeout') + print("Send ping and abort it with different cid, expect timeout") oldcid = self.cid() - newcid = '\x11\x22\x33\x44' - self.send_raw('\x81\x10\x00') - self.send_raw('\x00') - self.send_raw('\x01') + newcid = "\x11\x22\x33\x44" + self.send_raw("\x81\x10\x00") + self.send_raw("\x00") + self.send_raw("\x01") self.set_cid(newcid) self.send_raw( - '\x86\x00\x08\x11\x22\x33\x44\x55\x66\x77\x88' + "\x86\x00\x08\x11\x22\x33\x44\x55\x66\x77\x88" ) # init from different cid - print('wait for init response') + print("wait for init response") cmd, r = self.recv_raw() # init response assert cmd == 0x86 self.set_cid(oldcid) @@ -273,51 +260,51 @@ class Tester: cmd, r = self.recv_raw() # timeout response assert cmd == 0xBF - print('PASS: resync and timeout') + print("PASS: resync and timeout") - print('Test timeout') - self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') + print("Test timeout") + self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") t1 = time.time() * 1000 - self.send_raw('\x81\x04\x00') - self.send_raw('\x00') - self.send_raw('\x01') + self.send_raw("\x81\x04\x00") + self.send_raw("\x00") + self.send_raw("\x01") cmd, r = self.recv_raw() # timeout response t2 = time.time() * 1000 delt = t2 - t1 assert cmd == 0xBF assert r[0] == CtapError.ERR.TIMEOUT assert delt < 1000 and delt > 400 - print('Pass timeout') + print("Pass timeout") - print('Test not cont') - self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') - self.send_raw('\x81\x04\x00') - self.send_raw('\x00') - self.send_raw('\x01') - self.send_raw('\x81\x10\x00') # init packet + print("Test not cont") + self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") + self.send_raw("\x81\x04\x00") + self.send_raw("\x00") + self.send_raw("\x01") + self.send_raw("\x81\x10\x00") # init packet cmd, r = self.recv_raw() # timeout response assert cmd == 0xBF assert r[0] == CtapError.ERR.INVALID_SEQ - print('PASS: Test not cont') + print("PASS: Test not cont") if check_timeouts: - print('Check random cont ignored') - self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') - self.send_raw('\x01\x10\x00') + print("Check random cont ignored") + self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") + self.send_raw("\x01\x10\x00") try: cmd, r = self.recv_raw() # timeout response except socket.timeout: pass - print('PASS: random cont') + print("PASS: random cont") - print('Check busy') + print("Check busy") t1 = time.time() * 1000 - self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') + self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") oldcid = self.cid() - newcid = '\x11\x22\x33\x44' - self.send_raw('\x81\x04\x00') + newcid = "\x11\x22\x33\x44" + self.send_raw("\x81\x04\x00") self.set_cid(newcid) - self.send_raw('\x81\x04\x00') + self.send_raw("\x81\x04\x00") cmd, r = self.recv_raw() # busy response t2 = time.time() * 1000 assert t2 - t1 < 100 @@ -328,25 +315,25 @@ class Tester: cmd, r = self.recv_raw() # timeout response assert cmd == 0xBF assert r[0] == CtapError.ERR.TIMEOUT - print('PASS: busy') + print("PASS: busy") - print('Check busy interleaved') - cid1 = '\x11\x22\x33\x44' - cid2 = '\x01\x22\x33\x44' + print("Check busy interleaved") + cid1 = "\x11\x22\x33\x44" + cid2 = "\x01\x22\x33\x44" self.set_cid(cid2) - self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') + self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") self.set_cid(cid1) - self.send_data(CTAPHID.INIT, '\x11\x22\x33\x44\x55\x66\x77\x88') - self.send_raw('\x81\x00\x63') # echo 99 bytes first channel + self.send_data(CTAPHID.INIT, "\x11\x22\x33\x44\x55\x66\x77\x88") + self.send_raw("\x81\x00\x63") # echo 99 bytes first channel self.set_cid(cid2) # send ping on 2nd channel - self.send_raw('\x81\x00\x63') - self.send_raw('\x00') + self.send_raw("\x81\x00\x63") + self.send_raw("\x00") cmd, r = self.recv_raw() # busy response self.set_cid(cid1) # finish 1st channel ping - self.send_raw('\x00') + self.send_raw("\x00") self.set_cid(cid2) @@ -362,35 +349,35 @@ class Tester: cmd, r = self.recv_raw() # timeout assert cmd == 0xBF assert r[0] == CtapError.ERR.TIMEOUT - print('PASS: busy interleaved') + print("PASS: busy interleaved") if check_timeouts: - print('Test idle, wait for timeout') + print("Test idle, wait for timeout") sys.stdout.flush() try: cmd, resp = self.recv_raw() except socket.timeout: - print('Pass: Idle') + print("Pass: Idle") - print('Test cid 0 is invalid') - self.set_cid('\x00\x00\x00\x00') + print("Test cid 0 is invalid") + self.set_cid("\x00\x00\x00\x00") self.send_raw( - '\x86\x00\x08\x11\x22\x33\x44\x55\x66\x77\x88', cid='\x00\x00\x00\x00' + "\x86\x00\x08\x11\x22\x33\x44\x55\x66\x77\x88", cid="\x00\x00\x00\x00" ) cmd, r = self.recv_raw() # timeout assert cmd == 0xBF assert r[0] == CtapError.ERR.INVALID_CHANNEL - print('Pass: cid 0') + print("Pass: cid 0") - print('Test invalid broadcast cid use') - self.set_cid('\xff\xff\xff\xff') + print("Test invalid broadcast cid use") + self.set_cid("\xff\xff\xff\xff") self.send_raw( - '\x81\x00\x08\x11\x22\x33\x44\x55\x66\x77\x88', cid='\xff\xff\xff\xff' + "\x81\x00\x08\x11\x22\x33\x44\x55\x66\x77\x88", cid="\xff\xff\xff\xff" ) cmd, r = self.recv_raw() # timeout assert cmd == 0xBF assert r[0] == CtapError.ERR.INVALID_CHANNEL - print('Pass: cid broadcast') + print("Pass: cid broadcast") def test_u2f(self,): pass @@ -398,46 +385,46 @@ class Tester: def test_fido2_simple(self, pin_token=None): creds = [] exclude_list = [] - rp = {'id': self.host, 'name': 'ExaRP'} - user = {'id': b'usee_od', 'name': 'AB User'} - challenge = 'Y2hhbGxlbmdl' + rp = {"id": self.host, "name": "ExaRP"} + user = {"id": b"usee_od", "name": "AB User"} + challenge = "Y2hhbGxlbmdl" PIN = pin_token - fake_id1 = array.array('B', [randint(0, 255) for i in range(0, 150)]).tobytes() - fake_id2 = array.array('B', [randint(0, 255) for i in range(0, 73)]).tobytes() + fake_id1 = array.array("B", [randint(0, 255) for i in range(0, 150)]).tobytes() + fake_id2 = array.array("B", [randint(0, 255) for i in range(0, 73)]).tobytes() - exclude_list.append({'id': fake_id1, 'type': 'public-key'}) - exclude_list.append({'id': fake_id2, 'type': 'public-key'}) + exclude_list.append({"id": fake_id1, "type": "public-key"}) + exclude_list.append({"id": fake_id2, "type": "public-key"}) - print('MC') + print("MC") t1 = time.time() * 1000 attest, data = self.client.make_credential( rp, user, challenge, pin=PIN, exclude_list=[] ) t2 = time.time() * 1000 attest.verify(data.hash) - print('Register valid (%d ms)' % (t2 - t1)) + print("Register valid (%d ms)" % (t2 - t1)) cred = attest.auth_data.credential_data creds.append(cred) - allow_list = [{'id': creds[0].credential_id, 'type': 'public-key'}] + allow_list = [{"id": creds[0].credential_id, "type": "public-key"}] t1 = time.time() * 1000 assertions, client_data = self.client.get_assertion( - rp['id'], challenge, allow_list, pin=PIN + rp["id"], challenge, allow_list, pin=PIN ) t2 = time.time() * 1000 assertions[0].verify(client_data.hash, creds[0].public_key) - print('Assertion valid (%d ms)' % (t2 - t1)) + print("Assertion valid (%d ms)" % (t2 - t1)) def test_fido2_brute_force(self): creds = [] exclude_list = [] - rp = {'id': self.host, 'name': 'ExaRP'} - user = {'id': b'usee_od', 'name': 'AB User'} + rp = {"id": self.host, "name": "ExaRP"} + user = {"id": b"usee_od", "name": "AB User"} PIN = None - abc = 'abcdefghijklnmopqrstuvwxyz' + abc = "abcdefghijklnmopqrstuvwxyz" abc += abc.upper() self.ctap.reset() @@ -445,17 +432,17 @@ class Tester: for i in range(0, 2048 ** 2): creds = [] - challenge = ''.join([abc[randint(0, len(abc) - 1)] for x in range(0, 32)]) + challenge = "".join([abc[randint(0, len(abc) - 1)] for x in range(0, 32)]) fake_id1 = array.array( - 'B', [randint(0, 255) for i in range(0, 150)] + "B", [randint(0, 255) for i in range(0, 150)] ).tostring() fake_id2 = array.array( - 'B', [randint(0, 255) for i in range(0, 73)] + "B", [randint(0, 255) for i in range(0, 73)] ).tostring() - exclude_list.append({'id': fake_id1, 'type': 'public-key'}) - exclude_list.append({'id': fake_id2, 'type': 'public-key'}) + exclude_list.append({"id": fake_id1, "type": "public-key"}) + exclude_list.append({"id": fake_id2, "type": "public-key"}) # for i in range(0,2048**2): for i in range(0, 1): @@ -466,7 +453,7 @@ class Tester: print(attest.auth_data.counter) t2 = time.time() * 1000 attest.verify(data.hash) - print('Register valid (%d ms)' % (t2 - t1)) + print("Register valid (%d ms)" % (t2 - t1)) sys.stdout.flush() cred = attest.auth_data.credential_data @@ -474,39 +461,39 @@ class Tester: # for i in range(0,2048**2): for i in range(0, 1): - allow_list = [{'id': creds[0].credential_id, 'type': 'public-key'}] + allow_list = [{"id": creds[0].credential_id, "type": "public-key"}] t1 = time.time() * 1000 assertions, client_data = self.client.get_assertion( - rp['id'], challenge, allow_list, pin=PIN + rp["id"], challenge, allow_list, pin=PIN ) t2 = time.time() * 1000 assertions[0].verify(client_data.hash, creds[0].public_key) print(assertions[0].auth_data.counter) - print('Assertion valid (%d ms)' % (t2 - t1)) + print("Assertion valid (%d ms)" % (t2 - t1)) sys.stdout.flush() def test_fido2(self): def test(self, pincode=None): creds = [] exclude_list = [] - rp = {'id': self.host, 'name': 'ExaRP'} - user = {'id': b'usee_od', 'name': 'AB User'} - challenge = 'Y2hhbGxlbmdl' + rp = {"id": self.host, "name": "ExaRP"} + user = {"id": b"usee_od", "name": "AB User"} + challenge = "Y2hhbGxlbmdl" PIN = pincode fake_id1 = array.array( - 'B', [randint(0, 255) for i in range(0, 150)] + "B", [randint(0, 255) for i in range(0, 150)] ).tostring() fake_id2 = array.array( - 'B', [randint(0, 255) for i in range(0, 73)] + "B", [randint(0, 255) for i in range(0, 73)] ).tostring() - exclude_list.append({'id': fake_id1, 'type': 'public-key'}) - exclude_list.append({'id': fake_id2, 'type': 'public-key'}) + exclude_list.append({"id": fake_id1, "type": "public-key"}) + exclude_list.append({"id": fake_id2, "type": "public-key"}) # test make credential - print('make 3 credentials') + print("make 3 credentials") for i in range(0, 3): attest, data = self.client.make_credential( rp, user, challenge, pin=PIN, exclude_list=[] @@ -515,149 +502,149 @@ class Tester: cred = attest.auth_data.credential_data creds.append(cred) print(cred) - print('PASS') + print("PASS") if PIN is not None: - print('make credential with wrong pin code') + print("make credential with wrong pin code") try: attest, data = self.client.make_credential( - rp, user, challenge, pin=PIN + ' ', exclude_list=[] + rp, user, challenge, pin=PIN + " ", exclude_list=[] ) except CtapError as e: assert e.code == CtapError.ERR.PIN_INVALID except ClientError as e: assert e.cause.code == CtapError.ERR.PIN_INVALID - print('PASS') + print("PASS") - print('make credential with exclude list') + print("make credential with exclude list") attest, data = self.client.make_credential( rp, user, challenge, pin=PIN, exclude_list=exclude_list ) attest.verify(data.hash) cred = attest.auth_data.credential_data creds.append(cred) - print('PASS') + print("PASS") - print('make credential with exclude list including real credential') - real_excl = [{'id': cred.credential_id, 'type': 'public-key'}] + print("make credential with exclude list including real credential") + real_excl = [{"id": cred.credential_id, "type": "public-key"}] try: attest, data = self.client.make_credential( rp, user, challenge, pin=PIN, exclude_list=exclude_list + real_excl ) - raise RuntimeError('Exclude list did not return expected error') + raise RuntimeError("Exclude list did not return expected error") except CtapError as e: assert e.code == CtapError.ERR.CREDENTIAL_EXCLUDED except ClientError as e: assert e.cause.code == CtapError.ERR.CREDENTIAL_EXCLUDED - print('PASS') + print("PASS") for i, x in enumerate(creds): - print('get assertion %d' % i) - allow_list = [{'id': x.credential_id, 'type': 'public-key'}] + print("get assertion %d" % i) + allow_list = [{"id": x.credential_id, "type": "public-key"}] assertions, client_data = self.client.get_assertion( - rp['id'], challenge, allow_list, pin=PIN + rp["id"], challenge, allow_list, pin=PIN ) assertions[0].verify(client_data.hash, x.public_key) - print('PASS') + print("PASS") if PIN is not None: - print('get assertion with wrong pin code') + print("get assertion with wrong pin code") try: assertions, client_data = self.client.get_assertion( - rp['id'], challenge, allow_list, pin=PIN + ' ' + rp["id"], challenge, allow_list, pin=PIN + " " ) except CtapError as e: assert e.code == CtapError.ERR.PIN_INVALID except ClientError as e: assert e.cause.code == CtapError.ERR.PIN_INVALID - print('PASS') + print("PASS") - print('get multiple assertions') - allow_list = [{'id': x.credential_id, 'type': 'public-key'} for x in creds] + print("get multiple assertions") + allow_list = [{"id": x.credential_id, "type": "public-key"} for x in creds] assertions, client_data = self.client.get_assertion( - rp['id'], challenge, allow_list, pin=PIN + rp["id"], challenge, allow_list, pin=PIN ) for ass, cred in zip(assertions, creds): i += 1 ass.verify(client_data.hash, cred.public_key) - print('%d verified' % i) - print('PASS') + print("%d verified" % i) + print("PASS") - print('Reset device') + print("Reset device") try: self.ctap.reset() except CtapError as e: - print('Warning, reset failed: ', e) + print("Warning, reset failed: ", e) pass - print('PASS') + print("PASS") test(self, None) - print('Set a pin code') - PIN = '1122aabbwfg0h9g !@#==' + print("Set a pin code") + PIN = "1122aabbwfg0h9g !@#==" self.client.pin_protocol.set_pin(PIN) - print('PASS') + print("PASS") - print('Illegally set pin code again') + print("Illegally set pin code again") try: self.client.pin_protocol.set_pin(PIN) except CtapError as e: assert e.code == CtapError.ERR.NOT_ALLOWED - print('PASS') + print("PASS") - print('Change pin code') - PIN2 = PIN + '_pin2' + print("Change pin code") + PIN2 = PIN + "_pin2" self.client.pin_protocol.change_pin(PIN, PIN2) PIN = PIN2 - print('PASS') + print("PASS") - print('Change pin code using wrong pin') + print("Change pin code using wrong pin") try: - self.client.pin_protocol.change_pin(PIN.replace('a', 'b'), '1234') + self.client.pin_protocol.change_pin(PIN.replace("a", "b"), "1234") except CtapError as e: assert e.code == CtapError.ERR.PIN_INVALID - print('PASS') + print("PASS") - print('MC using wrong pin') + print("MC using wrong pin") try: - self.test_fido2_simple('abcd3') + self.test_fido2_simple("abcd3") except ClientError as e: assert e.cause.code == CtapError.ERR.PIN_INVALID - print('PASS') + print("PASS") - print('get info') + print("get info") inf = self.ctap.get_info() - print('PASS') + print("PASS") self.test_fido2_simple(PIN) - print('Re-run make_credential and get_assertion tests with pin code') + print("Re-run make_credential and get_assertion tests with pin code") test(self, PIN) - print('Reset device') + print("Reset device") try: self.ctap.reset() except CtapError as e: - print('Warning, reset failed: ', e) - print('PASS') + print("Warning, reset failed: ", e) + print("PASS") def test_rk(self,): creds = [] - rp = {'id': self.host, 'name': 'ExaRP'} - user0 = {'id': b'first one', 'name': 'single User'} + rp = {"id": self.host, "name": "ExaRP"} + user0 = {"id": b"first one", "name": "single User"} users = [ - {'id': b'user' + os.urandom(16), 'name': 'AB User'} for i in range(0, 2) + {"id": b"user" + os.urandom(16), "name": "AB User"} for i in range(0, 2) ] - challenge = 'Y2hhbGxlbmdl' + challenge = "Y2hhbGxlbmdl" PIN = None - print('reset') + print("reset") self.ctap.reset() # if PIN: self.client.pin_protocol.set_pin(PIN) - print('registering 1 user with RK') + print("registering 1 user with RK") t1 = time.time() * 1000 attest, data = self.client.make_credential( rp, user0, challenge, pin=PIN, exclude_list=[], rk=True @@ -665,20 +652,20 @@ class Tester: t2 = time.time() * 1000 attest.verify(data.hash) creds.append(attest.auth_data.credential_data) - print('Register valid (%d ms)' % (t2 - t1)) + print("Register valid (%d ms)" % (t2 - t1)) - print('1 assertion') + print("1 assertion") t1 = time.time() * 1000 assertions, client_data = self.client.get_assertion( - rp['id'], challenge, pin=PIN + rp["id"], challenge, pin=PIN ) t2 = time.time() * 1000 assertions[0].verify(client_data.hash, creds[0].public_key) - print('Assertion valid (%d ms)' % (t2 - t1)) + print("Assertion valid (%d ms)" % (t2 - t1)) print(assertions[0], client_data) - print('registering %d users with RK' % len(users)) + print("registering %d users with RK" % len(users)) for i in range(0, len(users)): t1 = time.time() * 1000 attest, data = self.client.make_credential( @@ -686,22 +673,22 @@ class Tester: ) t2 = time.time() * 1000 attest.verify(data.hash) - print('Register valid (%d ms)' % (t2 - t1)) + print("Register valid (%d ms)" % (t2 - t1)) creds.append(attest.auth_data.credential_data) t1 = time.time() * 1000 assertions, client_data = self.client.get_assertion( - rp['id'], challenge, pin=PIN + rp["id"], challenge, pin=PIN ) t2 = time.time() * 1000 for x, y in zip(assertions, creds): x.verify(client_data.hash, y.public_key) - print('Assertion(s) valid (%d ms)' % (t2 - t1)) + print("Assertion(s) valid (%d ms)" % (t2 - t1)) - print('registering a duplicate user ') + print("registering a duplicate user ") t1 = time.time() * 1000 attest, data = self.client.make_credential( @@ -710,24 +697,24 @@ class Tester: t2 = time.time() * 1000 attest.verify(data.hash) creds = creds[:2] + creds[3:] + [attest.auth_data.credential_data] - print('Register valid (%d ms)' % (t2 - t1)) + print("Register valid (%d ms)" % (t2 - t1)) t1 = time.time() * 1000 assertions, client_data = self.client.get_assertion( - rp['id'], challenge, pin=PIN + rp["id"], challenge, pin=PIN ) t2 = time.time() * 1000 assert len(assertions) == len(users) + 1 for x, y in zip(assertions, creds): x.verify(client_data.hash, y.public_key) - print('Assertion(s) valid (%d ms)' % (t2 - t1)) + print("Assertion(s) valid (%d ms)" % (t2 - t1)) def test_responses(self,): - PIN = '1234' + PIN = "1234" RPID = self.host for dev in CtapHidDevice.list_devices(): - print('dev', dev) + print("dev", dev) client = Fido2Client(dev, RPID) ctap = client.ctap2 # ctap.reset() @@ -739,17 +726,17 @@ class Tester: inf = ctap.get_info() # print (inf) - print('versions: ', inf.versions) - print('aaguid: ', inf.aaguid) - print('rk: ', inf.options['rk']) - print('clientPin: ', inf.options['clientPin']) - print('max_message_size: ', inf.max_msg_size) + print("versions: ", inf.versions) + print("aaguid: ", inf.aaguid) + print("rk: ", inf.options["rk"]) + print("clientPin: ", inf.options["clientPin"]) + print("max_message_size: ", inf.max_msg_size) # rp = {'id': 'SelectDevice', 'name': 'SelectDevice'} - rp = {'id': RPID, 'name': 'ExaRP'} - user = {'id': os.urandom(10), 'name': 'SelectDevice'} - user = {'id': b'21first one', 'name': 'single User'} - challenge = 'Y2hhbGxlbmdl' + rp = {"id": RPID, "name": "ExaRP"} + user = {"id": os.urandom(10), "name": "SelectDevice"} + user = {"id": b"21first one", "name": "single User"} + challenge = "Y2hhbGxlbmdl" if 1: attest, data = client.make_credential( @@ -759,15 +746,15 @@ class Tester: cred = attest.auth_data.credential_data creds = [cred] - allow_list = [{'id': creds[0].credential_id, 'type': 'public-key'}] + allow_list = [{"id": creds[0].credential_id, "type": "public-key"}] allow_list = [] assertions, client_data = client.get_assertion( - rp['id'], challenge, pin=PIN + rp["id"], challenge, pin=PIN ) assertions[0].verify(client_data.hash, creds[0].public_key) if 0: - print('registering 1 user with RK') + print("registering 1 user with RK") t1 = time.time() * 1000 attest, data = client.make_credential( rp, user, challenge, pin=PIN, exclude_list=[], rk=True @@ -775,23 +762,23 @@ class Tester: t2 = time.time() * 1000 attest.verify(data.hash) creds = [attest.auth_data.credential_data] - print('Register valid (%d ms)' % (t2 - t1)) + print("Register valid (%d ms)" % (t2 - t1)) - print('1 assertion') + print("1 assertion") t1 = time.time() * 1000 assertions, client_data = client.get_assertion( - rp['id'], challenge, pin=PIN + rp["id"], challenge, pin=PIN ) t2 = time.time() * 1000 assertions[0].verify(client_data.hash, creds[0].public_key) - print('Assertion valid (%d ms)' % (t2 - t1)) + print("Assertion valid (%d ms)" % (t2 - t1)) # print('fmt:',attest.fmt) # print('rp_id_hash',attest.auth_data.rp_id_hash) # print('flags:', hex(attest.auth_data.flags)) # print('count:', hex(attest.auth_data.counter)) - print('flags MC:', attest.auth_data) - print('flags GA:', assertions[0].auth_data) + print("flags MC:", attest.auth_data) + print("flags GA:", assertions[0].auth_data) # print('cred_id:',attest.auth_data.credential_data.credential_id) # print('pubkey:',attest.auth_data.credential_data.public_key) # print('aaguid:',attest.auth_data.credential_data.aaguid) @@ -803,8 +790,8 @@ class Tester: # print('x5c:',attest.att_statement['x5c']) # print('data:',data) - print('assertion:', assertions[0]) - print('clientData:', client_data) + print("assertion:", assertions[0]) + print("clientData:", client_data) print() # break @@ -817,12 +804,12 @@ def test_find_brute_force(): t = Tester() t.find_device() t2 = time.time() * 1000 - print('connected %d (%d ms)' % (i, t2 - t1)) + print("connected %d (%d ms)" % (i, t2 - t1)) i += 1 time.sleep(0.01) -if __name__ == '__main__': +if __name__ == "__main__": t = Tester() t.find_device() # t.test_hid() diff --git a/tools/gencert/ca_sign.sh b/tools/gencert/ca_sign.sh index 051fbbe..82dbd1e 100644 --- a/tools/gencert/ca_sign.sh +++ b/tools/gencert/ca_sign.sh @@ -1,23 +1,4 @@ # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. # [[ "$#" != 4 ]] && echo "usage: $0 " && exit 1 diff --git a/tools/gencert/cbytes.py b/tools/gencert/cbytes.py index 4520634..9ec2269 100644 --- a/tools/gencert/cbytes.py +++ b/tools/gencert/cbytes.py @@ -1,26 +1,6 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# from __future__ import print_function import base64 diff --git a/tools/gencert/dump_pem.py b/tools/gencert/dump_pem.py index c313f19..9c47193 100644 --- a/tools/gencert/dump_pem.py +++ b/tools/gencert/dump_pem.py @@ -1,26 +1,6 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# from __future__ import print_function import sys, fileinput, binascii diff --git a/tools/gencert/gen_intermediate.sh b/tools/gencert/gen_intermediate.sh index eb462a3..d0c4236 100644 --- a/tools/gencert/gen_intermediate.sh +++ b/tools/gencert/gen_intermediate.sh @@ -1,25 +1,5 @@ #!/bin/bash # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# keyname=interkey.pem certname=intercert.pem smallcertname=intercert.der diff --git a/tools/gencert/genca.sh b/tools/gencert/genca.sh index b6060da..34b1139 100644 --- a/tools/gencert/genca.sh +++ b/tools/gencert/genca.sh @@ -1,25 +1,5 @@ #!/bin/bash # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# keyname=key.pem certname=cert.pem smallcertname=cert.der @@ -30,7 +10,7 @@ openssl ecparam -genkey -name "$curve" -out "$keyname" -rand seed.txt # generate a "signing request" openssl req -new -key "$keyname" -out "$keyname".csr -subj "/C=US/ST=Maryland/O=SOLO HACKER/OU=Root CA/CN=solokeys.com/emailAddress=hello@solokeys.com" # self sign the request -openssl x509 -trustout -req -days 18250 -in "$keyname".csr -signkey "$keyname" -out "$certname" -sha256 +openssl x509 -trustout -req -days 18250 -in "$keyname".csr -signkey "$keyname" -out "$certname" -sha256 # convert to smaller size format DER openssl x509 -in $certname -outform der -out $smallcertname diff --git a/tools/gencert/print_x_y.py b/tools/gencert/print_x_y.py index 5083c49..1e20bb7 100644 --- a/tools/gencert/print_x_y.py +++ b/tools/gencert/print_x_y.py @@ -1,26 +1,6 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# import sys from ecdsa import SigningKey, NIST256p diff --git a/tools/gencert/verify_certs.sh b/tools/gencert/verify_certs.sh index 7fb14f9..61fb58c 100644 --- a/tools/gencert/verify_certs.sh +++ b/tools/gencert/verify_certs.sh @@ -1,23 +1,6 @@ # # Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. +# # # verify that the root CA/keypair and intermediate CA/keypairs are set up correctly. diff --git a/tools/http2udb.py b/tools/http2udb.py index f037449..8e97ce1 100755 --- a/tools/http2udb.py +++ b/tools/http2udb.py @@ -1,25 +1,6 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. # from __future__ import print_function, absolute_import, unicode_literals from http.server import BaseHTTPRequestHandler, HTTPServer @@ -43,7 +24,7 @@ from sign_firmware import * httpport = 8080 udpport = 8111 -HEX_FILE = '../efm32/GNU ARM v7.2.1 - Debug/EFM32.hex' +HEX_FILE = "../efm32/GNU ARM v7.2.1 - Debug/EFM32.hex" def ForceU2F(client, device): @@ -53,13 +34,13 @@ def ForceU2F(client, device): client._do_get_assertion = client._ctap1_get_assertion -if __name__ == '__main__': +if __name__ == "__main__": try: dev = next(CtapHidDevice.list_devices(), None) print(dev) if not dev: - raise RuntimeError('No FIDO device found') - client = Fido2Client(dev, 'https://example.com') + raise RuntimeError("No FIDO device found") + client = Fido2Client(dev, "https://example.com") ForceU2F(client, dev) ctap = client.ctap except Exception as e: @@ -69,8 +50,8 @@ if __name__ == '__main__': def write(data): msg = from_websafe(data) msg = base64.b64decode(msg) - chal = b'A' * 32 - appid = b'A' * 32 + chal = b"A" * 32 + appid = b"A" * 32 # print (msg) # print (msg.decode()) # print (str(msg)) @@ -99,40 +80,40 @@ def read(): class UDPBridge(BaseHTTPRequestHandler): def end_headers(self): - self.send_header('Access-Control-Allow-Origin', '*') + self.send_header("Access-Control-Allow-Origin", "*") BaseHTTPRequestHandler.end_headers(self) def do_POST(self): - content_len = int(self.headers.get('Content-Length', 0)) + content_len = int(self.headers.get("Content-Length", 0)) post_body = self.rfile.read(content_len) - data = json.loads(post_body)['data'] + data = json.loads(post_body)["data"] print(data) msg = from_websafe(data) msg = base64.b64decode(msg) chal = b"\xf6\xa2\x3c\xa4\x0a\xf9\xda\xd4\x5f\xdc\xba\x7d\xc9\xde\xcb\xed\xb5\x84\x64\x3a\x4c\x9f\x44\xc2\x04\xb0\x17\xd7\xf4\x3e\xe0\x3f" - appid = b'A' * 32 + appid = b"A" * 32 s = ctap.authenticate(chal, appid, msg) data = ( - struct.pack('B', s.user_presence) - + struct.pack('>L', s.counter) + struct.pack("B", s.user_presence) + + struct.pack(">L", s.counter) + s.signature ) - data = base64.b64encode(data).decode('ascii') + data = base64.b64encode(data).decode("ascii") data = to_websafe(data) - data = json.dumps({'data': data}) - data = data.encode('ascii') + data = json.dumps({"data": data}) + data = data.encode("ascii") self.send_response(200) - self.send_header('Content-type', 'text/json') + self.send_header("Content-type", "text/json") self.end_headers() self.wfile.write(data) def do_GET(self): self.send_response(200) - self.send_header('Content-type', 'text/json') + self.send_header("Content-type", "text/json") msg = get_firmware_object("signing_key.pem", HEX_FILE) @@ -142,19 +123,19 @@ class UDPBridge(BaseHTTPRequestHandler): try: - server = HTTPServer(('', httpport), UDPBridge) - print('Started httpserver on port ', httpport) + server = HTTPServer(("", httpport), UDPBridge) + print("Started httpserver on port ", httpport) server.socket = ssl.wrap_socket( server.socket, keyfile="../web/localhost.key", - certfile='../web/localhost.crt', + certfile="../web/localhost.crt", server_side=True, ) - print('Saving signed firmware to firmware.json') + print("Saving signed firmware to firmware.json") msg = get_firmware_object("signing_key.pem", HEX_FILE) - wfile = open('firmware.json', 'wb+') + wfile = open("firmware.json", "wb+") wfile.write(json.dumps(msg).encode()) wfile.close() diff --git a/tools/nfcmon.py b/tools/nfcmon.py index 39c06a2..76f32a8 100755 --- a/tools/nfcmon.py +++ b/tools/nfcmon.py @@ -1,26 +1,6 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. -# -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. -# import datetime, sys from binascii import hexlify @@ -42,9 +22,9 @@ for p in Chameleon.Device.listDevices(): if p: chameleon.connect(p) else: - raise RuntimeError('No chameleon mini connected') + raise RuntimeError("No chameleon mini connected") -chameleon.execCmd('LOGMODE=LIVE') +chameleon.execCmd("LOGMODE=LIVE") while 1: b = chameleon.read(1, 20) @@ -53,4 +33,4 @@ while 1: sys.stdout.write(h) sys.stdout.flush() -chameleon.execCmd('LOGMODE=NONE') +chameleon.execCmd("LOGMODE=NONE") diff --git a/tools/solotool.py b/tools/solotool.py index b9f4606..aafe5f5 100755 --- a/tools/solotool.py +++ b/tools/solotool.py @@ -1,25 +1,12 @@ #!/usr/bin/env python # -*- coding: utf-8 -*- # -# Copyright (C) 2018 SoloKeys, Inc. +# Copyright 2019 SoloKeys Developers # -# This file is part of Solo. -# -# Solo is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Solo is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with Solo. If not, see -# -# This code is available under licenses for commercial use. -# Please contact SoloKeys for more information. +# Licensed under the Apache License, Version 2.0, or the MIT license , at your option. This file may not be +# copied, modified, or distributed except according to those terms. # # Programs solo using the Solo bootloader @@ -31,11 +18,17 @@ import tempfile from binascii import hexlify, unhexlify from hashlib import sha256 +from cryptography import x509 +from cryptography.hazmat.primitives import hashes +from cryptography.hazmat.backends import default_backend + from fido2.hid import CtapHidDevice, CTAPHID from fido2.client import Fido2Client, ClientError from fido2.ctap import CtapError from fido2.ctap1 import CTAP1, ApduError +from fido2.ctap2 import CTAP2 from fido2.utils import Timeout +from fido2.attestation import Attestation import usb.core import usb.util @@ -46,27 +39,27 @@ import serial def to_websafe(data): - data = data.replace('+', '-') - data = data.replace('/', '_') - data = data.replace('=', '') + data = data.replace("+", "-") + data = data.replace("/", "_") + data = data.replace("=", "") return data def from_websafe(data): - data = data.replace('-', '+') - data = data.replace('_', '/') - return data + '=='[: (3 * len(data)) % 4] + data = data.replace("-", "+") + data = data.replace("_", "/") + return data + "=="[: (3 * len(data)) % 4] def get_firmware_object(sk_name, hex_file): from ecdsa import SigningKey, NIST256p sk = SigningKey.from_pem(open(sk_name).read()) - fw = open(hex_file, 'r').read() + fw = open(hex_file, "r").read() fw = base64.b64encode(fw.encode()) fw = to_websafe(fw.decode()) ih = IntelHex() - ih.fromfile(hex_file, format='hex') + ih.fromfile(hex_file, format="hex") # start of firmware and the size of the flash region allocated for it. # TODO put this somewhere else. START = ih.segments()[0][0] @@ -78,26 +71,31 @@ def get_firmware_object(sk_name, hex_file): im_size = END - START - print('im_size: ', im_size) - print('firmware_size: ', len(arr)) + print("im_size: ", im_size) + print("firmware_size: ", len(arr)) - byts = (arr).tobytes() if hasattr(arr, 'tobytes') else (arr).tostring() + byts = (arr).tobytes() if hasattr(arr, "tobytes") else (arr).tostring() h = sha256() h.update(byts) sig = binascii.unhexlify(h.hexdigest()) - print('hash', binascii.hexlify(sig)) + print("hash", binascii.hexlify(sig)) sig = sk.sign_digest(sig) - print('sig', binascii.hexlify(sig)) + print("sig", binascii.hexlify(sig)) sig = base64.b64encode(sig) sig = to_websafe(sig.decode()) # msg = {'data': read()} - msg = {'firmware': fw, 'signature': sig} + msg = {"firmware": fw, "signature": sig} return msg +class SoloExtension: + version = 0x14 + rng = 0x15 + + class SoloBootloader: write = 0x40 done = 0x41 @@ -113,12 +111,13 @@ class SoloBootloader: HIDCommandEnterSTBoot = 0x52 HIDCommandRNG = 0x60 - TAG = b'\x8C\x27\x90\xf6' + TAG = b"\x8C\x27\x90\xf6" class SoloClient: def __init__(self,): - self.origin = 'https://example.org' + self.origin = "https://example.org" + self.host = "example.org" self.exchange = self.exchange_hid self.do_reboot = True @@ -142,50 +141,52 @@ class SoloClient: def find_device(self,): dev = next(CtapHidDevice.list_devices(), None) if not dev: - raise RuntimeError('No FIDO device found') + raise RuntimeError("No FIDO device found") self.dev = dev self.ctap1 = CTAP1(dev) + self.ctap2 = CTAP2(dev) + self.client = Fido2Client(dev, self.origin) if self.exchange == self.exchange_hid: - self.send_data_hid(CTAPHID.INIT, '\x11\x11\x11\x11\x11\x11\x11\x11') + self.send_data_hid(CTAPHID.INIT, "\x11\x11\x11\x11\x11\x11\x11\x11") @staticmethod - def format_request(cmd, addr=0, data=b'A' * 16): - arr = b'\x00' * 9 - addr = struct.pack('H', len(data)) + def format_request(cmd, addr=0, data=b"A" * 16): + arr = b"\x00" * 9 + addr = struct.pack("H", len(data)) return cmd + addr[:3] + SoloBootloader.TAG + length + data def send_only_hid(self, cmd, data): - if type(data) != type(b''): - data = struct.pack('%dB' % len(data), *[ord(x) for x in data]) + if type(data) != type(b""): + data = struct.pack("%dB" % len(data), *[ord(x) for x in data]) self.dev._dev.InternalSend(0x80 | cmd, bytearray(data)) def send_data_hid(self, cmd, data): - if type(data) != type(b''): - data = struct.pack('%dB' % len(data), *[ord(x) for x in data]) + if type(data) != type(b""): + data = struct.pack("%dB" % len(data), *[ord(x) for x in data]) with Timeout(1.0) as event: return self.dev.call(cmd, data, event) - def exchange_hid(self, cmd, addr=0, data=b'A' * 16): + def exchange_hid(self, cmd, addr=0, data=b"A" * 16): req = SoloClient.format_request(cmd, addr, data) data = self.send_data_hid(SoloBootloader.HIDCommandBoot, req) ret = data[0] if ret != CtapError.ERR.SUCCESS: - str = '' + str = "" if ret == CtapError.ERR.NOT_ALLOWED: - str = 'Out of bounds write' - raise RuntimeError('Device returned non-success code %02x: %s' % (ret, str)) + str = "Out of bounds write" + raise RuntimeError("Device returned non-success code %02x: %s" % (ret, str)) return data[1:] - def exchange_u2f(self, cmd, addr=0, data=b'A' * 16): - appid = b'A' * 32 - chal = b'B' * 32 + def exchange_u2f(self, cmd, addr=0, data=b"A" * 16): + appid = b"A" * 32 + chal = b"B" * 32 req = SoloClient.format_request(cmd, addr, data) @@ -193,22 +194,28 @@ class SoloClient: ret = res.signature[0] if ret != CtapError.ERR.SUCCESS: - str = '' + str = "" if ret == CtapError.ERR.NOT_ALLOWED: - str = 'Out of bounds write' - raise RuntimeError('Device returned non-success code %02x: %s' % (ret, str)) + str = "Out of bounds write" + raise RuntimeError("Device returned non-success code %02x: %s" % (ret, str)) return res.signature[1:] - def version(self,): + def bootloader_version(self,): data = self.exchange(SoloBootloader.version) + if len(data) > 2: + return (data[0], data[1], data[2]) return data[0] + def solo_version(self,): + data = self.exchange_u2f(SoloExtension.version) + return (data[0], data[1], data[2]) + def write_flash(self, addr, data): self.exchange(SoloBootloader.write, addr, data) def get_rng(self, num=0): - ret = self.send_data_hid(SoloBootloader.HIDCommandRNG, struct.pack('B', num)) + ret = self.send_data_hid(SoloBootloader.HIDCommandRNG, struct.pack("B", num)) return ret def verify_flash(self, sig): @@ -220,7 +227,26 @@ class SoloClient: self.exchange(SoloBootloader.done, 0, sig) def wink(self,): - self.send_data_hid(CTAPHID.WINK, b'') + self.send_data_hid(CTAPHID.WINK, b"") + + def reset(self,): + self.ctap2.reset() + + def make_credential(self,): + rp = {"id": self.host, "name": "example site"} + user = {"id": b"abcdef", "name": "example user"} + challenge = "Y2hhbGxlbmdl" + attest, data = self.client.make_credential(rp, user, challenge, exclude_list=[]) + try: + attest.verify(data.hash) + except AttributeError: + verifier = Attestation.for_type(attest.fmt) + verifier().verify(attest.att_statement, attest.auth_data, data.hash) + print("Register valid") + x5c = attest.att_statement["x5c"][0] + cert = x509.load_der_x509_certificate(x5c, default_backend()) + + return cert def enter_solo_bootloader(self,): """ @@ -229,12 +255,12 @@ class SoloClient: so it can be reprogrammed """ if self.exchange != self.exchange_hid: - self.send_data_hid(CTAPHID.INIT, '\x11\x11\x11\x11\x11\x11\x11\x11') - self.send_data_hid(SoloBootloader.HIDCommandEnterBoot, '') + self.send_data_hid(CTAPHID.INIT, "\x11\x11\x11\x11\x11\x11\x11\x11") + self.send_data_hid(SoloBootloader.HIDCommandEnterBoot, "") def is_solo_bootloader(self,): try: - self.version() + self.bootloader_version() return True except CtapError as e: if e.code == CtapError.ERR.INVALID_COMMAND: @@ -255,7 +281,7 @@ class SoloClient: req = SoloClient.format_request(SoloBootloader.st_dfu) self.send_only_hid(SoloBootloader.HIDCommandBoot, req) else: - self.send_only_hid(SoloBootloader.HIDCommandEnterSTBoot, '') + self.send_only_hid(SoloBootloader.HIDCommandEnterSTBoot, "") def disable_solo_bootloader(self,): """ @@ -264,10 +290,10 @@ class SoloClient: If you've started from a solo hacker, make you you've programmed a final/production build! """ ret = self.exchange( - SoloBootloader.disable, 0, b'\xcd\xde\xba\xaa' + SoloBootloader.disable, 0, b"\xcd\xde\xba\xaa" ) # magic number if ret[0] != CtapError.ERR.SUCCESS: - print('Failed to disable bootloader') + print("Failed to disable bootloader") return False time.sleep(0.1) self.exchange(SoloBootloader.do_reboot) @@ -275,22 +301,22 @@ class SoloClient: def program_file(self, name): - if name.lower().endswith('.json'): - data = json.loads(open(name, 'r').read()) - fw = base64.b64decode(from_websafe(data['firmware']).encode()) - sig = base64.b64decode(from_websafe(data['signature']).encode()) + if name.lower().endswith(".json"): + data = json.loads(open(name, "r").read()) + fw = base64.b64decode(from_websafe(data["firmware"]).encode()) + sig = base64.b64decode(from_websafe(data["signature"]).encode()) ih = IntelHex() tmp = tempfile.NamedTemporaryFile(delete=False) tmp.write(fw) tmp.seek(0) tmp.close() - ih.fromfile(tmp.name, format='hex') + ih.fromfile(tmp.name, format="hex") else: - if not name.lower().endswith('.hex'): + if not name.lower().endswith(".hex"): print('Warning, assuming "%s" is an Intel Hex file.' % name) sig = None ih = IntelHex() - ih.fromfile(name, format='hex') + ih.fromfile(name, format="hex") if self.exchange == self.exchange_hid: chunk = 2048 @@ -301,7 +327,7 @@ class SoloClient: size = seg[1] - seg[0] total = 0 t1 = time.time() * 1000 - print('erasing...') + print("erasing...") for i in range(seg[0], seg[1], chunk): s = i e = min(i + chunk, seg[1]) @@ -309,17 +335,17 @@ class SoloClient: self.write_flash(i, data) total += chunk progress = total / float(size) * 100 - sys.stdout.write('downloading %.2f%%...\r' % progress) - sys.stdout.write('downloaded 100% \r\n') + sys.stdout.write("downloading %.2f%%...\r" % progress) + sys.stdout.write("downloaded 100% \r\n") t2 = time.time() * 1000 - print('time: %.2f s' % ((t2 - t1) / 1000.0)) + print("time: %.2f s" % ((t2 - t1) / 1000.0)) - print('Verifying...') + print("Verifying...") if self.do_reboot: if sig is not None: self.verify_flash(sig) else: - self.verify_flash(b'A' * 64) + self.verify_flash(b"A" * 64) class DFU: @@ -400,14 +426,14 @@ class DFUDevice: devs = usb.core.find(idVendor=0x0483, idProduct=0xDF11, find_all=1) for x in devs: if ser == (usb.util.get_string(x, x.iSerialNumber)): - print('connecting to ', ser) + print("connecting to ", ser) self.dev = x break else: self.dev = usb.core.find(idVendor=0x0483, idProduct=0xDF11) if self.dev is None: - raise RuntimeError('No ST DFU devices found.') + raise RuntimeError("No ST DFU devices found.") self.dev.set_configuration() for cfg in self.dev: @@ -418,7 +444,7 @@ class DFUDevice: self.intNum = intf.bInterfaceNumber return self.dev - raise RuntimeError('No ST DFU alternate-%d found.' % altsetting) + raise RuntimeError("No ST DFU alternate-%d found." % altsetting) def init(self,): if self.state() == DFU.state.ERROR: @@ -479,7 +505,7 @@ class DFUDevice: self.clear_status() self.clear_status() if self.state() not in (DFU.state.IDLE, DFU.state.DOWNLOAD_IDLE): - raise RuntimeError('DFU device not in correct state for writing memory.') + raise RuntimeError("DFU device not in correct state for writing memory.") oldaddr = addr addr = DFUDevice.addr2block(addr, len(data)) @@ -496,7 +522,7 @@ class DFUDevice: self.clear_status() self.clear_status() if self.state() not in (DFU.state.IDLE, DFU.state.UPLOAD_IDLE): - raise RuntimeError('DFU device not in correct state for reading memory.') + raise RuntimeError("DFU device not in correct state for reading memory.") return self.upload(addr, size) @@ -511,7 +537,7 @@ class DFUDevice: self.clear_status() self.clear_status() if self.state() not in (DFU.state.IDLE, DFU.state.DOWNLOAD_IDLE): - raise RuntimeError('DFU device not in correct state for detaching.') + raise RuntimeError("DFU device not in correct state for detaching.") # self.set_addr(0x08000000) # self.block_on_state(DFU.state.DOWNLOAD_BUSY) # assert(DFU.state.DOWNLOAD_IDLE == self.state()) @@ -541,15 +567,15 @@ def attempt_to_boot_bootloader(p): except CtapError as e: if e.code == CtapError.ERR.INVALID_COMMAND: print( - 'Solo appears to not be a solo hacker. Try holding down the button for 2 while you plug token in.' + "Solo appears to not be a solo hacker. Try holding down the button for 2 while you plug token in." ) sys.exit(1) else: raise (e) - print('Solo rebooted. Reconnecting...') + print("Solo rebooted. Reconnecting...") time.sleep(0.500) if not attempt_to_find_device(p): - raise RuntimeError('Failed to reconnect!') + raise RuntimeError("Failed to reconnect!") def solo_main(): @@ -557,14 +583,27 @@ def solo_main(): parser.add_argument( "--rng", action="store_true", - help='Continuously dump random numbers generated from Solo.', + help="Continuously dump random numbers generated from Solo.", + ) + parser.add_argument("--wink", action="store_true", help="HID Wink command.") + parser.add_argument( + "--reset", + action="store_true", + help="Issue a FIDO2 reset command. Warning: your credentials will be lost.", + ) + parser.add_argument( + "--verify-solo", + action="store_true", + help="Verify that the Solo firmware is from SoloKeys. Check firmware version.", ) - parser.add_argument("--wink", action="store_true", help='HID Wink command.') args = parser.parse_args() p = SoloClient() p.find_device() + if args.reset: + p.reset() + if args.rng: while True: r = p.get_rng(255) @@ -575,10 +614,29 @@ def solo_main(): p.wink() sys.exit(0) + if args.verify_solo: + cert = p.make_credential() + + solo_fingerprint = b"r\xd5\x831&\xac\xfc\xe9\xa8\xe8&`\x18\xe6AI4\xc8\xbeJ\xb8h_\x91\xb0\x99!\x13\xbb\xd42\x95" + hacker_fingerprint = b"\xd0ml\xcb\xda}\xe5j\x16'\xc2\xa7\x89\x9c5\xa2\xa3\x16\xc8Q\xb3j\xd8\xed~\xd7\x84y\xbbx~\xf7" + + if cert.fingerprint(hashes.SHA256()) == solo_fingerprint: + print("Valid SOLO firmware from SoloKeys") + elif cert.fingerprint(hashes.SHA256()) == hacker_fingerprint: + print("Valid HACKER firmware") + else: + print("Unknown fingerprint! ", cert.fingerprint(hashes.SHA256())) + + try: + v = p.solo_version() + print("Version: ", v) + except ApduError: + print("Firmware is out of date.") + def asked_for_help(): for i, v in enumerate(sys.argv): - if v == '-h' or v == '--help': + if v == "-h" or v == "--help": return True return False @@ -613,9 +671,9 @@ def monitor_main(): try: d = ser.read(1) except serial.SerialException: - print('reconnecting...') + print("reconnecting...") ser = reconnect() - print('done') + print("done") sys.stdout.buffer.write(d) sys.stdout.flush() @@ -640,26 +698,26 @@ def genkey_main(): if len(sys.argv) > 2: seed = sys.argv[2] - print('using input seed file ', seed) - rng = open(seed, 'rb').read() + print("using input seed file ", seed) + rng = open(seed, "rb").read() secexp = randrange_from_seed__trytryagain(rng, NIST256p.order) sk = SigningKey.from_secret_exponent(secexp, curve=NIST256p) else: sk = SigningKey.generate(curve=NIST256p) sk_name = sys.argv[1] - print('Signing key for signing device firmware: ' + sk_name) - open(sk_name, 'wb+').write(sk.to_pem()) + print("Signing key for signing device firmware: " + sk_name) + open(sk_name, "wb+").write(sk.to_pem()) vk = sk.get_verifying_key() - print('Public key in various formats:') + print("Public key in various formats:") print() print([c for c in vk.to_string()]) print() - print(''.join(['%02x' % c for c in vk.to_string()])) + print("".join(["%02x" % c for c in vk.to_string()])) print() - print('"\\x' + '\\x'.join(['%02x' % c for c in vk.to_string()]) + '"') + print('"\\x' + "\\x".join(["%02x" % c for c in vk.to_string()]) + '"') print() @@ -667,20 +725,20 @@ def sign_main(): if asked_for_help() or len(sys.argv) != 4: print( - 'Signs a firmware hex file, outputs a .json file that can be used for signed update.' + "Signs a firmware hex file, outputs a .json file that can be used for signed update." ) - print('usage: %s [-h]' % sys.argv[0]) + print("usage: %s [-h]" % sys.argv[0]) print() sys.exit(1) msg = get_firmware_object(sys.argv[1], sys.argv[2]) - print('Saving signed firmware to', sys.argv[3]) - wfile = open(sys.argv[3], 'wb+') + print("Saving signed firmware to", sys.argv[3]) + wfile = open(sys.argv[3], "wb+") wfile.write(json.dumps(msg).encode()) wfile.close() def use_dfu(args): - fw = args.__dict__['[firmware]'] + fw = args.__dict__["[firmware]"] for i in range(0, 8): dfu = DFUDevice() @@ -691,15 +749,15 @@ def use_dfu(args): dfu = None if dfu is None: - print('No STU DFU device found. ') + print("No STU DFU device found. ") if args.dfu_serial: - print('Serial number used: ', args.dfu_serial) + print("Serial number used: ", args.dfu_serial) sys.exit(1) dfu.init() if fw: ih = IntelHex() - ih.fromfile(fw, format='hex') + ih.fromfile(fw, format="hex") chunk = 2048 seg = ih.segments()[0] @@ -707,11 +765,11 @@ def use_dfu(args): total = 0 t1 = time.time() * 1000 - print('erasing...') + print("erasing...") try: dfu.mass_erase() except usb.core.USBError: - dfu.write_page(0x08000000 + 2048 * 10, 'ZZFF' * (2048 // 4)) + dfu.write_page(0x08000000 + 2048 * 10, "ZZFF" * (2048 // 4)) dfu.mass_erase() page = 0 @@ -725,7 +783,7 @@ def use_dfu(args): progress = total / float(size) * 100 sys.stdout.write( - 'downloading %.2f%% %08x - %08x ... \r' + "downloading %.2f%% %08x - %08x ... \r" % (progress, i, i + page) ) # time.sleep(0.100) @@ -734,8 +792,8 @@ def use_dfu(args): # print(dfu.read_mem(i,16)) t2 = time.time() * 1000 print() - print('time: %d ms' % (t2 - t1)) - print('verifying...') + print("time: %d ms" % (t2 - t1)) + print("verifying...") progress = 0 for start, end in ih.segments(): for i in range(start, end, chunk): @@ -744,13 +802,13 @@ def use_dfu(args): total += chunk progress = total / float(size) * 100 sys.stdout.write( - 'reading %.2f%% %08x - %08x ... \r' + "reading %.2f%% %08x - %08x ... \r" % (progress, i, i + page) ) if (end - start) == chunk: assert data1 == data2 print() - print('firmware readback verified.') + print("firmware readback verified.") if args.detach: dfu.detach() @@ -760,71 +818,71 @@ def programmer_main(): parser = argparse.ArgumentParser() parser.add_argument( "[firmware]", - nargs='?', - default='', - help='firmware file. Either a JSON or hex file. JSON file contains signature while hex does not.', + nargs="?", + default="", + help="firmware file. Either a JSON or hex file. JSON file contains signature while hex does not.", ) parser.add_argument( "--use-hid", action="store_true", - help='Programs using custom HID command (default). Quicker than using U2F authenticate which is what a browser has to use.', + help="Programs using custom HID command (default). Quicker than using U2F authenticate which is what a browser has to use.", ) parser.add_argument( "--use-u2f", action="store_true", - help='Programs using U2F authenticate. This is what a web application will use.', + help="Programs using U2F authenticate. This is what a web application will use.", ) parser.add_argument( "--no-reset", action="store_true", - help='Don\'t reset after writing firmware. Stay in bootloader mode.', + help="Don't reset after writing firmware. Stay in bootloader mode.", ) parser.add_argument( "--reset-only", action="store_true", - help='Don\'t write anything, try to boot without a signature.', + help="Don't write anything, try to boot without a signature.", ) parser.add_argument( - "--reboot", action="store_true", help='Tell bootloader to reboot.' + "--reboot", action="store_true", help="Tell bootloader to reboot." ) parser.add_argument( "--enter-bootloader", action="store_true", - help='Don\'t write anything, try to enter bootloader. Typically only supported by Solo Hacker builds.', + help="Don't write anything, try to enter bootloader. Typically only supported by Solo Hacker builds.", ) parser.add_argument( "--st-dfu", action="store_true", - help='Don\'t write anything, try to enter ST DFU. Warning, you could brick your Solo if you overwrite everything. You should reprogram the option bytes just to be safe (boot to Solo bootloader first, then run this command).', + help="Don't write anything, try to enter ST DFU. Warning, you could brick your Solo if you overwrite everything. You should reprogram the option bytes just to be safe (boot to Solo bootloader first, then run this command).", ) parser.add_argument( "--disable", action="store_true", - help='Disable the Solo bootloader. Cannot be undone. No future updates can be applied.', + help="Disable the Solo bootloader. Cannot be undone. No future updates can be applied.", ) parser.add_argument( "--detach", action="store_true", - help='Detach from ST DFU and boot from main flash. Must be in DFU mode.', + help="Detach from ST DFU and boot from main flash. Must be in DFU mode.", ) parser.add_argument( "--dfu-serial", - default='', - help='Specify a serial number for a specific DFU device to connect to.', + default="", + help="Specify a serial number for a specific DFU device to connect to.", ) parser.add_argument( - "--use-dfu", action="store_true", help='Boot to ST-DFU before continuing.' + "--use-dfu", action="store_true", help="Boot to ST-DFU before continuing." ) args = parser.parse_args() - fw = args.__dict__['[firmware]'] + fw = args.__dict__["[firmware]"] p = SoloClient() try: p.find_device() if args.use_dfu: - print('entering dfu..') + print("entering dfu..") try: attempt_to_boot_bootloader(p) p.enter_st_dfu() @@ -832,7 +890,7 @@ def programmer_main(): # already in DFU mode? pass except RuntimeError: - print('No Solo device detected.') + print("No Solo device detected.") if fw or args.detach: use_dfu(args) sys.exit(0) @@ -850,7 +908,7 @@ def programmer_main(): p.set_reboot(False) if args.enter_bootloader: - print('Attempting to boot into bootloader mode...') + print("Attempting to boot into bootloader mode...") attempt_to_boot_bootloader(p) sys.exit(0) @@ -859,7 +917,7 @@ def programmer_main(): sys.exit(0) if args.st_dfu: - print('Sending command to boot into ST DFU...') + print("Sending command to boot into ST DFU...") p.enter_st_dfu() sys.exit(0) @@ -867,25 +925,25 @@ def programmer_main(): p.disable_solo_bootloader() sys.exit(0) - if fw == '' and not args.reset_only: - print('Need to supply firmware filename, or see help for more options.') + if fw == "" and not args.reset_only: + print("Need to supply firmware filename, or see help for more options.") parser.print_help() sys.exit(1) try: - p.version() + p.bootloader_version() except CtapError as e: if e.code == CtapError.ERR.INVALID_COMMAND: - print('Bootloader not active. Attempting to boot into bootloader mode...') + print("Bootloader not active. Attempting to boot into bootloader mode...") attempt_to_boot_bootloader(p) else: raise (e) except ApduError: - print('Bootloader not active. Attempting to boot into bootloader mode...') + print("Bootloader not active. Attempting to boot into bootloader mode...") attempt_to_boot_bootloader(p) if args.reset_only: - p.exchange(SoloBootloader.done, 0, b'A' * 64) + p.exchange(SoloBootloader.done, 0, b"A" * 64) else: p.program_file(fw) @@ -893,7 +951,7 @@ def programmer_main(): def main_mergehex(): if len(sys.argv) < 3: print( - 'usage: %s [...] [-s ] ' + "usage: %s [...] [-s ] " ) sys.exit(1) @@ -909,7 +967,7 @@ def main_mergehex(): # user supplied, optional for i, x in enumerate(args): - if x == '-s': + if x == "-s": secret_attestation_key = args[i + 1] args = args[:i] + args[i + 2 :] break @@ -922,8 +980,8 @@ def main_mergehex(): first = IntelHex(args[1]) for i in range(2, len(args) - 1): - print('merging %s with ' % (args[1]), args[i]) - first.merge(IntelHex(args[i]), overlap='replace') + print("merging %s with " % (args[1]), args[i]) + first.merge(IntelHex(args[i]), overlap="replace") first[flash_addr(APPLICATION_END_PAGE - 1)] = 0x41 first[flash_addr(APPLICATION_END_PAGE - 1) + 1] = 0x41 @@ -949,15 +1007,19 @@ def main_mergehex(): for i, x in enumerate(key): first[ATTEST_ADDR + i] = x - first.tofile(args[len(args) - 1], format='hex') + first.tofile(args[len(args) - 1], format="hex") -if __name__ == '__main__': +if __name__ == "__main__": + + if sys.version_info[0] < 3: + print("Sorry, python3 is required.") + sys.exit(1) if len(sys.argv) < 2 or (len(sys.argv) == 2 and asked_for_help()): - print('Diverse command line tool for working with Solo') - print('usage: %s [options] [-h]' % sys.argv[0]) - print('commands: program, solo, monitor, sign, genkey, mergehex') + print("Diverse command line tool for working with Solo") + print("usage: %s [options] [-h]" % sys.argv[0]) + print("commands: program, solo, monitor, sign, genkey, mergehex") print( """ Examples: @@ -980,19 +1042,19 @@ Examples: c = sys.argv[1] sys.argv = sys.argv[:1] + sys.argv[2:] - sys.argv[0] = sys.argv[0] + ' ' + c + sys.argv[0] = sys.argv[0] + " " + c - if c == 'program': + if c == "program": programmer_main() - elif c == 'solo': + elif c == "solo": solo_main() - elif c == 'monitor': + elif c == "monitor": monitor_main() - elif c == 'sign': + elif c == "sign": sign_main() - elif c == 'genkey': + elif c == "genkey": genkey_main() - elif c == 'mergehex': + elif c == "mergehex": main_mergehex() else: - print('invalid command: %s' % c) + print("invalid command: %s" % c) diff --git a/web/js/wallet.js b/web/js/wallet.js index 35a7d19..f217250 100644 --- a/web/js/wallet.js +++ b/web/js/wallet.js @@ -1,25 +1,3 @@ -/** - * @license - * Copyright (C) 2018 SoloKeys, Inc. - * - * This file is part of Solo. - * - * Solo is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * Solo is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with Solo. If not, see - * - * This code is available under licenses for commercial use. - * Please contact SoloKeys for more information. - */ DEVELOPMENT = 0; var to_b58 = function(B){var A="123456789ABCDEFGHJKLMNPQRSTUVWXYZabcdefghijkmnopqrstuvwxyz";var d=[],s="",i,j,c,n;for(i in B){j=0,c=B[i];s+=c||s.length^i?"":1;while(j in d||c){n=d[j];n=n?n*256+c:c;c=n/58|0;d[j]=n%58;j++}}while(j--)s+=A[d[j]];return s};