diff --git a/targets/stm32l432/src/ams.c b/targets/stm32l432/src/ams.c
index d52da58..b0ab7d0 100644
--- a/targets/stm32l432/src/ams.c
+++ b/targets/stm32l432/src/ams.c
@@ -79,27 +79,16 @@ uint8_t ams_read_reg(uint8_t addr)
     return data;
 }
 
-// data must be 14 bytes long
-void read_reg_block2(AMS_DEVICE * dev)
-{
-	int i;
-
-    for (i = 0; i < 0x20; i++)
-	{
-		dev->buf[i] = ams_read_reg(i);
-	}
-}
-
 
 // data must be 14 bytes long
 void read_reg_block(AMS_DEVICE * dev)
 {
 	int i;
-	uint8_t mode = 0x20 | (0 );
+	uint8_t mode = 0x20 | (4 );
     flush_rx();
 
 	send_recv(mode);
-	for (i = 0; i < 0x20; i++)
+	for (i = 0x04; i < 0x0d; i++)
 	{
 		dev->buf[i] = send_recv(0);
 	}
@@ -204,6 +193,30 @@ const char * ams_get_state_string(uint8_t regval)
     return "STATE_WRONG";
 }
 
+int ams_state_is_valid(uint8_t regval)
+{
+    if (regval & AMS_STATE_INVALID)
+    {
+        return 0;
+    }
+    switch (regval & AMS_STATE_MASK)
+    {
+        case AMS_STATE_OFF:
+        case AMS_STATE_SENSE:
+        case AMS_STATE_RESOLUTION:
+        case AMS_STATE_RESOLUTION_L2:
+        case AMS_STATE_SELECTED:
+        case AMS_STATE_SECTOR2:
+        case AMS_STATE_SECTORX_2:
+        case AMS_STATE_SELECTEDX:
+        case AMS_STATE_SENSEX_L2:
+        case AMS_STATE_SENSEX:
+        case AMS_STATE_SLEEP:
+            return 1;
+    }
+    return 0;
+}
+
 void ams_print_int0(uint8_t int0)
 {
     uint32_t tag = (TAG_NFC)|(TAG_NO_TAG);
@@ -252,6 +265,7 @@ void ams_print_int1(uint8_t int0)
     printf1(tag,"\r\n");
 }
 
+
 bool ams_init()
 {
 
@@ -270,7 +284,7 @@ bool ams_init()
     // delay(10);
 
     //
-    if (1)
+    if (0)
     {
         ams_write_command(AMS_CMD_DEFAULT);
         ams_write_command(AMS_CMD_CLEAR_BUFFER);
@@ -287,6 +301,7 @@ bool ams_init()
         // enable tunneling mode and RF configuration
         ams_write_reg(AMS_REG_IC_CONF2, AMS_RFCFG_EN | AMS_TUN_MOD);
 
+
         ams_read_eeprom_block(AMS_CONFIG_UID_ADDR, block);
         printf1(TAG_NFC,"UID: "); dump_hex1(TAG_NFC,block,4);
 
@@ -295,7 +310,7 @@ bool ams_init()
 
         uint8_t sense1 = 0x44;
         uint8_t sense2 = 0x00;
-        uint8_t selr = 0x20;    // SAK
+        uint8_t selr   = 0x20;    // SAK
 
         if(block[0] != sense1 || block[1] != sense2 || block[2] != selr)
         {
@@ -318,7 +333,7 @@ bool ams_init()
         ams_read_eeprom_block(AMS_CONFIG_BLOCK1_ADDR, block);
         printf1(TAG_NFC,"conf1: "); dump_hex1(TAG_NFC,block,4);
 
-        uint8_t ic_cfg1 = AMS_CFG1_OUTPUT_RESISTANCE_100 | AMS_CFG1_VOLTAGE_LEVEL_2V0;
+        uint8_t ic_cfg1 = AMS_CFG1_OUTPUT_RESISTANCE_100 | AMS_CFG1_VOLTAGE_LEVEL_2V1;
         uint8_t ic_cfg2 = AMS_CFG2_TUN_MOD;
 
         if (block[0] != ic_cfg1 || block[1] != ic_cfg2)
diff --git a/targets/stm32l432/src/ams.h b/targets/stm32l432/src/ams.h
index ad3b94f..1f2e3a5 100644
--- a/targets/stm32l432/src/ams.h
+++ b/targets/stm32l432/src/ams.h
@@ -52,6 +52,9 @@ uint8_t ams_read_reg(uint8_t addr);
 
 void ams_write_reg(uint8_t addr, uint8_t tx);
 
+const char * ams_get_state_string(uint8_t regval);
+int ams_state_is_valid(uint8_t regval);
+
 
 #define AMS_REG_IO_CONF                 0x00
 #define AMS_REG_IC_CONF0                0x01
@@ -70,11 +73,21 @@ void ams_write_reg(uint8_t addr, uint8_t tx);
     #define AMS_STATE_SELECTED          (6 << 3)
     #define AMS_STATE_SECTOR2           (7 << 3)
     #define AMS_STATE_SECTORX_2         (0xf << 3)
-    #define AMS_STATE_SELECTEDX         (0xd << 3)
+    #define AMS_STATE_SELECTEDX         (0xe << 3)
     #define AMS_STATE_SENSEX_L2         (0xa << 3)
     #define AMS_STATE_SENSEX            (0xb << 3)
     #define AMS_STATE_SLEEP             (0x9 << 3)
 // ... //
+#define AMS_REG_MASK_INT0               0x08
+    #define AMS_MASK0_PU                (1<<7)  // power up
+    #define AMS_MASK0_WU_A              (1<<6)  // selected INT
+    #define AMS_MASK0_SLP               (1<<5)
+    #define AMS_MASK0_EEW_RF            (1<<4)
+    #define AMS_MASK0_EER_RF            (1<<3)
+    #define AMS_MASK0_RXE               (1<<2)
+    #define AMS_MASK0_TXE               (1<<1)
+    #define AMS_MASK0_XRF               (1<<0)
+#define AMS_REG_MASK_INT1               0x09
 #define AMS_REG_INT0                    0x0a
     #define AMS_INT_XRF                 (1<<0)
     #define AMS_INT_TXE                 (1<<1)
@@ -109,6 +122,11 @@ void ams_write_reg(uint8_t addr, uint8_t tx);
 
 #define AMS_CFG1_VOLTAGE_LEVEL_1V9      (0x00<<2)
 #define AMS_CFG1_VOLTAGE_LEVEL_2V0      (0x01<<2)
+#define AMS_CFG1_VOLTAGE_LEVEL_2V1      (0x02<<2)
+#define AMS_CFG1_VOLTAGE_LEVEL_2V2      (0x03<<2)
+#define AMS_CFG1_VOLTAGE_LEVEL_2V3      (0x04<<2)
+#define AMS_CFG1_VOLTAGE_LEVEL_2V4      (0x05<<2)
+#define AMS_CFG1_VOLTAGE_LEVEL_2V5      (0x06<<2)
 
 #define AMS_CFG1_OUTPUT_RESISTANCE_ZZ   0x00
 #define AMS_CFG1_OUTPUT_RESISTANCE_100  0x01