581 lines
19 KiB
C
581 lines
19 KiB
C
//=========================================================
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// src/InitDevice.c: generated by Hardware Configurator
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//
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// This file will be regenerated when saving a document.
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// leave the sections inside the "$[...]" comment tags alone
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// or they will be overwritten!
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//=========================================================
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// USER INCLUDES
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#include <SI_EFM8UB1_Register_Enums.h>
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#include "InitDevice.h"
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// USER PROTOTYPES
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// USER FUNCTIONS
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// $[Library Includes]
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#include "efm8_usb.h"
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#include "descriptors.h"
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#include "usb_0.h"
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// [Library Includes]$
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//==============================================================================
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// enter_DefaultMode_from_RESET
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//==============================================================================
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extern void enter_DefaultMode_from_RESET(void) {
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// $[Config Calls]
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// Save the SFRPAGE
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uint8_t SFRPAGE_save = SFRPAGE;
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WDT_0_enter_DefaultMode_from_RESET();
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PORTS_0_enter_DefaultMode_from_RESET();
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PORTS_1_enter_DefaultMode_from_RESET();
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PBCFG_0_enter_DefaultMode_from_RESET();
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LFOSC_0_enter_DefaultMode_from_RESET();
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CIP51_0_enter_DefaultMode_from_RESET();
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CLOCK_0_enter_DefaultMode_from_RESET();
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TIMER01_0_enter_DefaultMode_from_RESET();
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TIMER16_2_enter_DefaultMode_from_RESET();
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TIMER16_3_enter_DefaultMode_from_RESET();
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TIMER_SETUP_0_enter_DefaultMode_from_RESET();
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SPI_0_enter_DefaultMode_from_RESET();
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UART_0_enter_DefaultMode_from_RESET();
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INTERRUPT_0_enter_DefaultMode_from_RESET();
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USBLIB_0_enter_DefaultMode_from_RESET();
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// Restore the SFRPAGE
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SFRPAGE = SFRPAGE_save;
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// [Config Calls]$
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}
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extern void INTERRUPT_0_enter_DefaultMode_from_RESET(void) {
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// $[EIE1 - Extended Interrupt Enable 1]
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// [EIE1 - Extended Interrupt Enable 1]$
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// $[EIE2 - Extended Interrupt Enable 2]
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// [EIE2 - Extended Interrupt Enable 2]$
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// $[EIP1H - Extended Interrupt Priority 1 High]
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// [EIP1H - Extended Interrupt Priority 1 High]$
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// $[EIP1 - Extended Interrupt Priority 1 Low]
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// [EIP1 - Extended Interrupt Priority 1 Low]$
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// $[EIP2 - Extended Interrupt Priority 2]
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// [EIP2 - Extended Interrupt Priority 2]$
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// $[EIP2H - Extended Interrupt Priority 2 High]
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// [EIP2H - Extended Interrupt Priority 2 High]$
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// $[IE - Interrupt Enable]
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/***********************************************************************
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- Enable each interrupt according to its individual mask setting
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- Disable external interrupt 0
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- Disable external interrupt 1
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- Disable all SPI0 interrupts
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- Disable all Timer 0 interrupt
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- Disable all Timer 1 interrupt
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- Disable Timer 2 interrupt
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- Disable UART0 interrupt
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***********************************************************************/
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IE = IE_EA__ENABLED | IE_EX0__DISABLED | IE_EX1__DISABLED
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| IE_ESPI0__DISABLED | IE_ET0__DISABLED | IE_ET1__DISABLED
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| IE_ET2__DISABLED | IE_ES0__DISABLED;
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// [IE - Interrupt Enable]$
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// $[IP - Interrupt Priority]
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// [IP - Interrupt Priority]$
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// $[IPH - Interrupt Priority High]
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// [IPH - Interrupt Priority High]$
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}
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extern void USBLIB_0_enter_DefaultMode_from_RESET(void) {
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// $[USBD Init]
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USBD_Init (&initstruct);
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// [USBD Init]$
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}
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extern void CLOCK_0_enter_DefaultMode_from_RESET(void) {
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// $[HFOSC1 Setup]
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// Ensure SYSCLK is > 24 MHz before switching to HFOSC1
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SFRPAGE = 0x00;
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CLKSEL = CLKSEL_CLKSL__HFOSC0 | CLKSEL_CLKDIV__SYSCLK_DIV_1;
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while ((CLKSEL & CLKSEL_DIVRDY__BMASK) == CLKSEL_DIVRDY__NOT_READY)
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;
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// [HFOSC1 Setup]$
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// $[CLKSEL - Clock Select]
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/***********************************************************************
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- Clock derived from the Internal High Frequency Oscillator 1
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- SYSCLK is equal to selected clock source divided by 1
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***********************************************************************/
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CLKSEL = CLKSEL_CLKSL__HFOSC1 | CLKSEL_CLKDIV__SYSCLK_DIV_1;
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while ((CLKSEL & CLKSEL_DIVRDY__BMASK) == CLKSEL_DIVRDY__NOT_READY)
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;
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// [CLKSEL - Clock Select]$
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}
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extern void WDT_0_enter_DefaultMode_from_RESET(void) {
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// $[WDTCN - Watchdog Timer Control]
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SFRPAGE = 0x00;
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//Disable Watchdog with key sequence
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WDTCN = 0xDE; //First key
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WDTCN = 0xAD; //Second key
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// [WDTCN - Watchdog Timer Control]$
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}
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extern void CIP51_0_enter_DefaultMode_from_RESET(void) {
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// $[PFE0CN - Prefetch Engine Control]
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/***********************************************************************
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- Enable the prefetch engine
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- SYSCLK < 50 MHz
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***********************************************************************/
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SFRPAGE = 0x10;
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PFE0CN = PFE0CN_PFEN__ENABLED | PFE0CN_FLRT__SYSCLK_BELOW_50_MHZ;
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// [PFE0CN - Prefetch Engine Control]$
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}
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extern void PBCFG_0_enter_DefaultMode_from_RESET(void) {
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// $[XBR2 - Port I/O Crossbar 2]
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/***********************************************************************
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- Weak Pullups enabled
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- Crossbar enabled
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- UART1 I/O unavailable at Port pin
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- UART1 RTS1 unavailable at Port pin
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- UART1 CTS1 unavailable at Port pin
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***********************************************************************/
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XBR2 = XBR2_WEAKPUD__PULL_UPS_ENABLED | XBR2_XBARE__ENABLED
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| XBR2_URT1E__DISABLED | XBR2_URT1RTSE__DISABLED
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| XBR2_URT1CTSE__DISABLED;
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// [XBR2 - Port I/O Crossbar 2]$
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// $[PRTDRV - Port Drive Strength]
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// [PRTDRV - Port Drive Strength]$
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// $[XBR0 - Port I/O Crossbar 0]
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/***********************************************************************
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- UART0 TX0, RX0 routed to Port pins P0.4 and P0.5
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- SPI I/O routed to Port pins
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- SMBus 0 I/O unavailable at Port pins
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- CP0 unavailable at Port pin
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- Asynchronous CP0 unavailable at Port pin
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- CP1 unavailable at Port pin
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- Asynchronous CP1 unavailable at Port pin
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- SYSCLK unavailable at Port pin
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***********************************************************************/
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XBR0 = XBR0_URT0E__ENABLED | XBR0_SPI0E__ENABLED | XBR0_SMB0E__DISABLED
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| XBR0_CP0E__DISABLED | XBR0_CP0AE__DISABLED | XBR0_CP1E__DISABLED
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| XBR0_CP1AE__DISABLED | XBR0_SYSCKE__DISABLED;
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// [XBR0 - Port I/O Crossbar 0]$
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// $[XBR1 - Port I/O Crossbar 1]
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// [XBR1 - Port I/O Crossbar 1]$
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}
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extern void TIMER_SETUP_0_enter_DefaultMode_from_RESET(void) {
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// $[CKCON0 - Clock Control 0]
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/***********************************************************************
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- System clock divided by 4
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- Counter/Timer 0 uses the clock defined by the prescale field, SCA
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- Timer 2 high byte uses the clock defined by T2XCLK in TMR2CN0
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- Timer 2 low byte uses the clock defined by T2XCLK in TMR2CN0
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- Timer 3 high byte uses the clock defined by T3XCLK in TMR3CN0
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- Timer 3 low byte uses the clock defined by T3XCLK in TMR3CN0
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- Timer 1 uses the system clock
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***********************************************************************/
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CKCON0 = CKCON0_SCA__SYSCLK_DIV_4 | CKCON0_T0M__PRESCALE
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| CKCON0_T2MH__EXTERNAL_CLOCK | CKCON0_T2ML__EXTERNAL_CLOCK
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| CKCON0_T3MH__EXTERNAL_CLOCK | CKCON0_T3ML__EXTERNAL_CLOCK
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| CKCON0_T1M__SYSCLK;
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// [CKCON0 - Clock Control 0]$
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// $[CKCON1 - Clock Control 1]
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// [CKCON1 - Clock Control 1]$
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// $[TMOD - Timer 0/1 Mode]
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/***********************************************************************
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- Mode 0, 13-bit Counter/Timer
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- Mode 2, 8-bit Counter/Timer with Auto-Reload
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- Timer Mode
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- Timer 0 enabled when TR0 = 1 irrespective of INT0 logic level
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- Timer Mode
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- Timer 1 enabled when TR1 = 1 irrespective of INT1 logic level
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***********************************************************************/
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TMOD = TMOD_T0M__MODE0 | TMOD_T1M__MODE2 | TMOD_CT0__TIMER
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| TMOD_GATE0__DISABLED | TMOD_CT1__TIMER | TMOD_GATE1__DISABLED;
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// [TMOD - Timer 0/1 Mode]$
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// $[TCON - Timer 0/1 Control]
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/***********************************************************************
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- Start Timer 1 running
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***********************************************************************/
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TCON |= TCON_TR1__RUN;
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// [TCON - Timer 0/1 Control]$
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}
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extern void UARTE_1_enter_DefaultMode_from_RESET(void) {
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// $[SBCON1 - UART1 Baud Rate Generator Control]
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/***********************************************************************
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- Enable the baud rate generator
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- Prescaler = 8
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***********************************************************************/
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SFRPAGE = 0x20;
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SBCON1 = SBCON1_BREN__ENABLED | SBCON1_BPS__DIV_BY_8;
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// [SBCON1 - UART1 Baud Rate Generator Control]$
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// $[SMOD1 - UART1 Mode]
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// [SMOD1 - UART1 Mode]$
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// $[UART1FCN0 - UART1 FIFO Control 0]
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// [UART1FCN0 - UART1 FIFO Control 0]$
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// $[SBRLH1 - UART1 Baud Rate Generator High Byte]
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/***********************************************************************
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- UART1 Baud Rate Reload High = 0xFF
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***********************************************************************/
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SBRLH1 = (0xFF << SBRLH1_BRH__SHIFT);
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// [SBRLH1 - UART1 Baud Rate Generator High Byte]$
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// $[SBRLL1 - UART1 Baud Rate Generator Low Byte]
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/***********************************************************************
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- UART1 Baud Rate Reload Low = 0xE6
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***********************************************************************/
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SBRLL1 = (0xE6 << SBRLL1_BRL__SHIFT);
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// [SBRLL1 - UART1 Baud Rate Generator Low Byte]$
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// $[UART1LIN - UART1 LIN Configuration]
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// [UART1LIN - UART1 LIN Configuration]$
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// $[SCON1 - UART1 Serial Port Control]
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/***********************************************************************
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- UART1 reception enabled
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***********************************************************************/
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SCON1 |= SCON1_REN__RECEIVE_ENABLED;
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// [SCON1 - UART1 Serial Port Control]$
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// $[UART1FCN1 - UART1 FIFO Control 1]
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// [UART1FCN1 - UART1 FIFO Control 1]$
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}
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extern void TIMER16_2_enter_DefaultMode_from_RESET(void) {
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// $[Timer Initialization]
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// Save Timer Configuration
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uint8_t TMR2CN0_TR2_save;
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TMR2CN0_TR2_save = TMR2CN0 & TMR2CN0_TR2__BMASK;
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// Stop Timer
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TMR2CN0 &= ~(TMR2CN0_TR2__BMASK);
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// [Timer Initialization]$
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// $[TMR2CN1 - Timer 2 Control 1]
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// [TMR2CN1 - Timer 2 Control 1]$
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// $[TMR2CN0 - Timer 2 Control]
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// [TMR2CN0 - Timer 2 Control]$
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// $[TMR2H - Timer 2 High Byte]
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// [TMR2H - Timer 2 High Byte]$
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// $[TMR2L - Timer 2 Low Byte]
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// [TMR2L - Timer 2 Low Byte]$
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// $[TMR2RLH - Timer 2 Reload High Byte]
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/***********************************************************************
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- Timer 2 Reload High Byte = 0x63
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***********************************************************************/
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TMR2RLH = (0x63 << TMR2RLH_TMR2RLH__SHIFT);
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// [TMR2RLH - Timer 2 Reload High Byte]$
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// $[TMR2RLL - Timer 2 Reload Low Byte]
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/***********************************************************************
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- Timer 2 Reload Low Byte = 0xC0
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***********************************************************************/
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TMR2RLL = (0xC0 << TMR2RLL_TMR2RLL__SHIFT);
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// [TMR2RLL - Timer 2 Reload Low Byte]$
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// $[TMR2CN0]
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// [TMR2CN0]$
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// $[Timer Restoration]
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// Restore Timer Configuration
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TMR2CN0 |= TMR2CN0_TR2_save;
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// [Timer Restoration]$
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}
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extern void TIMER16_3_enter_DefaultMode_from_RESET(void) {
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// $[Timer Initialization]
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// Save Timer Configuration
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uint8_t TMR3CN0_TR3_save;
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TMR3CN0_TR3_save = TMR3CN0 & TMR3CN0_TR3__BMASK;
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// Stop Timer
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TMR3CN0 &= ~(TMR3CN0_TR3__BMASK);
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// [Timer Initialization]$
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// $[TMR3CN1 - Timer 3 Control 1]
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// [TMR3CN1 - Timer 3 Control 1]$
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// $[TMR3CN0 - Timer 3 Control]
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/***********************************************************************
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- Timer 3 clock is the low-frequency oscillator divided by 8
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***********************************************************************/
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TMR3CN0 |= TMR3CN0_T3XCLK__LFOSC_DIV_8;
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// [TMR3CN0 - Timer 3 Control]$
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// $[TMR3H - Timer 3 High Byte]
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// [TMR3H - Timer 3 High Byte]$
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// $[TMR3L - Timer 3 Low Byte]
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// [TMR3L - Timer 3 Low Byte]$
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// $[TMR3RLH - Timer 3 Reload High Byte]
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// [TMR3RLH - Timer 3 Reload High Byte]$
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// $[TMR3RLL - Timer 3 Reload Low Byte]
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// [TMR3RLL - Timer 3 Reload Low Byte]$
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// $[TMR3CN0]
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/***********************************************************************
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- Start Timer 3 running
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***********************************************************************/
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TMR3CN0 |= TMR3CN0_TR3__RUN;
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// [TMR3CN0]$
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// $[Timer Restoration]
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// Restore Timer Configuration
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TMR3CN0 |= TMR3CN0_TR3_save;
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// [Timer Restoration]$
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}
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extern void PORTS_0_enter_DefaultMode_from_RESET(void) {
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// $[P0 - Port 0 Pin Latch]
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// [P0 - Port 0 Pin Latch]$
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// $[P0MDOUT - Port 0 Output Mode]
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/***********************************************************************
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- P0.0 output is open-drain
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- P0.1 output is open-drain
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- P0.2 output is open-drain
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- P0.3 output is open-drain
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- P0.4 output is push-pull
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- P0.5 output is open-drain
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- P0.6 output is open-drain
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- P0.7 output is push-pull
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***********************************************************************/
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P0MDOUT = P0MDOUT_B0__OPEN_DRAIN | P0MDOUT_B1__OPEN_DRAIN
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| P0MDOUT_B2__OPEN_DRAIN | P0MDOUT_B3__OPEN_DRAIN
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| P0MDOUT_B4__PUSH_PULL | P0MDOUT_B5__OPEN_DRAIN
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| P0MDOUT_B6__OPEN_DRAIN | P0MDOUT_B7__PUSH_PULL;
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// [P0MDOUT - Port 0 Output Mode]$
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// $[P0MDIN - Port 0 Input Mode]
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// [P0MDIN - Port 0 Input Mode]$
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// $[P0SKIP - Port 0 Skip]
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/***********************************************************************
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- P0.0 pin is skipped by the crossbar
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- P0.1 pin is skipped by the crossbar
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- P0.2 pin is skipped by the crossbar
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- P0.3 pin is skipped by the crossbar
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- P0.4 pin is not skipped by the crossbar
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- P0.5 pin is not skipped by the crossbar
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- P0.6 pin is not skipped by the crossbar
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- P0.7 pin is not skipped by the crossbar
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***********************************************************************/
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P0SKIP = P0SKIP_B0__SKIPPED | P0SKIP_B1__SKIPPED | P0SKIP_B2__SKIPPED
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| P0SKIP_B3__SKIPPED | P0SKIP_B4__NOT_SKIPPED
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| P0SKIP_B5__NOT_SKIPPED | P0SKIP_B6__NOT_SKIPPED
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| P0SKIP_B7__NOT_SKIPPED;
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// [P0SKIP - Port 0 Skip]$
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// $[P0MASK - Port 0 Mask]
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// [P0MASK - Port 0 Mask]$
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// $[P0MAT - Port 0 Match]
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// [P0MAT - Port 0 Match]$
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}
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extern void PORTS_1_enter_DefaultMode_from_RESET(void) {
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// $[P1 - Port 1 Pin Latch]
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/***********************************************************************
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- P1.0 is high. Set P1.0 to drive or float high
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- P1.1 is high. Set P1.1 to drive or float high
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- P1.2 is low. Set P1.2 to drive low
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- P1.3 is high. Set P1.3 to drive or float high
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- P1.4 is high. Set P1.4 to drive or float high
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- P1.5 is high. Set P1.5 to drive or float high
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- P1.6 is high. Set P1.6 to drive or float high
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- P1.7 is high. Set P1.7 to drive or float high
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***********************************************************************/
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P1 = P1_B0__HIGH | P1_B1__HIGH | P1_B2__LOW | P1_B3__HIGH | P1_B4__HIGH
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| P1_B5__HIGH | P1_B6__HIGH | P1_B7__HIGH;
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// [P1 - Port 1 Pin Latch]$
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// $[P1MDOUT - Port 1 Output Mode]
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/***********************************************************************
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- P1.0 output is open-drain
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- P1.1 output is push-pull
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- P1.2 output is open-drain
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- P1.3 output is open-drain
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- P1.4 output is push-pull
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- P1.5 output is push-pull
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- P1.6 output is push-pull
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- P1.7 output is open-drain
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***********************************************************************/
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P1MDOUT = P1MDOUT_B0__OPEN_DRAIN | P1MDOUT_B1__PUSH_PULL
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| P1MDOUT_B2__OPEN_DRAIN | P1MDOUT_B3__OPEN_DRAIN
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| P1MDOUT_B4__PUSH_PULL | P1MDOUT_B5__PUSH_PULL
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| P1MDOUT_B6__PUSH_PULL | P1MDOUT_B7__OPEN_DRAIN;
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// [P1MDOUT - Port 1 Output Mode]$
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// $[P1MDIN - Port 1 Input Mode]
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// [P1MDIN - Port 1 Input Mode]$
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// $[P1SKIP - Port 1 Skip]
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// [P1SKIP - Port 1 Skip]$
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// $[P1MASK - Port 1 Mask]
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// [P1MASK - Port 1 Mask]$
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// $[P1MAT - Port 1 Match]
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// [P1MAT - Port 1 Match]$
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}
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extern void PORTS_2_enter_DefaultMode_from_RESET(void) {
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// $[P2 - Port 2 Pin Latch]
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/***********************************************************************
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- P2.0 is low. Set P2.0 to drive low
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- P2.1 is high. Set P2.1 to drive or float high
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- P2.2 is high. Set P2.2 to drive or float high
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- P2.3 is high. Set P2.3 to drive or float high
|
|
***********************************************************************/
|
|
P2 = P2_B0__LOW | P2_B1__HIGH | P2_B2__HIGH | P2_B3__HIGH;
|
|
// [P2 - Port 2 Pin Latch]$
|
|
|
|
// $[P2MDOUT - Port 2 Output Mode]
|
|
/***********************************************************************
|
|
- P2.0 output is push-pull
|
|
- P2.1 output is open-drain
|
|
- P2.2 output is open-drain
|
|
- P2.3 output is open-drain
|
|
***********************************************************************/
|
|
P2MDOUT = P2MDOUT_B0__PUSH_PULL | P2MDOUT_B1__OPEN_DRAIN
|
|
| P2MDOUT_B2__OPEN_DRAIN | P2MDOUT_B3__OPEN_DRAIN;
|
|
// [P2MDOUT - Port 2 Output Mode]$
|
|
|
|
// $[P2MDIN - Port 2 Input Mode]
|
|
// [P2MDIN - Port 2 Input Mode]$
|
|
|
|
// $[P2SKIP - Port 2 Skip]
|
|
// [P2SKIP - Port 2 Skip]$
|
|
|
|
// $[P2MASK - Port 2 Mask]
|
|
// [P2MASK - Port 2 Mask]$
|
|
|
|
// $[P2MAT - Port 2 Match]
|
|
// [P2MAT - Port 2 Match]$
|
|
|
|
}
|
|
|
|
extern void TIMER01_0_enter_DefaultMode_from_RESET(void) {
|
|
// $[Timer Initialization]
|
|
//Save Timer Configuration
|
|
uint8_t TCON_save;
|
|
TCON_save = TCON;
|
|
//Stop Timers
|
|
TCON &= ~TCON_TR0__BMASK & ~TCON_TR1__BMASK;
|
|
|
|
// [Timer Initialization]$
|
|
|
|
// $[TH0 - Timer 0 High Byte]
|
|
// [TH0 - Timer 0 High Byte]$
|
|
|
|
// $[TL0 - Timer 0 Low Byte]
|
|
// [TL0 - Timer 0 Low Byte]$
|
|
|
|
// $[TH1 - Timer 1 High Byte]
|
|
/***********************************************************************
|
|
- Timer 1 High Byte = 0x30
|
|
***********************************************************************/
|
|
TH1 = (0x30 << TH1_TH1__SHIFT);
|
|
// [TH1 - Timer 1 High Byte]$
|
|
|
|
// $[TL1 - Timer 1 Low Byte]
|
|
// [TL1 - Timer 1 Low Byte]$
|
|
|
|
// $[Timer Restoration]
|
|
//Restore Timer Configuration
|
|
TCON |= (TCON_save & TCON_TR0__BMASK) | (TCON_save & TCON_TR1__BMASK);
|
|
|
|
// [Timer Restoration]$
|
|
|
|
}
|
|
|
|
extern void UART_0_enter_DefaultMode_from_RESET(void) {
|
|
// $[SCON0 - UART0 Serial Port Control]
|
|
/***********************************************************************
|
|
- UART0 reception enabled
|
|
***********************************************************************/
|
|
SCON0 |= SCON0_REN__RECEIVE_ENABLED;
|
|
// [SCON0 - UART0 Serial Port Control]$
|
|
|
|
}
|
|
|
|
extern void SPI_0_enter_DefaultMode_from_RESET(void) {
|
|
// $[SPI0CKR - SPI0 Clock Rate]
|
|
/***********************************************************************
|
|
- SPI0 Clock Rate = 0x0B
|
|
***********************************************************************/
|
|
SPI0CKR = (0x0B << SPI0CKR_SPI0CKR__SHIFT);
|
|
// [SPI0CKR - SPI0 Clock Rate]$
|
|
|
|
// $[SPI0FCN0 - SPI0 FIFO Control 0]
|
|
// [SPI0FCN0 - SPI0 FIFO Control 0]$
|
|
|
|
// $[SPI0FCN1 - SPI0 FIFO Control 1]
|
|
// [SPI0FCN1 - SPI0 FIFO Control 1]$
|
|
|
|
// $[SPI0CFG - SPI0 Configuration]
|
|
// [SPI0CFG - SPI0 Configuration]$
|
|
|
|
// $[SPI0CN0 - SPI0 Control]
|
|
/***********************************************************************
|
|
- Enable the SPI module
|
|
- 3-Wire Slave or 3-Wire Master Mode
|
|
***********************************************************************/
|
|
SPI0CN0 &= ~SPI0CN0_NSSMD__FMASK;
|
|
SPI0CN0 |= SPI0CN0_SPIEN__ENABLED;
|
|
// [SPI0CN0 - SPI0 Control]$
|
|
|
|
}
|
|
|
|
extern void LFOSC_0_enter_DefaultMode_from_RESET(void) {
|
|
// $[LFO0CN - Low Frequency Oscillator Control]
|
|
/***********************************************************************
|
|
- Internal L-F Oscillator Enabled
|
|
- Divide by 8 selected
|
|
***********************************************************************/
|
|
LFO0CN &= ~LFO0CN_OSCLD__FMASK;
|
|
LFO0CN |= LFO0CN_OSCLEN__ENABLED;
|
|
// [LFO0CN - Low Frequency Oscillator Control]$
|
|
|
|
// $[Wait for LFOSC Ready]
|
|
while ((LFO0CN & LFO0CN_OSCLRDY__BMASK) != LFO0CN_OSCLRDY__SET)
|
|
;
|
|
// [Wait for LFOSC Ready]$
|
|
|
|
}
|
|
|