bug fixes, now it boots application
This commit is contained in:
Conor Patrick
parent
ac7950f4c4
commit
9ff5dc6373
@ -1463,7 +1463,7 @@ uint8_t ctap_request(uint8_t * pkt_raw, int length, CTAP_RESPONSE * resp)
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else
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{
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printf2(TAG_ERR, "unwanted GET_NEXT_ASSERTION. lastcmd == 0x%02x\n", getAssertionState.lastcmd);
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dump_hex1(TAG_GREEN, &getAssertionState, sizeof(getAssertionState));
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dump_hex1(TAG_GREEN, (uint8_t*)&getAssertionState, sizeof(getAssertionState));
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status = CTAP2_ERR_NOT_ALLOWED;
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}
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break;
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11
fido2/main.c
11
fido2/main.c
@ -61,11 +61,15 @@ int main(int argc, char * argv[])
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device_init();
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printf1(TAG_GEN,"init device\n");
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printf1(TAG_GEN,"init ctaphid\n");
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ctaphid_init();
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usbhid_init();
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printf1(TAG_GEN,"init usb\n");
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ctaphid_init();
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printf1(TAG_GEN,"init ctaphid\n");
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printf1(TAG_GEN,"init ctap\n");
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ctap_init();
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printf1(TAG_GEN,"init ctap\n");
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memset(hidmsg,0,sizeof(hidmsg));
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@ -76,7 +80,6 @@ int main(int argc, char * argv[])
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{
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if (millis() - t1 > 100)
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{
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/*printf1(TAG_GEN,"heartbeat %ld\n", beat++);*/
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heartbeat();
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t1 = millis();
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}
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@ -42,7 +42,7 @@ CHIP=STM32L442xx
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DEFINES = -D$(CHIP) -DAES256=1 -DUSE_FULL_LL_DRIVER -DAPP_CONFIG=\"app.h\"
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# DEFINES += -DTEST_SOLO_STM32 -DTEST -DTEST_FIFO=1
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CFLAGS=$(INC) -c $(DEFINES) -Wall -fdata-sections -ffunction-sections $(HW)
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CFLAGS=$(INC) -c $(DEFINES) -Wall -fdata-sections -ffunction-sections $(HW) -g
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LDFLAGS_LIB=$(HW) $(SEARCH) -specs=nano.specs -specs=nosys.specs -Wl,--gc-sections -u _printf_float -lnosys
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LDFLAGS=$(HW) $(LDFLAGS_LIB) -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref -ltinycbor
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@ -68,7 +68,7 @@ all: $(TARGET).elf
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$(CP) -O ihex $^ $(TARGET).hex
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bootloader:
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make -f bootloader.mk
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$(MAKE) -f bootloader.mk
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clean:
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rm -f *.o src/*.o src/*.elf bootloader/*.o $(OBJ)
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@ -78,7 +78,9 @@ flash: $(TARGET).hex
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STM32_Programmer_CLI -c port=SWD -halt -d $(TARGET).hex -rst
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flashall:
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# STM32_Programmer_CLI -c port=SWD -halt -e all --readunprotect
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#$(MAKE) -f bootloader.mk -j8
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python .\merge_hex.py .\solo.hex .\bootloader.hex all.hex
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STM32_Programmer_CLI -c port=SWD -halt -e all --readunprotect
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STM32_Programmer_CLI -c port=SWD -halt -d all.hex -rst
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detach:
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@ -16,7 +16,7 @@
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#define ENABLE_U2F_EXTENSIONS
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// #define ENABLE_U2F
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#define APPLICATION_JUMP_ADDR (0x08000000 + 32 * 2048)
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#define APPLICATION_JUMP_ADDR (0x08000000 + 32 * 1024)
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#define DISABLE_CTAPHID_PING
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#define DISABLE_CTAPHID_WINK
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@ -37,46 +37,52 @@
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uint8_t REBOOT_FLAG = 0;
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#if defined ( __CC_ARM )
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__asm void BOOT_jump(uint32_t sp, uint32_t pc)
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// void __attribute__((optimize("O0"))) BOOT_boot(void)
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void BOOT_boot(void)
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{
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/* Set new MSP, PSP based on SP (r0)*/
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msr msp, r0
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msr psp, r0
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/* Jump to PC (r1)*/
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bx r1
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}
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#else
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void __attribute__((optimize("O0"))) BOOT_jump(uint32_t sp, uint32_t pc)
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{
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(void) sp;
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(void) pc;
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/* Set new MSP, PSP based on SP (r0)*/
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__asm("msr msp, r0");
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__asm("msr psp, r0");
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/* Jump to PC (r1)*/
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__asm("mov pc, r1");
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}
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#endif
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uint32_t sp;
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typedef void (*pFunction)(void);
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pFunction jump;
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void __attribute__((optimize("O0"))) BOOT_boot(void)
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{
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uint32_t pc, sp;
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/* Reset the RCC clock configuration to the default reset state ------------*/
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/* Set MSION bit */
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RCC->CR |= RCC_CR_MSION;
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/* Reset CFGR register */
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RCC->CFGR = 0x00000000U;
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/* Reset HSEON, CSSON , HSION, and PLLON bits */
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RCC->CR &= 0xEAF6FFFFU;
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/* Reset PLLCFGR register */
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RCC->PLLCFGR = 0x00001000U;
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/* Reset HSEBYP bit */
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RCC->CR &= 0xFFFBFFFFU;
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/* Disable all interrupts */
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RCC->CIER = 0x00000000U;
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uint32_t *bootAddress = (uint32_t *)(APPLICATION_JUMP_ADDR);
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printf("stack addr: %02lx\r\n",bootAddress[0]);
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printf("jmp addr: %02lx\r\n",bootAddress[1]);
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/* Set new vector table */
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SCB->VTOR = (uint32_t)bootAddress;
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SCB->VTOR = APPLICATION_JUMP_ADDR;
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/* Read new SP and PC from vector table */
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sp = bootAddress[0];
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pc = bootAddress[1];
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jump = (pFunction)bootAddress[1];
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/* Do a jump by loading the PC and SP into the CPU registers */
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BOOT_jump(sp, pc);
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__set_MSP(sp);
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jump();
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//jmp();
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}
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int main(int argc, char * argv[])
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@ -126,9 +132,11 @@ int main(int argc, char * argv[])
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printf1(TAG_RED,"Not authorized to boot\r\n");
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}
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printf1(TAG_GEN,"init ctaphid\n");
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ctaphid_init();
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usbhid_init();
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printf1(TAG_GEN,"init usb\n");
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ctaphid_init();
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printf1(TAG_GEN,"init ctaphid\n");
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memset(hidmsg,0,sizeof(hidmsg));
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@ -20,9 +20,9 @@ first = IntelHex(sys.argv[1])
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for i in range(2, len(sys.argv)-1):
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first.merge(IntelHex( sys.argv[i] ), overlap = 'replace')
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first[AUTH_WORD_ADDR] = 4
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first[AUTH_WORD_ADDR+1] = 5
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first[AUTH_WORD_ADDR+2] = 6
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first[AUTH_WORD_ADDR+3] = 7
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first[AUTH_WORD_ADDR] = 0
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first[AUTH_WORD_ADDR+1] = 0
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first[AUTH_WORD_ADDR+2] = 0
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first[AUTH_WORD_ADDR+3] = 0
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first.tofile(sys.argv[len(sys.argv)-1], format='hex')
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@ -4,7 +4,7 @@
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#define DEBUG_UART USART1
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#define DEBUG_LEVEL 0
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#define DEBUG_LEVEL 1
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#define NON_BLOCK_PRINTING 0
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@ -34,7 +34,7 @@
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#define RK_END_PAGE (PAGES - 14 + RK_NUM_PAGES)
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#define APPLICATION_START_PAGE (0)
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#define APPLICATION_START_PAGE (16)
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#define APPLICATION_START_ADDR flash_addr(APPLICATION_START_PAGE)
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#define APPLICATION_END_PAGE ((PAGES - 19)) // 119 is NOT included in application
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@ -122,8 +122,8 @@ void usb_init(void);
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void usbhid_init()
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{
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usb_init();
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printf1(TAG_GEN,"hello solo\r\n");
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}
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int usbhid_recv(uint8_t * msg)
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{
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if (fifo_hidmsg_size())
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@ -21,6 +21,7 @@
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#include "usbd_desc.h"
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#include "usbd_hid.h"
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#include "device.h"
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#include APP_CONFIG
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/* USER CODE BEGIN Includes */
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@ -45,59 +46,34 @@ void _Error_Handler(char *file, int line);
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void hw_init(void)
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{
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* MCU Configuration----------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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#ifdef IS_BOOTLOADER
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SCB->VTOR = FLASH_BASE;
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#else
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#endif
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LL_Init();
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// enable power clock
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SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
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// enable USB power
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SET_BIT(PWR->CR2, PWR_CR2_USV);
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SystemClock_Config(); // TODO bootloader should not change clk freq.
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// Enable USB Clock
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SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN);
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_TIM2_Init();
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MX_TIM2_Init(); // PWM for LEDs
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MX_TIM6_Init();
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#ifndef TEST_SOLO_STM32
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MX_USART1_UART_Init();
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MX_TIM6_Init(); // ~1 ms timer
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#if DEBUG_LEVEL > 0
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MX_USART1_UART_Init();// debug uart
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#endif
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MX_RNG_Init();
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#endif
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TIM6->SR = 0;
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__enable_irq();
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NVIC_EnableIRQ(TIM6_IRQn);
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#ifndef TEST_SOLO_STM32
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#endif
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}
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static void LL_Init(void)
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{
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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@ -203,6 +179,12 @@ void SystemClock_Config(void)
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void usb_init()
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{
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// enable USB power
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SET_BIT(PWR->CR2, PWR_CR2_USV);
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// Enable USB Clock
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SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN);
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USBD_Init(&Solo_USBD_Device, &Solo_Desc, 0);
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USBD_RegisterClass(&Solo_USBD_Device, &USBD_HID);
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USBD_Start(&Solo_USBD_Device);
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@ -219,12 +219,6 @@ void SystemInit(void)
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/* Disable all interrupts */
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RCC->CIER = 0x00000000U;
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/* Configure the Vector Table location add offset address ------------------*/
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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#endif
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}
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/**
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@ -42,7 +42,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
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MEMORY
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{
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/* First 32 KB is bootloader */
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 206K-8 /* Leave out 18 Kb at end for data */
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/*FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 238K-8 [> Leave out 18 Kb at end for data <]*/
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FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 206K-8 /* Leave out 18 Kb at end for data */
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K
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SRAM2 (rw) : ORIGIN = 0x10000000, LENGTH = 16K
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}
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