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build for solo

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This commit is contained in:
Conor Patrick
2018-10-19 22:08:10 -04:00
parent c0a639cde5
commit ae26e0c167
4 changed files with 179 additions and 81 deletions
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146
targets/stm32l442/src/main.c
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@@ -12,10 +12,10 @@
#define Error_Handler() _Error_Handler(__FILE__,__LINE__)
#define VCP_TX_Pin LL_GPIO_PIN_2
#define VCP_RX_Pin LL_GPIO_PIN_15
#define VCP_TX_GPIO_Port GPIOA
#define VCP_RX_GPIO_Port GPIOA
#define VCP_TX_Pin LL_GPIO_PIN_6
#define VCP_RX_Pin LL_GPIO_PIN_7
#define VCP_TX_GPIO_Port GPIOB
#define VCP_RX_GPIO_Port GPIOB
void _Error_Handler(char *file, int line);
@@ -37,7 +37,7 @@ void uart_write(USART_TypeDef *uart, uint8_t * data, uint32_t len)
}
}
void MX_USART2_UART_Init(void)
void MX_USART1_UART_Init(void)
{
LL_USART_InitTypeDef USART_InitStruct;
@@ -45,27 +45,19 @@ void MX_USART2_UART_Init(void)
LL_GPIO_InitTypeDef GPIO_InitStruct;
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA15 (JTDI) ------> USART2_RX
/**USART1 GPIO Configuration
PB6 ------> USART1_TX
PB7 ------> USART1_RX
*/
GPIO_InitStruct.Pin = VCP_TX_Pin;
GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
LL_GPIO_Init(VCP_TX_GPIO_Port, &GPIO_InitStruct);
GPIO_InitStruct.Pin = VCP_RX_Pin;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_3;
LL_GPIO_Init(VCP_RX_GPIO_Port, &GPIO_InitStruct);
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
USART_InitStruct.BaudRate = 115200;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
@@ -74,96 +66,85 @@ void MX_USART2_UART_Init(void)
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART2, &USART_InitStruct);
LL_USART_Init(USART1, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART2);
LL_USART_ConfigAsyncMode(USART1);
LL_USART_Enable(USART2);
LL_USART_Enable(USART1);
}
// Generated via cube
void SystemClock_Config(void)
{
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
{
Error_Handler();
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
{
Error_Handler();
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_MSI_Enable();
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
}
LL_RCC_MSI_EnablePLLMode();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_11);
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetCalibTrimming(0);
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_11);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
LL_RCC_MSI_SetCalibTrimming(0);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_PWR_EnableBkUpAccess();
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_16);
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_LOW);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_16);
LL_RCC_LSE_Enable();
LL_Init1msTick(48000000);
/* Wait till LSE is ready */
while(LL_RCC_LSE_IsReady() != 1)
{
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
}
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
LL_SetSystemCoreClock(48000000);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
{
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_16);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_16);
LL_Init1msTick(48000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(48000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1);
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
}
#define LED_PIN LL_GPIO_PIN_3
#define LED_PORT GPIOB
#define LED_PIN_G LL_GPIO_PIN_0
#define LED_PIN_B LL_GPIO_PIN_1
#define LED_PIN_R LL_GPIO_PIN_2
#define LED_PORT GPIOA
void hw_init()
{
SystemClock_Config();
/*SystemClock_Config();*/
// initialize GPIO
// Enable clock to A,B,C
SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN);
SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN);
SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN);
LL_GPIO_SetPinMode(LED_PORT, LED_PIN, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinMode(LED_PORT, LED_PIN_R, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinMode(LED_PORT, LED_PIN_G, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinMode(LED_PORT, LED_PIN_B, LL_GPIO_MODE_OUTPUT);
/* NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);*/
/*SystemClock_Config();*/
MX_USART2_UART_Init();
/*MX_USART1_UART_Init();*/
}
int main(void)
@@ -174,10 +155,25 @@ int main(void)
while (1)
{
LL_GPIO_TogglePin(LED_PORT, LED_PIN);
delay(500);
/*LL_GPIO_TogglePin(LED_PORT, LED_PIN_R);*/
/*LL_GPIO_TogglePin(LED_PORT, LED_PIN_R);*/
/*LL_GPIO_TogglePin(LED_PORT, LED_PIN_G);*/
/*LL_GPIO_TogglePin(LED_PORT, LED_PIN_B);*/
LL_GPIO_SetOutputPin(LED_PORT, LED_PIN_R);
LL_GPIO_SetOutputPin(LED_PORT, LED_PIN_G);
LL_GPIO_SetOutputPin(LED_PORT, LED_PIN_B);
LL_GPIO_ResetOutputPin(LED_PORT, LED_PIN_R);
/*LL_GPIO_ResetOutputPin(LED_PORT, LED_PIN_G);*/
/*LL_GPIO_ResetOutputPin(LED_PORT, LED_PIN_B);*/
/*delay(10);*/
msg[3] = i++;
uart_write(USART2, msg, sizeof(msg));
while (1)
;
/*uart_write(USART2, msg, sizeof(msg));*/
}
}